lib.rs 2.0 MB

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  1. # ! [doc = "Peripheral access API for CH569 microcontrollers (generated using svd2rust v0.19.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
  2. svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
  3. # ! [deny (const_err)]
  4. # ! [deny (dead_code)]
  5. # ! [deny (improper_ctypes)]
  6. # ! [deny (missing_docs)]
  7. # ! [deny (no_mangle_generic_items)]
  8. # ! [deny (non_shorthand_field_patterns)]
  9. # ! [deny (overflowing_literals)]
  10. # ! [deny (path_statements)]
  11. # ! [deny (patterns_in_fns_without_body)]
  12. # ! [deny (private_in_public)]
  13. # ! [deny (unconditional_recursion)]
  14. # ! [deny (unused_allocation)]
  15. # ! [deny (unused_comparisons)]
  16. # ! [deny (unused_parens)]
  17. # ! [deny (while_true)]
  18. # ! [allow (non_camel_case_types)]
  19. # ! [allow (non_snake_case)]
  20. # ! [no_std]
  21. use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [allow (unused_imports)]
  22. use generic :: * ; # [doc = r"Common register and bit access and modify traits"]
  23. pub mod generic { use core :: marker ; # [doc = " Raw register type"]
  24. pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."]
  25. type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."]
  26. # [doc = ""]
  27. # [doc = " Registers marked with `Writable` can be also `modify`'ed."]
  28. pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."]
  29. type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."]
  30. # [doc = ""]
  31. # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."]
  32. # [doc = ""]
  33. # [doc = " Registers marked with `Readable` can be also `modify`'ed."]
  34. pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."]
  35. type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."]
  36. # [doc = ""]
  37. # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"]
  38. # [doc = " register by using the `reset` method."]
  39. pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."]
  40. fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."]
  41. # [repr (transparent)]
  42. pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."]
  43. # [doc = ""]
  44. # [doc = " ```ignore"]
  45. # [doc = " let reg_ptr = periph.reg.as_ptr();"]
  46. # [doc = " ```"]
  47. # [inline (always)]
  48. pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."]
  49. # [doc = ""]
  50. # [doc = " You can read the raw contents of a register by using `bits`:"]
  51. # [doc = " ```ignore"]
  52. # [doc = " let bits = periph.reg.read().bits();"]
  53. # [doc = " ```"]
  54. # [doc = " or get the content of a particular field of a register:"]
  55. # [doc = " ```ignore"]
  56. # [doc = " let reader = periph.reg.read();"]
  57. # [doc = " let bits = reader.field1().bits();"]
  58. # [doc = " let flag = reader.field2().bit_is_set();"]
  59. # [doc = " ```"]
  60. # [inline (always)]
  61. pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."]
  62. # [doc = ""]
  63. # [doc = " Resets the register to its initial state."]
  64. # [inline (always)]
  65. pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."]
  66. # [doc = ""]
  67. # [doc = " You can write raw bits into a register:"]
  68. # [doc = " ```ignore"]
  69. # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
  70. # [doc = " ```"]
  71. # [doc = " or write only the fields you need:"]
  72. # [doc = " ```ignore"]
  73. # [doc = " periph.reg.write(|w| w"]
  74. # [doc = " .field1().bits(newfield1bits)"]
  75. # [doc = " .field2().set_bit()"]
  76. # [doc = " .field3().variant(VARIANT)"]
  77. # [doc = " );"]
  78. # [doc = " ```"]
  79. # [doc = " In the latter case, other fields will be set to their reset value."]
  80. # [inline (always)]
  81. pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."]
  82. # [doc = ""]
  83. # [doc = " Similar to `write`, but unused bits will contain 0."]
  84. # [inline (always)]
  85. pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."]
  86. # [doc = ""]
  87. # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
  88. # [doc = " ```ignore"]
  89. # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
  90. # [doc = " r.bits() | 3"]
  91. # [doc = " ) });"]
  92. # [doc = " ```"]
  93. # [doc = " or"]
  94. # [doc = " ```ignore"]
  95. # [doc = " periph.reg.modify(|_, w| w"]
  96. # [doc = " .field1().bits(newfield1bits)"]
  97. # [doc = " .field2().set_bit()"]
  98. # [doc = " .field3().variant(VARIANT)"]
  99. # [doc = " );"]
  100. # [doc = " ```"]
  101. # [doc = " Other fields will have the value they had before the call to `modify`."]
  102. # [inline (always)]
  103. pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."]
  104. # [doc = ""]
  105. # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"]
  106. # [doc = " method."]
  107. pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."]
  108. # [inline (always)]
  109. pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)]
  110. fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."]
  111. # [doc = ""]
  112. # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."]
  113. pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"]
  114. pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."]
  115. # [inline (always)]
  116. pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."]
  117. # [doc = ""]
  118. # [doc = " Result of the `read` methods of fields."]
  119. pub struct FieldReader < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , T > FieldReader < U , T > where U : Copy , { # [doc = " Creates a new instance of the reader."]
  120. # [allow (unused)]
  121. # [inline (always)]
  122. pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } # [doc = " Reads raw bits from field."]
  123. # [inline (always)]
  124. pub fn bits (& self) -> U { self . bits } } impl < U , T , FI > PartialEq < FI > for FieldReader < U , T > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)]
  125. fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > FieldReader < bool , FI > { # [doc = " Value of the field as raw bits."]
  126. # [inline (always)]
  127. pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."]
  128. # [inline (always)]
  129. pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."]
  130. # [inline (always)]
  131. pub fn bit_is_set (& self) -> bool { self . bit () } } } # [doc = "SYS register"]
  132. pub struct SYS { _marker : PhantomData < * const () > } unsafe impl Send for SYS { } impl SYS { # [doc = r"Pointer to the register block"]
  133. pub const PTR : * const sys :: RegisterBlock = 0x4000_1000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  134. # [inline (always)]
  135. pub const fn ptr () -> * const sys :: RegisterBlock { Self :: PTR } } impl Deref for SYS { type Target = sys :: RegisterBlock ; # [inline (always)]
  136. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SYS { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SYS") . finish () } } # [doc = "SYS register"]
  137. pub mod sys { # [doc = r"Register block"]
  138. # [repr (C)]
  139. pub struct RegisterBlock { # [doc = "0x00 - safe accessing sign register"]
  140. pub r8_safe_access_sig : crate :: Reg < r8_safe_access_sig :: R8_SAFE_ACCESS_SIG_SPEC > , # [doc = "0x01 - chip ID register"]
  141. pub r8_chip_id : crate :: Reg < r8_chip_id :: R8_CHIP_ID_SPEC > , # [doc = "0x02 - safe accessing ID register"]
  142. pub r8_safe_access_id : crate :: Reg < r8_safe_access_id :: R8_SAFE_ACCESS_ID_SPEC > , # [doc = "0x03 - watch-dog count register"]
  143. pub r8_wdog_count : crate :: Reg < r8_wdog_count :: R8_WDOG_COUNT_SPEC > , # [doc = "0x04 - flash ROM configuration register"]
  144. pub r8_glob_rom_cfg : crate :: Reg < r8_glob_rom_cfg :: R8_GLOB_ROM_CFG_SPEC > , # [doc = "0x05 - reset status and boot/debug status"]
  145. pub r8_rst_boot_stat : crate :: Reg < r8_rst_boot_stat :: R8_RST_BOOT_STAT_SPEC > , # [doc = "0x06 - reset and watch-dog control"]
  146. pub r8_rst_wdog_ctrl : crate :: Reg < r8_rst_wdog_ctrl :: R8_RST_WDOG_CTRL_SPEC > , # [doc = "0x07 - value keeper during global reset"]
  147. pub r8_glob_reset_keep : crate :: Reg < r8_glob_reset_keep :: R8_GLOB_RESET_KEEP_SPEC > , # [doc = "0x08 - output clock divider from PLL"]
  148. pub r8_clk_pll_div : crate :: Reg < r8_clk_pll_div :: R8_CLK_PLL_DIV_SPEC > , _reserved9 : [u8 ; 0x01]
  149. , # [doc = "0x0a - clock control"]
  150. pub r8_clk_cfg_ctrl : crate :: Reg < r8_clk_cfg_ctrl :: R8_CLK_CFG_CTRL_SPEC > , # [doc = "0x0b - clock mode aux register"]
  151. pub r8_clk_mod_aux : crate :: Reg < r8_clk_mod_aux :: R8_CLK_MOD_AUX_SPEC > , # [doc = "0x0c - sleep clock off control byte 0"]
  152. pub r8_slp_clk_off0 : crate :: Reg < r8_slp_clk_off0 :: R8_SLP_CLK_OFF0_SPEC > , # [doc = "0x0d - sleep clock off control byte 1"]
  153. pub r8_slp_clk_off1 : crate :: Reg < r8_slp_clk_off1 :: R8_SLP_CLK_OFF1_SPEC > , # [doc = "0x0e - wake control"]
  154. pub r8_slp_wake_ctrl : crate :: Reg < r8_slp_wake_ctrl :: R8_SLP_WAKE_CTRL_SPEC > , # [doc = "0x0f - power control"]
  155. pub r8_slp_power_ctrl : crate :: Reg < r8_slp_power_ctrl :: R8_SLP_POWER_CTRL_SPEC > , _reserved15 : [u8 ; 0x02]
  156. , # [doc = "0x12 - alternate pin control"]
  157. pub r8_pin_alternate : crate :: Reg < r8_pin_alternate :: R8_PIN_ALTERNATE_SPEC > , _reserved16 : [u8 ; 0x09]
  158. , # [doc = "0x1c - GPIO interrupt control"]
  159. pub r8_gpio_int_flag : crate :: Reg < r8_gpio_int_flag :: R8_GPIO_INT_FLAG_SPEC > , # [doc = "0x1d - GPIO interrupt enable"]
  160. pub r8_gpio_int_enable : crate :: Reg < r8_gpio_int_enable :: R8_GPIO_INT_ENABLE_SPEC > , # [doc = "0x1e - GPIO interrupt mode"]
  161. pub r8_gpio_int_mode : crate :: Reg < r8_gpio_int_mode :: R8_GPIO_INT_MODE_SPEC > , # [doc = "0x1f - GPIO interrupt polarity"]
  162. pub r8_gpio_int_polar : crate :: Reg < r8_gpio_int_polar :: R8_GPIO_INT_POLAR_SPEC > , # [doc = "0x20 - Serdes Analog parameter configuration1"]
  163. pub r16_serd_ana_cfg1 : crate :: Reg < r16_serd_ana_cfg1 :: R16_SERD_ANA_CFG1_SPEC > , _reserved21 : [u8 ; 0x02]
  164. , # [doc = "0x24 - Serdes Analog parameter configuration2"]
  165. pub r32_serd_ana_cfg2 : crate :: Reg < r32_serd_ana_cfg2 :: R32_SERD_ANA_CFG2_SPEC > , _reserved22 : [u8 ; 0x18]
  166. , # [doc = "0x40 - GPIO PA I/O direction"]
  167. pub r32_pa_dir : crate :: Reg < r32_pa_dir :: R32_PA_DIR_SPEC > , # [doc = "0x44 - GPIO PA input"]
  168. pub r32_pa_pin : crate :: Reg < r32_pa_pin :: R32_PA_PIN_SPEC > , # [doc = "0x48 - GPIO PA output"]
  169. pub r32_pa_out : crate :: Reg < r32_pa_out :: R32_PA_OUT_SPEC > , # [doc = "0x4c - GPIO PA clear output"]
  170. pub r32_pa_clr : crate :: Reg < r32_pa_clr :: R32_PA_CLR_SPEC > , # [doc = "0x50 - GPIO PA pullup resistance enable"]
  171. pub r32_pa_pu : crate :: Reg < r32_pa_pu :: R32_PA_PU_SPEC > , # [doc = "0x54 - GPIO PA output open-drain and input pulldown resistance enable"]
  172. pub r32_pa_pd : crate :: Reg < r32_pa_pd :: R32_PA_PD_SPEC > , # [doc = "0x58 - GPIO PA driving capability"]
  173. pub r32_pa_drv : crate :: Reg < r32_pa_drv :: R32_PA_DRV_SPEC > , # [doc = "0x5c - GPIO PA output slew rate and input schmitt trigger"]
  174. pub r32_pa_smt : crate :: Reg < r32_pa_smt :: R32_PA_SMT_SPEC > , # [doc = "0x60 - GPIO PB I/O direction"]
  175. pub r32_pb_dir : crate :: Reg < r32_pb_dir :: R32_PB_DIR_SPEC > , # [doc = "0x64 - GPIO PB input"]
  176. pub r32_pb_pin : crate :: Reg < r32_pb_pin :: R32_PB_PIN_SPEC > , # [doc = "0x68 - GPIO PB output"]
  177. pub r32_pb_out : crate :: Reg < r32_pb_out :: R32_PB_OUT_SPEC > , # [doc = "0x6c - GPIO PB clear output"]
  178. pub r32_pb_clr : crate :: Reg < r32_pb_clr :: R32_PB_CLR_SPEC > , # [doc = "0x70 - GPIO PB pullup resistance enable"]
  179. pub r32_pb_pu : crate :: Reg < r32_pb_pu :: R32_PB_PU_SPEC > , # [doc = "0x74 - GPIO PB output open-drain and input pulldown resistance enable"]
  180. pub r32_pb_pd : crate :: Reg < r32_pb_pd :: R32_PB_PD_SPEC > , # [doc = "0x78 - GPIO PB driving capability"]
  181. pub r32_pb_drv : crate :: Reg < r32_pb_drv :: R32_PB_DRV_SPEC > , # [doc = "0x7c - GPIO PB output slew rate and input schmitt trigger"]
  182. pub r32_pb_smt : crate :: Reg < r32_pb_smt :: R32_PB_SMT_SPEC > , } # [doc = "R8_SAFE_ACCESS_SIG register accessor: an alias for `Reg<R8_SAFE_ACCESS_SIG_SPEC>`"]
  183. pub type R8_SAFE_ACCESS_SIG = crate :: Reg < r8_safe_access_sig :: R8_SAFE_ACCESS_SIG_SPEC > ; # [doc = "safe accessing sign register"]
  184. pub mod r8_safe_access_sig { # [doc = "Register `R8_SAFE_ACCESS_SIG` reader"]
  185. pub struct R (crate :: R < R8_SAFE_ACCESS_SIG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SAFE_ACCESS_SIG_SPEC > ; # [inline (always)]
  186. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SAFE_ACCESS_SIG_SPEC >> for R { # [inline (always)]
  187. fn from (reader : crate :: R < R8_SAFE_ACCESS_SIG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SAFE_ACCESS_SIG` writer"]
  188. pub struct W (crate :: W < R8_SAFE_ACCESS_SIG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SAFE_ACCESS_SIG_SPEC > ; # [inline (always)]
  189. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  190. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SAFE_ACCESS_SIG_SPEC >> for W { # [inline (always)]
  191. fn from (writer : crate :: W < R8_SAFE_ACCESS_SIG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SAFE_ACC_MODE` reader - current safe accessing mode"]
  192. pub struct RB_SAFE_ACC_MODE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SAFE_ACC_MODE_R { pub (crate) fn new (bits : u8) -> Self { RB_SAFE_ACC_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SAFE_ACC_MODE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  193. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SAFE_ACC_MODE` writer - current safe accessing mode"]
  194. pub struct RB_SAFE_ACC_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SAFE_ACC_MODE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  195. # [inline (always)]
  196. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_SAFE_ACC_TIMER` reader - safe accessing timer bit mask"]
  197. pub struct RB_SAFE_ACC_TIMER_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SAFE_ACC_TIMER_R { pub (crate) fn new (bits : u8) -> Self { RB_SAFE_ACC_TIMER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SAFE_ACC_TIMER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  198. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SAFE_ACC_TIMER` writer - safe accessing timer bit mask"]
  199. pub struct RB_SAFE_ACC_TIMER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SAFE_ACC_TIMER_W < 'a > { # [doc = r"Writes raw bits to the field"]
  200. # [inline (always)]
  201. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x07 << 4)) | ((value as u8 & 0x07) << 4) ; self . w } } impl R { # [doc = "Bits 0:1 - current safe accessing mode"]
  202. # [inline (always)]
  203. pub fn rb_safe_acc_mode (& self) -> RB_SAFE_ACC_MODE_R { RB_SAFE_ACC_MODE_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bits 4:6 - safe accessing timer bit mask"]
  204. # [inline (always)]
  205. pub fn rb_safe_acc_timer (& self) -> RB_SAFE_ACC_TIMER_R { RB_SAFE_ACC_TIMER_R :: new (((self . bits >> 4) & 0x07) as u8) } } impl W { # [doc = "Bits 0:1 - current safe accessing mode"]
  206. # [inline (always)]
  207. pub fn rb_safe_acc_mode (& mut self) -> RB_SAFE_ACC_MODE_W { RB_SAFE_ACC_MODE_W { w : self } } # [doc = "Bits 4:6 - safe accessing timer bit mask"]
  208. # [inline (always)]
  209. pub fn rb_safe_acc_timer (& mut self) -> RB_SAFE_ACC_TIMER_W { RB_SAFE_ACC_TIMER_W { w : self } } # [doc = "Writes raw bits to the register."]
  210. # [inline (always)]
  211. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "safe accessing sign register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_safe_access_sig](index.html) module"]
  212. pub struct R8_SAFE_ACCESS_SIG_SPEC ; impl crate :: RegisterSpec for R8_SAFE_ACCESS_SIG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_safe_access_sig::R](R) reader structure"]
  213. impl crate :: Readable for R8_SAFE_ACCESS_SIG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_safe_access_sig::W](W) writer structure"]
  214. impl crate :: Writable for R8_SAFE_ACCESS_SIG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SAFE_ACCESS_SIG to value 0"]
  215. impl crate :: Resettable for R8_SAFE_ACCESS_SIG_SPEC { # [inline (always)]
  216. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_CHIP_ID register accessor: an alias for `Reg<R8_CHIP_ID_SPEC>`"]
  217. pub type R8_CHIP_ID = crate :: Reg < r8_chip_id :: R8_CHIP_ID_SPEC > ; # [doc = "chip ID register"]
  218. pub mod r8_chip_id { # [doc = "Register `R8_CHIP_ID` reader"]
  219. pub struct R (crate :: R < R8_CHIP_ID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CHIP_ID_SPEC > ; # [inline (always)]
  220. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CHIP_ID_SPEC >> for R { # [inline (always)]
  221. fn from (reader : crate :: R < R8_CHIP_ID_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_CHIP_ID` reader - chip ID"]
  222. pub struct R8_CHIP_ID_R (crate :: FieldReader < u8 , u8 >) ; impl R8_CHIP_ID_R { pub (crate) fn new (bits : u8) -> Self { R8_CHIP_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_CHIP_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  223. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - chip ID"]
  224. # [inline (always)]
  225. pub fn r8_chip_id (& self) -> R8_CHIP_ID_R { R8_CHIP_ID_R :: new ((self . bits & 0xff) as u8) } } # [doc = "chip ID register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_chip_id](index.html) module"]
  226. pub struct R8_CHIP_ID_SPEC ; impl crate :: RegisterSpec for R8_CHIP_ID_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_chip_id::R](R) reader structure"]
  227. impl crate :: Readable for R8_CHIP_ID_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_CHIP_ID to value 0x69"]
  228. impl crate :: Resettable for R8_CHIP_ID_SPEC { # [inline (always)]
  229. fn reset_value () -> Self :: Ux { 0x69 } } } # [doc = "R8_SAFE_ACCESS_ID register accessor: an alias for `Reg<R8_SAFE_ACCESS_ID_SPEC>`"]
  230. pub type R8_SAFE_ACCESS_ID = crate :: Reg < r8_safe_access_id :: R8_SAFE_ACCESS_ID_SPEC > ; # [doc = "safe accessing ID register"]
  231. pub mod r8_safe_access_id { # [doc = "Register `R8_SAFE_ACCESS_ID` reader"]
  232. pub struct R (crate :: R < R8_SAFE_ACCESS_ID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SAFE_ACCESS_ID_SPEC > ; # [inline (always)]
  233. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SAFE_ACCESS_ID_SPEC >> for R { # [inline (always)]
  234. fn from (reader : crate :: R < R8_SAFE_ACCESS_ID_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SAFE_ACCESS_ID` reader - safe accessing ID"]
  235. pub struct R8_SAFE_ACCESS_ID_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SAFE_ACCESS_ID_R { pub (crate) fn new (bits : u8) -> Self { R8_SAFE_ACCESS_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SAFE_ACCESS_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  236. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - safe accessing ID"]
  237. # [inline (always)]
  238. pub fn r8_safe_access_id (& self) -> R8_SAFE_ACCESS_ID_R { R8_SAFE_ACCESS_ID_R :: new ((self . bits & 0xff) as u8) } } # [doc = "safe accessing ID register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_safe_access_id](index.html) module"]
  239. pub struct R8_SAFE_ACCESS_ID_SPEC ; impl crate :: RegisterSpec for R8_SAFE_ACCESS_ID_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_safe_access_id::R](R) reader structure"]
  240. impl crate :: Readable for R8_SAFE_ACCESS_ID_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SAFE_ACCESS_ID to value 0x02"]
  241. impl crate :: Resettable for R8_SAFE_ACCESS_ID_SPEC { # [inline (always)]
  242. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_WDOG_COUNT register accessor: an alias for `Reg<R8_WDOG_COUNT_SPEC>`"]
  243. pub type R8_WDOG_COUNT = crate :: Reg < r8_wdog_count :: R8_WDOG_COUNT_SPEC > ; # [doc = "watch-dog count register"]
  244. pub mod r8_wdog_count { # [doc = "Register `R8_WDOG_COUNT` reader"]
  245. pub struct R (crate :: R < R8_WDOG_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_WDOG_COUNT_SPEC > ; # [inline (always)]
  246. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_WDOG_COUNT_SPEC >> for R { # [inline (always)]
  247. fn from (reader : crate :: R < R8_WDOG_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_WDOG_COUNT` writer"]
  248. pub struct W (crate :: W < R8_WDOG_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_WDOG_COUNT_SPEC > ; # [inline (always)]
  249. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  250. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_WDOG_COUNT_SPEC >> for W { # [inline (always)]
  251. fn from (writer : crate :: W < R8_WDOG_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_WDOG_COUNT` reader - watch-dog count"]
  252. pub struct R8_WDOG_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_WDOG_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_WDOG_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_WDOG_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  253. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_WDOG_COUNT` writer - watch-dog count"]
  254. pub struct R8_WDOG_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_WDOG_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  255. # [inline (always)]
  256. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - watch-dog count"]
  257. # [inline (always)]
  258. pub fn r8_wdog_count (& self) -> R8_WDOG_COUNT_R { R8_WDOG_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - watch-dog count"]
  259. # [inline (always)]
  260. pub fn r8_wdog_count (& mut self) -> R8_WDOG_COUNT_W { R8_WDOG_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  261. # [inline (always)]
  262. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "watch-dog count register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_wdog_count](index.html) module"]
  263. pub struct R8_WDOG_COUNT_SPEC ; impl crate :: RegisterSpec for R8_WDOG_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_wdog_count::R](R) reader structure"]
  264. impl crate :: Readable for R8_WDOG_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_wdog_count::W](W) writer structure"]
  265. impl crate :: Writable for R8_WDOG_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_WDOG_COUNT to value 0"]
  266. impl crate :: Resettable for R8_WDOG_COUNT_SPEC { # [inline (always)]
  267. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GLOB_ROM_CFG register accessor: an alias for `Reg<R8_GLOB_ROM_CFG_SPEC>`"]
  268. pub type R8_GLOB_ROM_CFG = crate :: Reg < r8_glob_rom_cfg :: R8_GLOB_ROM_CFG_SPEC > ; # [doc = "flash ROM configuration register"]
  269. pub mod r8_glob_rom_cfg { # [doc = "Register `R8_GLOB_ROM_CFG` reader"]
  270. pub struct R (crate :: R < R8_GLOB_ROM_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GLOB_ROM_CFG_SPEC > ; # [inline (always)]
  271. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GLOB_ROM_CFG_SPEC >> for R { # [inline (always)]
  272. fn from (reader : crate :: R < R8_GLOB_ROM_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GLOB_ROM_CFG` writer"]
  273. pub struct W (crate :: W < R8_GLOB_ROM_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GLOB_ROM_CFG_SPEC > ; # [inline (always)]
  274. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  275. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GLOB_ROM_CFG_SPEC >> for W { # [inline (always)]
  276. fn from (writer : crate :: W < R8_GLOB_ROM_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ROM_EXT_RE` reader - enable flash ROM being read by external programmer"]
  277. pub struct RB_ROM_EXT_RE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_EXT_RE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_EXT_RE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_EXT_RE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  278. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_EXT_RE` writer - enable flash ROM being read by external programmer"]
  279. pub struct RB_ROM_EXT_RE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_EXT_RE_W < 'a > { # [doc = r"Sets the field bit"]
  280. # [inline (always)]
  281. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  282. # [inline (always)]
  283. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  284. # [inline (always)]
  285. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_CODE_RAM_WE` reader - enable code RAM being write"]
  286. pub struct RB_CODE_RAM_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_CODE_RAM_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_CODE_RAM_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CODE_RAM_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  287. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CODE_RAM_WE` writer - enable code RAM being write"]
  288. pub struct RB_CODE_RAM_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CODE_RAM_WE_W < 'a > { # [doc = r"Sets the field bit"]
  289. # [inline (always)]
  290. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  291. # [inline (always)]
  292. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  293. # [inline (always)]
  294. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ROM_DATA_WE` reader - enable flash ROM data area being erase/write"]
  295. pub struct RB_ROM_DATA_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_DATA_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_DATA_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_DATA_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  296. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_DATA_WE` writer - enable flash ROM data area being erase/write"]
  297. pub struct RB_ROM_DATA_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_DATA_WE_W < 'a > { # [doc = r"Sets the field bit"]
  298. # [inline (always)]
  299. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  300. # [inline (always)]
  301. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  302. # [inline (always)]
  303. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_ROM_CODE_WE` reader - enable flash ROM code and data area being erase or write"]
  304. pub struct RB_ROM_CODE_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_CODE_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_CODE_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_CODE_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  305. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_CODE_WE` writer - enable flash ROM code and data area being erase or write"]
  306. pub struct RB_ROM_CODE_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_CODE_WE_W < 'a > { # [doc = r"Sets the field bit"]
  307. # [inline (always)]
  308. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  309. # [inline (always)]
  310. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  311. # [inline (always)]
  312. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_ROM_CODE_OFS` reader - Config the start offset address of user code in Flash"]
  313. pub struct RB_ROM_CODE_OFS_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_CODE_OFS_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_CODE_OFS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_CODE_OFS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  314. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_CODE_OFS` writer - Config the start offset address of user code in Flash"]
  315. pub struct RB_ROM_CODE_OFS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_CODE_OFS_W < 'a > { # [doc = r"Sets the field bit"]
  316. # [inline (always)]
  317. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  318. # [inline (always)]
  319. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  320. # [inline (always)]
  321. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable flash ROM being read by external programmer"]
  322. # [inline (always)]
  323. pub fn rb_rom_ext_re (& self) -> RB_ROM_EXT_RE_R { RB_ROM_EXT_RE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable code RAM being write"]
  324. # [inline (always)]
  325. pub fn rb_code_ram_we (& self) -> RB_CODE_RAM_WE_R { RB_CODE_RAM_WE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable flash ROM data area being erase/write"]
  326. # [inline (always)]
  327. pub fn rb_rom_data_we (& self) -> RB_ROM_DATA_WE_R { RB_ROM_DATA_WE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable flash ROM code and data area being erase or write"]
  328. # [inline (always)]
  329. pub fn rb_rom_code_we (& self) -> RB_ROM_CODE_WE_R { RB_ROM_CODE_WE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - Config the start offset address of user code in Flash"]
  330. # [inline (always)]
  331. pub fn rb_rom_code_ofs (& self) -> RB_ROM_CODE_OFS_R { RB_ROM_CODE_OFS_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable flash ROM being read by external programmer"]
  332. # [inline (always)]
  333. pub fn rb_rom_ext_re (& mut self) -> RB_ROM_EXT_RE_W { RB_ROM_EXT_RE_W { w : self } } # [doc = "Bit 1 - enable code RAM being write"]
  334. # [inline (always)]
  335. pub fn rb_code_ram_we (& mut self) -> RB_CODE_RAM_WE_W { RB_CODE_RAM_WE_W { w : self } } # [doc = "Bit 2 - enable flash ROM data area being erase/write"]
  336. # [inline (always)]
  337. pub fn rb_rom_data_we (& mut self) -> RB_ROM_DATA_WE_W { RB_ROM_DATA_WE_W { w : self } } # [doc = "Bit 3 - enable flash ROM code and data area being erase or write"]
  338. # [inline (always)]
  339. pub fn rb_rom_code_we (& mut self) -> RB_ROM_CODE_WE_W { RB_ROM_CODE_WE_W { w : self } } # [doc = "Bit 4 - Config the start offset address of user code in Flash"]
  340. # [inline (always)]
  341. pub fn rb_rom_code_ofs (& mut self) -> RB_ROM_CODE_OFS_W { RB_ROM_CODE_OFS_W { w : self } } # [doc = "Writes raw bits to the register."]
  342. # [inline (always)]
  343. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "flash ROM configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_glob_rom_cfg](index.html) module"]
  344. pub struct R8_GLOB_ROM_CFG_SPEC ; impl crate :: RegisterSpec for R8_GLOB_ROM_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_glob_rom_cfg::R](R) reader structure"]
  345. impl crate :: Readable for R8_GLOB_ROM_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_glob_rom_cfg::W](W) writer structure"]
  346. impl crate :: Writable for R8_GLOB_ROM_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GLOB_ROM_CFG to value 0x80"]
  347. impl crate :: Resettable for R8_GLOB_ROM_CFG_SPEC { # [inline (always)]
  348. fn reset_value () -> Self :: Ux { 0x80 } } } # [doc = "R8_RST_BOOT_STAT register accessor: an alias for `Reg<R8_RST_BOOT_STAT_SPEC>`"]
  349. pub type R8_RST_BOOT_STAT = crate :: Reg < r8_rst_boot_stat :: R8_RST_BOOT_STAT_SPEC > ; # [doc = "reset status and boot/debug status"]
  350. pub mod r8_rst_boot_stat { # [doc = "Register `R8_RST_BOOT_STAT` reader"]
  351. pub struct R (crate :: R < R8_RST_BOOT_STAT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_RST_BOOT_STAT_SPEC > ; # [inline (always)]
  352. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_RST_BOOT_STAT_SPEC >> for R { # [inline (always)]
  353. fn from (reader : crate :: R < R8_RST_BOOT_STAT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_RESET_FLAG` reader - recent reset flag"]
  354. pub struct RB_RESET_FLAG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_RESET_FLAG_R { pub (crate) fn new (bits : u8) -> Self { RB_RESET_FLAG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_RESET_FLAG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  355. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_RESET_EN` reader - manual reset input enable status"]
  356. pub struct RB_CFG_RESET_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_RESET_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_RESET_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_RESET_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  357. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_BOOT_EN` reader - boot-loader enable status"]
  358. pub struct RB_CFG_BOOT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_BOOT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_BOOT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_BOOT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  359. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_DEBUG_EN` reader - debug enable status"]
  360. pub struct RB_CFG_DEBUG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_DEBUG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_DEBUG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_DEBUG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  361. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_BOOT_LOADER` reader - indicate boot loader status"]
  362. pub struct RB_BOOT_LOADER_R (crate :: FieldReader < bool , bool >) ; impl RB_BOOT_LOADER_R { pub (crate) fn new (bits : bool) -> Self { RB_BOOT_LOADER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_BOOT_LOADER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  363. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:1 - recent reset flag"]
  364. # [inline (always)]
  365. pub fn rb_reset_flag (& self) -> RB_RESET_FLAG_R { RB_RESET_FLAG_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - manual reset input enable status"]
  366. # [inline (always)]
  367. pub fn rb_cfg_reset_en (& self) -> RB_CFG_RESET_EN_R { RB_CFG_RESET_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - boot-loader enable status"]
  368. # [inline (always)]
  369. pub fn rb_cfg_boot_en (& self) -> RB_CFG_BOOT_EN_R { RB_CFG_BOOT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - debug enable status"]
  370. # [inline (always)]
  371. pub fn rb_cfg_debug_en (& self) -> RB_CFG_DEBUG_EN_R { RB_CFG_DEBUG_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - indicate boot loader status"]
  372. # [inline (always)]
  373. pub fn rb_boot_loader (& self) -> RB_BOOT_LOADER_R { RB_BOOT_LOADER_R :: new (((self . bits >> 5) & 0x01) != 0) } } # [doc = "reset status and boot/debug status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_rst_boot_stat](index.html) module"]
  374. pub struct R8_RST_BOOT_STAT_SPEC ; impl crate :: RegisterSpec for R8_RST_BOOT_STAT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_rst_boot_stat::R](R) reader structure"]
  375. impl crate :: Readable for R8_RST_BOOT_STAT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_RST_BOOT_STAT to value 0xc8"]
  376. impl crate :: Resettable for R8_RST_BOOT_STAT_SPEC { # [inline (always)]
  377. fn reset_value () -> Self :: Ux { 0xc8 } } } # [doc = "R8_RST_WDOG_CTRL register accessor: an alias for `Reg<R8_RST_WDOG_CTRL_SPEC>`"]
  378. pub type R8_RST_WDOG_CTRL = crate :: Reg < r8_rst_wdog_ctrl :: R8_RST_WDOG_CTRL_SPEC > ; # [doc = "reset and watch-dog control"]
  379. pub mod r8_rst_wdog_ctrl { # [doc = "Register `R8_RST_WDOG_CTRL` reader"]
  380. pub struct R (crate :: R < R8_RST_WDOG_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_RST_WDOG_CTRL_SPEC > ; # [inline (always)]
  381. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_RST_WDOG_CTRL_SPEC >> for R { # [inline (always)]
  382. fn from (reader : crate :: R < R8_RST_WDOG_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_RST_WDOG_CTRL` writer"]
  383. pub struct W (crate :: W < R8_RST_WDOG_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_RST_WDOG_CTRL_SPEC > ; # [inline (always)]
  384. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  385. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_RST_WDOG_CTRL_SPEC >> for W { # [inline (always)]
  386. fn from (writer : crate :: W < R8_RST_WDOG_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SOFTWARE_RESET` reader - global software reset"]
  387. pub struct RB_SOFTWARE_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_SOFTWARE_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_SOFTWARE_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SOFTWARE_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  388. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SOFTWARE_RESET` writer - global software reset"]
  389. pub struct RB_SOFTWARE_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SOFTWARE_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  390. # [inline (always)]
  391. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  392. # [inline (always)]
  393. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  394. # [inline (always)]
  395. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_WDOG_RST_EN` reader - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
  396. pub struct RB_WDOG_RST_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_RST_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_RST_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_RST_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  397. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_RST_EN` writer - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
  398. pub struct RB_WDOG_RST_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_RST_EN_W < 'a > { # [doc = r"Sets the field bit"]
  399. # [inline (always)]
  400. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  401. # [inline (always)]
  402. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  403. # [inline (always)]
  404. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_WDOG_INT_EN` reader - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
  405. pub struct RB_WDOG_INT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_INT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_INT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_INT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  406. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_INT_EN` writer - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
  407. pub struct RB_WDOG_INT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_INT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  408. # [inline (always)]
  409. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  410. # [inline (always)]
  411. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  412. # [inline (always)]
  413. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_WDOG_INT_FLAG` reader - watch-dog timer overflow interrupt flag"]
  414. pub struct RB_WDOG_INT_FLAG_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_INT_FLAG_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_INT_FLAG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_INT_FLAG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  415. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_INT_FLAG` writer - watch-dog timer overflow interrupt flag"]
  416. pub struct RB_WDOG_INT_FLAG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_INT_FLAG_W < 'a > { # [doc = r"Sets the field bit"]
  417. # [inline (always)]
  418. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  419. # [inline (always)]
  420. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  421. # [inline (always)]
  422. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - global software reset"]
  423. # [inline (always)]
  424. pub fn rb_software_reset (& self) -> RB_SOFTWARE_RESET_R { RB_SOFTWARE_RESET_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
  425. # [inline (always)]
  426. pub fn rb_wdog_rst_en (& self) -> RB_WDOG_RST_EN_R { RB_WDOG_RST_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
  427. # [inline (always)]
  428. pub fn rb_wdog_int_en (& self) -> RB_WDOG_INT_EN_R { RB_WDOG_INT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - watch-dog timer overflow interrupt flag"]
  429. # [inline (always)]
  430. pub fn rb_wdog_int_flag (& self) -> RB_WDOG_INT_FLAG_R { RB_WDOG_INT_FLAG_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - global software reset"]
  431. # [inline (always)]
  432. pub fn rb_software_reset (& mut self) -> RB_SOFTWARE_RESET_W { RB_SOFTWARE_RESET_W { w : self } } # [doc = "Bit 1 - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
  433. # [inline (always)]
  434. pub fn rb_wdog_rst_en (& mut self) -> RB_WDOG_RST_EN_W { RB_WDOG_RST_EN_W { w : self } } # [doc = "Bit 2 - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
  435. # [inline (always)]
  436. pub fn rb_wdog_int_en (& mut self) -> RB_WDOG_INT_EN_W { RB_WDOG_INT_EN_W { w : self } } # [doc = "Bit 3 - watch-dog timer overflow interrupt flag"]
  437. # [inline (always)]
  438. pub fn rb_wdog_int_flag (& mut self) -> RB_WDOG_INT_FLAG_W { RB_WDOG_INT_FLAG_W { w : self } } # [doc = "Writes raw bits to the register."]
  439. # [inline (always)]
  440. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "reset and watch-dog control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_rst_wdog_ctrl](index.html) module"]
  441. pub struct R8_RST_WDOG_CTRL_SPEC ; impl crate :: RegisterSpec for R8_RST_WDOG_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_rst_wdog_ctrl::R](R) reader structure"]
  442. impl crate :: Readable for R8_RST_WDOG_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_rst_wdog_ctrl::W](W) writer structure"]
  443. impl crate :: Writable for R8_RST_WDOG_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_RST_WDOG_CTRL to value 0"]
  444. impl crate :: Resettable for R8_RST_WDOG_CTRL_SPEC { # [inline (always)]
  445. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GLOB_RESET_KEEP register accessor: an alias for `Reg<R8_GLOB_RESET_KEEP_SPEC>`"]
  446. pub type R8_GLOB_RESET_KEEP = crate :: Reg < r8_glob_reset_keep :: R8_GLOB_RESET_KEEP_SPEC > ; # [doc = "value keeper during global reset"]
  447. pub mod r8_glob_reset_keep { # [doc = "Register `R8_GLOB_RESET_KEEP` reader"]
  448. pub struct R (crate :: R < R8_GLOB_RESET_KEEP_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GLOB_RESET_KEEP_SPEC > ; # [inline (always)]
  449. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GLOB_RESET_KEEP_SPEC >> for R { # [inline (always)]
  450. fn from (reader : crate :: R < R8_GLOB_RESET_KEEP_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GLOB_RESET_KEEP` writer"]
  451. pub struct W (crate :: W < R8_GLOB_RESET_KEEP_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GLOB_RESET_KEEP_SPEC > ; # [inline (always)]
  452. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  453. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GLOB_RESET_KEEP_SPEC >> for W { # [inline (always)]
  454. fn from (writer : crate :: W < R8_GLOB_RESET_KEEP_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_GLOB_RESET_KEEP` reader - value keeper during global reset"]
  455. pub struct R8_GLOB_RESET_KEEP_R (crate :: FieldReader < u8 , u8 >) ; impl R8_GLOB_RESET_KEEP_R { pub (crate) fn new (bits : u8) -> Self { R8_GLOB_RESET_KEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_GLOB_RESET_KEEP_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  456. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_GLOB_RESET_KEEP` writer - value keeper during global reset"]
  457. pub struct R8_GLOB_RESET_KEEP_W < 'a > { w : & 'a mut W , } impl < 'a > R8_GLOB_RESET_KEEP_W < 'a > { # [doc = r"Writes raw bits to the field"]
  458. # [inline (always)]
  459. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - value keeper during global reset"]
  460. # [inline (always)]
  461. pub fn r8_glob_reset_keep (& self) -> R8_GLOB_RESET_KEEP_R { R8_GLOB_RESET_KEEP_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - value keeper during global reset"]
  462. # [inline (always)]
  463. pub fn r8_glob_reset_keep (& mut self) -> R8_GLOB_RESET_KEEP_W { R8_GLOB_RESET_KEEP_W { w : self } } # [doc = "Writes raw bits to the register."]
  464. # [inline (always)]
  465. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "value keeper during global reset\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_glob_reset_keep](index.html) module"]
  466. pub struct R8_GLOB_RESET_KEEP_SPEC ; impl crate :: RegisterSpec for R8_GLOB_RESET_KEEP_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_glob_reset_keep::R](R) reader structure"]
  467. impl crate :: Readable for R8_GLOB_RESET_KEEP_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_glob_reset_keep::W](W) writer structure"]
  468. impl crate :: Writable for R8_GLOB_RESET_KEEP_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GLOB_RESET_KEEP to value 0"]
  469. impl crate :: Resettable for R8_GLOB_RESET_KEEP_SPEC { # [inline (always)]
  470. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_CLK_PLL_DIV register accessor: an alias for `Reg<R8_CLK_PLL_DIV_SPEC>`"]
  471. pub type R8_CLK_PLL_DIV = crate :: Reg < r8_clk_pll_div :: R8_CLK_PLL_DIV_SPEC > ; # [doc = "output clock divider from PLL"]
  472. pub mod r8_clk_pll_div { # [doc = "Register `R8_CLK_PLL_DIV` reader"]
  473. pub struct R (crate :: R < R8_CLK_PLL_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_PLL_DIV_SPEC > ; # [inline (always)]
  474. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_PLL_DIV_SPEC >> for R { # [inline (always)]
  475. fn from (reader : crate :: R < R8_CLK_PLL_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_PLL_DIV` writer"]
  476. pub struct W (crate :: W < R8_CLK_PLL_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_PLL_DIV_SPEC > ; # [inline (always)]
  477. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  478. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_PLL_DIV_SPEC >> for W { # [inline (always)]
  479. fn from (writer : crate :: W < R8_CLK_PLL_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_CLK_PLL_DIV` reader - output clock divider from PLL"]
  480. pub struct R8_CLK_PLL_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_CLK_PLL_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_CLK_PLL_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_CLK_PLL_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  481. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_CLK_PLL_DIV` writer - output clock divider from PLL"]
  482. pub struct R8_CLK_PLL_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_CLK_PLL_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  483. # [inline (always)]
  484. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - output clock divider from PLL"]
  485. # [inline (always)]
  486. pub fn r8_clk_pll_div (& self) -> R8_CLK_PLL_DIV_R { R8_CLK_PLL_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - output clock divider from PLL"]
  487. # [inline (always)]
  488. pub fn r8_clk_pll_div (& mut self) -> R8_CLK_PLL_DIV_W { R8_CLK_PLL_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
  489. # [inline (always)]
  490. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "output clock divider from PLL\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_pll_div](index.html) module"]
  491. pub struct R8_CLK_PLL_DIV_SPEC ; impl crate :: RegisterSpec for R8_CLK_PLL_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_pll_div::R](R) reader structure"]
  492. impl crate :: Readable for R8_CLK_PLL_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_pll_div::W](W) writer structure"]
  493. impl crate :: Writable for R8_CLK_PLL_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_PLL_DIV to value 0x42"]
  494. impl crate :: Resettable for R8_CLK_PLL_DIV_SPEC { # [inline (always)]
  495. fn reset_value () -> Self :: Ux { 0x42 } } } # [doc = "R8_CLK_CFG_CTRL register accessor: an alias for `Reg<R8_CLK_CFG_CTRL_SPEC>`"]
  496. pub type R8_CLK_CFG_CTRL = crate :: Reg < r8_clk_cfg_ctrl :: R8_CLK_CFG_CTRL_SPEC > ; # [doc = "clock control"]
  497. pub mod r8_clk_cfg_ctrl { # [doc = "Register `R8_CLK_CFG_CTRL` reader"]
  498. pub struct R (crate :: R < R8_CLK_CFG_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_CFG_CTRL_SPEC > ; # [inline (always)]
  499. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_CFG_CTRL_SPEC >> for R { # [inline (always)]
  500. fn from (reader : crate :: R < R8_CLK_CFG_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_CFG_CTRL` writer"]
  501. pub struct W (crate :: W < R8_CLK_CFG_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_CFG_CTRL_SPEC > ; # [inline (always)]
  502. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  503. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_CFG_CTRL_SPEC >> for W { # [inline (always)]
  504. fn from (writer : crate :: W < R8_CLK_CFG_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_CLK_PLL_SLEEP` reader - PLL sleep control"]
  505. pub struct RB_CLK_PLL_SLEEP_R (crate :: FieldReader < bool , bool >) ; impl RB_CLK_PLL_SLEEP_R { pub (crate) fn new (bits : bool) -> Self { RB_CLK_PLL_SLEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CLK_PLL_SLEEP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  506. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CLK_PLL_SLEEP` writer - PLL sleep control"]
  507. pub struct RB_CLK_PLL_SLEEP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CLK_PLL_SLEEP_W < 'a > { # [doc = r"Sets the field bit"]
  508. # [inline (always)]
  509. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  510. # [inline (always)]
  511. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  512. # [inline (always)]
  513. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_CLK_SEL_PLL` reader - clock source selection"]
  514. pub struct RB_CLK_SEL_PLL_R (crate :: FieldReader < bool , bool >) ; impl RB_CLK_SEL_PLL_R { pub (crate) fn new (bits : bool) -> Self { RB_CLK_SEL_PLL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CLK_SEL_PLL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  515. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CLK_SEL_PLL` writer - clock source selection"]
  516. pub struct RB_CLK_SEL_PLL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CLK_SEL_PLL_W < 'a > { # [doc = r"Sets the field bit"]
  517. # [inline (always)]
  518. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  519. # [inline (always)]
  520. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  521. # [inline (always)]
  522. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 0 - PLL sleep control"]
  523. # [inline (always)]
  524. pub fn rb_clk_pll_sleep (& self) -> RB_CLK_PLL_SLEEP_R { RB_CLK_PLL_SLEEP_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock source selection"]
  525. # [inline (always)]
  526. pub fn rb_clk_sel_pll (& self) -> RB_CLK_SEL_PLL_R { RB_CLK_SEL_PLL_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PLL sleep control"]
  527. # [inline (always)]
  528. pub fn rb_clk_pll_sleep (& mut self) -> RB_CLK_PLL_SLEEP_W { RB_CLK_PLL_SLEEP_W { w : self } } # [doc = "Bit 1 - clock source selection"]
  529. # [inline (always)]
  530. pub fn rb_clk_sel_pll (& mut self) -> RB_CLK_SEL_PLL_W { RB_CLK_SEL_PLL_W { w : self } } # [doc = "Writes raw bits to the register."]
  531. # [inline (always)]
  532. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "clock control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_cfg_ctrl](index.html) module"]
  533. pub struct R8_CLK_CFG_CTRL_SPEC ; impl crate :: RegisterSpec for R8_CLK_CFG_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_cfg_ctrl::R](R) reader structure"]
  534. impl crate :: Readable for R8_CLK_CFG_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_cfg_ctrl::W](W) writer structure"]
  535. impl crate :: Writable for R8_CLK_CFG_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_CFG_CTRL to value 0x80"]
  536. impl crate :: Resettable for R8_CLK_CFG_CTRL_SPEC { # [inline (always)]
  537. fn reset_value () -> Self :: Ux { 0x80 } } } # [doc = "R8_CLK_MOD_AUX register accessor: an alias for `Reg<R8_CLK_MOD_AUX_SPEC>`"]
  538. pub type R8_CLK_MOD_AUX = crate :: Reg < r8_clk_mod_aux :: R8_CLK_MOD_AUX_SPEC > ; # [doc = "clock mode aux register"]
  539. pub mod r8_clk_mod_aux { # [doc = "Register `R8_CLK_MOD_AUX` reader"]
  540. pub struct R (crate :: R < R8_CLK_MOD_AUX_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_MOD_AUX_SPEC > ; # [inline (always)]
  541. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_MOD_AUX_SPEC >> for R { # [inline (always)]
  542. fn from (reader : crate :: R < R8_CLK_MOD_AUX_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_MOD_AUX` writer"]
  543. pub struct W (crate :: W < R8_CLK_MOD_AUX_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_MOD_AUX_SPEC > ; # [inline (always)]
  544. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  545. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_MOD_AUX_SPEC >> for W { # [inline (always)]
  546. fn from (writer : crate :: W < R8_CLK_MOD_AUX_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_INT_125M_EN` reader - clock from USB_PHY PCLK(125MHz)"]
  547. pub struct RB_INT_125M_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_INT_125M_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_INT_125M_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_INT_125M_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  548. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_INT_125M_EN` writer - clock from USB_PHY PCLK(125MHz)"]
  549. pub struct RB_INT_125M_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_INT_125M_EN_W < 'a > { # [doc = r"Sets the field bit"]
  550. # [inline (always)]
  551. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  552. # [inline (always)]
  553. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  554. # [inline (always)]
  555. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_EXT_125M_EN` reader - clock from pin_PA\\[16\\]"]
  556. pub struct RB_EXT_125M_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_EXT_125M_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_EXT_125M_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EXT_125M_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  557. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EXT_125M_EN` writer - clock from pin_PA\\[16\\]"]
  558. pub struct RB_EXT_125M_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EXT_125M_EN_W < 'a > { # [doc = r"Sets the field bit"]
  559. # [inline (always)]
  560. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  561. # [inline (always)]
  562. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  563. # [inline (always)]
  564. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_MCO_SEL_MSK` reader - MCO output selection"]
  565. pub struct RB_MCO_SEL_MSK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_MCO_SEL_MSK_R { pub (crate) fn new (bits : u8) -> Self { RB_MCO_SEL_MSK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCO_SEL_MSK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  566. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCO_SEL_MSK` writer - MCO output selection"]
  567. pub struct RB_MCO_SEL_MSK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCO_SEL_MSK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  568. # [inline (always)]
  569. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 2)) | ((value as u8 & 0x03) << 2) ; self . w } } # [doc = "Field `RB_MCO_EN` reader - MCO output enable"]
  570. pub struct RB_MCO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_MCO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_MCO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  571. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCO_EN` writer - MCO output enable"]
  572. pub struct RB_MCO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCO_EN_W < 'a > { # [doc = r"Sets the field bit"]
  573. # [inline (always)]
  574. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  575. # [inline (always)]
  576. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  577. # [inline (always)]
  578. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - clock from USB_PHY PCLK(125MHz)"]
  579. # [inline (always)]
  580. pub fn rb_int_125m_en (& self) -> RB_INT_125M_EN_R { RB_INT_125M_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock from pin_PA\\[16\\]"]
  581. # [inline (always)]
  582. pub fn rb_ext_125m_en (& self) -> RB_EXT_125M_EN_R { RB_EXT_125M_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bits 2:3 - MCO output selection"]
  583. # [inline (always)]
  584. pub fn rb_mco_sel_msk (& self) -> RB_MCO_SEL_MSK_R { RB_MCO_SEL_MSK_R :: new (((self . bits >> 2) & 0x03) as u8) } # [doc = "Bit 4 - MCO output enable"]
  585. # [inline (always)]
  586. pub fn rb_mco_en (& self) -> RB_MCO_EN_R { RB_MCO_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - clock from USB_PHY PCLK(125MHz)"]
  587. # [inline (always)]
  588. pub fn rb_int_125m_en (& mut self) -> RB_INT_125M_EN_W { RB_INT_125M_EN_W { w : self } } # [doc = "Bit 1 - clock from pin_PA\\[16\\]"]
  589. # [inline (always)]
  590. pub fn rb_ext_125m_en (& mut self) -> RB_EXT_125M_EN_W { RB_EXT_125M_EN_W { w : self } } # [doc = "Bits 2:3 - MCO output selection"]
  591. # [inline (always)]
  592. pub fn rb_mco_sel_msk (& mut self) -> RB_MCO_SEL_MSK_W { RB_MCO_SEL_MSK_W { w : self } } # [doc = "Bit 4 - MCO output enable"]
  593. # [inline (always)]
  594. pub fn rb_mco_en (& mut self) -> RB_MCO_EN_W { RB_MCO_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  595. # [inline (always)]
  596. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "clock mode aux register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_mod_aux](index.html) module"]
  597. pub struct R8_CLK_MOD_AUX_SPEC ; impl crate :: RegisterSpec for R8_CLK_MOD_AUX_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_mod_aux::R](R) reader structure"]
  598. impl crate :: Readable for R8_CLK_MOD_AUX_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_mod_aux::W](W) writer structure"]
  599. impl crate :: Writable for R8_CLK_MOD_AUX_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_MOD_AUX to value 0"]
  600. impl crate :: Resettable for R8_CLK_MOD_AUX_SPEC { # [inline (always)]
  601. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_CLK_OFF0 register accessor: an alias for `Reg<R8_SLP_CLK_OFF0_SPEC>`"]
  602. pub type R8_SLP_CLK_OFF0 = crate :: Reg < r8_slp_clk_off0 :: R8_SLP_CLK_OFF0_SPEC > ; # [doc = "sleep clock off control byte 0"]
  603. pub mod r8_slp_clk_off0 { # [doc = "Register `R8_SLP_CLK_OFF0` reader"]
  604. pub struct R (crate :: R < R8_SLP_CLK_OFF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_CLK_OFF0_SPEC > ; # [inline (always)]
  605. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_CLK_OFF0_SPEC >> for R { # [inline (always)]
  606. fn from (reader : crate :: R < R8_SLP_CLK_OFF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_CLK_OFF0` writer"]
  607. pub struct W (crate :: W < R8_SLP_CLK_OFF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_CLK_OFF0_SPEC > ; # [inline (always)]
  608. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  609. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_CLK_OFF0_SPEC >> for W { # [inline (always)]
  610. fn from (writer : crate :: W < R8_SLP_CLK_OFF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_CLK_TMR0` reader - sleep TMR0 clock"]
  611. pub struct RB_SLP_CLK_TMR0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  612. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR0` writer - sleep TMR0 clock"]
  613. pub struct RB_SLP_CLK_TMR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR0_W < 'a > { # [doc = r"Sets the field bit"]
  614. # [inline (always)]
  615. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  616. # [inline (always)]
  617. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  618. # [inline (always)]
  619. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_CLK_TMR1` reader - sleep TMR1 clock"]
  620. pub struct RB_SLP_CLK_TMR1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  621. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR1` writer - sleep TMR1 clock"]
  622. pub struct RB_SLP_CLK_TMR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR1_W < 'a > { # [doc = r"Sets the field bit"]
  623. # [inline (always)]
  624. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  625. # [inline (always)]
  626. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  627. # [inline (always)]
  628. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_TMR2` reader - sleep TMR2 clock"]
  629. pub struct RB_SLP_CLK_TMR2_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR2_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  630. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR2` writer - sleep TMR2 clock"]
  631. pub struct RB_SLP_CLK_TMR2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR2_W < 'a > { # [doc = r"Sets the field bit"]
  632. # [inline (always)]
  633. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  634. # [inline (always)]
  635. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  636. # [inline (always)]
  637. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_PWMX` reader - sleep PWMX clock"]
  638. pub struct RB_SLP_CLK_PWMX_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_PWMX_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_PWMX_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_PWMX_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  639. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_PWMX` writer - sleep PWMX clock"]
  640. pub struct RB_SLP_CLK_PWMX_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_PWMX_W < 'a > { # [doc = r"Sets the field bit"]
  641. # [inline (always)]
  642. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  643. # [inline (always)]
  644. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  645. # [inline (always)]
  646. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART0` reader - sleep UART0 clock"]
  647. pub struct RB_SLP_CLK_UART0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  648. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART0` writer - sleep UART0 clock"]
  649. pub struct RB_SLP_CLK_UART0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART0_W < 'a > { # [doc = r"Sets the field bit"]
  650. # [inline (always)]
  651. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  652. # [inline (always)]
  653. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  654. # [inline (always)]
  655. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART1` reader - sleep UART1 clock"]
  656. pub struct RB_SLP_CLK_UART1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  657. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART1` writer - sleep UART1 clock"]
  658. pub struct RB_SLP_CLK_UART1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART1_W < 'a > { # [doc = r"Sets the field bit"]
  659. # [inline (always)]
  660. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  661. # [inline (always)]
  662. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  663. # [inline (always)]
  664. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART2` reader - sleep UART2 clock"]
  665. pub struct RB_SLP_CLK_UART2_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART2_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  666. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART2` writer - sleep UART2 clock"]
  667. pub struct RB_SLP_CLK_UART2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART2_W < 'a > { # [doc = r"Sets the field bit"]
  668. # [inline (always)]
  669. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  670. # [inline (always)]
  671. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  672. # [inline (always)]
  673. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART3` reader - sleep UART3 clock"]
  674. pub struct RB_SLP_CLK_UART3_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART3_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART3_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  675. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART3` writer - sleep UART3 clock"]
  676. pub struct RB_SLP_CLK_UART3_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART3_W < 'a > { # [doc = r"Sets the field bit"]
  677. # [inline (always)]
  678. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  679. # [inline (always)]
  680. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  681. # [inline (always)]
  682. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - sleep TMR0 clock"]
  683. # [inline (always)]
  684. pub fn rb_slp_clk_tmr0 (& self) -> RB_SLP_CLK_TMR0_R { RB_SLP_CLK_TMR0_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - sleep TMR1 clock"]
  685. # [inline (always)]
  686. pub fn rb_slp_clk_tmr1 (& self) -> RB_SLP_CLK_TMR1_R { RB_SLP_CLK_TMR1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep TMR2 clock"]
  687. # [inline (always)]
  688. pub fn rb_slp_clk_tmr2 (& self) -> RB_SLP_CLK_TMR2_R { RB_SLP_CLK_TMR2_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep PWMX clock"]
  689. # [inline (always)]
  690. pub fn rb_slp_clk_pwmx (& self) -> RB_SLP_CLK_PWMX_R { RB_SLP_CLK_PWMX_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - sleep UART0 clock"]
  691. # [inline (always)]
  692. pub fn rb_slp_clk_uart0 (& self) -> RB_SLP_CLK_UART0_R { RB_SLP_CLK_UART0_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - sleep UART1 clock"]
  693. # [inline (always)]
  694. pub fn rb_slp_clk_uart1 (& self) -> RB_SLP_CLK_UART1_R { RB_SLP_CLK_UART1_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - sleep UART2 clock"]
  695. # [inline (always)]
  696. pub fn rb_slp_clk_uart2 (& self) -> RB_SLP_CLK_UART2_R { RB_SLP_CLK_UART2_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - sleep UART3 clock"]
  697. # [inline (always)]
  698. pub fn rb_slp_clk_uart3 (& self) -> RB_SLP_CLK_UART3_R { RB_SLP_CLK_UART3_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - sleep TMR0 clock"]
  699. # [inline (always)]
  700. pub fn rb_slp_clk_tmr0 (& mut self) -> RB_SLP_CLK_TMR0_W { RB_SLP_CLK_TMR0_W { w : self } } # [doc = "Bit 1 - sleep TMR1 clock"]
  701. # [inline (always)]
  702. pub fn rb_slp_clk_tmr1 (& mut self) -> RB_SLP_CLK_TMR1_W { RB_SLP_CLK_TMR1_W { w : self } } # [doc = "Bit 2 - sleep TMR2 clock"]
  703. # [inline (always)]
  704. pub fn rb_slp_clk_tmr2 (& mut self) -> RB_SLP_CLK_TMR2_W { RB_SLP_CLK_TMR2_W { w : self } } # [doc = "Bit 3 - sleep PWMX clock"]
  705. # [inline (always)]
  706. pub fn rb_slp_clk_pwmx (& mut self) -> RB_SLP_CLK_PWMX_W { RB_SLP_CLK_PWMX_W { w : self } } # [doc = "Bit 4 - sleep UART0 clock"]
  707. # [inline (always)]
  708. pub fn rb_slp_clk_uart0 (& mut self) -> RB_SLP_CLK_UART0_W { RB_SLP_CLK_UART0_W { w : self } } # [doc = "Bit 5 - sleep UART1 clock"]
  709. # [inline (always)]
  710. pub fn rb_slp_clk_uart1 (& mut self) -> RB_SLP_CLK_UART1_W { RB_SLP_CLK_UART1_W { w : self } } # [doc = "Bit 6 - sleep UART2 clock"]
  711. # [inline (always)]
  712. pub fn rb_slp_clk_uart2 (& mut self) -> RB_SLP_CLK_UART2_W { RB_SLP_CLK_UART2_W { w : self } } # [doc = "Bit 7 - sleep UART3 clock"]
  713. # [inline (always)]
  714. pub fn rb_slp_clk_uart3 (& mut self) -> RB_SLP_CLK_UART3_W { RB_SLP_CLK_UART3_W { w : self } } # [doc = "Writes raw bits to the register."]
  715. # [inline (always)]
  716. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "sleep clock off control byte 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_clk_off0](index.html) module"]
  717. pub struct R8_SLP_CLK_OFF0_SPEC ; impl crate :: RegisterSpec for R8_SLP_CLK_OFF0_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_clk_off0::R](R) reader structure"]
  718. impl crate :: Readable for R8_SLP_CLK_OFF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_clk_off0::W](W) writer structure"]
  719. impl crate :: Writable for R8_SLP_CLK_OFF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_CLK_OFF0 to value 0"]
  720. impl crate :: Resettable for R8_SLP_CLK_OFF0_SPEC { # [inline (always)]
  721. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_CLK_OFF1 register accessor: an alias for `Reg<R8_SLP_CLK_OFF1_SPEC>`"]
  722. pub type R8_SLP_CLK_OFF1 = crate :: Reg < r8_slp_clk_off1 :: R8_SLP_CLK_OFF1_SPEC > ; # [doc = "sleep clock off control byte 1"]
  723. pub mod r8_slp_clk_off1 { # [doc = "Register `R8_SLP_CLK_OFF1` reader"]
  724. pub struct R (crate :: R < R8_SLP_CLK_OFF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_CLK_OFF1_SPEC > ; # [inline (always)]
  725. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_CLK_OFF1_SPEC >> for R { # [inline (always)]
  726. fn from (reader : crate :: R < R8_SLP_CLK_OFF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_CLK_OFF1` writer"]
  727. pub struct W (crate :: W < R8_SLP_CLK_OFF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_CLK_OFF1_SPEC > ; # [inline (always)]
  728. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  729. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_CLK_OFF1_SPEC >> for W { # [inline (always)]
  730. fn from (writer : crate :: W < R8_SLP_CLK_OFF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_CLK_SPI0` reader - sleep SPI0 clock"]
  731. pub struct RB_SLP_CLK_SPI0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SPI0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SPI0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SPI0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  732. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SPI0` writer - sleep SPI0 clock"]
  733. pub struct RB_SLP_CLK_SPI0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SPI0_W < 'a > { # [doc = r"Sets the field bit"]
  734. # [inline (always)]
  735. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  736. # [inline (always)]
  737. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  738. # [inline (always)]
  739. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_CLK_SPI1` reader - sleep SPI1 clock"]
  740. pub struct RB_SLP_CLK_SPI1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SPI1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SPI1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SPI1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  741. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SPI1` writer - sleep SPI1 clock"]
  742. pub struct RB_SLP_CLK_SPI1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SPI1_W < 'a > { # [doc = r"Sets the field bit"]
  743. # [inline (always)]
  744. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  745. # [inline (always)]
  746. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  747. # [inline (always)]
  748. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_EMMC` reader - sleep EMMC clock"]
  749. pub struct RB_SLP_CLK_EMMC_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_EMMC_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_EMMC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_EMMC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  750. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_EMMC` writer - sleep EMMC clock"]
  751. pub struct RB_SLP_CLK_EMMC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_EMMC_W < 'a > { # [doc = r"Sets the field bit"]
  752. # [inline (always)]
  753. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  754. # [inline (always)]
  755. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  756. # [inline (always)]
  757. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_HSPI` reader - sleep HSPI clock"]
  758. pub struct RB_SLP_CLK_HSPI_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_HSPI_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_HSPI_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_HSPI_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  759. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_HSPI` writer - sleep HSPI clock"]
  760. pub struct RB_SLP_CLK_HSPI_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_HSPI_W < 'a > { # [doc = r"Sets the field bit"]
  761. # [inline (always)]
  762. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  763. # [inline (always)]
  764. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  765. # [inline (always)]
  766. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_CLK_USBHS` reader - sleep USBHS clock"]
  767. pub struct RB_SLP_CLK_USBHS_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_USBHS_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_USBHS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_USBHS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  768. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_USBHS` writer - sleep USBHS clock"]
  769. pub struct RB_SLP_CLK_USBHS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_USBHS_W < 'a > { # [doc = r"Sets the field bit"]
  770. # [inline (always)]
  771. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  772. # [inline (always)]
  773. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  774. # [inline (always)]
  775. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_CLK_USBSS` reader - sleep USBSS clock"]
  776. pub struct RB_SLP_CLK_USBSS_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_USBSS_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_USBSS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_USBSS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  777. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_USBSS` writer - sleep USBSS clock"]
  778. pub struct RB_SLP_CLK_USBSS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_USBSS_W < 'a > { # [doc = r"Sets the field bit"]
  779. # [inline (always)]
  780. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  781. # [inline (always)]
  782. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  783. # [inline (always)]
  784. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SLP_CLK_SERD` reader - sleep SERD clock"]
  785. pub struct RB_SLP_CLK_SERD_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SERD_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SERD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SERD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  786. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SERD` writer - sleep SERD clock"]
  787. pub struct RB_SLP_CLK_SERD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SERD_W < 'a > { # [doc = r"Sets the field bit"]
  788. # [inline (always)]
  789. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  790. # [inline (always)]
  791. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  792. # [inline (always)]
  793. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SLP_CLK_DVP` reader - sleep DVP clock"]
  794. pub struct RB_SLP_CLK_DVP_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_DVP_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_DVP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_DVP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  795. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_DVP` writer - sleep DVP clock"]
  796. pub struct RB_SLP_CLK_DVP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_DVP_W < 'a > { # [doc = r"Sets the field bit"]
  797. # [inline (always)]
  798. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  799. # [inline (always)]
  800. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  801. # [inline (always)]
  802. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - sleep SPI0 clock"]
  803. # [inline (always)]
  804. pub fn rb_slp_clk_spi0 (& self) -> RB_SLP_CLK_SPI0_R { RB_SLP_CLK_SPI0_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - sleep SPI1 clock"]
  805. # [inline (always)]
  806. pub fn rb_slp_clk_spi1 (& self) -> RB_SLP_CLK_SPI1_R { RB_SLP_CLK_SPI1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep EMMC clock"]
  807. # [inline (always)]
  808. pub fn rb_slp_clk_emmc (& self) -> RB_SLP_CLK_EMMC_R { RB_SLP_CLK_EMMC_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep HSPI clock"]
  809. # [inline (always)]
  810. pub fn rb_slp_clk_hspi (& self) -> RB_SLP_CLK_HSPI_R { RB_SLP_CLK_HSPI_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - sleep USBHS clock"]
  811. # [inline (always)]
  812. pub fn rb_slp_clk_usbhs (& self) -> RB_SLP_CLK_USBHS_R { RB_SLP_CLK_USBHS_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - sleep USBSS clock"]
  813. # [inline (always)]
  814. pub fn rb_slp_clk_usbss (& self) -> RB_SLP_CLK_USBSS_R { RB_SLP_CLK_USBSS_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - sleep SERD clock"]
  815. # [inline (always)]
  816. pub fn rb_slp_clk_serd (& self) -> RB_SLP_CLK_SERD_R { RB_SLP_CLK_SERD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - sleep DVP clock"]
  817. # [inline (always)]
  818. pub fn rb_slp_clk_dvp (& self) -> RB_SLP_CLK_DVP_R { RB_SLP_CLK_DVP_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - sleep SPI0 clock"]
  819. # [inline (always)]
  820. pub fn rb_slp_clk_spi0 (& mut self) -> RB_SLP_CLK_SPI0_W { RB_SLP_CLK_SPI0_W { w : self } } # [doc = "Bit 1 - sleep SPI1 clock"]
  821. # [inline (always)]
  822. pub fn rb_slp_clk_spi1 (& mut self) -> RB_SLP_CLK_SPI1_W { RB_SLP_CLK_SPI1_W { w : self } } # [doc = "Bit 2 - sleep EMMC clock"]
  823. # [inline (always)]
  824. pub fn rb_slp_clk_emmc (& mut self) -> RB_SLP_CLK_EMMC_W { RB_SLP_CLK_EMMC_W { w : self } } # [doc = "Bit 3 - sleep HSPI clock"]
  825. # [inline (always)]
  826. pub fn rb_slp_clk_hspi (& mut self) -> RB_SLP_CLK_HSPI_W { RB_SLP_CLK_HSPI_W { w : self } } # [doc = "Bit 4 - sleep USBHS clock"]
  827. # [inline (always)]
  828. pub fn rb_slp_clk_usbhs (& mut self) -> RB_SLP_CLK_USBHS_W { RB_SLP_CLK_USBHS_W { w : self } } # [doc = "Bit 5 - sleep USBSS clock"]
  829. # [inline (always)]
  830. pub fn rb_slp_clk_usbss (& mut self) -> RB_SLP_CLK_USBSS_W { RB_SLP_CLK_USBSS_W { w : self } } # [doc = "Bit 6 - sleep SERD clock"]
  831. # [inline (always)]
  832. pub fn rb_slp_clk_serd (& mut self) -> RB_SLP_CLK_SERD_W { RB_SLP_CLK_SERD_W { w : self } } # [doc = "Bit 7 - sleep DVP clock"]
  833. # [inline (always)]
  834. pub fn rb_slp_clk_dvp (& mut self) -> RB_SLP_CLK_DVP_W { RB_SLP_CLK_DVP_W { w : self } } # [doc = "Writes raw bits to the register."]
  835. # [inline (always)]
  836. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "sleep clock off control byte 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_clk_off1](index.html) module"]
  837. pub struct R8_SLP_CLK_OFF1_SPEC ; impl crate :: RegisterSpec for R8_SLP_CLK_OFF1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_clk_off1::R](R) reader structure"]
  838. impl crate :: Readable for R8_SLP_CLK_OFF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_clk_off1::W](W) writer structure"]
  839. impl crate :: Writable for R8_SLP_CLK_OFF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_CLK_OFF1 to value 0"]
  840. impl crate :: Resettable for R8_SLP_CLK_OFF1_SPEC { # [inline (always)]
  841. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_WAKE_CTRL register accessor: an alias for `Reg<R8_SLP_WAKE_CTRL_SPEC>`"]
  842. pub type R8_SLP_WAKE_CTRL = crate :: Reg < r8_slp_wake_ctrl :: R8_SLP_WAKE_CTRL_SPEC > ; # [doc = "wake control"]
  843. pub mod r8_slp_wake_ctrl { # [doc = "Register `R8_SLP_WAKE_CTRL` reader"]
  844. pub struct R (crate :: R < R8_SLP_WAKE_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_WAKE_CTRL_SPEC > ; # [inline (always)]
  845. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_WAKE_CTRL_SPEC >> for R { # [inline (always)]
  846. fn from (reader : crate :: R < R8_SLP_WAKE_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_WAKE_CTRL` writer"]
  847. pub struct W (crate :: W < R8_SLP_WAKE_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_WAKE_CTRL_SPEC > ; # [inline (always)]
  848. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  849. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_WAKE_CTRL_SPEC >> for W { # [inline (always)]
  850. fn from (writer : crate :: W < R8_SLP_WAKE_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_USBHS_WAKE` reader - enable USBHS waking"]
  851. pub struct RB_SLP_USBHS_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBHS_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBHS_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBHS_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  852. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBHS_WAKE` writer - enable USBHS waking"]
  853. pub struct RB_SLP_USBHS_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBHS_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
  854. # [inline (always)]
  855. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  856. # [inline (always)]
  857. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  858. # [inline (always)]
  859. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_USBSS_WAKE` reader - enable USBSS waking"]
  860. pub struct RB_SLP_USBSS_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBSS_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBSS_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBSS_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  861. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBSS_WAKE` writer - enable USBSS waking"]
  862. pub struct RB_SLP_USBSS_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBSS_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
  863. # [inline (always)]
  864. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  865. # [inline (always)]
  866. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  867. # [inline (always)]
  868. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_ETH` reader - sleep ETH clock"]
  869. pub struct RB_SLP_CLK_ETH_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_ETH_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_ETH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_ETH_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  870. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_ETH` writer - sleep ETH clock"]
  871. pub struct RB_SLP_CLK_ETH_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_ETH_W < 'a > { # [doc = r"Sets the field bit"]
  872. # [inline (always)]
  873. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  874. # [inline (always)]
  875. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  876. # [inline (always)]
  877. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_ECDC` reader - sleep ECDC clock"]
  878. pub struct RB_SLP_CLK_ECDC_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_ECDC_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_ECDC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_ECDC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  879. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_ECDC` writer - sleep ECDC clock"]
  880. pub struct RB_SLP_CLK_ECDC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_ECDC_W < 'a > { # [doc = r"Sets the field bit"]
  881. # [inline (always)]
  882. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  883. # [inline (always)]
  884. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  885. # [inline (always)]
  886. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_GPIO_WAKE` reader - enable GPIO waking"]
  887. pub struct RB_SLP_GPIO_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_GPIO_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_GPIO_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_GPIO_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  888. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_GPIO_WAKE` writer - enable GPIO waking"]
  889. pub struct RB_SLP_GPIO_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_GPIO_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
  890. # [inline (always)]
  891. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  892. # [inline (always)]
  893. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  894. # [inline (always)]
  895. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_ETH_WAKE` reader - enable Eth waking"]
  896. pub struct RB_SLP_ETH_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_ETH_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_ETH_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_ETH_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  897. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_ETH_WAKE` writer - enable Eth waking"]
  898. pub struct RB_SLP_ETH_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_ETH_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
  899. # [inline (always)]
  900. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  901. # [inline (always)]
  902. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  903. # [inline (always)]
  904. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - enable USBHS waking"]
  905. # [inline (always)]
  906. pub fn rb_slp_usbhs_wake (& self) -> RB_SLP_USBHS_WAKE_R { RB_SLP_USBHS_WAKE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable USBSS waking"]
  907. # [inline (always)]
  908. pub fn rb_slp_usbss_wake (& self) -> RB_SLP_USBSS_WAKE_R { RB_SLP_USBSS_WAKE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep ETH clock"]
  909. # [inline (always)]
  910. pub fn rb_slp_clk_eth (& self) -> RB_SLP_CLK_ETH_R { RB_SLP_CLK_ETH_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep ECDC clock"]
  911. # [inline (always)]
  912. pub fn rb_slp_clk_ecdc (& self) -> RB_SLP_CLK_ECDC_R { RB_SLP_CLK_ECDC_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable GPIO waking"]
  913. # [inline (always)]
  914. pub fn rb_slp_gpio_wake (& self) -> RB_SLP_GPIO_WAKE_R { RB_SLP_GPIO_WAKE_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - enable Eth waking"]
  915. # [inline (always)]
  916. pub fn rb_slp_eth_wake (& self) -> RB_SLP_ETH_WAKE_R { RB_SLP_ETH_WAKE_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable USBHS waking"]
  917. # [inline (always)]
  918. pub fn rb_slp_usbhs_wake (& mut self) -> RB_SLP_USBHS_WAKE_W { RB_SLP_USBHS_WAKE_W { w : self } } # [doc = "Bit 1 - enable USBSS waking"]
  919. # [inline (always)]
  920. pub fn rb_slp_usbss_wake (& mut self) -> RB_SLP_USBSS_WAKE_W { RB_SLP_USBSS_WAKE_W { w : self } } # [doc = "Bit 2 - sleep ETH clock"]
  921. # [inline (always)]
  922. pub fn rb_slp_clk_eth (& mut self) -> RB_SLP_CLK_ETH_W { RB_SLP_CLK_ETH_W { w : self } } # [doc = "Bit 3 - sleep ECDC clock"]
  923. # [inline (always)]
  924. pub fn rb_slp_clk_ecdc (& mut self) -> RB_SLP_CLK_ECDC_W { RB_SLP_CLK_ECDC_W { w : self } } # [doc = "Bit 4 - enable GPIO waking"]
  925. # [inline (always)]
  926. pub fn rb_slp_gpio_wake (& mut self) -> RB_SLP_GPIO_WAKE_W { RB_SLP_GPIO_WAKE_W { w : self } } # [doc = "Bit 5 - enable Eth waking"]
  927. # [inline (always)]
  928. pub fn rb_slp_eth_wake (& mut self) -> RB_SLP_ETH_WAKE_W { RB_SLP_ETH_WAKE_W { w : self } } # [doc = "Writes raw bits to the register."]
  929. # [inline (always)]
  930. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "wake control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_wake_ctrl](index.html) module"]
  931. pub struct R8_SLP_WAKE_CTRL_SPEC ; impl crate :: RegisterSpec for R8_SLP_WAKE_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_wake_ctrl::R](R) reader structure"]
  932. impl crate :: Readable for R8_SLP_WAKE_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_wake_ctrl::W](W) writer structure"]
  933. impl crate :: Writable for R8_SLP_WAKE_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_WAKE_CTRL to value 0"]
  934. impl crate :: Resettable for R8_SLP_WAKE_CTRL_SPEC { # [inline (always)]
  935. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_POWER_CTRL register accessor: an alias for `Reg<R8_SLP_POWER_CTRL_SPEC>`"]
  936. pub type R8_SLP_POWER_CTRL = crate :: Reg < r8_slp_power_ctrl :: R8_SLP_POWER_CTRL_SPEC > ; # [doc = "power control"]
  937. pub mod r8_slp_power_ctrl { # [doc = "Register `R8_SLP_POWER_CTRL` reader"]
  938. pub struct R (crate :: R < R8_SLP_POWER_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_POWER_CTRL_SPEC > ; # [inline (always)]
  939. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_POWER_CTRL_SPEC >> for R { # [inline (always)]
  940. fn from (reader : crate :: R < R8_SLP_POWER_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_POWER_CTRL` writer"]
  941. pub struct W (crate :: W < R8_SLP_POWER_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_POWER_CTRL_SPEC > ; # [inline (always)]
  942. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  943. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_POWER_CTRL_SPEC >> for W { # [inline (always)]
  944. fn from (writer : crate :: W < R8_SLP_POWER_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_USBHS_PWRDN` reader - enable USBHS power down"]
  945. pub struct RB_SLP_USBHS_PWRDN_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBHS_PWRDN_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBHS_PWRDN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBHS_PWRDN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  946. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBHS_PWRDN` writer - enable USBHS power down"]
  947. pub struct RB_SLP_USBHS_PWRDN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBHS_PWRDN_W < 'a > { # [doc = r"Sets the field bit"]
  948. # [inline (always)]
  949. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  950. # [inline (always)]
  951. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  952. # [inline (always)]
  953. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - enable USBHS power down"]
  954. # [inline (always)]
  955. pub fn rb_slp_usbhs_pwrdn (& self) -> RB_SLP_USBHS_PWRDN_R { RB_SLP_USBHS_PWRDN_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable USBHS power down"]
  956. # [inline (always)]
  957. pub fn rb_slp_usbhs_pwrdn (& mut self) -> RB_SLP_USBHS_PWRDN_W { RB_SLP_USBHS_PWRDN_W { w : self } } # [doc = "Writes raw bits to the register."]
  958. # [inline (always)]
  959. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "power control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_power_ctrl](index.html) module"]
  960. pub struct R8_SLP_POWER_CTRL_SPEC ; impl crate :: RegisterSpec for R8_SLP_POWER_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_power_ctrl::R](R) reader structure"]
  961. impl crate :: Readable for R8_SLP_POWER_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_power_ctrl::W](W) writer structure"]
  962. impl crate :: Writable for R8_SLP_POWER_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_POWER_CTRL to value 0"]
  963. impl crate :: Resettable for R8_SLP_POWER_CTRL_SPEC { # [inline (always)]
  964. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SERD_ANA_CFG1 register accessor: an alias for `Reg<R16_SERD_ANA_CFG1_SPEC>`"]
  965. pub type R16_SERD_ANA_CFG1 = crate :: Reg < r16_serd_ana_cfg1 :: R16_SERD_ANA_CFG1_SPEC > ; # [doc = "Serdes Analog parameter configuration1"]
  966. pub mod r16_serd_ana_cfg1 { # [doc = "Register `R16_SERD_ANA_CFG1` reader"]
  967. pub struct R (crate :: R < R16_SERD_ANA_CFG1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SERD_ANA_CFG1_SPEC > ; # [inline (always)]
  968. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SERD_ANA_CFG1_SPEC >> for R { # [inline (always)]
  969. fn from (reader : crate :: R < R16_SERD_ANA_CFG1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SERD_ANA_CFG1` writer"]
  970. pub struct W (crate :: W < R16_SERD_ANA_CFG1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SERD_ANA_CFG1_SPEC > ; # [inline (always)]
  971. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  972. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SERD_ANA_CFG1_SPEC >> for W { # [inline (always)]
  973. fn from (writer : crate :: W < R16_SERD_ANA_CFG1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SERD_PLL_CFG` reader - SerDes PHY internal configuration bit"]
  974. pub struct RB_SERD_PLL_CFG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SERD_PLL_CFG_R { pub (crate) fn new (bits : u8) -> Self { RB_SERD_PLL_CFG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_PLL_CFG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  975. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_PLL_CFG` writer - SerDes PHY internal configuration bit"]
  976. pub struct RB_SERD_PLL_CFG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_PLL_CFG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  977. # [inline (always)]
  978. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u16 & 0xff) ; self . w } } # [doc = "Field `RB_SERD_30M_SEL` reader - SerDes PHY reference clock source seletion"]
  979. pub struct RB_SERD_30M_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_SERD_30M_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_SERD_30M_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_30M_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  980. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_30M_SEL` writer - SerDes PHY reference clock source seletion"]
  981. pub struct RB_SERD_30M_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_30M_SEL_W < 'a > { # [doc = r"Sets the field bit"]
  982. # [inline (always)]
  983. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  984. # [inline (always)]
  985. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  986. # [inline (always)]
  987. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_SERD_DN_SEL` reader - Enable SerDes PHY GXM test pin"]
  988. pub struct RB_SERD_DN_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_SERD_DN_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_SERD_DN_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_DN_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  989. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_DN_SEL` writer - Enable SerDes PHY GXM test pin"]
  990. pub struct RB_SERD_DN_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_DN_SEL_W < 'a > { # [doc = r"Sets the field bit"]
  991. # [inline (always)]
  992. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  993. # [inline (always)]
  994. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  995. # [inline (always)]
  996. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bits 0:7 - SerDes PHY internal configuration bit"]
  997. # [inline (always)]
  998. pub fn rb_serd_pll_cfg (& self) -> RB_SERD_PLL_CFG_R { RB_SERD_PLL_CFG_R :: new ((self . bits & 0xff) as u8) } # [doc = "Bit 8 - SerDes PHY reference clock source seletion"]
  999. # [inline (always)]
  1000. pub fn rb_serd_30m_sel (& self) -> RB_SERD_30M_SEL_R { RB_SERD_30M_SEL_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - Enable SerDes PHY GXM test pin"]
  1001. # [inline (always)]
  1002. pub fn rb_serd_dn_sel (& self) -> RB_SERD_DN_SEL_R { RB_SERD_DN_SEL_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bits 0:7 - SerDes PHY internal configuration bit"]
  1003. # [inline (always)]
  1004. pub fn rb_serd_pll_cfg (& mut self) -> RB_SERD_PLL_CFG_W { RB_SERD_PLL_CFG_W { w : self } } # [doc = "Bit 8 - SerDes PHY reference clock source seletion"]
  1005. # [inline (always)]
  1006. pub fn rb_serd_30m_sel (& mut self) -> RB_SERD_30M_SEL_W { RB_SERD_30M_SEL_W { w : self } } # [doc = "Bit 9 - Enable SerDes PHY GXM test pin"]
  1007. # [inline (always)]
  1008. pub fn rb_serd_dn_sel (& mut self) -> RB_SERD_DN_SEL_W { RB_SERD_DN_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
  1009. # [inline (always)]
  1010. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Serdes Analog parameter configuration1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_serd_ana_cfg1](index.html) module"]
  1011. pub struct R16_SERD_ANA_CFG1_SPEC ; impl crate :: RegisterSpec for R16_SERD_ANA_CFG1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_serd_ana_cfg1::R](R) reader structure"]
  1012. impl crate :: Readable for R16_SERD_ANA_CFG1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_serd_ana_cfg1::W](W) writer structure"]
  1013. impl crate :: Writable for R16_SERD_ANA_CFG1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SERD_ANA_CFG1 to value 0x5a"]
  1014. impl crate :: Resettable for R16_SERD_ANA_CFG1_SPEC { # [inline (always)]
  1015. fn reset_value () -> Self :: Ux { 0x5a } } } # [doc = "R32_SERD_ANA_CFG2 register accessor: an alias for `Reg<R32_SERD_ANA_CFG2_SPEC>`"]
  1016. pub type R32_SERD_ANA_CFG2 = crate :: Reg < r32_serd_ana_cfg2 :: R32_SERD_ANA_CFG2_SPEC > ; # [doc = "Serdes Analog parameter configuration2"]
  1017. pub mod r32_serd_ana_cfg2 { # [doc = "Register `R32_SERD_ANA_CFG2` reader"]
  1018. pub struct R (crate :: R < R32_SERD_ANA_CFG2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SERD_ANA_CFG2_SPEC > ; # [inline (always)]
  1019. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SERD_ANA_CFG2_SPEC >> for R { # [inline (always)]
  1020. fn from (reader : crate :: R < R32_SERD_ANA_CFG2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SERD_ANA_CFG2` writer"]
  1021. pub struct W (crate :: W < R32_SERD_ANA_CFG2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SERD_ANA_CFG2_SPEC > ; # [inline (always)]
  1022. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1023. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SERD_ANA_CFG2_SPEC >> for W { # [inline (always)]
  1024. fn from (writer : crate :: W < R32_SERD_ANA_CFG2_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SERD_TRX_CFG` reader - Tx and RX parameter setting"]
  1025. pub struct RB_SERD_TRX_CFG_R (crate :: FieldReader < u32 , u32 >) ; impl RB_SERD_TRX_CFG_R { pub (crate) fn new (bits : u32) -> Self { RB_SERD_TRX_CFG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_TRX_CFG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1026. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_TRX_CFG` writer - Tx and RX parameter setting"]
  1027. pub struct RB_SERD_TRX_CFG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_TRX_CFG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1028. # [inline (always)]
  1029. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - Tx and RX parameter setting"]
  1030. # [inline (always)]
  1031. pub fn rb_serd_trx_cfg (& self) -> RB_SERD_TRX_CFG_R { RB_SERD_TRX_CFG_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - Tx and RX parameter setting"]
  1032. # [inline (always)]
  1033. pub fn rb_serd_trx_cfg (& mut self) -> RB_SERD_TRX_CFG_W { RB_SERD_TRX_CFG_W { w : self } } # [doc = "Writes raw bits to the register."]
  1034. # [inline (always)]
  1035. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Serdes Analog parameter configuration2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_serd_ana_cfg2](index.html) module"]
  1036. pub struct R32_SERD_ANA_CFG2_SPEC ; impl crate :: RegisterSpec for R32_SERD_ANA_CFG2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_serd_ana_cfg2::R](R) reader structure"]
  1037. impl crate :: Readable for R32_SERD_ANA_CFG2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_serd_ana_cfg2::W](W) writer structure"]
  1038. impl crate :: Writable for R32_SERD_ANA_CFG2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SERD_ANA_CFG2 to value 0x0042_3015"]
  1039. impl crate :: Resettable for R32_SERD_ANA_CFG2_SPEC { # [inline (always)]
  1040. fn reset_value () -> Self :: Ux { 0x0042_3015 } } } # [doc = "R8_GPIO_INT_FLAG register accessor: an alias for `Reg<R8_GPIO_INT_FLAG_SPEC>`"]
  1041. pub type R8_GPIO_INT_FLAG = crate :: Reg < r8_gpio_int_flag :: R8_GPIO_INT_FLAG_SPEC > ; # [doc = "GPIO interrupt control"]
  1042. pub mod r8_gpio_int_flag { # [doc = "Register `R8_GPIO_INT_FLAG` reader"]
  1043. pub struct R (crate :: R < R8_GPIO_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_FLAG_SPEC > ; # [inline (always)]
  1044. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_FLAG_SPEC >> for R { # [inline (always)]
  1045. fn from (reader : crate :: R < R8_GPIO_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_FLAG` writer"]
  1046. pub struct W (crate :: W < R8_GPIO_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_FLAG_SPEC > ; # [inline (always)]
  1047. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1048. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_FLAG_SPEC >> for W { # [inline (always)]
  1049. fn from (writer : crate :: W < R8_GPIO_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IF` reader - PA2 pin interrupt flag"]
  1050. pub struct RB_GPIO_PA2_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1051. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IF` writer - PA2 pin interrupt flag"]
  1052. pub struct RB_GPIO_PA2_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IF_W < 'a > { # [doc = r"Sets the field bit"]
  1053. # [inline (always)]
  1054. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1055. # [inline (always)]
  1056. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1057. # [inline (always)]
  1058. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt flag"]
  1059. # [inline (always)]
  1060. pub fn rb_gpio_pa2_if (& self) -> RB_GPIO_PA2_IF_R { RB_GPIO_PA2_IF_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt flag"]
  1061. # [inline (always)]
  1062. pub fn rb_gpio_pa2_if (& mut self) -> RB_GPIO_PA2_IF_W { RB_GPIO_PA2_IF_W { w : self } } # [doc = "Writes raw bits to the register."]
  1063. # [inline (always)]
  1064. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_flag](index.html) module"]
  1065. pub struct R8_GPIO_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_flag::R](R) reader structure"]
  1066. impl crate :: Readable for R8_GPIO_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_flag::W](W) writer structure"]
  1067. impl crate :: Writable for R8_GPIO_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_FLAG to value 0"]
  1068. impl crate :: Resettable for R8_GPIO_INT_FLAG_SPEC { # [inline (always)]
  1069. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_ENABLE register accessor: an alias for `Reg<R8_GPIO_INT_ENABLE_SPEC>`"]
  1070. pub type R8_GPIO_INT_ENABLE = crate :: Reg < r8_gpio_int_enable :: R8_GPIO_INT_ENABLE_SPEC > ; # [doc = "GPIO interrupt enable"]
  1071. pub mod r8_gpio_int_enable { # [doc = "Register `R8_GPIO_INT_ENABLE` reader"]
  1072. pub struct R (crate :: R < R8_GPIO_INT_ENABLE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_ENABLE_SPEC > ; # [inline (always)]
  1073. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_ENABLE_SPEC >> for R { # [inline (always)]
  1074. fn from (reader : crate :: R < R8_GPIO_INT_ENABLE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_ENABLE` writer"]
  1075. pub struct W (crate :: W < R8_GPIO_INT_ENABLE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_ENABLE_SPEC > ; # [inline (always)]
  1076. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1077. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_ENABLE_SPEC >> for W { # [inline (always)]
  1078. fn from (writer : crate :: W < R8_GPIO_INT_ENABLE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IE` reader - PA2 pin interrupt enable"]
  1079. pub struct RB_GPIO_PA2_IE_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IE_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1080. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IE` writer - PA2 pin interrupt enable"]
  1081. pub struct RB_GPIO_PA2_IE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IE_W < 'a > { # [doc = r"Sets the field bit"]
  1082. # [inline (always)]
  1083. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1084. # [inline (always)]
  1085. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1086. # [inline (always)]
  1087. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt enable"]
  1088. # [inline (always)]
  1089. pub fn rb_gpio_pa2_ie (& self) -> RB_GPIO_PA2_IE_R { RB_GPIO_PA2_IE_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt enable"]
  1090. # [inline (always)]
  1091. pub fn rb_gpio_pa2_ie (& mut self) -> RB_GPIO_PA2_IE_W { RB_GPIO_PA2_IE_W { w : self } } # [doc = "Writes raw bits to the register."]
  1092. # [inline (always)]
  1093. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_enable](index.html) module"]
  1094. pub struct R8_GPIO_INT_ENABLE_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_ENABLE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_enable::R](R) reader structure"]
  1095. impl crate :: Readable for R8_GPIO_INT_ENABLE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_enable::W](W) writer structure"]
  1096. impl crate :: Writable for R8_GPIO_INT_ENABLE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_ENABLE to value 0"]
  1097. impl crate :: Resettable for R8_GPIO_INT_ENABLE_SPEC { # [inline (always)]
  1098. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_MODE register accessor: an alias for `Reg<R8_GPIO_INT_MODE_SPEC>`"]
  1099. pub type R8_GPIO_INT_MODE = crate :: Reg < r8_gpio_int_mode :: R8_GPIO_INT_MODE_SPEC > ; # [doc = "GPIO interrupt mode"]
  1100. pub mod r8_gpio_int_mode { # [doc = "Register `R8_GPIO_INT_MODE` reader"]
  1101. pub struct R (crate :: R < R8_GPIO_INT_MODE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_MODE_SPEC > ; # [inline (always)]
  1102. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_MODE_SPEC >> for R { # [inline (always)]
  1103. fn from (reader : crate :: R < R8_GPIO_INT_MODE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_MODE` writer"]
  1104. pub struct W (crate :: W < R8_GPIO_INT_MODE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_MODE_SPEC > ; # [inline (always)]
  1105. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1106. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_MODE_SPEC >> for W { # [inline (always)]
  1107. fn from (writer : crate :: W < R8_GPIO_INT_MODE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IM` reader - PA2 pin interrupt mode"]
  1108. pub struct RB_GPIO_PA2_IM_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IM_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1109. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IM` writer - PA2 pin interrupt mode"]
  1110. pub struct RB_GPIO_PA2_IM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IM_W < 'a > { # [doc = r"Sets the field bit"]
  1111. # [inline (always)]
  1112. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1113. # [inline (always)]
  1114. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1115. # [inline (always)]
  1116. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt mode"]
  1117. # [inline (always)]
  1118. pub fn rb_gpio_pa2_im (& self) -> RB_GPIO_PA2_IM_R { RB_GPIO_PA2_IM_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt mode"]
  1119. # [inline (always)]
  1120. pub fn rb_gpio_pa2_im (& mut self) -> RB_GPIO_PA2_IM_W { RB_GPIO_PA2_IM_W { w : self } } # [doc = "Writes raw bits to the register."]
  1121. # [inline (always)]
  1122. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_mode](index.html) module"]
  1123. pub struct R8_GPIO_INT_MODE_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_MODE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_mode::R](R) reader structure"]
  1124. impl crate :: Readable for R8_GPIO_INT_MODE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_mode::W](W) writer structure"]
  1125. impl crate :: Writable for R8_GPIO_INT_MODE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_MODE to value 0"]
  1126. impl crate :: Resettable for R8_GPIO_INT_MODE_SPEC { # [inline (always)]
  1127. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_POLAR register accessor: an alias for `Reg<R8_GPIO_INT_POLAR_SPEC>`"]
  1128. pub type R8_GPIO_INT_POLAR = crate :: Reg < r8_gpio_int_polar :: R8_GPIO_INT_POLAR_SPEC > ; # [doc = "GPIO interrupt polarity"]
  1129. pub mod r8_gpio_int_polar { # [doc = "Register `R8_GPIO_INT_POLAR` reader"]
  1130. pub struct R (crate :: R < R8_GPIO_INT_POLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_POLAR_SPEC > ; # [inline (always)]
  1131. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_POLAR_SPEC >> for R { # [inline (always)]
  1132. fn from (reader : crate :: R < R8_GPIO_INT_POLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_POLAR` writer"]
  1133. pub struct W (crate :: W < R8_GPIO_INT_POLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_POLAR_SPEC > ; # [inline (always)]
  1134. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1135. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_POLAR_SPEC >> for W { # [inline (always)]
  1136. fn from (writer : crate :: W < R8_GPIO_INT_POLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IP` reader - PA2 pin interrupt mode"]
  1137. pub struct RB_GPIO_PA2_IP_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IP_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1138. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IP` writer - PA2 pin interrupt mode"]
  1139. pub struct RB_GPIO_PA2_IP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IP_W < 'a > { # [doc = r"Sets the field bit"]
  1140. # [inline (always)]
  1141. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1142. # [inline (always)]
  1143. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1144. # [inline (always)]
  1145. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt mode"]
  1146. # [inline (always)]
  1147. pub fn rb_gpio_pa2_ip (& self) -> RB_GPIO_PA2_IP_R { RB_GPIO_PA2_IP_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt mode"]
  1148. # [inline (always)]
  1149. pub fn rb_gpio_pa2_ip (& mut self) -> RB_GPIO_PA2_IP_W { RB_GPIO_PA2_IP_W { w : self } } # [doc = "Writes raw bits to the register."]
  1150. # [inline (always)]
  1151. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt polarity\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_polar](index.html) module"]
  1152. pub struct R8_GPIO_INT_POLAR_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_POLAR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_polar::R](R) reader structure"]
  1153. impl crate :: Readable for R8_GPIO_INT_POLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_polar::W](W) writer structure"]
  1154. impl crate :: Writable for R8_GPIO_INT_POLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_POLAR to value 0"]
  1155. impl crate :: Resettable for R8_GPIO_INT_POLAR_SPEC { # [inline (always)]
  1156. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_DIR register accessor: an alias for `Reg<R32_PA_DIR_SPEC>`"]
  1157. pub type R32_PA_DIR = crate :: Reg < r32_pa_dir :: R32_PA_DIR_SPEC > ; # [doc = "GPIO PA I/O direction"]
  1158. pub mod r32_pa_dir { # [doc = "Register `R32_PA_DIR` reader"]
  1159. pub struct R (crate :: R < R32_PA_DIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_DIR_SPEC > ; # [inline (always)]
  1160. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_DIR_SPEC >> for R { # [inline (always)]
  1161. fn from (reader : crate :: R < R32_PA_DIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_DIR` writer"]
  1162. pub struct W (crate :: W < R32_PA_DIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_DIR_SPEC > ; # [inline (always)]
  1163. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1164. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_DIR_SPEC >> for W { # [inline (always)]
  1165. fn from (writer : crate :: W < R32_PA_DIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_DIR` reader - GPIO PA I/O direction"]
  1166. pub struct R32_PA_DIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_DIR_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_DIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1167. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_DIR` writer - GPIO PA I/O direction"]
  1168. pub struct R32_PA_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_DIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1169. # [inline (always)]
  1170. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA I/O direction"]
  1171. # [inline (always)]
  1172. pub fn r32_pa_dir (& self) -> R32_PA_DIR_R { R32_PA_DIR_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA I/O direction"]
  1173. # [inline (always)]
  1174. pub fn r32_pa_dir (& mut self) -> R32_PA_DIR_W { R32_PA_DIR_W { w : self } } # [doc = "Writes raw bits to the register."]
  1175. # [inline (always)]
  1176. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA I/O direction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_dir](index.html) module"]
  1177. pub struct R32_PA_DIR_SPEC ; impl crate :: RegisterSpec for R32_PA_DIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_dir::R](R) reader structure"]
  1178. impl crate :: Readable for R32_PA_DIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_dir::W](W) writer structure"]
  1179. impl crate :: Writable for R32_PA_DIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_DIR to value 0"]
  1180. impl crate :: Resettable for R32_PA_DIR_SPEC { # [inline (always)]
  1181. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PIN register accessor: an alias for `Reg<R32_PA_PIN_SPEC>`"]
  1182. pub type R32_PA_PIN = crate :: Reg < r32_pa_pin :: R32_PA_PIN_SPEC > ; # [doc = "GPIO PA input"]
  1183. pub mod r32_pa_pin { # [doc = "Register `R32_PA_PIN` reader"]
  1184. pub struct R (crate :: R < R32_PA_PIN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PIN_SPEC > ; # [inline (always)]
  1185. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PIN_SPEC >> for R { # [inline (always)]
  1186. fn from (reader : crate :: R < R32_PA_PIN_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_PA_PIN` reader - GPIO PA input"]
  1187. pub struct R32_PA_PIN_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PIN_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PIN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PIN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1188. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:23 - GPIO PA input"]
  1189. # [inline (always)]
  1190. pub fn r32_pa_pin (& self) -> R32_PA_PIN_R { R32_PA_PIN_R :: new ((self . bits & 0x00ff_ffff) as u32) } } # [doc = "GPIO PA input\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pin](index.html) module"]
  1191. pub struct R32_PA_PIN_SPEC ; impl crate :: RegisterSpec for R32_PA_PIN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pin::R](R) reader structure"]
  1192. impl crate :: Readable for R32_PA_PIN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PA_PIN to value 0"]
  1193. impl crate :: Resettable for R32_PA_PIN_SPEC { # [inline (always)]
  1194. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_OUT register accessor: an alias for `Reg<R32_PA_OUT_SPEC>`"]
  1195. pub type R32_PA_OUT = crate :: Reg < r32_pa_out :: R32_PA_OUT_SPEC > ; # [doc = "GPIO PA output"]
  1196. pub mod r32_pa_out { # [doc = "Register `R32_PA_OUT` reader"]
  1197. pub struct R (crate :: R < R32_PA_OUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_OUT_SPEC > ; # [inline (always)]
  1198. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_OUT_SPEC >> for R { # [inline (always)]
  1199. fn from (reader : crate :: R < R32_PA_OUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_OUT` writer"]
  1200. pub struct W (crate :: W < R32_PA_OUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_OUT_SPEC > ; # [inline (always)]
  1201. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1202. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_OUT_SPEC >> for W { # [inline (always)]
  1203. fn from (writer : crate :: W < R32_PA_OUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_OUT` reader - GPIO PA output"]
  1204. pub struct R32_PA_OUT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_OUT_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_OUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_OUT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1205. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_OUT` writer - GPIO PA output"]
  1206. pub struct R32_PA_OUT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_OUT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1207. # [inline (always)]
  1208. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output"]
  1209. # [inline (always)]
  1210. pub fn r32_pa_out (& self) -> R32_PA_OUT_R { R32_PA_OUT_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output"]
  1211. # [inline (always)]
  1212. pub fn r32_pa_out (& mut self) -> R32_PA_OUT_W { R32_PA_OUT_W { w : self } } # [doc = "Writes raw bits to the register."]
  1213. # [inline (always)]
  1214. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_out](index.html) module"]
  1215. pub struct R32_PA_OUT_SPEC ; impl crate :: RegisterSpec for R32_PA_OUT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_out::R](R) reader structure"]
  1216. impl crate :: Readable for R32_PA_OUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_out::W](W) writer structure"]
  1217. impl crate :: Writable for R32_PA_OUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_OUT to value 0"]
  1218. impl crate :: Resettable for R32_PA_OUT_SPEC { # [inline (always)]
  1219. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_CLR register accessor: an alias for `Reg<R32_PA_CLR_SPEC>`"]
  1220. pub type R32_PA_CLR = crate :: Reg < r32_pa_clr :: R32_PA_CLR_SPEC > ; # [doc = "GPIO PA clear output"]
  1221. pub mod r32_pa_clr { # [doc = "Register `R32_PA_CLR` writer"]
  1222. pub struct W (crate :: W < R32_PA_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_CLR_SPEC > ; # [inline (always)]
  1223. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1224. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_CLR_SPEC >> for W { # [inline (always)]
  1225. fn from (writer : crate :: W < R32_PA_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_CLR` writer - GPIO PA clear output"]
  1226. pub struct R32_PA_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_CLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1227. # [inline (always)]
  1228. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl W { # [doc = "Bits 0:23 - GPIO PA clear output"]
  1229. # [inline (always)]
  1230. pub fn r32_pa_clr (& mut self) -> R32_PA_CLR_W { R32_PA_CLR_W { w : self } } # [doc = "Writes raw bits to the register."]
  1231. # [inline (always)]
  1232. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA clear output\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_clr](index.html) module"]
  1233. pub struct R32_PA_CLR_SPEC ; impl crate :: RegisterSpec for R32_PA_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_pa_clr::W](W) writer structure"]
  1234. impl crate :: Writable for R32_PA_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_CLR to value 0"]
  1235. impl crate :: Resettable for R32_PA_CLR_SPEC { # [inline (always)]
  1236. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PU register accessor: an alias for `Reg<R32_PA_PU_SPEC>`"]
  1237. pub type R32_PA_PU = crate :: Reg < r32_pa_pu :: R32_PA_PU_SPEC > ; # [doc = "GPIO PA pullup resistance enable"]
  1238. pub mod r32_pa_pu { # [doc = "Register `R32_PA_PU` reader"]
  1239. pub struct R (crate :: R < R32_PA_PU_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PU_SPEC > ; # [inline (always)]
  1240. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PU_SPEC >> for R { # [inline (always)]
  1241. fn from (reader : crate :: R < R32_PA_PU_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_PU` writer"]
  1242. pub struct W (crate :: W < R32_PA_PU_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_PU_SPEC > ; # [inline (always)]
  1243. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1244. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_PU_SPEC >> for W { # [inline (always)]
  1245. fn from (writer : crate :: W < R32_PA_PU_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_PU` reader - GPIO PA pullup resistance enable"]
  1246. pub struct R32_PA_PU_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PU_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PU_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PU_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1247. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_PU` writer - GPIO PA pullup resistance enable"]
  1248. pub struct R32_PA_PU_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_PU_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1249. # [inline (always)]
  1250. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA pullup resistance enable"]
  1251. # [inline (always)]
  1252. pub fn r32_pa_pu (& self) -> R32_PA_PU_R { R32_PA_PU_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA pullup resistance enable"]
  1253. # [inline (always)]
  1254. pub fn r32_pa_pu (& mut self) -> R32_PA_PU_W { R32_PA_PU_W { w : self } } # [doc = "Writes raw bits to the register."]
  1255. # [inline (always)]
  1256. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA pullup resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pu](index.html) module"]
  1257. pub struct R32_PA_PU_SPEC ; impl crate :: RegisterSpec for R32_PA_PU_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pu::R](R) reader structure"]
  1258. impl crate :: Readable for R32_PA_PU_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_pu::W](W) writer structure"]
  1259. impl crate :: Writable for R32_PA_PU_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_PU to value 0"]
  1260. impl crate :: Resettable for R32_PA_PU_SPEC { # [inline (always)]
  1261. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PD register accessor: an alias for `Reg<R32_PA_PD_SPEC>`"]
  1262. pub type R32_PA_PD = crate :: Reg < r32_pa_pd :: R32_PA_PD_SPEC > ; # [doc = "GPIO PA output open-drain and input pulldown resistance enable"]
  1263. pub mod r32_pa_pd { # [doc = "Register `R32_PA_PD` reader"]
  1264. pub struct R (crate :: R < R32_PA_PD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PD_SPEC > ; # [inline (always)]
  1265. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PD_SPEC >> for R { # [inline (always)]
  1266. fn from (reader : crate :: R < R32_PA_PD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_PD` writer"]
  1267. pub struct W (crate :: W < R32_PA_PD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_PD_SPEC > ; # [inline (always)]
  1268. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1269. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_PD_SPEC >> for W { # [inline (always)]
  1270. fn from (writer : crate :: W < R32_PA_PD_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_PD` reader - GPIO PA output open-drain and input pulldown resistance enable"]
  1271. pub struct R32_PA_PD_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PD_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PD_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1272. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_PD` writer - GPIO PA output open-drain and input pulldown resistance enable"]
  1273. pub struct R32_PA_PD_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_PD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1274. # [inline (always)]
  1275. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output open-drain and input pulldown resistance enable"]
  1276. # [inline (always)]
  1277. pub fn r32_pa_pd (& self) -> R32_PA_PD_R { R32_PA_PD_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output open-drain and input pulldown resistance enable"]
  1278. # [inline (always)]
  1279. pub fn r32_pa_pd (& mut self) -> R32_PA_PD_W { R32_PA_PD_W { w : self } } # [doc = "Writes raw bits to the register."]
  1280. # [inline (always)]
  1281. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output open-drain and input pulldown resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pd](index.html) module"]
  1282. pub struct R32_PA_PD_SPEC ; impl crate :: RegisterSpec for R32_PA_PD_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pd::R](R) reader structure"]
  1283. impl crate :: Readable for R32_PA_PD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_pd::W](W) writer structure"]
  1284. impl crate :: Writable for R32_PA_PD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_PD to value 0"]
  1285. impl crate :: Resettable for R32_PA_PD_SPEC { # [inline (always)]
  1286. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_DRV register accessor: an alias for `Reg<R32_PA_DRV_SPEC>`"]
  1287. pub type R32_PA_DRV = crate :: Reg < r32_pa_drv :: R32_PA_DRV_SPEC > ; # [doc = "GPIO PA driving capability"]
  1288. pub mod r32_pa_drv { # [doc = "Register `R32_PA_DRV` reader"]
  1289. pub struct R (crate :: R < R32_PA_DRV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_DRV_SPEC > ; # [inline (always)]
  1290. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_DRV_SPEC >> for R { # [inline (always)]
  1291. fn from (reader : crate :: R < R32_PA_DRV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_DRV` writer"]
  1292. pub struct W (crate :: W < R32_PA_DRV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_DRV_SPEC > ; # [inline (always)]
  1293. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1294. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_DRV_SPEC >> for W { # [inline (always)]
  1295. fn from (writer : crate :: W < R32_PA_DRV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_DRV` reader - GPIO PA driving capability"]
  1296. pub struct R32_PA_DRV_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_DRV_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_DRV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_DRV_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1297. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_DRV` writer - GPIO PA driving capability"]
  1298. pub struct R32_PA_DRV_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_DRV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1299. # [inline (always)]
  1300. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA driving capability"]
  1301. # [inline (always)]
  1302. pub fn r32_pa_drv (& self) -> R32_PA_DRV_R { R32_PA_DRV_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA driving capability"]
  1303. # [inline (always)]
  1304. pub fn r32_pa_drv (& mut self) -> R32_PA_DRV_W { R32_PA_DRV_W { w : self } } # [doc = "Writes raw bits to the register."]
  1305. # [inline (always)]
  1306. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA driving capability\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_drv](index.html) module"]
  1307. pub struct R32_PA_DRV_SPEC ; impl crate :: RegisterSpec for R32_PA_DRV_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_drv::R](R) reader structure"]
  1308. impl crate :: Readable for R32_PA_DRV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_drv::W](W) writer structure"]
  1309. impl crate :: Writable for R32_PA_DRV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_DRV to value 0"]
  1310. impl crate :: Resettable for R32_PA_DRV_SPEC { # [inline (always)]
  1311. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_SMT register accessor: an alias for `Reg<R32_PA_SMT_SPEC>`"]
  1312. pub type R32_PA_SMT = crate :: Reg < r32_pa_smt :: R32_PA_SMT_SPEC > ; # [doc = "GPIO PA output slew rate and input schmitt trigger"]
  1313. pub mod r32_pa_smt { # [doc = "Register `R32_PA_SMT` reader"]
  1314. pub struct R (crate :: R < R32_PA_SMT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_SMT_SPEC > ; # [inline (always)]
  1315. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_SMT_SPEC >> for R { # [inline (always)]
  1316. fn from (reader : crate :: R < R32_PA_SMT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_SMT` writer"]
  1317. pub struct W (crate :: W < R32_PA_SMT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_SMT_SPEC > ; # [inline (always)]
  1318. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1319. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_SMT_SPEC >> for W { # [inline (always)]
  1320. fn from (writer : crate :: W < R32_PA_SMT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_SMT` reader - GPIO PA output slew rate and input schmitt trigger"]
  1321. pub struct R32_PA_SMT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_SMT_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_SMT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_SMT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1322. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_SMT` writer - GPIO PA output slew rate and input schmitt trigger"]
  1323. pub struct R32_PA_SMT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_SMT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1324. # [inline (always)]
  1325. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output slew rate and input schmitt trigger"]
  1326. # [inline (always)]
  1327. pub fn r32_pa_smt (& self) -> R32_PA_SMT_R { R32_PA_SMT_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output slew rate and input schmitt trigger"]
  1328. # [inline (always)]
  1329. pub fn r32_pa_smt (& mut self) -> R32_PA_SMT_W { R32_PA_SMT_W { w : self } } # [doc = "Writes raw bits to the register."]
  1330. # [inline (always)]
  1331. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output slew rate and input schmitt trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_smt](index.html) module"]
  1332. pub struct R32_PA_SMT_SPEC ; impl crate :: RegisterSpec for R32_PA_SMT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_smt::R](R) reader structure"]
  1333. impl crate :: Readable for R32_PA_SMT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_smt::W](W) writer structure"]
  1334. impl crate :: Writable for R32_PA_SMT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_SMT to value 0"]
  1335. impl crate :: Resettable for R32_PA_SMT_SPEC { # [inline (always)]
  1336. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_DIR register accessor: an alias for `Reg<R32_PB_DIR_SPEC>`"]
  1337. pub type R32_PB_DIR = crate :: Reg < r32_pb_dir :: R32_PB_DIR_SPEC > ; # [doc = "GPIO PB I/O direction"]
  1338. pub mod r32_pb_dir { # [doc = "Register `R32_PB_DIR` reader"]
  1339. pub struct R (crate :: R < R32_PB_DIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_DIR_SPEC > ; # [inline (always)]
  1340. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_DIR_SPEC >> for R { # [inline (always)]
  1341. fn from (reader : crate :: R < R32_PB_DIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_DIR` writer"]
  1342. pub struct W (crate :: W < R32_PB_DIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_DIR_SPEC > ; # [inline (always)]
  1343. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1344. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_DIR_SPEC >> for W { # [inline (always)]
  1345. fn from (writer : crate :: W < R32_PB_DIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_DIR` reader - GPIO PB I/O direction"]
  1346. pub struct R32_PB_DIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_DIR_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_DIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1347. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_DIR` writer - GPIO PB I/O direction"]
  1348. pub struct R32_PB_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_DIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1349. # [inline (always)]
  1350. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB I/O direction"]
  1351. # [inline (always)]
  1352. pub fn r32_pb_dir (& self) -> R32_PB_DIR_R { R32_PB_DIR_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB I/O direction"]
  1353. # [inline (always)]
  1354. pub fn r32_pb_dir (& mut self) -> R32_PB_DIR_W { R32_PB_DIR_W { w : self } } # [doc = "Writes raw bits to the register."]
  1355. # [inline (always)]
  1356. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB I/O direction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_dir](index.html) module"]
  1357. pub struct R32_PB_DIR_SPEC ; impl crate :: RegisterSpec for R32_PB_DIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_dir::R](R) reader structure"]
  1358. impl crate :: Readable for R32_PB_DIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_dir::W](W) writer structure"]
  1359. impl crate :: Writable for R32_PB_DIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_DIR to value 0"]
  1360. impl crate :: Resettable for R32_PB_DIR_SPEC { # [inline (always)]
  1361. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PIN register accessor: an alias for `Reg<R32_PB_PIN_SPEC>`"]
  1362. pub type R32_PB_PIN = crate :: Reg < r32_pb_pin :: R32_PB_PIN_SPEC > ; # [doc = "GPIO PB input"]
  1363. pub mod r32_pb_pin { # [doc = "Register `R32_PB_PIN` reader"]
  1364. pub struct R (crate :: R < R32_PB_PIN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PIN_SPEC > ; # [inline (always)]
  1365. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PIN_SPEC >> for R { # [inline (always)]
  1366. fn from (reader : crate :: R < R32_PB_PIN_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_PB_PIN` reader - GPIO PB input"]
  1367. pub struct R32_PB_PIN_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PIN_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PIN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PIN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1368. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:24 - GPIO PB input"]
  1369. # [inline (always)]
  1370. pub fn r32_pb_pin (& self) -> R32_PB_PIN_R { R32_PB_PIN_R :: new ((self . bits & 0x01ff_ffff) as u32) } } # [doc = "GPIO PB input\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pin](index.html) module"]
  1371. pub struct R32_PB_PIN_SPEC ; impl crate :: RegisterSpec for R32_PB_PIN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pin::R](R) reader structure"]
  1372. impl crate :: Readable for R32_PB_PIN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PB_PIN to value 0"]
  1373. impl crate :: Resettable for R32_PB_PIN_SPEC { # [inline (always)]
  1374. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_OUT register accessor: an alias for `Reg<R32_PB_OUT_SPEC>`"]
  1375. pub type R32_PB_OUT = crate :: Reg < r32_pb_out :: R32_PB_OUT_SPEC > ; # [doc = "GPIO PB output"]
  1376. pub mod r32_pb_out { # [doc = "Register `R32_PB_OUT` reader"]
  1377. pub struct R (crate :: R < R32_PB_OUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_OUT_SPEC > ; # [inline (always)]
  1378. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_OUT_SPEC >> for R { # [inline (always)]
  1379. fn from (reader : crate :: R < R32_PB_OUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_OUT` writer"]
  1380. pub struct W (crate :: W < R32_PB_OUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_OUT_SPEC > ; # [inline (always)]
  1381. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1382. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_OUT_SPEC >> for W { # [inline (always)]
  1383. fn from (writer : crate :: W < R32_PB_OUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_OUT` reader - GPIO PB output"]
  1384. pub struct R32_PB_OUT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_OUT_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_OUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_OUT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1385. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_OUT` writer - GPIO PB output"]
  1386. pub struct R32_PB_OUT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_OUT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1387. # [inline (always)]
  1388. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output"]
  1389. # [inline (always)]
  1390. pub fn r32_pb_out (& self) -> R32_PB_OUT_R { R32_PB_OUT_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output"]
  1391. # [inline (always)]
  1392. pub fn r32_pb_out (& mut self) -> R32_PB_OUT_W { R32_PB_OUT_W { w : self } } # [doc = "Writes raw bits to the register."]
  1393. # [inline (always)]
  1394. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_out](index.html) module"]
  1395. pub struct R32_PB_OUT_SPEC ; impl crate :: RegisterSpec for R32_PB_OUT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_out::R](R) reader structure"]
  1396. impl crate :: Readable for R32_PB_OUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_out::W](W) writer structure"]
  1397. impl crate :: Writable for R32_PB_OUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_OUT to value 0"]
  1398. impl crate :: Resettable for R32_PB_OUT_SPEC { # [inline (always)]
  1399. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_CLR register accessor: an alias for `Reg<R32_PB_CLR_SPEC>`"]
  1400. pub type R32_PB_CLR = crate :: Reg < r32_pb_clr :: R32_PB_CLR_SPEC > ; # [doc = "GPIO PB clear output"]
  1401. pub mod r32_pb_clr { # [doc = "Register `R32_PB_CLR` writer"]
  1402. pub struct W (crate :: W < R32_PB_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_CLR_SPEC > ; # [inline (always)]
  1403. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1404. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_CLR_SPEC >> for W { # [inline (always)]
  1405. fn from (writer : crate :: W < R32_PB_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_CLR` writer - GPIO PB clear output"]
  1406. pub struct R32_PB_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_CLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1407. # [inline (always)]
  1408. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl W { # [doc = "Bits 0:24 - GPIO PB clear output"]
  1409. # [inline (always)]
  1410. pub fn r32_pb_clr (& mut self) -> R32_PB_CLR_W { R32_PB_CLR_W { w : self } } # [doc = "Writes raw bits to the register."]
  1411. # [inline (always)]
  1412. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB clear output\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_clr](index.html) module"]
  1413. pub struct R32_PB_CLR_SPEC ; impl crate :: RegisterSpec for R32_PB_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_pb_clr::W](W) writer structure"]
  1414. impl crate :: Writable for R32_PB_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_CLR to value 0"]
  1415. impl crate :: Resettable for R32_PB_CLR_SPEC { # [inline (always)]
  1416. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PU register accessor: an alias for `Reg<R32_PB_PU_SPEC>`"]
  1417. pub type R32_PB_PU = crate :: Reg < r32_pb_pu :: R32_PB_PU_SPEC > ; # [doc = "GPIO PB pullup resistance enable"]
  1418. pub mod r32_pb_pu { # [doc = "Register `R32_PB_PU` reader"]
  1419. pub struct R (crate :: R < R32_PB_PU_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PU_SPEC > ; # [inline (always)]
  1420. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PU_SPEC >> for R { # [inline (always)]
  1421. fn from (reader : crate :: R < R32_PB_PU_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_PU` writer"]
  1422. pub struct W (crate :: W < R32_PB_PU_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_PU_SPEC > ; # [inline (always)]
  1423. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1424. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_PU_SPEC >> for W { # [inline (always)]
  1425. fn from (writer : crate :: W < R32_PB_PU_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_PU` reader - GPIO PB pullup resistance enable"]
  1426. pub struct R32_PB_PU_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PU_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PU_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PU_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1427. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_PU` writer - GPIO PB pullup resistance enable"]
  1428. pub struct R32_PB_PU_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_PU_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1429. # [inline (always)]
  1430. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB pullup resistance enable"]
  1431. # [inline (always)]
  1432. pub fn r32_pb_pu (& self) -> R32_PB_PU_R { R32_PB_PU_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB pullup resistance enable"]
  1433. # [inline (always)]
  1434. pub fn r32_pb_pu (& mut self) -> R32_PB_PU_W { R32_PB_PU_W { w : self } } # [doc = "Writes raw bits to the register."]
  1435. # [inline (always)]
  1436. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB pullup resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pu](index.html) module"]
  1437. pub struct R32_PB_PU_SPEC ; impl crate :: RegisterSpec for R32_PB_PU_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pu::R](R) reader structure"]
  1438. impl crate :: Readable for R32_PB_PU_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_pu::W](W) writer structure"]
  1439. impl crate :: Writable for R32_PB_PU_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_PU to value 0"]
  1440. impl crate :: Resettable for R32_PB_PU_SPEC { # [inline (always)]
  1441. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PD register accessor: an alias for `Reg<R32_PB_PD_SPEC>`"]
  1442. pub type R32_PB_PD = crate :: Reg < r32_pb_pd :: R32_PB_PD_SPEC > ; # [doc = "GPIO PB output open-drain and input pulldown resistance enable"]
  1443. pub mod r32_pb_pd { # [doc = "Register `R32_PB_PD` reader"]
  1444. pub struct R (crate :: R < R32_PB_PD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PD_SPEC > ; # [inline (always)]
  1445. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PD_SPEC >> for R { # [inline (always)]
  1446. fn from (reader : crate :: R < R32_PB_PD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_PD` writer"]
  1447. pub struct W (crate :: W < R32_PB_PD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_PD_SPEC > ; # [inline (always)]
  1448. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1449. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_PD_SPEC >> for W { # [inline (always)]
  1450. fn from (writer : crate :: W < R32_PB_PD_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_PD` reader - GPIO PB output open-drain and input pulldown resistance enable"]
  1451. pub struct R32_PB_PD_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PD_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PD_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1452. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_PD` writer - GPIO PB output open-drain and input pulldown resistance enable"]
  1453. pub struct R32_PB_PD_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_PD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1454. # [inline (always)]
  1455. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output open-drain and input pulldown resistance enable"]
  1456. # [inline (always)]
  1457. pub fn r32_pb_pd (& self) -> R32_PB_PD_R { R32_PB_PD_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output open-drain and input pulldown resistance enable"]
  1458. # [inline (always)]
  1459. pub fn r32_pb_pd (& mut self) -> R32_PB_PD_W { R32_PB_PD_W { w : self } } # [doc = "Writes raw bits to the register."]
  1460. # [inline (always)]
  1461. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output open-drain and input pulldown resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pd](index.html) module"]
  1462. pub struct R32_PB_PD_SPEC ; impl crate :: RegisterSpec for R32_PB_PD_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pd::R](R) reader structure"]
  1463. impl crate :: Readable for R32_PB_PD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_pd::W](W) writer structure"]
  1464. impl crate :: Writable for R32_PB_PD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_PD to value 0"]
  1465. impl crate :: Resettable for R32_PB_PD_SPEC { # [inline (always)]
  1466. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_DRV register accessor: an alias for `Reg<R32_PB_DRV_SPEC>`"]
  1467. pub type R32_PB_DRV = crate :: Reg < r32_pb_drv :: R32_PB_DRV_SPEC > ; # [doc = "GPIO PB driving capability"]
  1468. pub mod r32_pb_drv { # [doc = "Register `R32_PB_DRV` reader"]
  1469. pub struct R (crate :: R < R32_PB_DRV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_DRV_SPEC > ; # [inline (always)]
  1470. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_DRV_SPEC >> for R { # [inline (always)]
  1471. fn from (reader : crate :: R < R32_PB_DRV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_DRV` writer"]
  1472. pub struct W (crate :: W < R32_PB_DRV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_DRV_SPEC > ; # [inline (always)]
  1473. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1474. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_DRV_SPEC >> for W { # [inline (always)]
  1475. fn from (writer : crate :: W < R32_PB_DRV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_DRV` reader - GPIO PB driving capability"]
  1476. pub struct R32_PB_DRV_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_DRV_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_DRV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_DRV_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1477. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_DRV` writer - GPIO PB driving capability"]
  1478. pub struct R32_PB_DRV_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_DRV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1479. # [inline (always)]
  1480. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB driving capability"]
  1481. # [inline (always)]
  1482. pub fn r32_pb_drv (& self) -> R32_PB_DRV_R { R32_PB_DRV_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB driving capability"]
  1483. # [inline (always)]
  1484. pub fn r32_pb_drv (& mut self) -> R32_PB_DRV_W { R32_PB_DRV_W { w : self } } # [doc = "Writes raw bits to the register."]
  1485. # [inline (always)]
  1486. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB driving capability\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_drv](index.html) module"]
  1487. pub struct R32_PB_DRV_SPEC ; impl crate :: RegisterSpec for R32_PB_DRV_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_drv::R](R) reader structure"]
  1488. impl crate :: Readable for R32_PB_DRV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_drv::W](W) writer structure"]
  1489. impl crate :: Writable for R32_PB_DRV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_DRV to value 0"]
  1490. impl crate :: Resettable for R32_PB_DRV_SPEC { # [inline (always)]
  1491. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_SMT register accessor: an alias for `Reg<R32_PB_SMT_SPEC>`"]
  1492. pub type R32_PB_SMT = crate :: Reg < r32_pb_smt :: R32_PB_SMT_SPEC > ; # [doc = "GPIO PB output slew rate and input schmitt trigger"]
  1493. pub mod r32_pb_smt { # [doc = "Register `R32_PB_SMT` reader"]
  1494. pub struct R (crate :: R < R32_PB_SMT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_SMT_SPEC > ; # [inline (always)]
  1495. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_SMT_SPEC >> for R { # [inline (always)]
  1496. fn from (reader : crate :: R < R32_PB_SMT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_SMT` writer"]
  1497. pub struct W (crate :: W < R32_PB_SMT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_SMT_SPEC > ; # [inline (always)]
  1498. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1499. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_SMT_SPEC >> for W { # [inline (always)]
  1500. fn from (writer : crate :: W < R32_PB_SMT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_SMT` reader - GPIO PB output slew rate and input schmitt trigger"]
  1501. pub struct R32_PB_SMT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_SMT_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_SMT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_SMT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1502. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_SMT` writer - GPIO PB output slew rate and input schmitt trigger"]
  1503. pub struct R32_PB_SMT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_SMT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1504. # [inline (always)]
  1505. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output slew rate and input schmitt trigger"]
  1506. # [inline (always)]
  1507. pub fn r32_pb_smt (& self) -> R32_PB_SMT_R { R32_PB_SMT_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output slew rate and input schmitt trigger"]
  1508. # [inline (always)]
  1509. pub fn r32_pb_smt (& mut self) -> R32_PB_SMT_W { R32_PB_SMT_W { w : self } } # [doc = "Writes raw bits to the register."]
  1510. # [inline (always)]
  1511. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output slew rate and input schmitt trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_smt](index.html) module"]
  1512. pub struct R32_PB_SMT_SPEC ; impl crate :: RegisterSpec for R32_PB_SMT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_smt::R](R) reader structure"]
  1513. impl crate :: Readable for R32_PB_SMT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_smt::W](W) writer structure"]
  1514. impl crate :: Writable for R32_PB_SMT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_SMT to value 0"]
  1515. impl crate :: Resettable for R32_PB_SMT_SPEC { # [inline (always)]
  1516. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PIN_ALTERNATE register accessor: an alias for `Reg<R8_PIN_ALTERNATE_SPEC>`"]
  1517. pub type R8_PIN_ALTERNATE = crate :: Reg < r8_pin_alternate :: R8_PIN_ALTERNATE_SPEC > ; # [doc = "alternate pin control"]
  1518. pub mod r8_pin_alternate { # [doc = "Register `R8_PIN_ALTERNATE` reader"]
  1519. pub struct R (crate :: R < R8_PIN_ALTERNATE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PIN_ALTERNATE_SPEC > ; # [inline (always)]
  1520. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PIN_ALTERNATE_SPEC >> for R { # [inline (always)]
  1521. fn from (reader : crate :: R < R8_PIN_ALTERNATE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PIN_ALTERNATE` writer"]
  1522. pub struct W (crate :: W < R8_PIN_ALTERNATE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PIN_ALTERNATE_SPEC > ; # [inline (always)]
  1523. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1524. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PIN_ALTERNATE_SPEC >> for W { # [inline (always)]
  1525. fn from (writer : crate :: W < R8_PIN_ALTERNATE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PIN_MII` reader - ETH mii interface selection"]
  1526. pub struct RB_PIN_MII_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_MII_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_MII_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_MII_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1527. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_MII` writer - ETH mii interface selection"]
  1528. pub struct RB_PIN_MII_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_MII_W < 'a > { # [doc = r"Sets the field bit"]
  1529. # [inline (always)]
  1530. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1531. # [inline (always)]
  1532. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1533. # [inline (always)]
  1534. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_PIN_TMR1` reader - TMR1 alternate pin enable"]
  1535. pub struct RB_PIN_TMR1_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_TMR1_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_TMR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_TMR1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1536. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_TMR1` writer - TMR1 alternate pin enable"]
  1537. pub struct RB_PIN_TMR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_TMR1_W < 'a > { # [doc = r"Sets the field bit"]
  1538. # [inline (always)]
  1539. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1540. # [inline (always)]
  1541. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1542. # [inline (always)]
  1543. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_PIN_TMR2` reader - TMR2 alternate pin enable"]
  1544. pub struct RB_PIN_TMR2_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_TMR2_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_TMR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_TMR2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1545. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_TMR2` writer - TMR2 alternate pin enable"]
  1546. pub struct RB_PIN_TMR2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_TMR2_W < 'a > { # [doc = r"Sets the field bit"]
  1547. # [inline (always)]
  1548. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1549. # [inline (always)]
  1550. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1551. # [inline (always)]
  1552. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_PIN_UART0` reader - RXD0/TXD0 alternate pin enable"]
  1553. pub struct RB_PIN_UART0_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_UART0_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_UART0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_UART0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1554. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_UART0` writer - RXD0/TXD0 alternate pin enable"]
  1555. pub struct RB_PIN_UART0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_UART0_W < 'a > { # [doc = r"Sets the field bit"]
  1556. # [inline (always)]
  1557. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1558. # [inline (always)]
  1559. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1560. # [inline (always)]
  1561. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - ETH mii interface selection"]
  1562. # [inline (always)]
  1563. pub fn rb_pin_mii (& self) -> RB_PIN_MII_R { RB_PIN_MII_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - TMR1 alternate pin enable"]
  1564. # [inline (always)]
  1565. pub fn rb_pin_tmr1 (& self) -> RB_PIN_TMR1_R { RB_PIN_TMR1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - TMR2 alternate pin enable"]
  1566. # [inline (always)]
  1567. pub fn rb_pin_tmr2 (& self) -> RB_PIN_TMR2_R { RB_PIN_TMR2_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - RXD0/TXD0 alternate pin enable"]
  1568. # [inline (always)]
  1569. pub fn rb_pin_uart0 (& self) -> RB_PIN_UART0_R { RB_PIN_UART0_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - ETH mii interface selection"]
  1570. # [inline (always)]
  1571. pub fn rb_pin_mii (& mut self) -> RB_PIN_MII_W { RB_PIN_MII_W { w : self } } # [doc = "Bit 1 - TMR1 alternate pin enable"]
  1572. # [inline (always)]
  1573. pub fn rb_pin_tmr1 (& mut self) -> RB_PIN_TMR1_W { RB_PIN_TMR1_W { w : self } } # [doc = "Bit 2 - TMR2 alternate pin enable"]
  1574. # [inline (always)]
  1575. pub fn rb_pin_tmr2 (& mut self) -> RB_PIN_TMR2_W { RB_PIN_TMR2_W { w : self } } # [doc = "Bit 4 - RXD0/TXD0 alternate pin enable"]
  1576. # [inline (always)]
  1577. pub fn rb_pin_uart0 (& mut self) -> RB_PIN_UART0_W { RB_PIN_UART0_W { w : self } } # [doc = "Writes raw bits to the register."]
  1578. # [inline (always)]
  1579. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "alternate pin control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pin_alternate](index.html) module"]
  1580. pub struct R8_PIN_ALTERNATE_SPEC ; impl crate :: RegisterSpec for R8_PIN_ALTERNATE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pin_alternate::R](R) reader structure"]
  1581. impl crate :: Readable for R8_PIN_ALTERNATE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pin_alternate::W](W) writer structure"]
  1582. impl crate :: Writable for R8_PIN_ALTERNATE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PIN_ALTERNATE to value 0"]
  1583. impl crate :: Resettable for R8_PIN_ALTERNATE_SPEC { # [inline (always)]
  1584. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR0 register"]
  1585. pub struct TMR0 { _marker : PhantomData < * const () > } unsafe impl Send for TMR0 { } impl TMR0 { # [doc = r"Pointer to the register block"]
  1586. pub const PTR : * const tmr0 :: RegisterBlock = 0x4000_2000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  1587. # [inline (always)]
  1588. pub const fn ptr () -> * const tmr0 :: RegisterBlock { Self :: PTR } } impl Deref for TMR0 { type Target = tmr0 :: RegisterBlock ; # [inline (always)]
  1589. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR0") . finish () } } # [doc = "TMR0 register"]
  1590. pub mod tmr0 { # [doc = r"Register block"]
  1591. # [repr (C)]
  1592. pub struct RegisterBlock { # [doc = "0x00 - TMR0 mode control"]
  1593. pub r8_tmr0_ctrl_mod : crate :: Reg < r8_tmr0_ctrl_mod :: R8_TMR0_CTRL_MOD_SPEC > , _reserved1 : [u8 ; 0x01]
  1594. , # [doc = "0x02 - TMR0 interrupt enable"]
  1595. pub r8_tmr0_inter_en : crate :: Reg < r8_tmr0_inter_en :: R8_TMR0_INTER_EN_SPEC > , _reserved2 : [u8 ; 0x03]
  1596. , # [doc = "0x06 - TMR0 interrupt flag"]
  1597. pub r8_tmr0_int_flag : crate :: Reg < r8_tmr0_int_flag :: R8_TMR0_INT_FLAG_SPEC > , # [doc = "0x07 - TMR0 FIFO count status"]
  1598. pub r8_tmr0_fifo_count : crate :: Reg < r8_tmr0_fifo_count :: R8_TMR0_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR0 current count"]
  1599. pub r32_tmr0_count : crate :: Reg < r32_tmr0_count :: R32_TMR0_COUNT_SPEC > , # [doc = "0x0c - TMR0 end count value, only low 26 bit"]
  1600. pub r32_tmr0_cnt_end : crate :: Reg < r32_tmr0_cnt_end :: R32_TMR0_CNT_END_SPEC > , # [doc = "0x10 - TMR0 FIFO register, only low 26 bit"]
  1601. pub r32_tmr0_fifo : crate :: Reg < r32_tmr0_fifo :: R32_TMR0_FIFO_SPEC > , } # [doc = "R8_TMR0_CTRL_MOD register accessor: an alias for `Reg<R8_TMR0_CTRL_MOD_SPEC>`"]
  1602. pub type R8_TMR0_CTRL_MOD = crate :: Reg < r8_tmr0_ctrl_mod :: R8_TMR0_CTRL_MOD_SPEC > ; # [doc = "TMR0 mode control"]
  1603. pub mod r8_tmr0_ctrl_mod { # [doc = "Register `R8_TMR0_CTRL_MOD` reader"]
  1604. pub struct R (crate :: R < R8_TMR0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_CTRL_MOD_SPEC > ; # [inline (always)]
  1605. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_CTRL_MOD_SPEC >> for R { # [inline (always)]
  1606. fn from (reader : crate :: R < R8_TMR0_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_CTRL_MOD` writer"]
  1607. pub struct W (crate :: W < R8_TMR0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_CTRL_MOD_SPEC > ; # [inline (always)]
  1608. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1609. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_CTRL_MOD_SPEC >> for W { # [inline (always)]
  1610. fn from (writer : crate :: W < R8_TMR0_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
  1611. pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1612. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
  1613. pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
  1614. # [inline (always)]
  1615. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1616. # [inline (always)]
  1617. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1618. # [inline (always)]
  1619. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
  1620. pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1621. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
  1622. pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
  1623. # [inline (always)]
  1624. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1625. # [inline (always)]
  1626. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1627. # [inline (always)]
  1628. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
  1629. pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1630. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
  1631. pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  1632. # [inline (always)]
  1633. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1634. # [inline (always)]
  1635. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1636. # [inline (always)]
  1637. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
  1638. pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1639. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
  1640. pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  1641. # [inline (always)]
  1642. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1643. # [inline (always)]
  1644. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1645. # [inline (always)]
  1646. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
  1647. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1648. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
  1649. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
  1650. # [inline (always)]
  1651. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1652. # [inline (always)]
  1653. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1654. # [inline (always)]
  1655. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _ timer capture edge mode"]
  1656. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  1657. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _ timer capture edge mode"]
  1658. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1659. # [inline (always)]
  1660. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
  1661. # [inline (always)]
  1662. pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
  1663. # [inline (always)]
  1664. pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
  1665. # [inline (always)]
  1666. pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
  1667. # [inline (always)]
  1668. pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  1669. # [inline (always)]
  1670. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
  1671. # [inline (always)]
  1672. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
  1673. # [inline (always)]
  1674. pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
  1675. # [inline (always)]
  1676. pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
  1677. # [inline (always)]
  1678. pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
  1679. # [inline (always)]
  1680. pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  1681. # [inline (always)]
  1682. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
  1683. # [inline (always)]
  1684. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
  1685. # [inline (always)]
  1686. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_ctrl_mod](index.html) module"]
  1687. pub struct R8_TMR0_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR0_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_ctrl_mod::R](R) reader structure"]
  1688. impl crate :: Readable for R8_TMR0_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_ctrl_mod::W](W) writer structure"]
  1689. impl crate :: Writable for R8_TMR0_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_CTRL_MOD to value 0x02"]
  1690. impl crate :: Resettable for R8_TMR0_CTRL_MOD_SPEC { # [inline (always)]
  1691. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR0_INTER_EN register accessor: an alias for `Reg<R8_TMR0_INTER_EN_SPEC>`"]
  1692. pub type R8_TMR0_INTER_EN = crate :: Reg < r8_tmr0_inter_en :: R8_TMR0_INTER_EN_SPEC > ; # [doc = "TMR0 interrupt enable"]
  1693. pub mod r8_tmr0_inter_en { # [doc = "Register `R8_TMR0_INTER_EN` reader"]
  1694. pub struct R (crate :: R < R8_TMR0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_INTER_EN_SPEC > ; # [inline (always)]
  1695. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_INTER_EN_SPEC >> for R { # [inline (always)]
  1696. fn from (reader : crate :: R < R8_TMR0_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_INTER_EN` writer"]
  1697. pub struct W (crate :: W < R8_TMR0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_INTER_EN_SPEC > ; # [inline (always)]
  1698. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1699. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_INTER_EN_SPEC >> for W { # [inline (always)]
  1700. fn from (writer : crate :: W < R8_TMR0_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
  1701. pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1702. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
  1703. pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  1704. # [inline (always)]
  1705. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1706. # [inline (always)]
  1707. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1708. # [inline (always)]
  1709. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
  1710. pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1711. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
  1712. pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  1713. # [inline (always)]
  1714. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1715. # [inline (always)]
  1716. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1717. # [inline (always)]
  1718. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  1719. pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1720. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  1721. pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  1722. # [inline (always)]
  1723. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1724. # [inline (always)]
  1725. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1726. # [inline (always)]
  1727. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1/2 DMA completion"]
  1728. pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1729. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1/2 DMA completion"]
  1730. pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  1731. # [inline (always)]
  1732. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1733. # [inline (always)]
  1734. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1735. # [inline (always)]
  1736. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
  1737. pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1738. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
  1739. pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  1740. # [inline (always)]
  1741. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1742. # [inline (always)]
  1743. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1744. # [inline (always)]
  1745. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  1746. # [inline (always)]
  1747. pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  1748. # [inline (always)]
  1749. pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  1750. # [inline (always)]
  1751. pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
  1752. # [inline (always)]
  1753. pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  1754. # [inline (always)]
  1755. pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  1756. # [inline (always)]
  1757. pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  1758. # [inline (always)]
  1759. pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  1760. # [inline (always)]
  1761. pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
  1762. # [inline (always)]
  1763. pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  1764. # [inline (always)]
  1765. pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  1766. # [inline (always)]
  1767. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_inter_en](index.html) module"]
  1768. pub struct R8_TMR0_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR0_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_inter_en::R](R) reader structure"]
  1769. impl crate :: Readable for R8_TMR0_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_inter_en::W](W) writer structure"]
  1770. impl crate :: Writable for R8_TMR0_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_INTER_EN to value 0"]
  1771. impl crate :: Resettable for R8_TMR0_INTER_EN_SPEC { # [inline (always)]
  1772. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR0_INT_FLAG register accessor: an alias for `Reg<R8_TMR0_INT_FLAG_SPEC>`"]
  1773. pub type R8_TMR0_INT_FLAG = crate :: Reg < r8_tmr0_int_flag :: R8_TMR0_INT_FLAG_SPEC > ; # [doc = "TMR0 interrupt flag"]
  1774. pub mod r8_tmr0_int_flag { # [doc = "Register `R8_TMR0_INT_FLAG` reader"]
  1775. pub struct R (crate :: R < R8_TMR0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_INT_FLAG_SPEC > ; # [inline (always)]
  1776. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_INT_FLAG_SPEC >> for R { # [inline (always)]
  1777. fn from (reader : crate :: R < R8_TMR0_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_INT_FLAG` writer"]
  1778. pub struct W (crate :: W < R8_TMR0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_INT_FLAG_SPEC > ; # [inline (always)]
  1779. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1780. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_INT_FLAG_SPEC >> for W { # [inline (always)]
  1781. fn from (writer : crate :: W < R8_TMR0_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
  1782. pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1783. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
  1784. pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  1785. # [inline (always)]
  1786. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1787. # [inline (always)]
  1788. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1789. # [inline (always)]
  1790. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
  1791. pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1792. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
  1793. pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  1794. # [inline (always)]
  1795. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1796. # [inline (always)]
  1797. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1798. # [inline (always)]
  1799. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  1800. pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1801. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  1802. pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  1803. # [inline (always)]
  1804. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1805. # [inline (always)]
  1806. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1807. # [inline (always)]
  1808. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1/2 DMA completion"]
  1809. pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1810. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1/2 DMA completion"]
  1811. pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  1812. # [inline (always)]
  1813. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1814. # [inline (always)]
  1815. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1816. # [inline (always)]
  1817. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
  1818. pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1819. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
  1820. pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  1821. # [inline (always)]
  1822. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1823. # [inline (always)]
  1824. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1825. # [inline (always)]
  1826. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  1827. # [inline (always)]
  1828. pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  1829. # [inline (always)]
  1830. pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  1831. # [inline (always)]
  1832. pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1/2 DMA completion"]
  1833. # [inline (always)]
  1834. pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  1835. # [inline (always)]
  1836. pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  1837. # [inline (always)]
  1838. pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  1839. # [inline (always)]
  1840. pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  1841. # [inline (always)]
  1842. pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1/2 DMA completion"]
  1843. # [inline (always)]
  1844. pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  1845. # [inline (always)]
  1846. pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  1847. # [inline (always)]
  1848. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_int_flag](index.html) module"]
  1849. pub struct R8_TMR0_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR0_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_int_flag::R](R) reader structure"]
  1850. impl crate :: Readable for R8_TMR0_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_int_flag::W](W) writer structure"]
  1851. impl crate :: Writable for R8_TMR0_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_INT_FLAG to value 0"]
  1852. impl crate :: Resettable for R8_TMR0_INT_FLAG_SPEC { # [inline (always)]
  1853. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR0_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR0_FIFO_COUNT_SPEC>`"]
  1854. pub type R8_TMR0_FIFO_COUNT = crate :: Reg < r8_tmr0_fifo_count :: R8_TMR0_FIFO_COUNT_SPEC > ; # [doc = "TMR0 FIFO count status"]
  1855. pub mod r8_tmr0_fifo_count { # [doc = "Register `R8_TMR0_FIFO_COUNT` reader"]
  1856. pub struct R (crate :: R < R8_TMR0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_FIFO_COUNT_SPEC > ; # [inline (always)]
  1857. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_FIFO_COUNT_SPEC >> for R { # [inline (always)]
  1858. fn from (reader : crate :: R < R8_TMR0_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR0_FIFO_COUNT` reader - TMR0 FIFO count status"]
  1859. pub struct R8_TMR0_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR0_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR0_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR0_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  1860. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR0 FIFO count status"]
  1861. # [inline (always)]
  1862. pub fn r8_tmr0_fifo_count (& self) -> R8_TMR0_FIFO_COUNT_R { R8_TMR0_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_fifo_count](index.html) module"]
  1863. pub struct R8_TMR0_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR0_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_fifo_count::R](R) reader structure"]
  1864. impl crate :: Readable for R8_TMR0_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR0_FIFO_COUNT to value 0"]
  1865. impl crate :: Resettable for R8_TMR0_FIFO_COUNT_SPEC { # [inline (always)]
  1866. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_COUNT register accessor: an alias for `Reg<R32_TMR0_COUNT_SPEC>`"]
  1867. pub type R32_TMR0_COUNT = crate :: Reg < r32_tmr0_count :: R32_TMR0_COUNT_SPEC > ; # [doc = "TMR0 current count"]
  1868. pub mod r32_tmr0_count { # [doc = "Register `R32_TMR0_COUNT` reader"]
  1869. pub struct R (crate :: R < R32_TMR0_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_COUNT_SPEC > ; # [inline (always)]
  1870. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_COUNT_SPEC >> for R { # [inline (always)]
  1871. fn from (reader : crate :: R < R32_TMR0_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR0_COUNT` reader - TMR0 current count"]
  1872. pub struct R32_TMR0_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1873. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR0 current count"]
  1874. # [inline (always)]
  1875. pub fn r32_tmr0_count (& self) -> R32_TMR0_COUNT_R { R32_TMR0_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR0 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_count](index.html) module"]
  1876. pub struct R32_TMR0_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR0_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_count::R](R) reader structure"]
  1877. impl crate :: Readable for R32_TMR0_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR0_COUNT to value 0"]
  1878. impl crate :: Resettable for R32_TMR0_COUNT_SPEC { # [inline (always)]
  1879. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_CNT_END register accessor: an alias for `Reg<R32_TMR0_CNT_END_SPEC>`"]
  1880. pub type R32_TMR0_CNT_END = crate :: Reg < r32_tmr0_cnt_end :: R32_TMR0_CNT_END_SPEC > ; # [doc = "TMR0 end count value, only low 26 bit"]
  1881. pub mod r32_tmr0_cnt_end { # [doc = "Register `R32_TMR0_CNT_END` reader"]
  1882. pub struct R (crate :: R < R32_TMR0_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_CNT_END_SPEC > ; # [inline (always)]
  1883. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_CNT_END_SPEC >> for R { # [inline (always)]
  1884. fn from (reader : crate :: R < R32_TMR0_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR0_CNT_END` writer"]
  1885. pub struct W (crate :: W < R32_TMR0_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR0_CNT_END_SPEC > ; # [inline (always)]
  1886. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1887. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR0_CNT_END_SPEC >> for W { # [inline (always)]
  1888. fn from (writer : crate :: W < R32_TMR0_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR0_COUNT` reader - TMR0 current count"]
  1889. pub struct R32_TMR0_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1890. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR0_COUNT` writer - TMR0 current count"]
  1891. pub struct R32_TMR0_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR0_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1892. # [inline (always)]
  1893. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR0 current count"]
  1894. # [inline (always)]
  1895. pub fn r32_tmr0_count (& self) -> R32_TMR0_COUNT_R { R32_TMR0_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR0 current count"]
  1896. # [inline (always)]
  1897. pub fn r32_tmr0_count (& mut self) -> R32_TMR0_COUNT_W { R32_TMR0_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  1898. # [inline (always)]
  1899. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_cnt_end](index.html) module"]
  1900. pub struct R32_TMR0_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR0_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_cnt_end::R](R) reader structure"]
  1901. impl crate :: Readable for R32_TMR0_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr0_cnt_end::W](W) writer structure"]
  1902. impl crate :: Writable for R32_TMR0_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR0_CNT_END to value 0"]
  1903. impl crate :: Resettable for R32_TMR0_CNT_END_SPEC { # [inline (always)]
  1904. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_FIFO register accessor: an alias for `Reg<R32_TMR0_FIFO_SPEC>`"]
  1905. pub type R32_TMR0_FIFO = crate :: Reg < r32_tmr0_fifo :: R32_TMR0_FIFO_SPEC > ; # [doc = "TMR0 FIFO register, only low 26 bit"]
  1906. pub mod r32_tmr0_fifo { # [doc = "Register `R32_TMR0_FIFO` reader"]
  1907. pub struct R (crate :: R < R32_TMR0_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_FIFO_SPEC > ; # [inline (always)]
  1908. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_FIFO_SPEC >> for R { # [inline (always)]
  1909. fn from (reader : crate :: R < R32_TMR0_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR0_FIFO` writer"]
  1910. pub struct W (crate :: W < R32_TMR0_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR0_FIFO_SPEC > ; # [inline (always)]
  1911. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1912. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR0_FIFO_SPEC >> for W { # [inline (always)]
  1913. fn from (writer : crate :: W < R32_TMR0_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR0_FIFO` reader - TMR0 FIFO current count"]
  1914. pub struct R32_TMR0_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  1915. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR0_FIFO` writer - TMR0 FIFO current count"]
  1916. pub struct R32_TMR0_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR0_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
  1917. # [inline (always)]
  1918. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR0 FIFO current count"]
  1919. # [inline (always)]
  1920. pub fn r32_tmr0_fifo (& self) -> R32_TMR0_FIFO_R { R32_TMR0_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR0 FIFO current count"]
  1921. # [inline (always)]
  1922. pub fn r32_tmr0_fifo (& mut self) -> R32_TMR0_FIFO_W { R32_TMR0_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
  1923. # [inline (always)]
  1924. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 FIFO register, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_fifo](index.html) module"]
  1925. pub struct R32_TMR0_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR0_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_fifo::R](R) reader structure"]
  1926. impl crate :: Readable for R32_TMR0_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr0_fifo::W](W) writer structure"]
  1927. impl crate :: Writable for R32_TMR0_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR0_FIFO to value 0"]
  1928. impl crate :: Resettable for R32_TMR0_FIFO_SPEC { # [inline (always)]
  1929. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR1 register"]
  1930. pub struct TMR1 { _marker : PhantomData < * const () > } unsafe impl Send for TMR1 { } impl TMR1 { # [doc = r"Pointer to the register block"]
  1931. pub const PTR : * const tmr1 :: RegisterBlock = 0x4000_2400 as * const _ ; # [doc = r"Return the pointer to the register block"]
  1932. # [inline (always)]
  1933. pub const fn ptr () -> * const tmr1 :: RegisterBlock { Self :: PTR } } impl Deref for TMR1 { type Target = tmr1 :: RegisterBlock ; # [inline (always)]
  1934. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR1") . finish () } } # [doc = "TMR1 register"]
  1935. pub mod tmr1 { # [doc = r"Register block"]
  1936. # [repr (C)]
  1937. pub struct RegisterBlock { # [doc = "0x00 - TMR1 mode control"]
  1938. pub r8_tmr1_ctrl_mod : crate :: Reg < r8_tmr1_ctrl_mod :: R8_TMR1_CTRL_MOD_SPEC > , # [doc = "0x01 - TMR1 DMA control"]
  1939. pub r8_tmr1_ctrl_dma : crate :: Reg < r8_tmr1_ctrl_dma :: R8_TMR1_CTRL_DMA_SPEC > , # [doc = "0x02 - TMR1 interrupt enable"]
  1940. pub r8_tmr1_inter_en : crate :: Reg < r8_tmr1_inter_en :: R8_TMR1_INTER_EN_SPEC > , _reserved3 : [u8 ; 0x03]
  1941. , # [doc = "0x06 - TMR1 interrupt flag"]
  1942. pub r8_tmr1_int_flag : crate :: Reg < r8_tmr1_int_flag :: R8_TMR1_INT_FLAG_SPEC > , # [doc = "0x07 - TMR1 FIFO count status"]
  1943. pub r8_tmr1_fifo_count : crate :: Reg < r8_tmr1_fifo_count :: R8_TMR1_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR1 current count"]
  1944. pub r32_tmr1_count : crate :: Reg < r32_tmr1_count :: R32_TMR1_COUNT_SPEC > , # [doc = "0x0c - TMR1 end count value, only low 26 bit"]
  1945. pub r32_tmr1_cnt_end : crate :: Reg < r32_tmr1_cnt_end :: R32_TMR1_CNT_END_SPEC > , # [doc = "0x10 - TMR1 FIFO only low 26 bit"]
  1946. pub r32_tmr1_fifo : crate :: Reg < r32_tmr1_fifo :: R32_TMR1_FIFO_SPEC > , # [doc = "0x14 - TMR1 DMA current address"]
  1947. pub r32_tmr1_dma_now : crate :: Reg < r32_tmr1_dma_now :: R32_TMR1_DMA_NOW_SPEC > , # [doc = "0x18 - TMR1 DMA begin address"]
  1948. pub r32_tmr1_dma_beg : crate :: Reg < r32_tmr1_dma_beg :: R32_TMR1_DMA_BEG_SPEC > , # [doc = "0x1c - TMR1 DMA end address"]
  1949. pub r32_tmr1_dma_end : crate :: Reg < r32_tmr1_dma_end :: R32_TMR1_DMA_END_SPEC > , } # [doc = "R8_TMR1_CTRL_MOD register accessor: an alias for `Reg<R8_TMR1_CTRL_MOD_SPEC>`"]
  1950. pub type R8_TMR1_CTRL_MOD = crate :: Reg < r8_tmr1_ctrl_mod :: R8_TMR1_CTRL_MOD_SPEC > ; # [doc = "TMR1 mode control"]
  1951. pub mod r8_tmr1_ctrl_mod { # [doc = "Register `R8_TMR1_CTRL_MOD` reader"]
  1952. pub struct R (crate :: R < R8_TMR1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_CTRL_MOD_SPEC > ; # [inline (always)]
  1953. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_CTRL_MOD_SPEC >> for R { # [inline (always)]
  1954. fn from (reader : crate :: R < R8_TMR1_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_CTRL_MOD` writer"]
  1955. pub struct W (crate :: W < R8_TMR1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_CTRL_MOD_SPEC > ; # [inline (always)]
  1956. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  1957. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_CTRL_MOD_SPEC >> for W { # [inline (always)]
  1958. fn from (writer : crate :: W < R8_TMR1_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
  1959. pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1960. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
  1961. pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
  1962. # [inline (always)]
  1963. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1964. # [inline (always)]
  1965. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1966. # [inline (always)]
  1967. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
  1968. pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1969. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
  1970. pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
  1971. # [inline (always)]
  1972. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1973. # [inline (always)]
  1974. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1975. # [inline (always)]
  1976. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
  1977. pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1978. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
  1979. pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  1980. # [inline (always)]
  1981. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1982. # [inline (always)]
  1983. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1984. # [inline (always)]
  1985. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
  1986. pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1987. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
  1988. pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  1989. # [inline (always)]
  1990. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  1991. # [inline (always)]
  1992. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  1993. # [inline (always)]
  1994. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
  1995. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  1996. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
  1997. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
  1998. # [inline (always)]
  1999. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2000. # [inline (always)]
  2001. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2002. # [inline (always)]
  2003. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _ timer capture edge mode"]
  2004. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  2005. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _ timer capture edge mode"]
  2006. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2007. # [inline (always)]
  2008. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
  2009. # [inline (always)]
  2010. pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
  2011. # [inline (always)]
  2012. pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
  2013. # [inline (always)]
  2014. pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
  2015. # [inline (always)]
  2016. pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  2017. # [inline (always)]
  2018. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
  2019. # [inline (always)]
  2020. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
  2021. # [inline (always)]
  2022. pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
  2023. # [inline (always)]
  2024. pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
  2025. # [inline (always)]
  2026. pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
  2027. # [inline (always)]
  2028. pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  2029. # [inline (always)]
  2030. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
  2031. # [inline (always)]
  2032. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
  2033. # [inline (always)]
  2034. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_ctrl_mod](index.html) module"]
  2035. pub struct R8_TMR1_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR1_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_ctrl_mod::R](R) reader structure"]
  2036. impl crate :: Readable for R8_TMR1_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_ctrl_mod::W](W) writer structure"]
  2037. impl crate :: Writable for R8_TMR1_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_CTRL_MOD to value 0x02"]
  2038. impl crate :: Resettable for R8_TMR1_CTRL_MOD_SPEC { # [inline (always)]
  2039. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR1_INTER_EN register accessor: an alias for `Reg<R8_TMR1_INTER_EN_SPEC>`"]
  2040. pub type R8_TMR1_INTER_EN = crate :: Reg < r8_tmr1_inter_en :: R8_TMR1_INTER_EN_SPEC > ; # [doc = "TMR1 interrupt enable"]
  2041. pub mod r8_tmr1_inter_en { # [doc = "Register `R8_TMR1_INTER_EN` reader"]
  2042. pub struct R (crate :: R < R8_TMR1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_INTER_EN_SPEC > ; # [inline (always)]
  2043. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_INTER_EN_SPEC >> for R { # [inline (always)]
  2044. fn from (reader : crate :: R < R8_TMR1_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_INTER_EN` writer"]
  2045. pub struct W (crate :: W < R8_TMR1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_INTER_EN_SPEC > ; # [inline (always)]
  2046. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2047. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_INTER_EN_SPEC >> for W { # [inline (always)]
  2048. fn from (writer : crate :: W < R8_TMR1_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
  2049. pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2050. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
  2051. pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  2052. # [inline (always)]
  2053. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2054. # [inline (always)]
  2055. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2056. # [inline (always)]
  2057. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
  2058. pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2059. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
  2060. pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  2061. # [inline (always)]
  2062. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2063. # [inline (always)]
  2064. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2065. # [inline (always)]
  2066. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2067. pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2068. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2069. pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  2070. # [inline (always)]
  2071. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2072. # [inline (always)]
  2073. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2074. # [inline (always)]
  2075. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1/2 DMA completion"]
  2076. pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2077. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1/2 DMA completion"]
  2078. pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  2079. # [inline (always)]
  2080. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2081. # [inline (always)]
  2082. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2083. # [inline (always)]
  2084. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
  2085. pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2086. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
  2087. pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  2088. # [inline (always)]
  2089. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2090. # [inline (always)]
  2091. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2092. # [inline (always)]
  2093. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  2094. # [inline (always)]
  2095. pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  2096. # [inline (always)]
  2097. pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2098. # [inline (always)]
  2099. pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
  2100. # [inline (always)]
  2101. pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  2102. # [inline (always)]
  2103. pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  2104. # [inline (always)]
  2105. pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  2106. # [inline (always)]
  2107. pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2108. # [inline (always)]
  2109. pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
  2110. # [inline (always)]
  2111. pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  2112. # [inline (always)]
  2113. pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  2114. # [inline (always)]
  2115. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_inter_en](index.html) module"]
  2116. pub struct R8_TMR1_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR1_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_inter_en::R](R) reader structure"]
  2117. impl crate :: Readable for R8_TMR1_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_inter_en::W](W) writer structure"]
  2118. impl crate :: Writable for R8_TMR1_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_INTER_EN to value 0"]
  2119. impl crate :: Resettable for R8_TMR1_INTER_EN_SPEC { # [inline (always)]
  2120. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_INT_FLAG register accessor: an alias for `Reg<R8_TMR1_INT_FLAG_SPEC>`"]
  2121. pub type R8_TMR1_INT_FLAG = crate :: Reg < r8_tmr1_int_flag :: R8_TMR1_INT_FLAG_SPEC > ; # [doc = "TMR1 interrupt flag"]
  2122. pub mod r8_tmr1_int_flag { # [doc = "Register `R8_TMR1_INT_FLAG` reader"]
  2123. pub struct R (crate :: R < R8_TMR1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_INT_FLAG_SPEC > ; # [inline (always)]
  2124. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_INT_FLAG_SPEC >> for R { # [inline (always)]
  2125. fn from (reader : crate :: R < R8_TMR1_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_INT_FLAG` writer"]
  2126. pub struct W (crate :: W < R8_TMR1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_INT_FLAG_SPEC > ; # [inline (always)]
  2127. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2128. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_INT_FLAG_SPEC >> for W { # [inline (always)]
  2129. fn from (writer : crate :: W < R8_TMR1_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
  2130. pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2131. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
  2132. pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  2133. # [inline (always)]
  2134. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2135. # [inline (always)]
  2136. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2137. # [inline (always)]
  2138. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
  2139. pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2140. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
  2141. pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  2142. # [inline (always)]
  2143. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2144. # [inline (always)]
  2145. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2146. # [inline (always)]
  2147. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2148. pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2149. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2150. pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  2151. # [inline (always)]
  2152. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2153. # [inline (always)]
  2154. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2155. # [inline (always)]
  2156. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1_2 DMA completion"]
  2157. pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2158. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1_2 DMA completion"]
  2159. pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  2160. # [inline (always)]
  2161. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2162. # [inline (always)]
  2163. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2164. # [inline (always)]
  2165. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
  2166. pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2167. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
  2168. pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  2169. # [inline (always)]
  2170. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2171. # [inline (always)]
  2172. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2173. # [inline (always)]
  2174. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  2175. # [inline (always)]
  2176. pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  2177. # [inline (always)]
  2178. pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2179. # [inline (always)]
  2180. pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
  2181. # [inline (always)]
  2182. pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  2183. # [inline (always)]
  2184. pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  2185. # [inline (always)]
  2186. pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  2187. # [inline (always)]
  2188. pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2189. # [inline (always)]
  2190. pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
  2191. # [inline (always)]
  2192. pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  2193. # [inline (always)]
  2194. pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  2195. # [inline (always)]
  2196. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_int_flag](index.html) module"]
  2197. pub struct R8_TMR1_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR1_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_int_flag::R](R) reader structure"]
  2198. impl crate :: Readable for R8_TMR1_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_int_flag::W](W) writer structure"]
  2199. impl crate :: Writable for R8_TMR1_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_INT_FLAG to value 0"]
  2200. impl crate :: Resettable for R8_TMR1_INT_FLAG_SPEC { # [inline (always)]
  2201. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR1_FIFO_COUNT_SPEC>`"]
  2202. pub type R8_TMR1_FIFO_COUNT = crate :: Reg < r8_tmr1_fifo_count :: R8_TMR1_FIFO_COUNT_SPEC > ; # [doc = "TMR1 FIFO count status"]
  2203. pub mod r8_tmr1_fifo_count { # [doc = "Register `R8_TMR1_FIFO_COUNT` reader"]
  2204. pub struct R (crate :: R < R8_TMR1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_FIFO_COUNT_SPEC > ; # [inline (always)]
  2205. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_FIFO_COUNT_SPEC >> for R { # [inline (always)]
  2206. fn from (reader : crate :: R < R8_TMR1_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR1_FIFO_COUNT` reader - TMR FIFO count status"]
  2207. pub struct R8_TMR1_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR1_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR1_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR1_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  2208. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR FIFO count status"]
  2209. # [inline (always)]
  2210. pub fn r8_tmr1_fifo_count (& self) -> R8_TMR1_FIFO_COUNT_R { R8_TMR1_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR1 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_fifo_count](index.html) module"]
  2211. pub struct R8_TMR1_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR1_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_fifo_count::R](R) reader structure"]
  2212. impl crate :: Readable for R8_TMR1_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR1_FIFO_COUNT to value 0"]
  2213. impl crate :: Resettable for R8_TMR1_FIFO_COUNT_SPEC { # [inline (always)]
  2214. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_COUNT register accessor: an alias for `Reg<R32_TMR1_COUNT_SPEC>`"]
  2215. pub type R32_TMR1_COUNT = crate :: Reg < r32_tmr1_count :: R32_TMR1_COUNT_SPEC > ; # [doc = "TMR1 current count"]
  2216. pub mod r32_tmr1_count { # [doc = "Register `R32_TMR1_COUNT` reader"]
  2217. pub struct R (crate :: R < R32_TMR1_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_COUNT_SPEC > ; # [inline (always)]
  2218. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_COUNT_SPEC >> for R { # [inline (always)]
  2219. fn from (reader : crate :: R < R32_TMR1_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR1_COUNT` reader - TMR current count"]
  2220. pub struct R32_TMR1_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2221. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2222. # [inline (always)]
  2223. pub fn r32_tmr1_count (& self) -> R32_TMR1_COUNT_R { R32_TMR1_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR1 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_count](index.html) module"]
  2224. pub struct R32_TMR1_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR1_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_count::R](R) reader structure"]
  2225. impl crate :: Readable for R32_TMR1_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR1_COUNT to value 0"]
  2226. impl crate :: Resettable for R32_TMR1_COUNT_SPEC { # [inline (always)]
  2227. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_CNT_END register accessor: an alias for `Reg<R32_TMR1_CNT_END_SPEC>`"]
  2228. pub type R32_TMR1_CNT_END = crate :: Reg < r32_tmr1_cnt_end :: R32_TMR1_CNT_END_SPEC > ; # [doc = "TMR1 end count value, only low 26 bit"]
  2229. pub mod r32_tmr1_cnt_end { # [doc = "Register `R32_TMR1_CNT_END` reader"]
  2230. pub struct R (crate :: R < R32_TMR1_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_CNT_END_SPEC > ; # [inline (always)]
  2231. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_CNT_END_SPEC >> for R { # [inline (always)]
  2232. fn from (reader : crate :: R < R32_TMR1_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_CNT_END` writer"]
  2233. pub struct W (crate :: W < R32_TMR1_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_CNT_END_SPEC > ; # [inline (always)]
  2234. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2235. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_CNT_END_SPEC >> for W { # [inline (always)]
  2236. fn from (writer : crate :: W < R32_TMR1_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR1_CNT_END` reader - TMR current count"]
  2237. pub struct R32_TMR1_CNT_END_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_CNT_END_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_CNT_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2238. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR1_CNT_END` writer - TMR current count"]
  2239. pub struct R32_TMR1_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR1_CNT_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2240. # [inline (always)]
  2241. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2242. # [inline (always)]
  2243. pub fn r32_tmr1_cnt_end (& self) -> R32_TMR1_CNT_END_R { R32_TMR1_CNT_END_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
  2244. # [inline (always)]
  2245. pub fn r32_tmr1_cnt_end (& mut self) -> R32_TMR1_CNT_END_W { R32_TMR1_CNT_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  2246. # [inline (always)]
  2247. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_cnt_end](index.html) module"]
  2248. pub struct R32_TMR1_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR1_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_cnt_end::R](R) reader structure"]
  2249. impl crate :: Readable for R32_TMR1_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_cnt_end::W](W) writer structure"]
  2250. impl crate :: Writable for R32_TMR1_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_CNT_END to value 0"]
  2251. impl crate :: Resettable for R32_TMR1_CNT_END_SPEC { # [inline (always)]
  2252. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_FIFO register accessor: an alias for `Reg<R32_TMR1_FIFO_SPEC>`"]
  2253. pub type R32_TMR1_FIFO = crate :: Reg < r32_tmr1_fifo :: R32_TMR1_FIFO_SPEC > ; # [doc = "TMR1 FIFO only low 26 bit"]
  2254. pub mod r32_tmr1_fifo { # [doc = "Register `R32_TMR1_FIFO` reader"]
  2255. pub struct R (crate :: R < R32_TMR1_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_FIFO_SPEC > ; # [inline (always)]
  2256. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_FIFO_SPEC >> for R { # [inline (always)]
  2257. fn from (reader : crate :: R < R32_TMR1_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_FIFO` writer"]
  2258. pub struct W (crate :: W < R32_TMR1_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_FIFO_SPEC > ; # [inline (always)]
  2259. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2260. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_FIFO_SPEC >> for W { # [inline (always)]
  2261. fn from (writer : crate :: W < R32_TMR1_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR1_FIFO` reader - TMR current count"]
  2262. pub struct R32_TMR1_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2263. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR1_FIFO` writer - TMR current count"]
  2264. pub struct R32_TMR1_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR1_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2265. # [inline (always)]
  2266. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2267. # [inline (always)]
  2268. pub fn r32_tmr1_fifo (& self) -> R32_TMR1_FIFO_R { R32_TMR1_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
  2269. # [inline (always)]
  2270. pub fn r32_tmr1_fifo (& mut self) -> R32_TMR1_FIFO_W { R32_TMR1_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
  2271. # [inline (always)]
  2272. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 FIFO only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_fifo](index.html) module"]
  2273. pub struct R32_TMR1_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR1_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_fifo::R](R) reader structure"]
  2274. impl crate :: Readable for R32_TMR1_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_fifo::W](W) writer structure"]
  2275. impl crate :: Writable for R32_TMR1_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_FIFO to value 0"]
  2276. impl crate :: Resettable for R32_TMR1_FIFO_SPEC { # [inline (always)]
  2277. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_CTRL_DMA register accessor: an alias for `Reg<R8_TMR1_CTRL_DMA_SPEC>`"]
  2278. pub type R8_TMR1_CTRL_DMA = crate :: Reg < r8_tmr1_ctrl_dma :: R8_TMR1_CTRL_DMA_SPEC > ; # [doc = "TMR1 DMA control"]
  2279. pub mod r8_tmr1_ctrl_dma { # [doc = "Register `R8_TMR1_CTRL_DMA` reader"]
  2280. pub struct R (crate :: R < R8_TMR1_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_CTRL_DMA_SPEC > ; # [inline (always)]
  2281. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_CTRL_DMA_SPEC >> for R { # [inline (always)]
  2282. fn from (reader : crate :: R < R8_TMR1_CTRL_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_CTRL_DMA` writer"]
  2283. pub struct W (crate :: W < R8_TMR1_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_CTRL_DMA_SPEC > ; # [inline (always)]
  2284. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2285. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_CTRL_DMA_SPEC >> for W { # [inline (always)]
  2286. fn from (writer : crate :: W < R8_TMR1_CTRL_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_DMA_ENABLE` reader - timer1/2 DMA enable"]
  2287. pub struct RB_TMR_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2288. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_ENABLE` writer - timer1/2 DMA enable"]
  2289. pub struct RB_TMR_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  2290. # [inline (always)]
  2291. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2292. # [inline (always)]
  2293. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2294. # [inline (always)]
  2295. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_DMA_LOOP` reader - timer1/2 DMA address loop enable"]
  2296. pub struct RB_TMR_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2297. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_LOOP` writer - timer1/2 DMA address loop enable"]
  2298. pub struct RB_TMR_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
  2299. # [inline (always)]
  2300. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2301. # [inline (always)]
  2302. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2303. # [inline (always)]
  2304. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - timer1/2 DMA enable"]
  2305. # [inline (always)]
  2306. pub fn rb_tmr_dma_enable (& self) -> RB_TMR_DMA_ENABLE_R { RB_TMR_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - timer1/2 DMA address loop enable"]
  2307. # [inline (always)]
  2308. pub fn rb_tmr_dma_loop (& self) -> RB_TMR_DMA_LOOP_R { RB_TMR_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - timer1/2 DMA enable"]
  2309. # [inline (always)]
  2310. pub fn rb_tmr_dma_enable (& mut self) -> RB_TMR_DMA_ENABLE_W { RB_TMR_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - timer1/2 DMA address loop enable"]
  2311. # [inline (always)]
  2312. pub fn rb_tmr_dma_loop (& mut self) -> RB_TMR_DMA_LOOP_W { RB_TMR_DMA_LOOP_W { w : self } } # [doc = "Writes raw bits to the register."]
  2313. # [inline (always)]
  2314. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_ctrl_dma](index.html) module"]
  2315. pub struct R8_TMR1_CTRL_DMA_SPEC ; impl crate :: RegisterSpec for R8_TMR1_CTRL_DMA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_ctrl_dma::R](R) reader structure"]
  2316. impl crate :: Readable for R8_TMR1_CTRL_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_ctrl_dma::W](W) writer structure"]
  2317. impl crate :: Writable for R8_TMR1_CTRL_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_CTRL_DMA to value 0"]
  2318. impl crate :: Resettable for R8_TMR1_CTRL_DMA_SPEC { # [inline (always)]
  2319. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_NOW register accessor: an alias for `Reg<R32_TMR1_DMA_NOW_SPEC>`"]
  2320. pub type R32_TMR1_DMA_NOW = crate :: Reg < r32_tmr1_dma_now :: R32_TMR1_DMA_NOW_SPEC > ; # [doc = "TMR1 DMA current address"]
  2321. pub mod r32_tmr1_dma_now { # [doc = "Register `R32_TMR1_DMA_NOW` reader"]
  2322. pub struct R (crate :: R < R32_TMR1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_NOW_SPEC > ; # [inline (always)]
  2323. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_NOW_SPEC >> for R { # [inline (always)]
  2324. fn from (reader : crate :: R < R32_TMR1_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_NOW` writer"]
  2325. pub struct W (crate :: W < R32_TMR1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_NOW_SPEC > ; # [inline (always)]
  2326. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2327. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_NOW_SPEC >> for W { # [inline (always)]
  2328. fn from (writer : crate :: W < R32_TMR1_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_NOW` reader - TMR DMA current address"]
  2329. pub struct R16_TMR1_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2330. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_NOW` writer - TMR DMA current address"]
  2331. pub struct R16_TMR1_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2332. # [inline (always)]
  2333. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR DMA current address"]
  2334. # [inline (always)]
  2335. pub fn r16_tmr1_dma_now (& self) -> R16_TMR1_DMA_NOW_R { R16_TMR1_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR DMA current address"]
  2336. # [inline (always)]
  2337. pub fn r16_tmr1_dma_now (& mut self) -> R16_TMR1_DMA_NOW_W { R16_TMR1_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
  2338. # [inline (always)]
  2339. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_now](index.html) module"]
  2340. pub struct R32_TMR1_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_now::R](R) reader structure"]
  2341. impl crate :: Readable for R32_TMR1_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_now::W](W) writer structure"]
  2342. impl crate :: Writable for R32_TMR1_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_NOW to value 0"]
  2343. impl crate :: Resettable for R32_TMR1_DMA_NOW_SPEC { # [inline (always)]
  2344. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_BEG register accessor: an alias for `Reg<R32_TMR1_DMA_BEG_SPEC>`"]
  2345. pub type R32_TMR1_DMA_BEG = crate :: Reg < r32_tmr1_dma_beg :: R32_TMR1_DMA_BEG_SPEC > ; # [doc = "TMR1 DMA begin address"]
  2346. pub mod r32_tmr1_dma_beg { # [doc = "Register `R32_TMR1_DMA_BEG` reader"]
  2347. pub struct R (crate :: R < R32_TMR1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_BEG_SPEC > ; # [inline (always)]
  2348. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_BEG_SPEC >> for R { # [inline (always)]
  2349. fn from (reader : crate :: R < R32_TMR1_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_BEG` writer"]
  2350. pub struct W (crate :: W < R32_TMR1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_BEG_SPEC > ; # [inline (always)]
  2351. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2352. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_BEG_SPEC >> for W { # [inline (always)]
  2353. fn from (writer : crate :: W < R32_TMR1_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_BEG` reader - TMR1 DMA begin address"]
  2354. pub struct R16_TMR1_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2355. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_BEG` writer - TMR1 DMA begin address"]
  2356. pub struct R16_TMR1_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2357. # [inline (always)]
  2358. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR1 DMA begin address"]
  2359. # [inline (always)]
  2360. pub fn r16_tmr1_dma_beg (& self) -> R16_TMR1_DMA_BEG_R { R16_TMR1_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR1 DMA begin address"]
  2361. # [inline (always)]
  2362. pub fn r16_tmr1_dma_beg (& mut self) -> R16_TMR1_DMA_BEG_W { R16_TMR1_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
  2363. # [inline (always)]
  2364. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_beg](index.html) module"]
  2365. pub struct R32_TMR1_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_beg::R](R) reader structure"]
  2366. impl crate :: Readable for R32_TMR1_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_beg::W](W) writer structure"]
  2367. impl crate :: Writable for R32_TMR1_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_BEG to value 0"]
  2368. impl crate :: Resettable for R32_TMR1_DMA_BEG_SPEC { # [inline (always)]
  2369. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_END register accessor: an alias for `Reg<R32_TMR1_DMA_END_SPEC>`"]
  2370. pub type R32_TMR1_DMA_END = crate :: Reg < r32_tmr1_dma_end :: R32_TMR1_DMA_END_SPEC > ; # [doc = "TMR1 DMA end address"]
  2371. pub mod r32_tmr1_dma_end { # [doc = "Register `R32_TMR1_DMA_END` reader"]
  2372. pub struct R (crate :: R < R32_TMR1_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_END_SPEC > ; # [inline (always)]
  2373. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_END_SPEC >> for R { # [inline (always)]
  2374. fn from (reader : crate :: R < R32_TMR1_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_END` writer"]
  2375. pub struct W (crate :: W < R32_TMR1_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_END_SPEC > ; # [inline (always)]
  2376. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2377. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_END_SPEC >> for W { # [inline (always)]
  2378. fn from (writer : crate :: W < R32_TMR1_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_END` reader - TMR1 DMA end address"]
  2379. pub struct R16_TMR1_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2380. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_END` writer - TMR1 DMA end address"]
  2381. pub struct R16_TMR1_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2382. # [inline (always)]
  2383. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR1 DMA end address"]
  2384. # [inline (always)]
  2385. pub fn r16_tmr1_dma_end (& self) -> R16_TMR1_DMA_END_R { R16_TMR1_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR1 DMA end address"]
  2386. # [inline (always)]
  2387. pub fn r16_tmr1_dma_end (& mut self) -> R16_TMR1_DMA_END_W { R16_TMR1_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  2388. # [inline (always)]
  2389. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_end](index.html) module"]
  2390. pub struct R32_TMR1_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_end::R](R) reader structure"]
  2391. impl crate :: Readable for R32_TMR1_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_end::W](W) writer structure"]
  2392. impl crate :: Writable for R32_TMR1_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_END to value 0"]
  2393. impl crate :: Resettable for R32_TMR1_DMA_END_SPEC { # [inline (always)]
  2394. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR2 register"]
  2395. pub struct TMR2 { _marker : PhantomData < * const () > } unsafe impl Send for TMR2 { } impl TMR2 { # [doc = r"Pointer to the register block"]
  2396. pub const PTR : * const tmr2 :: RegisterBlock = 0x4000_2800 as * const _ ; # [doc = r"Return the pointer to the register block"]
  2397. # [inline (always)]
  2398. pub const fn ptr () -> * const tmr2 :: RegisterBlock { Self :: PTR } } impl Deref for TMR2 { type Target = tmr2 :: RegisterBlock ; # [inline (always)]
  2399. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR2 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR2") . finish () } } # [doc = "TMR2 register"]
  2400. pub mod tmr2 { # [doc = r"Register block"]
  2401. # [repr (C)]
  2402. pub struct RegisterBlock { # [doc = "0x00 - TMR2 mode control"]
  2403. pub r8_tmr2_ctrl_mod : crate :: Reg < r8_tmr2_ctrl_mod :: R8_TMR2_CTRL_MOD_SPEC > , # [doc = "0x01 - TMR2 DMA control"]
  2404. pub r8_tmr2_ctrl_dma : crate :: Reg < r8_tmr2_ctrl_dma :: R8_TMR2_CTRL_DMA_SPEC > , # [doc = "0x02 - TMR2 interrupt enable"]
  2405. pub r8_tmr2_inter_en : crate :: Reg < r8_tmr2_inter_en :: R8_TMR2_INTER_EN_SPEC > , _reserved3 : [u8 ; 0x03]
  2406. , # [doc = "0x06 - TMR2 interrupt flag"]
  2407. pub r8_tmr2_int_flag : crate :: Reg < r8_tmr2_int_flag :: R8_TMR2_INT_FLAG_SPEC > , # [doc = "0x07 - TMR2 FIFO count status"]
  2408. pub r8_tmr2_fifo_count : crate :: Reg < r8_tmr2_fifo_count :: R8_TMR2_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR2 current count"]
  2409. pub r32_tmr2_count : crate :: Reg < r32_tmr2_count :: R32_TMR2_COUNT_SPEC > , # [doc = "0x0c - TMR2 end count value, only low 26 bit"]
  2410. pub r32_tmr2_cnt_end : crate :: Reg < r32_tmr2_cnt_end :: R32_TMR2_CNT_END_SPEC > , # [doc = "0x10 - TMR2 end count value, only low 26 bit"]
  2411. pub r32_tmr2_fifo : crate :: Reg < r32_tmr2_fifo :: R32_TMR2_FIFO_SPEC > , # [doc = "0x14 - TMR2 DMA current address"]
  2412. pub r32_tmr2_dma_now : crate :: Reg < r32_tmr2_dma_now :: R32_TMR2_DMA_NOW_SPEC > , # [doc = "0x18 - TMR2 DMA begin address"]
  2413. pub r32_tmr2_dma_beg : crate :: Reg < r32_tmr2_dma_beg :: R32_TMR2_DMA_BEG_SPEC > , # [doc = "0x1c - TMR2 DMA end address"]
  2414. pub r32_tmr2_dma_end : crate :: Reg < r32_tmr2_dma_end :: R32_TMR2_DMA_END_SPEC > , } # [doc = "R8_TMR2_CTRL_MOD register accessor: an alias for `Reg<R8_TMR2_CTRL_MOD_SPEC>`"]
  2415. pub type R8_TMR2_CTRL_MOD = crate :: Reg < r8_tmr2_ctrl_mod :: R8_TMR2_CTRL_MOD_SPEC > ; # [doc = "TMR2 mode control"]
  2416. pub mod r8_tmr2_ctrl_mod { # [doc = "Register `R8_TMR2_CTRL_MOD` reader"]
  2417. pub struct R (crate :: R < R8_TMR2_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_CTRL_MOD_SPEC > ; # [inline (always)]
  2418. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_CTRL_MOD_SPEC >> for R { # [inline (always)]
  2419. fn from (reader : crate :: R < R8_TMR2_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_CTRL_MOD` writer"]
  2420. pub struct W (crate :: W < R8_TMR2_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_CTRL_MOD_SPEC > ; # [inline (always)]
  2421. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2422. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_CTRL_MOD_SPEC >> for W { # [inline (always)]
  2423. fn from (writer : crate :: W < R8_TMR2_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
  2424. pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2425. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
  2426. pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
  2427. # [inline (always)]
  2428. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2429. # [inline (always)]
  2430. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2431. # [inline (always)]
  2432. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
  2433. pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2434. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
  2435. pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
  2436. # [inline (always)]
  2437. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2438. # [inline (always)]
  2439. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2440. # [inline (always)]
  2441. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
  2442. pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2443. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
  2444. pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  2445. # [inline (always)]
  2446. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2447. # [inline (always)]
  2448. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2449. # [inline (always)]
  2450. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
  2451. pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2452. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
  2453. pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  2454. # [inline (always)]
  2455. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2456. # [inline (always)]
  2457. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2458. # [inline (always)]
  2459. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
  2460. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2461. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
  2462. pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
  2463. # [inline (always)]
  2464. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2465. # [inline (always)]
  2466. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2467. # [inline (always)]
  2468. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _timer capture edge mode"]
  2469. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  2470. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _timer capture edge mode"]
  2471. pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2472. # [inline (always)]
  2473. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
  2474. # [inline (always)]
  2475. pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
  2476. # [inline (always)]
  2477. pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
  2478. # [inline (always)]
  2479. pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
  2480. # [inline (always)]
  2481. pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  2482. # [inline (always)]
  2483. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _timer capture edge mode"]
  2484. # [inline (always)]
  2485. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
  2486. # [inline (always)]
  2487. pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
  2488. # [inline (always)]
  2489. pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
  2490. # [inline (always)]
  2491. pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
  2492. # [inline (always)]
  2493. pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
  2494. # [inline (always)]
  2495. pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _timer capture edge mode"]
  2496. # [inline (always)]
  2497. pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
  2498. # [inline (always)]
  2499. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_ctrl_mod](index.html) module"]
  2500. pub struct R8_TMR2_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR2_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_ctrl_mod::R](R) reader structure"]
  2501. impl crate :: Readable for R8_TMR2_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_ctrl_mod::W](W) writer structure"]
  2502. impl crate :: Writable for R8_TMR2_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_CTRL_MOD to value 0x02"]
  2503. impl crate :: Resettable for R8_TMR2_CTRL_MOD_SPEC { # [inline (always)]
  2504. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR2_INTER_EN register accessor: an alias for `Reg<R8_TMR2_INTER_EN_SPEC>`"]
  2505. pub type R8_TMR2_INTER_EN = crate :: Reg < r8_tmr2_inter_en :: R8_TMR2_INTER_EN_SPEC > ; # [doc = "TMR2 interrupt enable"]
  2506. pub mod r8_tmr2_inter_en { # [doc = "Register `R8_TMR2_INTER_EN` reader"]
  2507. pub struct R (crate :: R < R8_TMR2_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_INTER_EN_SPEC > ; # [inline (always)]
  2508. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_INTER_EN_SPEC >> for R { # [inline (always)]
  2509. fn from (reader : crate :: R < R8_TMR2_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_INTER_EN` writer"]
  2510. pub struct W (crate :: W < R8_TMR2_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_INTER_EN_SPEC > ; # [inline (always)]
  2511. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2512. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_INTER_EN_SPEC >> for W { # [inline (always)]
  2513. fn from (writer : crate :: W < R8_TMR2_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
  2514. pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2515. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
  2516. pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  2517. # [inline (always)]
  2518. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2519. # [inline (always)]
  2520. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2521. # [inline (always)]
  2522. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
  2523. pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2524. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
  2525. pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  2526. # [inline (always)]
  2527. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2528. # [inline (always)]
  2529. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2530. # [inline (always)]
  2531. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2532. pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2533. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2534. pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  2535. # [inline (always)]
  2536. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2537. # [inline (always)]
  2538. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2539. # [inline (always)]
  2540. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1_2 DMA completion"]
  2541. pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2542. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1_2 DMA completion"]
  2543. pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  2544. # [inline (always)]
  2545. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2546. # [inline (always)]
  2547. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2548. # [inline (always)]
  2549. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
  2550. pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2551. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
  2552. pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  2553. # [inline (always)]
  2554. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2555. # [inline (always)]
  2556. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2557. # [inline (always)]
  2558. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  2559. # [inline (always)]
  2560. pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  2561. # [inline (always)]
  2562. pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2563. # [inline (always)]
  2564. pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1_2 DMA completion"]
  2565. # [inline (always)]
  2566. pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  2567. # [inline (always)]
  2568. pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
  2569. # [inline (always)]
  2570. pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
  2571. # [inline (always)]
  2572. pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
  2573. # [inline (always)]
  2574. pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1_2 DMA completion"]
  2575. # [inline (always)]
  2576. pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
  2577. # [inline (always)]
  2578. pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  2579. # [inline (always)]
  2580. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_inter_en](index.html) module"]
  2581. pub struct R8_TMR2_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR2_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_inter_en::R](R) reader structure"]
  2582. impl crate :: Readable for R8_TMR2_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_inter_en::W](W) writer structure"]
  2583. impl crate :: Writable for R8_TMR2_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_INTER_EN to value 0"]
  2584. impl crate :: Resettable for R8_TMR2_INTER_EN_SPEC { # [inline (always)]
  2585. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_INT_FLAG register accessor: an alias for `Reg<R8_TMR2_INT_FLAG_SPEC>`"]
  2586. pub type R8_TMR2_INT_FLAG = crate :: Reg < r8_tmr2_int_flag :: R8_TMR2_INT_FLAG_SPEC > ; # [doc = "TMR2 interrupt flag"]
  2587. pub mod r8_tmr2_int_flag { # [doc = "Register `R8_TMR2_INT_FLAG` reader"]
  2588. pub struct R (crate :: R < R8_TMR2_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_INT_FLAG_SPEC > ; # [inline (always)]
  2589. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_INT_FLAG_SPEC >> for R { # [inline (always)]
  2590. fn from (reader : crate :: R < R8_TMR2_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_INT_FLAG` writer"]
  2591. pub struct W (crate :: W < R8_TMR2_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_INT_FLAG_SPEC > ; # [inline (always)]
  2592. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2593. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_INT_FLAG_SPEC >> for W { # [inline (always)]
  2594. fn from (writer : crate :: W < R8_TMR2_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
  2595. pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2596. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
  2597. pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
  2598. # [inline (always)]
  2599. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2600. # [inline (always)]
  2601. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2602. # [inline (always)]
  2603. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
  2604. pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2605. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
  2606. pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  2607. # [inline (always)]
  2608. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2609. # [inline (always)]
  2610. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2611. # [inline (always)]
  2612. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2613. pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2614. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2615. pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  2616. # [inline (always)]
  2617. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2618. # [inline (always)]
  2619. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2620. # [inline (always)]
  2621. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1_2 DMA completion"]
  2622. pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2623. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1_2 DMA completion"]
  2624. pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  2625. # [inline (always)]
  2626. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2627. # [inline (always)]
  2628. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2629. # [inline (always)]
  2630. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
  2631. pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2632. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
  2633. pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  2634. # [inline (always)]
  2635. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2636. # [inline (always)]
  2637. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2638. # [inline (always)]
  2639. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  2640. # [inline (always)]
  2641. pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  2642. # [inline (always)]
  2643. pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2644. # [inline (always)]
  2645. pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
  2646. # [inline (always)]
  2647. pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  2648. # [inline (always)]
  2649. pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
  2650. # [inline (always)]
  2651. pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
  2652. # [inline (always)]
  2653. pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
  2654. # [inline (always)]
  2655. pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
  2656. # [inline (always)]
  2657. pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
  2658. # [inline (always)]
  2659. pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
  2660. # [inline (always)]
  2661. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_int_flag](index.html) module"]
  2662. pub struct R8_TMR2_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR2_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_int_flag::R](R) reader structure"]
  2663. impl crate :: Readable for R8_TMR2_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_int_flag::W](W) writer structure"]
  2664. impl crate :: Writable for R8_TMR2_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_INT_FLAG to value 0"]
  2665. impl crate :: Resettable for R8_TMR2_INT_FLAG_SPEC { # [inline (always)]
  2666. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR2_FIFO_COUNT_SPEC>`"]
  2667. pub type R8_TMR2_FIFO_COUNT = crate :: Reg < r8_tmr2_fifo_count :: R8_TMR2_FIFO_COUNT_SPEC > ; # [doc = "TMR2 FIFO count status"]
  2668. pub mod r8_tmr2_fifo_count { # [doc = "Register `R8_TMR2_FIFO_COUNT` reader"]
  2669. pub struct R (crate :: R < R8_TMR2_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_FIFO_COUNT_SPEC > ; # [inline (always)]
  2670. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_FIFO_COUNT_SPEC >> for R { # [inline (always)]
  2671. fn from (reader : crate :: R < R8_TMR2_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR2_FIFO_COUNT` reader - TMR FIFO count status"]
  2672. pub struct R8_TMR2_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR2_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR2_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR2_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  2673. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR FIFO count status"]
  2674. # [inline (always)]
  2675. pub fn r8_tmr2_fifo_count (& self) -> R8_TMR2_FIFO_COUNT_R { R8_TMR2_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR2 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_fifo_count](index.html) module"]
  2676. pub struct R8_TMR2_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR2_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_fifo_count::R](R) reader structure"]
  2677. impl crate :: Readable for R8_TMR2_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR2_FIFO_COUNT to value 0"]
  2678. impl crate :: Resettable for R8_TMR2_FIFO_COUNT_SPEC { # [inline (always)]
  2679. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_COUNT register accessor: an alias for `Reg<R32_TMR2_COUNT_SPEC>`"]
  2680. pub type R32_TMR2_COUNT = crate :: Reg < r32_tmr2_count :: R32_TMR2_COUNT_SPEC > ; # [doc = "TMR2 current count"]
  2681. pub mod r32_tmr2_count { # [doc = "Register `R32_TMR2_COUNT` reader"]
  2682. pub struct R (crate :: R < R32_TMR2_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_COUNT_SPEC > ; # [inline (always)]
  2683. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_COUNT_SPEC >> for R { # [inline (always)]
  2684. fn from (reader : crate :: R < R32_TMR2_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR2_COUNT` reader - TMR current count"]
  2685. pub struct R32_TMR2_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2686. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2687. # [inline (always)]
  2688. pub fn r32_tmr2_count (& self) -> R32_TMR2_COUNT_R { R32_TMR2_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR2 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_count](index.html) module"]
  2689. pub struct R32_TMR2_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR2_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_count::R](R) reader structure"]
  2690. impl crate :: Readable for R32_TMR2_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR2_COUNT to value 0"]
  2691. impl crate :: Resettable for R32_TMR2_COUNT_SPEC { # [inline (always)]
  2692. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_CNT_END register accessor: an alias for `Reg<R32_TMR2_CNT_END_SPEC>`"]
  2693. pub type R32_TMR2_CNT_END = crate :: Reg < r32_tmr2_cnt_end :: R32_TMR2_CNT_END_SPEC > ; # [doc = "TMR2 end count value, only low 26 bit"]
  2694. pub mod r32_tmr2_cnt_end { # [doc = "Register `R32_TMR2_CNT_END` reader"]
  2695. pub struct R (crate :: R < R32_TMR2_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_CNT_END_SPEC > ; # [inline (always)]
  2696. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_CNT_END_SPEC >> for R { # [inline (always)]
  2697. fn from (reader : crate :: R < R32_TMR2_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_CNT_END` writer"]
  2698. pub struct W (crate :: W < R32_TMR2_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_CNT_END_SPEC > ; # [inline (always)]
  2699. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2700. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_CNT_END_SPEC >> for W { # [inline (always)]
  2701. fn from (writer : crate :: W < R32_TMR2_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR2_CNT_END` reader - TMR current count"]
  2702. pub struct R32_TMR2_CNT_END_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_CNT_END_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_CNT_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2703. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR2_CNT_END` writer - TMR current count"]
  2704. pub struct R32_TMR2_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR2_CNT_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2705. # [inline (always)]
  2706. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2707. # [inline (always)]
  2708. pub fn r32_tmr2_cnt_end (& self) -> R32_TMR2_CNT_END_R { R32_TMR2_CNT_END_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
  2709. # [inline (always)]
  2710. pub fn r32_tmr2_cnt_end (& mut self) -> R32_TMR2_CNT_END_W { R32_TMR2_CNT_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  2711. # [inline (always)]
  2712. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_cnt_end](index.html) module"]
  2713. pub struct R32_TMR2_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR2_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_cnt_end::R](R) reader structure"]
  2714. impl crate :: Readable for R32_TMR2_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_cnt_end::W](W) writer structure"]
  2715. impl crate :: Writable for R32_TMR2_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_CNT_END to value 0"]
  2716. impl crate :: Resettable for R32_TMR2_CNT_END_SPEC { # [inline (always)]
  2717. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_FIFO register accessor: an alias for `Reg<R32_TMR2_FIFO_SPEC>`"]
  2718. pub type R32_TMR2_FIFO = crate :: Reg < r32_tmr2_fifo :: R32_TMR2_FIFO_SPEC > ; # [doc = "TMR2 end count value, only low 26 bit"]
  2719. pub mod r32_tmr2_fifo { # [doc = "Register `R32_TMR2_FIFO` reader"]
  2720. pub struct R (crate :: R < R32_TMR2_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_FIFO_SPEC > ; # [inline (always)]
  2721. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_FIFO_SPEC >> for R { # [inline (always)]
  2722. fn from (reader : crate :: R < R32_TMR2_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_FIFO` writer"]
  2723. pub struct W (crate :: W < R32_TMR2_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_FIFO_SPEC > ; # [inline (always)]
  2724. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2725. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_FIFO_SPEC >> for W { # [inline (always)]
  2726. fn from (writer : crate :: W < R32_TMR2_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR2_FIFO` reader - TMR current count"]
  2727. pub struct R32_TMR2_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2728. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR2_FIFO` writer - TMR current count"]
  2729. pub struct R32_TMR2_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR2_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2730. # [inline (always)]
  2731. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
  2732. # [inline (always)]
  2733. pub fn r32_tmr2_fifo (& self) -> R32_TMR2_FIFO_R { R32_TMR2_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
  2734. # [inline (always)]
  2735. pub fn r32_tmr2_fifo (& mut self) -> R32_TMR2_FIFO_W { R32_TMR2_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
  2736. # [inline (always)]
  2737. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_fifo](index.html) module"]
  2738. pub struct R32_TMR2_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR2_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_fifo::R](R) reader structure"]
  2739. impl crate :: Readable for R32_TMR2_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_fifo::W](W) writer structure"]
  2740. impl crate :: Writable for R32_TMR2_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_FIFO to value 0"]
  2741. impl crate :: Resettable for R32_TMR2_FIFO_SPEC { # [inline (always)]
  2742. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_CTRL_DMA register accessor: an alias for `Reg<R8_TMR2_CTRL_DMA_SPEC>`"]
  2743. pub type R8_TMR2_CTRL_DMA = crate :: Reg < r8_tmr2_ctrl_dma :: R8_TMR2_CTRL_DMA_SPEC > ; # [doc = "TMR2 DMA control"]
  2744. pub mod r8_tmr2_ctrl_dma { # [doc = "Register `R8_TMR2_CTRL_DMA` reader"]
  2745. pub struct R (crate :: R < R8_TMR2_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_CTRL_DMA_SPEC > ; # [inline (always)]
  2746. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_CTRL_DMA_SPEC >> for R { # [inline (always)]
  2747. fn from (reader : crate :: R < R8_TMR2_CTRL_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_CTRL_DMA` writer"]
  2748. pub struct W (crate :: W < R8_TMR2_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_CTRL_DMA_SPEC > ; # [inline (always)]
  2749. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2750. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_CTRL_DMA_SPEC >> for W { # [inline (always)]
  2751. fn from (writer : crate :: W < R8_TMR2_CTRL_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_DMA_ENABLE` reader - timer1_2 DMA enable"]
  2752. pub struct RB_TMR_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2753. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_ENABLE` writer - timer1_2 DMA enable"]
  2754. pub struct RB_TMR_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  2755. # [inline (always)]
  2756. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2757. # [inline (always)]
  2758. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2759. # [inline (always)]
  2760. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_DMA_LOOP` reader - timer1_2 DMA address loop enable"]
  2761. pub struct RB_TMR_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2762. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_LOOP` writer - timer1_2 DMA address loop enable"]
  2763. pub struct RB_TMR_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
  2764. # [inline (always)]
  2765. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2766. # [inline (always)]
  2767. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2768. # [inline (always)]
  2769. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - timer1_2 DMA enable"]
  2770. # [inline (always)]
  2771. pub fn rb_tmr_dma_enable (& self) -> RB_TMR_DMA_ENABLE_R { RB_TMR_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - timer1_2 DMA address loop enable"]
  2772. # [inline (always)]
  2773. pub fn rb_tmr_dma_loop (& self) -> RB_TMR_DMA_LOOP_R { RB_TMR_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - timer1_2 DMA enable"]
  2774. # [inline (always)]
  2775. pub fn rb_tmr_dma_enable (& mut self) -> RB_TMR_DMA_ENABLE_W { RB_TMR_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - timer1_2 DMA address loop enable"]
  2776. # [inline (always)]
  2777. pub fn rb_tmr_dma_loop (& mut self) -> RB_TMR_DMA_LOOP_W { RB_TMR_DMA_LOOP_W { w : self } } # [doc = "Writes raw bits to the register."]
  2778. # [inline (always)]
  2779. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_ctrl_dma](index.html) module"]
  2780. pub struct R8_TMR2_CTRL_DMA_SPEC ; impl crate :: RegisterSpec for R8_TMR2_CTRL_DMA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_ctrl_dma::R](R) reader structure"]
  2781. impl crate :: Readable for R8_TMR2_CTRL_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_ctrl_dma::W](W) writer structure"]
  2782. impl crate :: Writable for R8_TMR2_CTRL_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_CTRL_DMA to value 0"]
  2783. impl crate :: Resettable for R8_TMR2_CTRL_DMA_SPEC { # [inline (always)]
  2784. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_NOW register accessor: an alias for `Reg<R32_TMR2_DMA_NOW_SPEC>`"]
  2785. pub type R32_TMR2_DMA_NOW = crate :: Reg < r32_tmr2_dma_now :: R32_TMR2_DMA_NOW_SPEC > ; # [doc = "TMR2 DMA current address"]
  2786. pub mod r32_tmr2_dma_now { # [doc = "Register `R32_TMR2_DMA_NOW` reader"]
  2787. pub struct R (crate :: R < R32_TMR2_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_NOW_SPEC > ; # [inline (always)]
  2788. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_NOW_SPEC >> for R { # [inline (always)]
  2789. fn from (reader : crate :: R < R32_TMR2_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_NOW` writer"]
  2790. pub struct W (crate :: W < R32_TMR2_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_NOW_SPEC > ; # [inline (always)]
  2791. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2792. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_NOW_SPEC >> for W { # [inline (always)]
  2793. fn from (writer : crate :: W < R32_TMR2_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_NOW` reader - TMR DMA current address"]
  2794. pub struct R16_TMR2_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2795. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_NOW` writer - TMR DMA current address"]
  2796. pub struct R16_TMR2_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2797. # [inline (always)]
  2798. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR DMA current address"]
  2799. # [inline (always)]
  2800. pub fn r16_tmr2_dma_now (& self) -> R16_TMR2_DMA_NOW_R { R16_TMR2_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR DMA current address"]
  2801. # [inline (always)]
  2802. pub fn r16_tmr2_dma_now (& mut self) -> R16_TMR2_DMA_NOW_W { R16_TMR2_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
  2803. # [inline (always)]
  2804. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_now](index.html) module"]
  2805. pub struct R32_TMR2_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_now::R](R) reader structure"]
  2806. impl crate :: Readable for R32_TMR2_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_now::W](W) writer structure"]
  2807. impl crate :: Writable for R32_TMR2_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_NOW to value 0"]
  2808. impl crate :: Resettable for R32_TMR2_DMA_NOW_SPEC { # [inline (always)]
  2809. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_BEG register accessor: an alias for `Reg<R32_TMR2_DMA_BEG_SPEC>`"]
  2810. pub type R32_TMR2_DMA_BEG = crate :: Reg < r32_tmr2_dma_beg :: R32_TMR2_DMA_BEG_SPEC > ; # [doc = "TMR2 DMA begin address"]
  2811. pub mod r32_tmr2_dma_beg { # [doc = "Register `R32_TMR2_DMA_BEG` reader"]
  2812. pub struct R (crate :: R < R32_TMR2_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_BEG_SPEC > ; # [inline (always)]
  2813. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_BEG_SPEC >> for R { # [inline (always)]
  2814. fn from (reader : crate :: R < R32_TMR2_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_BEG` writer"]
  2815. pub struct W (crate :: W < R32_TMR2_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_BEG_SPEC > ; # [inline (always)]
  2816. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2817. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_BEG_SPEC >> for W { # [inline (always)]
  2818. fn from (writer : crate :: W < R32_TMR2_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_BEG` reader - TMR2 DMA begin address"]
  2819. pub struct R16_TMR2_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2820. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_BEG` writer - TMR2 DMA begin address"]
  2821. pub struct R16_TMR2_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2822. # [inline (always)]
  2823. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
  2824. # [inline (always)]
  2825. pub fn r16_tmr2_dma_beg (& self) -> R16_TMR2_DMA_BEG_R { R16_TMR2_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
  2826. # [inline (always)]
  2827. pub fn r16_tmr2_dma_beg (& mut self) -> R16_TMR2_DMA_BEG_W { R16_TMR2_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
  2828. # [inline (always)]
  2829. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_beg](index.html) module"]
  2830. pub struct R32_TMR2_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_beg::R](R) reader structure"]
  2831. impl crate :: Readable for R32_TMR2_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_beg::W](W) writer structure"]
  2832. impl crate :: Writable for R32_TMR2_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_BEG to value 0"]
  2833. impl crate :: Resettable for R32_TMR2_DMA_BEG_SPEC { # [inline (always)]
  2834. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_END register accessor: an alias for `Reg<R32_TMR2_DMA_END_SPEC>`"]
  2835. pub type R32_TMR2_DMA_END = crate :: Reg < r32_tmr2_dma_end :: R32_TMR2_DMA_END_SPEC > ; # [doc = "TMR2 DMA end address"]
  2836. pub mod r32_tmr2_dma_end { # [doc = "Register `R32_TMR2_DMA_END` reader"]
  2837. pub struct R (crate :: R < R32_TMR2_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_END_SPEC > ; # [inline (always)]
  2838. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_END_SPEC >> for R { # [inline (always)]
  2839. fn from (reader : crate :: R < R32_TMR2_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_END` writer"]
  2840. pub struct W (crate :: W < R32_TMR2_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_END_SPEC > ; # [inline (always)]
  2841. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2842. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_END_SPEC >> for W { # [inline (always)]
  2843. fn from (writer : crate :: W < R32_TMR2_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_END` reader - TMR2 DMA begin address"]
  2844. pub struct R16_TMR2_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  2845. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_END` writer - TMR2 DMA begin address"]
  2846. pub struct R16_TMR2_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  2847. # [inline (always)]
  2848. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
  2849. # [inline (always)]
  2850. pub fn r16_tmr2_dma_end (& self) -> R16_TMR2_DMA_END_R { R16_TMR2_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
  2851. # [inline (always)]
  2852. pub fn r16_tmr2_dma_end (& mut self) -> R16_TMR2_DMA_END_W { R16_TMR2_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  2853. # [inline (always)]
  2854. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_end](index.html) module"]
  2855. pub struct R32_TMR2_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_end::R](R) reader structure"]
  2856. impl crate :: Readable for R32_TMR2_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_end::W](W) writer structure"]
  2857. impl crate :: Writable for R32_TMR2_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_END to value 0"]
  2858. impl crate :: Resettable for R32_TMR2_DMA_END_SPEC { # [inline (always)]
  2859. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART0 register"]
  2860. pub struct UART0 { _marker : PhantomData < * const () > } unsafe impl Send for UART0 { } impl UART0 { # [doc = r"Pointer to the register block"]
  2861. pub const PTR : * const uart0 :: RegisterBlock = 0x4000_3000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  2862. # [inline (always)]
  2863. pub const fn ptr () -> * const uart0 :: RegisterBlock { Self :: PTR } } impl Deref for UART0 { type Target = uart0 :: RegisterBlock ; # [inline (always)]
  2864. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART0") . finish () } } # [doc = "UART0 register"]
  2865. pub mod uart0 { # [doc = r"Register block"]
  2866. # [repr (C)]
  2867. pub struct RegisterBlock { # [doc = "0x00 - UART0 modem control"]
  2868. pub r8_uart0_mcr : crate :: Reg < r8_uart0_mcr :: R8_UART0_MCR_SPEC > , # [doc = "0x01 - UART0 interrupt enable"]
  2869. pub r8_uart0_ier : crate :: Reg < r8_uart0_ier :: R8_UART0_IER_SPEC > , # [doc = "0x02 - UART0 FIFO control"]
  2870. pub r8_uart0_fcr : crate :: Reg < r8_uart0_fcr :: R8_UART0_FCR_SPEC > , # [doc = "0x03 - UART0 line control"]
  2871. pub r8_uart0_lcr : crate :: Reg < r8_uart0_lcr :: R8_UART0_LCR_SPEC > , # [doc = "0x04 - UART0 interrupt identification"]
  2872. pub r8_uart0_iir : crate :: Reg < r8_uart0_iir :: R8_UART0_IIR_SPEC > , # [doc = "0x05 - UART0 line status"]
  2873. pub r8_uart0_lsr : crate :: Reg < r8_uart0_lsr :: R8_UART0_LSR_SPEC > , # [doc = "0x06 - UART0 modem status"]
  2874. pub r8_uart0_msr : crate :: Reg < r8_uart0_msr :: R8_UART0_MSR_SPEC > , _reserved7 : [u8 ; 0x01]
  2875. , # [doc = "0x08 - UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte"]
  2876. pub r8_uart0_rbr_r8_uart0_thr : crate :: Reg < r8_uart0_rbr_r8_uart0_thr :: R8_UART0_RBR_R8_UART0_THR_SPEC > , _reserved8 : [u8 ; 0x01]
  2877. , # [doc = "0x0a - UART0 receiver FIFO count"]
  2878. pub r8_uart0_rfc : crate :: Reg < r8_uart0_rfc :: R8_UART0_RFC_SPEC > , # [doc = "0x0b - UART0 transmitter FIFO count"]
  2879. pub r8_uart0_tfc : crate :: Reg < r8_uart0_tfc :: R8_UART0_TFC_SPEC > , # [doc = "0x0c - UART0 divisor latch"]
  2880. pub r16_uart0_dl : crate :: Reg < r16_uart0_dl :: R16_UART0_DL_SPEC > , # [doc = "0x0e - UART0 pre-divisor latch byte"]
  2881. pub r8_uart0_div : crate :: Reg < r8_uart0_div :: R8_UART0_DIV_SPEC > , # [doc = "0x0f - UART0 slave address"]
  2882. pub r8_uart0_adr : crate :: Reg < r8_uart0_adr :: R8_UART0_ADR_SPEC > , } # [doc = "R8_UART0_MCR register accessor: an alias for `Reg<R8_UART0_MCR_SPEC>`"]
  2883. pub type R8_UART0_MCR = crate :: Reg < r8_uart0_mcr :: R8_UART0_MCR_SPEC > ; # [doc = "UART0 modem control"]
  2884. pub mod r8_uart0_mcr { # [doc = "Register `R8_UART0_MCR` reader"]
  2885. pub struct R (crate :: R < R8_UART0_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_MCR_SPEC > ; # [inline (always)]
  2886. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_MCR_SPEC >> for R { # [inline (always)]
  2887. fn from (reader : crate :: R < R8_UART0_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_MCR` writer"]
  2888. pub struct W (crate :: W < R8_UART0_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_MCR_SPEC > ; # [inline (always)]
  2889. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  2890. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_MCR_SPEC >> for W { # [inline (always)]
  2891. fn from (writer : crate :: W < R8_UART0_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_DTR` reader - UART0 control DTR"]
  2892. pub struct RB_MCR_DTR_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_DTR_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_DTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_DTR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2893. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_DTR` writer - UART0 control DTR"]
  2894. pub struct RB_MCR_DTR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_DTR_W < 'a > { # [doc = r"Sets the field bit"]
  2895. # [inline (always)]
  2896. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2897. # [inline (always)]
  2898. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2899. # [inline (always)]
  2900. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_MCR_RTS` reader - UART0 control RTS"]
  2901. pub struct RB_MCR_RTS_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_RTS_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_RTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_RTS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2902. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_RTS` writer - UART0 control RTS"]
  2903. pub struct RB_MCR_RTS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_RTS_W < 'a > { # [doc = r"Sets the field bit"]
  2904. # [inline (always)]
  2905. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2906. # [inline (always)]
  2907. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2908. # [inline (always)]
  2909. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_MCR_OUT1` reader - UART0 control OUT1"]
  2910. pub struct RB_MCR_OUT1_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT1_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2911. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT1` writer - UART0 control OUT1"]
  2912. pub struct RB_MCR_OUT1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT1_W < 'a > { # [doc = r"Sets the field bit"]
  2913. # [inline (always)]
  2914. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2915. # [inline (always)]
  2916. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2917. # [inline (always)]
  2918. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
  2919. pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2920. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
  2921. pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
  2922. # [inline (always)]
  2923. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2924. # [inline (always)]
  2925. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2926. # [inline (always)]
  2927. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_MCR_LOOP` reader - UART0 enable local loop back"]
  2928. pub struct RB_MCR_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2929. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_LOOP` writer - UART0 enable local loop back"]
  2930. pub struct RB_MCR_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
  2931. # [inline (always)]
  2932. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2933. # [inline (always)]
  2934. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2935. # [inline (always)]
  2936. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_MCR_AU_FLOW_EN` reader - UART0 enable autoflow control"]
  2937. pub struct RB_MCR_AU_FLOW_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_AU_FLOW_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_AU_FLOW_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_AU_FLOW_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2938. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_AU_FLOW_EN` writer - UART0 enable autoflow control"]
  2939. pub struct RB_MCR_AU_FLOW_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_AU_FLOW_EN_W < 'a > { # [doc = r"Sets the field bit"]
  2940. # [inline (always)]
  2941. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2942. # [inline (always)]
  2943. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2944. # [inline (always)]
  2945. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_MCR_TNOW` reader - UART0 enable TNOW output on DTR pin"]
  2946. pub struct RB_MCR_TNOW_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_TNOW_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_TNOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_TNOW_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2947. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_TNOW` writer - UART0 enable TNOW output on DTR pin"]
  2948. pub struct RB_MCR_TNOW_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_TNOW_W < 'a > { # [doc = r"Sets the field bit"]
  2949. # [inline (always)]
  2950. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2951. # [inline (always)]
  2952. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2953. # [inline (always)]
  2954. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_MCR_HALF` reader - UART0 enable half-duplex"]
  2955. pub struct RB_MCR_HALF_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_HALF_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_HALF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_HALF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  2956. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_HALF` writer - UART0 enable half-duplex"]
  2957. pub struct RB_MCR_HALF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_HALF_W < 'a > { # [doc = r"Sets the field bit"]
  2958. # [inline (always)]
  2959. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  2960. # [inline (always)]
  2961. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  2962. # [inline (always)]
  2963. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART0 control DTR"]
  2964. # [inline (always)]
  2965. pub fn rb_mcr_dtr (& self) -> RB_MCR_DTR_R { RB_MCR_DTR_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART0 control RTS"]
  2966. # [inline (always)]
  2967. pub fn rb_mcr_rts (& self) -> RB_MCR_RTS_R { RB_MCR_RTS_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART0 control OUT1"]
  2968. # [inline (always)]
  2969. pub fn rb_mcr_out1 (& self) -> RB_MCR_OUT1_R { RB_MCR_OUT1_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART control OUT2"]
  2970. # [inline (always)]
  2971. pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 enable local loop back"]
  2972. # [inline (always)]
  2973. pub fn rb_mcr_loop (& self) -> RB_MCR_LOOP_R { RB_MCR_LOOP_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 enable autoflow control"]
  2974. # [inline (always)]
  2975. pub fn rb_mcr_au_flow_en (& self) -> RB_MCR_AU_FLOW_EN_R { RB_MCR_AU_FLOW_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART0 enable TNOW output on DTR pin"]
  2976. # [inline (always)]
  2977. pub fn rb_mcr_tnow (& self) -> RB_MCR_TNOW_R { RB_MCR_TNOW_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART0 enable half-duplex"]
  2978. # [inline (always)]
  2979. pub fn rb_mcr_half (& self) -> RB_MCR_HALF_R { RB_MCR_HALF_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART0 control DTR"]
  2980. # [inline (always)]
  2981. pub fn rb_mcr_dtr (& mut self) -> RB_MCR_DTR_W { RB_MCR_DTR_W { w : self } } # [doc = "Bit 1 - UART0 control RTS"]
  2982. # [inline (always)]
  2983. pub fn rb_mcr_rts (& mut self) -> RB_MCR_RTS_W { RB_MCR_RTS_W { w : self } } # [doc = "Bit 2 - UART0 control OUT1"]
  2984. # [inline (always)]
  2985. pub fn rb_mcr_out1 (& mut self) -> RB_MCR_OUT1_W { RB_MCR_OUT1_W { w : self } } # [doc = "Bit 3 - UART control OUT2"]
  2986. # [inline (always)]
  2987. pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Bit 4 - UART0 enable local loop back"]
  2988. # [inline (always)]
  2989. pub fn rb_mcr_loop (& mut self) -> RB_MCR_LOOP_W { RB_MCR_LOOP_W { w : self } } # [doc = "Bit 5 - UART0 enable autoflow control"]
  2990. # [inline (always)]
  2991. pub fn rb_mcr_au_flow_en (& mut self) -> RB_MCR_AU_FLOW_EN_W { RB_MCR_AU_FLOW_EN_W { w : self } } # [doc = "Bit 6 - UART0 enable TNOW output on DTR pin"]
  2992. # [inline (always)]
  2993. pub fn rb_mcr_tnow (& mut self) -> RB_MCR_TNOW_W { RB_MCR_TNOW_W { w : self } } # [doc = "Bit 7 - UART0 enable half-duplex"]
  2994. # [inline (always)]
  2995. pub fn rb_mcr_half (& mut self) -> RB_MCR_HALF_W { RB_MCR_HALF_W { w : self } } # [doc = "Writes raw bits to the register."]
  2996. # [inline (always)]
  2997. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_mcr](index.html) module"]
  2998. pub struct R8_UART0_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_mcr::R](R) reader structure"]
  2999. impl crate :: Readable for R8_UART0_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_mcr::W](W) writer structure"]
  3000. impl crate :: Writable for R8_UART0_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_MCR to value 0"]
  3001. impl crate :: Resettable for R8_UART0_MCR_SPEC { # [inline (always)]
  3002. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_IER register accessor: an alias for `Reg<R8_UART0_IER_SPEC>`"]
  3003. pub type R8_UART0_IER = crate :: Reg < r8_uart0_ier :: R8_UART0_IER_SPEC > ; # [doc = "UART0 interrupt enable"]
  3004. pub mod r8_uart0_ier { # [doc = "Register `R8_UART0_IER` reader"]
  3005. pub struct R (crate :: R < R8_UART0_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_IER_SPEC > ; # [inline (always)]
  3006. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_IER_SPEC >> for R { # [inline (always)]
  3007. fn from (reader : crate :: R < R8_UART0_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_IER` writer"]
  3008. pub struct W (crate :: W < R8_UART0_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_IER_SPEC > ; # [inline (always)]
  3009. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3010. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_IER_SPEC >> for W { # [inline (always)]
  3011. fn from (writer : crate :: W < R8_UART0_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
  3012. pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3013. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
  3014. pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
  3015. # [inline (always)]
  3016. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3017. # [inline (always)]
  3018. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3019. # [inline (always)]
  3020. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
  3021. pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3022. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
  3023. pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
  3024. # [inline (always)]
  3025. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3026. # [inline (always)]
  3027. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3028. # [inline (always)]
  3029. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
  3030. pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3031. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
  3032. pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
  3033. # [inline (always)]
  3034. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3035. # [inline (always)]
  3036. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3037. # [inline (always)]
  3038. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_MODEM_CHG` reader - UART0 interrupt enable for modem status change"]
  3039. pub struct RB_IER_MODEM_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_MODEM_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_MODEM_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_MODEM_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3040. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_MODEM_CHG` writer - UART0 interrupt enable for modem status change"]
  3041. pub struct RB_IER_MODEM_CHG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_MODEM_CHG_W < 'a > { # [doc = r"Sets the field bit"]
  3042. # [inline (always)]
  3043. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3044. # [inline (always)]
  3045. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3046. # [inline (always)]
  3047. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_IER_DTR_EN` reader - UART0 DTR/TNOW output pin enable"]
  3048. pub struct RB_IER_DTR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_DTR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_DTR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_DTR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3049. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_DTR_EN` writer - UART0 DTR/TNOW output pin enable"]
  3050. pub struct RB_IER_DTR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_DTR_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3051. # [inline (always)]
  3052. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3053. # [inline (always)]
  3054. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3055. # [inline (always)]
  3056. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_IER_RTS_EN` reader - UART0 RTS output pin enable"]
  3057. pub struct RB_IER_RTS_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RTS_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RTS_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RTS_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3058. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RTS_EN` writer - UART0 RTS output pin enable"]
  3059. pub struct RB_IER_RTS_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RTS_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3060. # [inline (always)]
  3061. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3062. # [inline (always)]
  3063. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3064. # [inline (always)]
  3065. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
  3066. pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3067. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
  3068. pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3069. # [inline (always)]
  3070. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3071. # [inline (always)]
  3072. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3073. # [inline (always)]
  3074. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
  3075. pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3076. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
  3077. pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  3078. # [inline (always)]
  3079. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3080. # [inline (always)]
  3081. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3082. # [inline (always)]
  3083. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  3084. # [inline (always)]
  3085. pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  3086. # [inline (always)]
  3087. pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  3088. # [inline (always)]
  3089. pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART0 interrupt enable for modem status change"]
  3090. # [inline (always)]
  3091. pub fn rb_ier_modem_chg (& self) -> RB_IER_MODEM_CHG_R { RB_IER_MODEM_CHG_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 DTR/TNOW output pin enable"]
  3092. # [inline (always)]
  3093. pub fn rb_ier_dtr_en (& self) -> RB_IER_DTR_EN_R { RB_IER_DTR_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 RTS output pin enable"]
  3094. # [inline (always)]
  3095. pub fn rb_ier_rts_en (& self) -> RB_IER_RTS_EN_R { RB_IER_RTS_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
  3096. # [inline (always)]
  3097. pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  3098. # [inline (always)]
  3099. pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  3100. # [inline (always)]
  3101. pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  3102. # [inline (always)]
  3103. pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  3104. # [inline (always)]
  3105. pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 3 - UART0 interrupt enable for modem status change"]
  3106. # [inline (always)]
  3107. pub fn rb_ier_modem_chg (& mut self) -> RB_IER_MODEM_CHG_W { RB_IER_MODEM_CHG_W { w : self } } # [doc = "Bit 4 - UART0 DTR/TNOW output pin enable"]
  3108. # [inline (always)]
  3109. pub fn rb_ier_dtr_en (& mut self) -> RB_IER_DTR_EN_W { RB_IER_DTR_EN_W { w : self } } # [doc = "Bit 5 - UART0 RTS output pin enable"]
  3110. # [inline (always)]
  3111. pub fn rb_ier_rts_en (& mut self) -> RB_IER_RTS_EN_W { RB_IER_RTS_EN_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
  3112. # [inline (always)]
  3113. pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  3114. # [inline (always)]
  3115. pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  3116. # [inline (always)]
  3117. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_ier](index.html) module"]
  3118. pub struct R8_UART0_IER_SPEC ; impl crate :: RegisterSpec for R8_UART0_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_ier::R](R) reader structure"]
  3119. impl crate :: Readable for R8_UART0_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_ier::W](W) writer structure"]
  3120. impl crate :: Writable for R8_UART0_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_IER to value 0"]
  3121. impl crate :: Resettable for R8_UART0_IER_SPEC { # [inline (always)]
  3122. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_FCR register accessor: an alias for `Reg<R8_UART0_FCR_SPEC>`"]
  3123. pub type R8_UART0_FCR = crate :: Reg < r8_uart0_fcr :: R8_UART0_FCR_SPEC > ; # [doc = "UART0 FIFO control"]
  3124. pub mod r8_uart0_fcr { # [doc = "Register `R8_UART0_FCR` reader"]
  3125. pub struct R (crate :: R < R8_UART0_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_FCR_SPEC > ; # [inline (always)]
  3126. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_FCR_SPEC >> for R { # [inline (always)]
  3127. fn from (reader : crate :: R < R8_UART0_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_FCR` writer"]
  3128. pub struct W (crate :: W < R8_UART0_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_FCR_SPEC > ; # [inline (always)]
  3129. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3130. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_FCR_SPEC >> for W { # [inline (always)]
  3131. fn from (writer : crate :: W < R8_UART0_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
  3132. pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3133. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
  3134. pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3135. # [inline (always)]
  3136. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3137. # [inline (always)]
  3138. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3139. # [inline (always)]
  3140. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
  3141. pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3142. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
  3143. pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  3144. # [inline (always)]
  3145. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3146. # [inline (always)]
  3147. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3148. # [inline (always)]
  3149. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
  3150. pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3151. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
  3152. pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  3153. # [inline (always)]
  3154. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3155. # [inline (always)]
  3156. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3157. # [inline (always)]
  3158. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
  3159. pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3160. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
  3161. pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3162. # [inline (always)]
  3163. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
  3164. # [inline (always)]
  3165. pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  3166. # [inline (always)]
  3167. pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  3168. # [inline (always)]
  3169. pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  3170. # [inline (always)]
  3171. pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
  3172. # [inline (always)]
  3173. pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  3174. # [inline (always)]
  3175. pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  3176. # [inline (always)]
  3177. pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  3178. # [inline (always)]
  3179. pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
  3180. # [inline (always)]
  3181. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_fcr](index.html) module"]
  3182. pub struct R8_UART0_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_fcr::R](R) reader structure"]
  3183. impl crate :: Readable for R8_UART0_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_fcr::W](W) writer structure"]
  3184. impl crate :: Writable for R8_UART0_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_FCR to value 0"]
  3185. impl crate :: Resettable for R8_UART0_FCR_SPEC { # [inline (always)]
  3186. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_LCR register accessor: an alias for `Reg<R8_UART0_LCR_SPEC>`"]
  3187. pub type R8_UART0_LCR = crate :: Reg < r8_uart0_lcr :: R8_UART0_LCR_SPEC > ; # [doc = "UART0 line control"]
  3188. pub mod r8_uart0_lcr { # [doc = "Register `R8_UART0_LCR` reader"]
  3189. pub struct R (crate :: R < R8_UART0_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_LCR_SPEC > ; # [inline (always)]
  3190. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_LCR_SPEC >> for R { # [inline (always)]
  3191. fn from (reader : crate :: R < R8_UART0_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_LCR` writer"]
  3192. pub struct W (crate :: W < R8_UART0_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_LCR_SPEC > ; # [inline (always)]
  3193. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3194. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_LCR_SPEC >> for W { # [inline (always)]
  3195. fn from (writer : crate :: W < R8_UART0_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
  3196. pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3197. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
  3198. pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3199. # [inline (always)]
  3200. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
  3201. pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3202. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
  3203. pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  3204. # [inline (always)]
  3205. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3206. # [inline (always)]
  3207. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3208. # [inline (always)]
  3209. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
  3210. pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3211. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
  3212. pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3213. # [inline (always)]
  3214. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3215. # [inline (always)]
  3216. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3217. # [inline (always)]
  3218. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
  3219. pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3220. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
  3221. pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3222. # [inline (always)]
  3223. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
  3224. pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3225. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
  3226. pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3227. # [inline (always)]
  3228. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3229. # [inline (always)]
  3230. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3231. # [inline (always)]
  3232. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _UART general purpose bit"]
  3233. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3234. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _UART general purpose bit"]
  3235. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  3236. # [inline (always)]
  3237. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3238. # [inline (always)]
  3239. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3240. # [inline (always)]
  3241. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
  3242. # [inline (always)]
  3243. pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
  3244. # [inline (always)]
  3245. pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
  3246. # [inline (always)]
  3247. pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
  3248. # [inline (always)]
  3249. pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
  3250. # [inline (always)]
  3251. pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _UART general purpose bit"]
  3252. # [inline (always)]
  3253. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
  3254. # [inline (always)]
  3255. pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
  3256. # [inline (always)]
  3257. pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
  3258. # [inline (always)]
  3259. pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
  3260. # [inline (always)]
  3261. pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
  3262. # [inline (always)]
  3263. pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _UART general purpose bit"]
  3264. # [inline (always)]
  3265. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
  3266. # [inline (always)]
  3267. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_lcr](index.html) module"]
  3268. pub struct R8_UART0_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_lcr::R](R) reader structure"]
  3269. impl crate :: Readable for R8_UART0_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_lcr::W](W) writer structure"]
  3270. impl crate :: Writable for R8_UART0_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_LCR to value 0"]
  3271. impl crate :: Resettable for R8_UART0_LCR_SPEC { # [inline (always)]
  3272. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_IIR register accessor: an alias for `Reg<R8_UART0_IIR_SPEC>`"]
  3273. pub type R8_UART0_IIR = crate :: Reg < r8_uart0_iir :: R8_UART0_IIR_SPEC > ; # [doc = "UART0 interrupt identification"]
  3274. pub mod r8_uart0_iir { # [doc = "Register `R8_UART0_IIR` reader"]
  3275. pub struct R (crate :: R < R8_UART0_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_IIR_SPEC > ; # [inline (always)]
  3276. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_IIR_SPEC >> for R { # [inline (always)]
  3277. fn from (reader : crate :: R < R8_UART0_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
  3278. pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3279. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
  3280. pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3281. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
  3282. pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3283. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
  3284. # [inline (always)]
  3285. pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
  3286. # [inline (always)]
  3287. pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
  3288. # [inline (always)]
  3289. pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART0 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_iir](index.html) module"]
  3290. pub struct R8_UART0_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART0_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_iir::R](R) reader structure"]
  3291. impl crate :: Readable for R8_UART0_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_IIR to value 0x01"]
  3292. impl crate :: Resettable for R8_UART0_IIR_SPEC { # [inline (always)]
  3293. fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART0_LSR register accessor: an alias for `Reg<R8_UART0_LSR_SPEC>`"]
  3294. pub type R8_UART0_LSR = crate :: Reg < r8_uart0_lsr :: R8_UART0_LSR_SPEC > ; # [doc = "UART0 line status"]
  3295. pub mod r8_uart0_lsr { # [doc = "Register `R8_UART0_LSR` reader"]
  3296. pub struct R (crate :: R < R8_UART0_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_LSR_SPEC > ; # [inline (always)]
  3297. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_LSR_SPEC >> for R { # [inline (always)]
  3298. fn from (reader : crate :: R < R8_UART0_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
  3299. pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3300. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
  3301. pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3302. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
  3303. pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3304. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
  3305. pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3306. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
  3307. pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3308. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
  3309. pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3310. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
  3311. pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3312. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
  3313. pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3314. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
  3315. # [inline (always)]
  3316. pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
  3317. # [inline (always)]
  3318. pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
  3319. # [inline (always)]
  3320. pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
  3321. # [inline (always)]
  3322. pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
  3323. # [inline (always)]
  3324. pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
  3325. # [inline (always)]
  3326. pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
  3327. # [inline (always)]
  3328. pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
  3329. # [inline (always)]
  3330. pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART0 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_lsr](index.html) module"]
  3331. pub struct R8_UART0_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART0_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_lsr::R](R) reader structure"]
  3332. impl crate :: Readable for R8_UART0_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_LSR to value 0xc0"]
  3333. impl crate :: Resettable for R8_UART0_LSR_SPEC { # [inline (always)]
  3334. fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART0_MSR register accessor: an alias for `Reg<R8_UART0_MSR_SPEC>`"]
  3335. pub type R8_UART0_MSR = crate :: Reg < r8_uart0_msr :: R8_UART0_MSR_SPEC > ; # [doc = "UART0 modem status"]
  3336. pub mod r8_uart0_msr { # [doc = "Register `R8_UART0_MSR` reader"]
  3337. pub struct R (crate :: R < R8_UART0_MSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_MSR_SPEC > ; # [inline (always)]
  3338. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_MSR_SPEC >> for R { # [inline (always)]
  3339. fn from (reader : crate :: R < R8_UART0_MSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_MSR_CTS_CHG` reader - UART0 CTS changed status, high action"]
  3340. pub struct RB_MSR_CTS_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_CTS_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_CTS_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_CTS_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3341. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DSR_CHG` reader - UART0 DSR changed status, high action"]
  3342. pub struct RB_MSR_DSR_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DSR_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DSR_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DSR_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3343. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_RI_CHG` reader - UART0 RI changed status, high action"]
  3344. pub struct RB_MSR_RI_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_RI_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_RI_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_RI_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3345. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DCD_CHG` reader - UART0 DCD changed status, high action"]
  3346. pub struct RB_MSR_DCD_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DCD_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DCD_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DCD_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3347. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_CTS` reader - UART0 CTS action status"]
  3348. pub struct RB_MSR_CTS_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_CTS_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_CTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_CTS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3349. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DSR` reader - UART0 DSR action status"]
  3350. pub struct RB_MSR_DSR_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DSR_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DSR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3351. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_RI` reader - UART0 RI action status"]
  3352. pub struct RB_MSR_RI_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_RI_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_RI_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_RI_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3353. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DCD` reader - UART0 DCD action status"]
  3354. pub struct RB_MSR_DCD_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DCD_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DCD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DCD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3355. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART0 CTS changed status, high action"]
  3356. # [inline (always)]
  3357. pub fn rb_msr_cts_chg (& self) -> RB_MSR_CTS_CHG_R { RB_MSR_CTS_CHG_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART0 DSR changed status, high action"]
  3358. # [inline (always)]
  3359. pub fn rb_msr_dsr_chg (& self) -> RB_MSR_DSR_CHG_R { RB_MSR_DSR_CHG_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART0 RI changed status, high action"]
  3360. # [inline (always)]
  3361. pub fn rb_msr_ri_chg (& self) -> RB_MSR_RI_CHG_R { RB_MSR_RI_CHG_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART0 DCD changed status, high action"]
  3362. # [inline (always)]
  3363. pub fn rb_msr_dcd_chg (& self) -> RB_MSR_DCD_CHG_R { RB_MSR_DCD_CHG_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 CTS action status"]
  3364. # [inline (always)]
  3365. pub fn rb_msr_cts (& self) -> RB_MSR_CTS_R { RB_MSR_CTS_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 DSR action status"]
  3366. # [inline (always)]
  3367. pub fn rb_msr_dsr (& self) -> RB_MSR_DSR_R { RB_MSR_DSR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART0 RI action status"]
  3368. # [inline (always)]
  3369. pub fn rb_msr_ri (& self) -> RB_MSR_RI_R { RB_MSR_RI_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART0 DCD action status"]
  3370. # [inline (always)]
  3371. pub fn rb_msr_dcd (& self) -> RB_MSR_DCD_R { RB_MSR_DCD_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART0 modem status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_msr](index.html) module"]
  3372. pub struct R8_UART0_MSR_SPEC ; impl crate :: RegisterSpec for R8_UART0_MSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_msr::R](R) reader structure"]
  3373. impl crate :: Readable for R8_UART0_MSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_MSR to value 0"]
  3374. impl crate :: Resettable for R8_UART0_MSR_SPEC { # [inline (always)]
  3375. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_RBR_R8_UART0_THR register accessor: an alias for `Reg<R8_UART0_RBR_R8_UART0_THR_SPEC>`"]
  3376. pub type R8_UART0_RBR_R8_UART0_THR = crate :: Reg < r8_uart0_rbr_r8_uart0_thr :: R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [doc = "UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte"]
  3377. pub mod r8_uart0_rbr_r8_uart0_thr { # [doc = "Register `R8_UART0_RBR_R8_UART0_THR` reader"]
  3378. pub struct R (crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [inline (always)]
  3379. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >> for R { # [inline (always)]
  3380. fn from (reader : crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_RBR_R8_UART0_THR` writer"]
  3381. pub struct W (crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [inline (always)]
  3382. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3383. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >> for W { # [inline (always)]
  3384. fn from (writer : crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_RBR_R8_UART0_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3385. pub struct R8_UART0_RBR_R8_UART0_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_RBR_R8_UART0_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_RBR_R8_UART0_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_RBR_R8_UART0_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3386. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_RBR_R8_UART0_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3387. pub struct R8_UART0_RBR_R8_UART0_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_RBR_R8_UART0_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3388. # [inline (always)]
  3389. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3390. # [inline (always)]
  3391. pub fn r8_uart0_rbr_r8_uart0_thr (& self) -> R8_UART0_RBR_R8_UART0_THR_R { R8_UART0_RBR_R8_UART0_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3392. # [inline (always)]
  3393. pub fn r8_uart0_rbr_r8_uart0_thr (& mut self) -> R8_UART0_RBR_R8_UART0_THR_W { R8_UART0_RBR_R8_UART0_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
  3394. # [inline (always)]
  3395. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_rbr_r8_uart0_thr](index.html) module"]
  3396. pub struct R8_UART0_RBR_R8_UART0_THR_SPEC ; impl crate :: RegisterSpec for R8_UART0_RBR_R8_UART0_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_rbr_r8_uart0_thr::R](R) reader structure"]
  3397. impl crate :: Readable for R8_UART0_RBR_R8_UART0_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_rbr_r8_uart0_thr::W](W) writer structure"]
  3398. impl crate :: Writable for R8_UART0_RBR_R8_UART0_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_RBR_R8_UART0_THR to value 0"]
  3399. impl crate :: Resettable for R8_UART0_RBR_R8_UART0_THR_SPEC { # [inline (always)]
  3400. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_RFC register accessor: an alias for `Reg<R8_UART0_RFC_SPEC>`"]
  3401. pub type R8_UART0_RFC = crate :: Reg < r8_uart0_rfc :: R8_UART0_RFC_SPEC > ; # [doc = "UART0 receiver FIFO count"]
  3402. pub mod r8_uart0_rfc { # [doc = "Register `R8_UART0_RFC` reader"]
  3403. pub struct R (crate :: R < R8_UART0_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_RFC_SPEC > ; # [inline (always)]
  3404. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_RFC_SPEC >> for R { # [inline (always)]
  3405. fn from (reader : crate :: R < R8_UART0_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART_RFC` reader - UART receiver FIFO count"]
  3406. pub struct R8_UART_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3407. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
  3408. # [inline (always)]
  3409. pub fn r8_uart_rfc (& self) -> R8_UART_RFC_R { R8_UART_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART0 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_rfc](index.html) module"]
  3410. pub struct R8_UART0_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART0_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_rfc::R](R) reader structure"]
  3411. impl crate :: Readable for R8_UART0_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_RFC to value 0"]
  3412. impl crate :: Resettable for R8_UART0_RFC_SPEC { # [inline (always)]
  3413. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_TFC register accessor: an alias for `Reg<R8_UART0_TFC_SPEC>`"]
  3414. pub type R8_UART0_TFC = crate :: Reg < r8_uart0_tfc :: R8_UART0_TFC_SPEC > ; # [doc = "UART0 transmitter FIFO count"]
  3415. pub mod r8_uart0_tfc { # [doc = "Register `R8_UART0_TFC` reader"]
  3416. pub struct R (crate :: R < R8_UART0_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_TFC_SPEC > ; # [inline (always)]
  3417. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_TFC_SPEC >> for R { # [inline (always)]
  3418. fn from (reader : crate :: R < R8_UART0_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART0_TFC` reader - UART transmitter FIFO count"]
  3419. pub struct R8_UART0_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3420. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
  3421. # [inline (always)]
  3422. pub fn r8_uart0_tfc (& self) -> R8_UART0_TFC_R { R8_UART0_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART0 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_tfc](index.html) module"]
  3423. pub struct R8_UART0_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART0_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_tfc::R](R) reader structure"]
  3424. impl crate :: Readable for R8_UART0_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_TFC to value 0"]
  3425. impl crate :: Resettable for R8_UART0_TFC_SPEC { # [inline (always)]
  3426. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART0_DL register accessor: an alias for `Reg<R16_UART0_DL_SPEC>`"]
  3427. pub type R16_UART0_DL = crate :: Reg < r16_uart0_dl :: R16_UART0_DL_SPEC > ; # [doc = "UART0 divisor latch"]
  3428. pub mod r16_uart0_dl { # [doc = "Register `R16_UART0_DL` reader"]
  3429. pub struct R (crate :: R < R16_UART0_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART0_DL_SPEC > ; # [inline (always)]
  3430. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART0_DL_SPEC >> for R { # [inline (always)]
  3431. fn from (reader : crate :: R < R16_UART0_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART0_DL` writer"]
  3432. pub struct W (crate :: W < R16_UART0_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART0_DL_SPEC > ; # [inline (always)]
  3433. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3434. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART0_DL_SPEC >> for W { # [inline (always)]
  3435. fn from (writer : crate :: W < R16_UART0_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART0_DL` reader - UART divisor latch"]
  3436. pub struct R16_UART0_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART0_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART0_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART0_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  3437. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART0_DL` writer - UART divisor latch"]
  3438. pub struct R16_UART0_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART0_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3439. # [inline (always)]
  3440. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
  3441. # [inline (always)]
  3442. pub fn r16_uart0_dl (& self) -> R16_UART0_DL_R { R16_UART0_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
  3443. # [inline (always)]
  3444. pub fn r16_uart0_dl (& mut self) -> R16_UART0_DL_W { R16_UART0_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
  3445. # [inline (always)]
  3446. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart0_dl](index.html) module"]
  3447. pub struct R16_UART0_DL_SPEC ; impl crate :: RegisterSpec for R16_UART0_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart0_dl::R](R) reader structure"]
  3448. impl crate :: Readable for R16_UART0_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart0_dl::W](W) writer structure"]
  3449. impl crate :: Writable for R16_UART0_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART0_DL to value 0"]
  3450. impl crate :: Resettable for R16_UART0_DL_SPEC { # [inline (always)]
  3451. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_DIV register accessor: an alias for `Reg<R8_UART0_DIV_SPEC>`"]
  3452. pub type R8_UART0_DIV = crate :: Reg < r8_uart0_div :: R8_UART0_DIV_SPEC > ; # [doc = "UART0 pre-divisor latch byte"]
  3453. pub mod r8_uart0_div { # [doc = "Register `R8_UART0_DIV` reader"]
  3454. pub struct R (crate :: R < R8_UART0_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_DIV_SPEC > ; # [inline (always)]
  3455. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_DIV_SPEC >> for R { # [inline (always)]
  3456. fn from (reader : crate :: R < R8_UART0_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_DIV` writer"]
  3457. pub struct W (crate :: W < R8_UART0_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_DIV_SPEC > ; # [inline (always)]
  3458. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3459. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_DIV_SPEC >> for W { # [inline (always)]
  3460. fn from (writer : crate :: W < R8_UART0_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_ADR` reader - UART pre-divisor latch byte"]
  3461. pub struct R8_UART0_ADR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_ADR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_ADR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_ADR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3462. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_ADR` writer - UART pre-divisor latch byte"]
  3463. pub struct R8_UART0_ADR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_ADR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3464. # [inline (always)]
  3465. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  3466. # [inline (always)]
  3467. pub fn r8_uart0_adr (& self) -> R8_UART0_ADR_R { R8_UART0_ADR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  3468. # [inline (always)]
  3469. pub fn r8_uart0_adr (& mut self) -> R8_UART0_ADR_W { R8_UART0_ADR_W { w : self } } # [doc = "Writes raw bits to the register."]
  3470. # [inline (always)]
  3471. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_div](index.html) module"]
  3472. pub struct R8_UART0_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART0_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_div::R](R) reader structure"]
  3473. impl crate :: Readable for R8_UART0_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_div::W](W) writer structure"]
  3474. impl crate :: Writable for R8_UART0_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_DIV to value 0"]
  3475. impl crate :: Resettable for R8_UART0_DIV_SPEC { # [inline (always)]
  3476. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_ADR register accessor: an alias for `Reg<R8_UART0_ADR_SPEC>`"]
  3477. pub type R8_UART0_ADR = crate :: Reg < r8_uart0_adr :: R8_UART0_ADR_SPEC > ; # [doc = "UART0 slave address"]
  3478. pub mod r8_uart0_adr { # [doc = "Register `R8_UART0_ADR` reader"]
  3479. pub struct R (crate :: R < R8_UART0_ADR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_ADR_SPEC > ; # [inline (always)]
  3480. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_ADR_SPEC >> for R { # [inline (always)]
  3481. fn from (reader : crate :: R < R8_UART0_ADR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_ADR` writer"]
  3482. pub struct W (crate :: W < R8_UART0_ADR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_ADR_SPEC > ; # [inline (always)]
  3483. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3484. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_ADR_SPEC >> for W { # [inline (always)]
  3485. fn from (writer : crate :: W < R8_UART0_ADR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_ADR` reader - UART0 slave address"]
  3486. pub struct R8_UART0_ADR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_ADR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_ADR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_ADR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3487. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_ADR` writer - UART0 slave address"]
  3488. pub struct R8_UART0_ADR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_ADR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3489. # [inline (always)]
  3490. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART0 slave address"]
  3491. # [inline (always)]
  3492. pub fn r8_uart0_adr (& self) -> R8_UART0_ADR_R { R8_UART0_ADR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART0 slave address"]
  3493. # [inline (always)]
  3494. pub fn r8_uart0_adr (& mut self) -> R8_UART0_ADR_W { R8_UART0_ADR_W { w : self } } # [doc = "Writes raw bits to the register."]
  3495. # [inline (always)]
  3496. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 slave address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_adr](index.html) module"]
  3497. pub struct R8_UART0_ADR_SPEC ; impl crate :: RegisterSpec for R8_UART0_ADR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_adr::R](R) reader structure"]
  3498. impl crate :: Readable for R8_UART0_ADR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_adr::W](W) writer structure"]
  3499. impl crate :: Writable for R8_UART0_ADR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_ADR to value 0xff"]
  3500. impl crate :: Resettable for R8_UART0_ADR_SPEC { # [inline (always)]
  3501. fn reset_value () -> Self :: Ux { 0xff } } } } # [doc = "UART1 register"]
  3502. pub struct UART1 { _marker : PhantomData < * const () > } unsafe impl Send for UART1 { } impl UART1 { # [doc = r"Pointer to the register block"]
  3503. pub const PTR : * const uart1 :: RegisterBlock = 0x4000_3400 as * const _ ; # [doc = r"Return the pointer to the register block"]
  3504. # [inline (always)]
  3505. pub const fn ptr () -> * const uart1 :: RegisterBlock { Self :: PTR } } impl Deref for UART1 { type Target = uart1 :: RegisterBlock ; # [inline (always)]
  3506. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART1") . finish () } } # [doc = "UART1 register"]
  3507. pub mod uart1 { # [doc = r"Register block"]
  3508. # [repr (C)]
  3509. pub struct RegisterBlock { # [doc = "0x00 - UART1 modem control"]
  3510. pub r8_uart1_mcr : crate :: Reg < r8_uart1_mcr :: R8_UART1_MCR_SPEC > , # [doc = "0x01 - UART1 interrupt enable"]
  3511. pub r8_uart1_ier : crate :: Reg < r8_uart1_ier :: R8_UART1_IER_SPEC > , # [doc = "0x02 - UART1 FIFO control"]
  3512. pub r8_uart1_fcr : crate :: Reg < r8_uart1_fcr :: R8_UART1_FCR_SPEC > , # [doc = "0x03 - UART1 line control"]
  3513. pub r8_uart1_lcr : crate :: Reg < r8_uart1_lcr :: R8_UART1_LCR_SPEC > , # [doc = "0x04 - UART1 interrupt identification"]
  3514. pub r8_uart1_iir : crate :: Reg < r8_uart1_iir :: R8_UART1_IIR_SPEC > , # [doc = "0x05 - UART1 line status"]
  3515. pub r8_uart1_lsr : crate :: Reg < r8_uart1_lsr :: R8_UART1_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
  3516. , # [doc = "0x08 - UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte"]
  3517. pub r8_uart1_rbr_r8_uart1_thr : crate :: Reg < r8_uart1_rbr_r8_uart1_thr :: R8_UART1_RBR_R8_UART1_THR_SPEC > , _reserved7 : [u8 ; 0x01]
  3518. , # [doc = "0x0a - UART1 receiver FIFO count"]
  3519. pub r8_uart1_rfc : crate :: Reg < r8_uart1_rfc :: R8_UART1_RFC_SPEC > , # [doc = "0x0b - UART1 transmitter FIFO count"]
  3520. pub r8_uart1_tfc : crate :: Reg < r8_uart1_tfc :: R8_UART1_TFC_SPEC > , # [doc = "0x0c - UART1 divisor latch"]
  3521. pub r16_uart1_dl : crate :: Reg < r16_uart1_dl :: R16_UART1_DL_SPEC > , # [doc = "0x0e - UART1 pre-divisor latch byte"]
  3522. pub r8_uart1_div : crate :: Reg < r8_uart1_div :: R8_UART1_DIV_SPEC > , } # [doc = "R8_UART1_MCR register accessor: an alias for `Reg<R8_UART1_MCR_SPEC>`"]
  3523. pub type R8_UART1_MCR = crate :: Reg < r8_uart1_mcr :: R8_UART1_MCR_SPEC > ; # [doc = "UART1 modem control"]
  3524. pub mod r8_uart1_mcr { # [doc = "Register `R8_UART1_MCR` reader"]
  3525. pub struct R (crate :: R < R8_UART1_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_MCR_SPEC > ; # [inline (always)]
  3526. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_MCR_SPEC >> for R { # [inline (always)]
  3527. fn from (reader : crate :: R < R8_UART1_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_MCR` writer"]
  3528. pub struct W (crate :: W < R8_UART1_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_MCR_SPEC > ; # [inline (always)]
  3529. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3530. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_MCR_SPEC >> for W { # [inline (always)]
  3531. fn from (writer : crate :: W < R8_UART1_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART1 control OUT2"]
  3532. pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3533. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART1 control OUT2"]
  3534. pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
  3535. # [inline (always)]
  3536. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3537. # [inline (always)]
  3538. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3539. # [inline (always)]
  3540. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART1 control OUT2"]
  3541. # [inline (always)]
  3542. pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART1 control OUT2"]
  3543. # [inline (always)]
  3544. pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
  3545. # [inline (always)]
  3546. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_mcr](index.html) module"]
  3547. pub struct R8_UART1_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_mcr::R](R) reader structure"]
  3548. impl crate :: Readable for R8_UART1_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_mcr::W](W) writer structure"]
  3549. impl crate :: Writable for R8_UART1_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_MCR to value 0"]
  3550. impl crate :: Resettable for R8_UART1_MCR_SPEC { # [inline (always)]
  3551. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_IER register accessor: an alias for `Reg<R8_UART1_IER_SPEC>`"]
  3552. pub type R8_UART1_IER = crate :: Reg < r8_uart1_ier :: R8_UART1_IER_SPEC > ; # [doc = "UART1 interrupt enable"]
  3553. pub mod r8_uart1_ier { # [doc = "Register `R8_UART1_IER` reader"]
  3554. pub struct R (crate :: R < R8_UART1_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_IER_SPEC > ; # [inline (always)]
  3555. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_IER_SPEC >> for R { # [inline (always)]
  3556. fn from (reader : crate :: R < R8_UART1_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_IER` writer"]
  3557. pub struct W (crate :: W < R8_UART1_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_IER_SPEC > ; # [inline (always)]
  3558. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3559. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_IER_SPEC >> for W { # [inline (always)]
  3560. fn from (writer : crate :: W < R8_UART1_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
  3561. pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3562. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
  3563. pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
  3564. # [inline (always)]
  3565. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3566. # [inline (always)]
  3567. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3568. # [inline (always)]
  3569. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
  3570. pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3571. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
  3572. pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
  3573. # [inline (always)]
  3574. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3575. # [inline (always)]
  3576. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3577. # [inline (always)]
  3578. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
  3579. pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3580. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
  3581. pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
  3582. # [inline (always)]
  3583. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3584. # [inline (always)]
  3585. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3586. # [inline (always)]
  3587. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
  3588. pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3589. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
  3590. pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3591. # [inline (always)]
  3592. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3593. # [inline (always)]
  3594. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3595. # [inline (always)]
  3596. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
  3597. pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3598. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
  3599. pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  3600. # [inline (always)]
  3601. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3602. # [inline (always)]
  3603. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3604. # [inline (always)]
  3605. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  3606. # [inline (always)]
  3607. pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  3608. # [inline (always)]
  3609. pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  3610. # [inline (always)]
  3611. pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
  3612. # [inline (always)]
  3613. pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  3614. # [inline (always)]
  3615. pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  3616. # [inline (always)]
  3617. pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  3618. # [inline (always)]
  3619. pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  3620. # [inline (always)]
  3621. pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
  3622. # [inline (always)]
  3623. pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  3624. # [inline (always)]
  3625. pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  3626. # [inline (always)]
  3627. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_ier](index.html) module"]
  3628. pub struct R8_UART1_IER_SPEC ; impl crate :: RegisterSpec for R8_UART1_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_ier::R](R) reader structure"]
  3629. impl crate :: Readable for R8_UART1_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_ier::W](W) writer structure"]
  3630. impl crate :: Writable for R8_UART1_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_IER to value 0"]
  3631. impl crate :: Resettable for R8_UART1_IER_SPEC { # [inline (always)]
  3632. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_FCR register accessor: an alias for `Reg<R8_UART1_FCR_SPEC>`"]
  3633. pub type R8_UART1_FCR = crate :: Reg < r8_uart1_fcr :: R8_UART1_FCR_SPEC > ; # [doc = "UART1 FIFO control"]
  3634. pub mod r8_uart1_fcr { # [doc = "Register `R8_UART1_FCR` reader"]
  3635. pub struct R (crate :: R < R8_UART1_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_FCR_SPEC > ; # [inline (always)]
  3636. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_FCR_SPEC >> for R { # [inline (always)]
  3637. fn from (reader : crate :: R < R8_UART1_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_FCR` writer"]
  3638. pub struct W (crate :: W < R8_UART1_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_FCR_SPEC > ; # [inline (always)]
  3639. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3640. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_FCR_SPEC >> for W { # [inline (always)]
  3641. fn from (writer : crate :: W < R8_UART1_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
  3642. pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3643. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
  3644. pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3645. # [inline (always)]
  3646. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3647. # [inline (always)]
  3648. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3649. # [inline (always)]
  3650. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
  3651. pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3652. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
  3653. pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  3654. # [inline (always)]
  3655. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3656. # [inline (always)]
  3657. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3658. # [inline (always)]
  3659. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
  3660. pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3661. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
  3662. pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  3663. # [inline (always)]
  3664. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3665. # [inline (always)]
  3666. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3667. # [inline (always)]
  3668. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
  3669. pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3670. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
  3671. pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3672. # [inline (always)]
  3673. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
  3674. # [inline (always)]
  3675. pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  3676. # [inline (always)]
  3677. pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  3678. # [inline (always)]
  3679. pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  3680. # [inline (always)]
  3681. pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
  3682. # [inline (always)]
  3683. pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  3684. # [inline (always)]
  3685. pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  3686. # [inline (always)]
  3687. pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  3688. # [inline (always)]
  3689. pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
  3690. # [inline (always)]
  3691. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_fcr](index.html) module"]
  3692. pub struct R8_UART1_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_fcr::R](R) reader structure"]
  3693. impl crate :: Readable for R8_UART1_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_fcr::W](W) writer structure"]
  3694. impl crate :: Writable for R8_UART1_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_FCR to value 0"]
  3695. impl crate :: Resettable for R8_UART1_FCR_SPEC { # [inline (always)]
  3696. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_LCR register accessor: an alias for `Reg<R8_UART1_LCR_SPEC>`"]
  3697. pub type R8_UART1_LCR = crate :: Reg < r8_uart1_lcr :: R8_UART1_LCR_SPEC > ; # [doc = "UART1 line control"]
  3698. pub mod r8_uart1_lcr { # [doc = "Register `R8_UART1_LCR` reader"]
  3699. pub struct R (crate :: R < R8_UART1_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_LCR_SPEC > ; # [inline (always)]
  3700. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_LCR_SPEC >> for R { # [inline (always)]
  3701. fn from (reader : crate :: R < R8_UART1_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_LCR` writer"]
  3702. pub struct W (crate :: W < R8_UART1_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_LCR_SPEC > ; # [inline (always)]
  3703. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3704. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_LCR_SPEC >> for W { # [inline (always)]
  3705. fn from (writer : crate :: W < R8_UART1_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
  3706. pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3707. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
  3708. pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3709. # [inline (always)]
  3710. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
  3711. pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3712. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
  3713. pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  3714. # [inline (always)]
  3715. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3716. # [inline (always)]
  3717. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3718. # [inline (always)]
  3719. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
  3720. pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3721. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
  3722. pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3723. # [inline (always)]
  3724. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3725. # [inline (always)]
  3726. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3727. # [inline (always)]
  3728. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
  3729. pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3730. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
  3731. pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3732. # [inline (always)]
  3733. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
  3734. pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3735. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
  3736. pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
  3737. # [inline (always)]
  3738. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3739. # [inline (always)]
  3740. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3741. # [inline (always)]
  3742. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _ UART general purpose bit"]
  3743. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3744. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _ UART general purpose bit"]
  3745. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  3746. # [inline (always)]
  3747. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3748. # [inline (always)]
  3749. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3750. # [inline (always)]
  3751. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
  3752. # [inline (always)]
  3753. pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
  3754. # [inline (always)]
  3755. pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
  3756. # [inline (always)]
  3757. pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
  3758. # [inline (always)]
  3759. pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
  3760. # [inline (always)]
  3761. pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
  3762. # [inline (always)]
  3763. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
  3764. # [inline (always)]
  3765. pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
  3766. # [inline (always)]
  3767. pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
  3768. # [inline (always)]
  3769. pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
  3770. # [inline (always)]
  3771. pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
  3772. # [inline (always)]
  3773. pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
  3774. # [inline (always)]
  3775. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
  3776. # [inline (always)]
  3777. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_lcr](index.html) module"]
  3778. pub struct R8_UART1_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_lcr::R](R) reader structure"]
  3779. impl crate :: Readable for R8_UART1_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_lcr::W](W) writer structure"]
  3780. impl crate :: Writable for R8_UART1_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_LCR to value 0"]
  3781. impl crate :: Resettable for R8_UART1_LCR_SPEC { # [inline (always)]
  3782. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_IIR register accessor: an alias for `Reg<R8_UART1_IIR_SPEC>`"]
  3783. pub type R8_UART1_IIR = crate :: Reg < r8_uart1_iir :: R8_UART1_IIR_SPEC > ; # [doc = "UART1 interrupt identification"]
  3784. pub mod r8_uart1_iir { # [doc = "Register `R8_UART1_IIR` reader"]
  3785. pub struct R (crate :: R < R8_UART1_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_IIR_SPEC > ; # [inline (always)]
  3786. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_IIR_SPEC >> for R { # [inline (always)]
  3787. fn from (reader : crate :: R < R8_UART1_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
  3788. pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3789. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
  3790. pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3791. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
  3792. pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3793. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
  3794. # [inline (always)]
  3795. pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
  3796. # [inline (always)]
  3797. pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
  3798. # [inline (always)]
  3799. pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART1 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_iir](index.html) module"]
  3800. pub struct R8_UART1_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART1_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_iir::R](R) reader structure"]
  3801. impl crate :: Readable for R8_UART1_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_IIR to value 0x01"]
  3802. impl crate :: Resettable for R8_UART1_IIR_SPEC { # [inline (always)]
  3803. fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART1_LSR register accessor: an alias for `Reg<R8_UART1_LSR_SPEC>`"]
  3804. pub type R8_UART1_LSR = crate :: Reg < r8_uart1_lsr :: R8_UART1_LSR_SPEC > ; # [doc = "UART1 line status"]
  3805. pub mod r8_uart1_lsr { # [doc = "Register `R8_UART1_LSR` reader"]
  3806. pub struct R (crate :: R < R8_UART1_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_LSR_SPEC > ; # [inline (always)]
  3807. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_LSR_SPEC >> for R { # [inline (always)]
  3808. fn from (reader : crate :: R < R8_UART1_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
  3809. pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3810. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
  3811. pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3812. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
  3813. pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3814. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
  3815. pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3816. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
  3817. pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3818. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
  3819. pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3820. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
  3821. pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3822. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
  3823. pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3824. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
  3825. # [inline (always)]
  3826. pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
  3827. # [inline (always)]
  3828. pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
  3829. # [inline (always)]
  3830. pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
  3831. # [inline (always)]
  3832. pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
  3833. # [inline (always)]
  3834. pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
  3835. # [inline (always)]
  3836. pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
  3837. # [inline (always)]
  3838. pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
  3839. # [inline (always)]
  3840. pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART1 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_lsr](index.html) module"]
  3841. pub struct R8_UART1_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART1_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_lsr::R](R) reader structure"]
  3842. impl crate :: Readable for R8_UART1_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_LSR to value 0xc0"]
  3843. impl crate :: Resettable for R8_UART1_LSR_SPEC { # [inline (always)]
  3844. fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART1_RBR_R8_UART1_THR register accessor: an alias for `Reg<R8_UART1_RBR_R8_UART1_THR_SPEC>`"]
  3845. pub type R8_UART1_RBR_R8_UART1_THR = crate :: Reg < r8_uart1_rbr_r8_uart1_thr :: R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [doc = "UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte"]
  3846. pub mod r8_uart1_rbr_r8_uart1_thr { # [doc = "Register `R8_UART1_RBR_R8_UART1_THR` reader"]
  3847. pub struct R (crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [inline (always)]
  3848. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >> for R { # [inline (always)]
  3849. fn from (reader : crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_RBR_R8_UART1_THR` writer"]
  3850. pub struct W (crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [inline (always)]
  3851. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3852. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >> for W { # [inline (always)]
  3853. fn from (writer : crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART1_RBR_R8_UART1_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3854. pub struct R8_UART1_RBR_R8_UART1_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_RBR_R8_UART1_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_RBR_R8_UART1_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_RBR_R8_UART1_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3855. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART1_RBR_R8_UART1_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3856. pub struct R8_UART1_RBR_R8_UART1_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART1_RBR_R8_UART1_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3857. # [inline (always)]
  3858. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3859. # [inline (always)]
  3860. pub fn r8_uart1_rbr_r8_uart1_thr (& self) -> R8_UART1_RBR_R8_UART1_THR_R { R8_UART1_RBR_R8_UART1_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  3861. # [inline (always)]
  3862. pub fn r8_uart1_rbr_r8_uart1_thr (& mut self) -> R8_UART1_RBR_R8_UART1_THR_W { R8_UART1_RBR_R8_UART1_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
  3863. # [inline (always)]
  3864. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_rbr_r8_uart1_thr](index.html) module"]
  3865. pub struct R8_UART1_RBR_R8_UART1_THR_SPEC ; impl crate :: RegisterSpec for R8_UART1_RBR_R8_UART1_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_rbr_r8_uart1_thr::R](R) reader structure"]
  3866. impl crate :: Readable for R8_UART1_RBR_R8_UART1_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_rbr_r8_uart1_thr::W](W) writer structure"]
  3867. impl crate :: Writable for R8_UART1_RBR_R8_UART1_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_RBR_R8_UART1_THR to value 0"]
  3868. impl crate :: Resettable for R8_UART1_RBR_R8_UART1_THR_SPEC { # [inline (always)]
  3869. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_RFC register accessor: an alias for `Reg<R8_UART1_RFC_SPEC>`"]
  3870. pub type R8_UART1_RFC = crate :: Reg < r8_uart1_rfc :: R8_UART1_RFC_SPEC > ; # [doc = "UART1 receiver FIFO count"]
  3871. pub mod r8_uart1_rfc { # [doc = "Register `R8_UART1_RFC` reader"]
  3872. pub struct R (crate :: R < R8_UART1_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_RFC_SPEC > ; # [inline (always)]
  3873. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_RFC_SPEC >> for R { # [inline (always)]
  3874. fn from (reader : crate :: R < R8_UART1_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART1_RFC` reader - UART receiver FIFO count"]
  3875. pub struct R8_UART1_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3876. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
  3877. # [inline (always)]
  3878. pub fn r8_uart1_rfc (& self) -> R8_UART1_RFC_R { R8_UART1_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART1 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_rfc](index.html) module"]
  3879. pub struct R8_UART1_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART1_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_rfc::R](R) reader structure"]
  3880. impl crate :: Readable for R8_UART1_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_RFC to value 0"]
  3881. impl crate :: Resettable for R8_UART1_RFC_SPEC { # [inline (always)]
  3882. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_TFC register accessor: an alias for `Reg<R8_UART1_TFC_SPEC>`"]
  3883. pub type R8_UART1_TFC = crate :: Reg < r8_uart1_tfc :: R8_UART1_TFC_SPEC > ; # [doc = "UART1 transmitter FIFO count"]
  3884. pub mod r8_uart1_tfc { # [doc = "Register `R8_UART1_TFC` reader"]
  3885. pub struct R (crate :: R < R8_UART1_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_TFC_SPEC > ; # [inline (always)]
  3886. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_TFC_SPEC >> for R { # [inline (always)]
  3887. fn from (reader : crate :: R < R8_UART1_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART1_TFC` reader - UART transmitter FIFO count"]
  3888. pub struct R8_UART1_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3889. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
  3890. # [inline (always)]
  3891. pub fn r8_uart1_tfc (& self) -> R8_UART1_TFC_R { R8_UART1_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART1 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_tfc](index.html) module"]
  3892. pub struct R8_UART1_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART1_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_tfc::R](R) reader structure"]
  3893. impl crate :: Readable for R8_UART1_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_TFC to value 0"]
  3894. impl crate :: Resettable for R8_UART1_TFC_SPEC { # [inline (always)]
  3895. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART1_DL register accessor: an alias for `Reg<R16_UART1_DL_SPEC>`"]
  3896. pub type R16_UART1_DL = crate :: Reg < r16_uart1_dl :: R16_UART1_DL_SPEC > ; # [doc = "UART1 divisor latch"]
  3897. pub mod r16_uart1_dl { # [doc = "Register `R16_UART1_DL` reader"]
  3898. pub struct R (crate :: R < R16_UART1_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART1_DL_SPEC > ; # [inline (always)]
  3899. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART1_DL_SPEC >> for R { # [inline (always)]
  3900. fn from (reader : crate :: R < R16_UART1_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART1_DL` writer"]
  3901. pub struct W (crate :: W < R16_UART1_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART1_DL_SPEC > ; # [inline (always)]
  3902. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3903. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART1_DL_SPEC >> for W { # [inline (always)]
  3904. fn from (writer : crate :: W < R16_UART1_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART1_DL` reader - UART divisor latch"]
  3905. pub struct R16_UART1_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART1_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART1_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART1_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  3906. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART1_DL` writer - UART divisor latch"]
  3907. pub struct R16_UART1_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART1_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3908. # [inline (always)]
  3909. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
  3910. # [inline (always)]
  3911. pub fn r16_uart1_dl (& self) -> R16_UART1_DL_R { R16_UART1_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
  3912. # [inline (always)]
  3913. pub fn r16_uart1_dl (& mut self) -> R16_UART1_DL_W { R16_UART1_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
  3914. # [inline (always)]
  3915. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart1_dl](index.html) module"]
  3916. pub struct R16_UART1_DL_SPEC ; impl crate :: RegisterSpec for R16_UART1_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart1_dl::R](R) reader structure"]
  3917. impl crate :: Readable for R16_UART1_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart1_dl::W](W) writer structure"]
  3918. impl crate :: Writable for R16_UART1_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART1_DL to value 0"]
  3919. impl crate :: Resettable for R16_UART1_DL_SPEC { # [inline (always)]
  3920. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_DIV register accessor: an alias for `Reg<R8_UART1_DIV_SPEC>`"]
  3921. pub type R8_UART1_DIV = crate :: Reg < r8_uart1_div :: R8_UART1_DIV_SPEC > ; # [doc = "UART1 pre-divisor latch byte"]
  3922. pub mod r8_uart1_div { # [doc = "Register `R8_UART1_DIV` reader"]
  3923. pub struct R (crate :: R < R8_UART1_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_DIV_SPEC > ; # [inline (always)]
  3924. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_DIV_SPEC >> for R { # [inline (always)]
  3925. fn from (reader : crate :: R < R8_UART1_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_DIV` writer"]
  3926. pub struct W (crate :: W < R8_UART1_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_DIV_SPEC > ; # [inline (always)]
  3927. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3928. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_DIV_SPEC >> for W { # [inline (always)]
  3929. fn from (writer : crate :: W < R8_UART1_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART1_DIV` reader - UART pre-divisor latch byte"]
  3930. pub struct R8_UART1_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  3931. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART1_DIV` writer - UART pre-divisor latch byte"]
  3932. pub struct R8_UART1_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART1_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  3933. # [inline (always)]
  3934. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  3935. # [inline (always)]
  3936. pub fn r8_uart1_div (& self) -> R8_UART1_DIV_R { R8_UART1_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  3937. # [inline (always)]
  3938. pub fn r8_uart1_div (& mut self) -> R8_UART1_DIV_W { R8_UART1_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
  3939. # [inline (always)]
  3940. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_div](index.html) module"]
  3941. pub struct R8_UART1_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART1_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_div::R](R) reader structure"]
  3942. impl crate :: Readable for R8_UART1_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_div::W](W) writer structure"]
  3943. impl crate :: Writable for R8_UART1_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_DIV to value 0"]
  3944. impl crate :: Resettable for R8_UART1_DIV_SPEC { # [inline (always)]
  3945. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART2 register"]
  3946. pub struct UART2 { _marker : PhantomData < * const () > } unsafe impl Send for UART2 { } impl UART2 { # [doc = r"Pointer to the register block"]
  3947. pub const PTR : * const uart2 :: RegisterBlock = 0x4000_3800 as * const _ ; # [doc = r"Return the pointer to the register block"]
  3948. # [inline (always)]
  3949. pub const fn ptr () -> * const uart2 :: RegisterBlock { Self :: PTR } } impl Deref for UART2 { type Target = uart2 :: RegisterBlock ; # [inline (always)]
  3950. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART2 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART2") . finish () } } # [doc = "UART2 register"]
  3951. pub mod uart2 { # [doc = r"Register block"]
  3952. # [repr (C)]
  3953. pub struct RegisterBlock { # [doc = "0x00 - UART2 modem control"]
  3954. pub r8_uart2_mcr : crate :: Reg < r8_uart2_mcr :: R8_UART2_MCR_SPEC > , # [doc = "0x01 - UART2 interrupt enable"]
  3955. pub r8_uart2_ier : crate :: Reg < r8_uart2_ier :: R8_UART2_IER_SPEC > , # [doc = "0x02 - UART2 FIFO control"]
  3956. pub r8_uart2_fcr : crate :: Reg < r8_uart2_fcr :: R8_UART2_FCR_SPEC > , # [doc = "0x03 - UART2 line control"]
  3957. pub r8_uart2_lcr : crate :: Reg < r8_uart2_lcr :: R8_UART2_LCR_SPEC > , # [doc = "0x04 - UART2 interrupt identification"]
  3958. pub r8_uart2_iir : crate :: Reg < r8_uart2_iir :: R8_UART2_IIR_SPEC > , # [doc = "0x05 - UART2 line status"]
  3959. pub r8_uart2_lsr : crate :: Reg < r8_uart2_lsr :: R8_UART2_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
  3960. , # [doc = "0x08 - UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte"]
  3961. pub r8_uart2_rbr_r8_uart2_thr : crate :: Reg < r8_uart2_rbr_r8_uart2_thr :: R8_UART2_RBR_R8_UART2_THR_SPEC > , _reserved7 : [u8 ; 0x01]
  3962. , # [doc = "0x0a - UART2 receiver FIFO count"]
  3963. pub r8_uart2_rfc : crate :: Reg < r8_uart2_rfc :: R8_UART2_RFC_SPEC > , # [doc = "0x0b - UART2 transmitter FIFO count"]
  3964. pub r8_uart2_tfc : crate :: Reg < r8_uart2_tfc :: R8_UART2_TFC_SPEC > , # [doc = "0x0c - UART2 divisor latch"]
  3965. pub r16_uart2_dl : crate :: Reg < r16_uart2_dl :: R16_UART2_DL_SPEC > , # [doc = "0x0e - UART2 pre-divisor latch byte"]
  3966. pub r8_uart2_div : crate :: Reg < r8_uart2_div :: R8_UART2_DIV_SPEC > , } # [doc = "R8_UART2_MCR register accessor: an alias for `Reg<R8_UART2_MCR_SPEC>`"]
  3967. pub type R8_UART2_MCR = crate :: Reg < r8_uart2_mcr :: R8_UART2_MCR_SPEC > ; # [doc = "UART2 modem control"]
  3968. pub mod r8_uart2_mcr { # [doc = "Register `R8_UART2_MCR` reader"]
  3969. pub struct R (crate :: R < R8_UART2_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_MCR_SPEC > ; # [inline (always)]
  3970. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_MCR_SPEC >> for R { # [inline (always)]
  3971. fn from (reader : crate :: R < R8_UART2_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_MCR` writer"]
  3972. pub struct W (crate :: W < R8_UART2_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_MCR_SPEC > ; # [inline (always)]
  3973. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  3974. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_MCR_SPEC >> for W { # [inline (always)]
  3975. fn from (writer : crate :: W < R8_UART2_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
  3976. pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  3977. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
  3978. pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
  3979. # [inline (always)]
  3980. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  3981. # [inline (always)]
  3982. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  3983. # [inline (always)]
  3984. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART control OUT2"]
  3985. # [inline (always)]
  3986. pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART control OUT2"]
  3987. # [inline (always)]
  3988. pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
  3989. # [inline (always)]
  3990. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_mcr](index.html) module"]
  3991. pub struct R8_UART2_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_mcr::R](R) reader structure"]
  3992. impl crate :: Readable for R8_UART2_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_mcr::W](W) writer structure"]
  3993. impl crate :: Writable for R8_UART2_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_MCR to value 0"]
  3994. impl crate :: Resettable for R8_UART2_MCR_SPEC { # [inline (always)]
  3995. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_IER register accessor: an alias for `Reg<R8_UART2_IER_SPEC>`"]
  3996. pub type R8_UART2_IER = crate :: Reg < r8_uart2_ier :: R8_UART2_IER_SPEC > ; # [doc = "UART2 interrupt enable"]
  3997. pub mod r8_uart2_ier { # [doc = "Register `R8_UART2_IER` reader"]
  3998. pub struct R (crate :: R < R8_UART2_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_IER_SPEC > ; # [inline (always)]
  3999. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_IER_SPEC >> for R { # [inline (always)]
  4000. fn from (reader : crate :: R < R8_UART2_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_IER` writer"]
  4001. pub struct W (crate :: W < R8_UART2_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_IER_SPEC > ; # [inline (always)]
  4002. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4003. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_IER_SPEC >> for W { # [inline (always)]
  4004. fn from (writer : crate :: W < R8_UART2_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
  4005. pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4006. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
  4007. pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
  4008. # [inline (always)]
  4009. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4010. # [inline (always)]
  4011. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4012. # [inline (always)]
  4013. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
  4014. pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4015. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
  4016. pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
  4017. # [inline (always)]
  4018. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4019. # [inline (always)]
  4020. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4021. # [inline (always)]
  4022. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
  4023. pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4024. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
  4025. pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
  4026. # [inline (always)]
  4027. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4028. # [inline (always)]
  4029. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4030. # [inline (always)]
  4031. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
  4032. pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4033. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
  4034. pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4035. # [inline (always)]
  4036. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4037. # [inline (always)]
  4038. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4039. # [inline (always)]
  4040. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
  4041. pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4042. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
  4043. pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  4044. # [inline (always)]
  4045. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4046. # [inline (always)]
  4047. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4048. # [inline (always)]
  4049. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  4050. # [inline (always)]
  4051. pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  4052. # [inline (always)]
  4053. pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  4054. # [inline (always)]
  4055. pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
  4056. # [inline (always)]
  4057. pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  4058. # [inline (always)]
  4059. pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  4060. # [inline (always)]
  4061. pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  4062. # [inline (always)]
  4063. pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  4064. # [inline (always)]
  4065. pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
  4066. # [inline (always)]
  4067. pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  4068. # [inline (always)]
  4069. pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  4070. # [inline (always)]
  4071. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_ier](index.html) module"]
  4072. pub struct R8_UART2_IER_SPEC ; impl crate :: RegisterSpec for R8_UART2_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_ier::R](R) reader structure"]
  4073. impl crate :: Readable for R8_UART2_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_ier::W](W) writer structure"]
  4074. impl crate :: Writable for R8_UART2_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_IER to value 0"]
  4075. impl crate :: Resettable for R8_UART2_IER_SPEC { # [inline (always)]
  4076. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_FCR register accessor: an alias for `Reg<R8_UART2_FCR_SPEC>`"]
  4077. pub type R8_UART2_FCR = crate :: Reg < r8_uart2_fcr :: R8_UART2_FCR_SPEC > ; # [doc = "UART2 FIFO control"]
  4078. pub mod r8_uart2_fcr { # [doc = "Register `R8_UART2_FCR` reader"]
  4079. pub struct R (crate :: R < R8_UART2_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_FCR_SPEC > ; # [inline (always)]
  4080. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_FCR_SPEC >> for R { # [inline (always)]
  4081. fn from (reader : crate :: R < R8_UART2_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_FCR` writer"]
  4082. pub struct W (crate :: W < R8_UART2_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_FCR_SPEC > ; # [inline (always)]
  4083. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4084. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_FCR_SPEC >> for W { # [inline (always)]
  4085. fn from (writer : crate :: W < R8_UART2_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
  4086. pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4087. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
  4088. pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4089. # [inline (always)]
  4090. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4091. # [inline (always)]
  4092. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4093. # [inline (always)]
  4094. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
  4095. pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4096. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
  4097. pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  4098. # [inline (always)]
  4099. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4100. # [inline (always)]
  4101. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4102. # [inline (always)]
  4103. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
  4104. pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4105. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
  4106. pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  4107. # [inline (always)]
  4108. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4109. # [inline (always)]
  4110. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4111. # [inline (always)]
  4112. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
  4113. pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4114. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
  4115. pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4116. # [inline (always)]
  4117. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
  4118. # [inline (always)]
  4119. pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  4120. # [inline (always)]
  4121. pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  4122. # [inline (always)]
  4123. pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  4124. # [inline (always)]
  4125. pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
  4126. # [inline (always)]
  4127. pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  4128. # [inline (always)]
  4129. pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  4130. # [inline (always)]
  4131. pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  4132. # [inline (always)]
  4133. pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
  4134. # [inline (always)]
  4135. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_fcr](index.html) module"]
  4136. pub struct R8_UART2_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_fcr::R](R) reader structure"]
  4137. impl crate :: Readable for R8_UART2_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_fcr::W](W) writer structure"]
  4138. impl crate :: Writable for R8_UART2_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_FCR to value 0"]
  4139. impl crate :: Resettable for R8_UART2_FCR_SPEC { # [inline (always)]
  4140. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_LCR register accessor: an alias for `Reg<R8_UART2_LCR_SPEC>`"]
  4141. pub type R8_UART2_LCR = crate :: Reg < r8_uart2_lcr :: R8_UART2_LCR_SPEC > ; # [doc = "UART2 line control"]
  4142. pub mod r8_uart2_lcr { # [doc = "Register `R8_UART2_LCR` reader"]
  4143. pub struct R (crate :: R < R8_UART2_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_LCR_SPEC > ; # [inline (always)]
  4144. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_LCR_SPEC >> for R { # [inline (always)]
  4145. fn from (reader : crate :: R < R8_UART2_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_LCR` writer"]
  4146. pub struct W (crate :: W < R8_UART2_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_LCR_SPEC > ; # [inline (always)]
  4147. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4148. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_LCR_SPEC >> for W { # [inline (always)]
  4149. fn from (writer : crate :: W < R8_UART2_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
  4150. pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4151. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
  4152. pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4153. # [inline (always)]
  4154. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
  4155. pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4156. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
  4157. pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  4158. # [inline (always)]
  4159. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4160. # [inline (always)]
  4161. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4162. # [inline (always)]
  4163. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
  4164. pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4165. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
  4166. pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4167. # [inline (always)]
  4168. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4169. # [inline (always)]
  4170. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4171. # [inline (always)]
  4172. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
  4173. pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4174. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
  4175. pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4176. # [inline (always)]
  4177. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
  4178. pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4179. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
  4180. pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4181. # [inline (always)]
  4182. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4183. # [inline (always)]
  4184. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4185. # [inline (always)]
  4186. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _ UART general purpose bit"]
  4187. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4188. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _ UART general purpose bit"]
  4189. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  4190. # [inline (always)]
  4191. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4192. # [inline (always)]
  4193. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4194. # [inline (always)]
  4195. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
  4196. # [inline (always)]
  4197. pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
  4198. # [inline (always)]
  4199. pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
  4200. # [inline (always)]
  4201. pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
  4202. # [inline (always)]
  4203. pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
  4204. # [inline (always)]
  4205. pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
  4206. # [inline (always)]
  4207. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
  4208. # [inline (always)]
  4209. pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
  4210. # [inline (always)]
  4211. pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
  4212. # [inline (always)]
  4213. pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
  4214. # [inline (always)]
  4215. pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
  4216. # [inline (always)]
  4217. pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
  4218. # [inline (always)]
  4219. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
  4220. # [inline (always)]
  4221. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_lcr](index.html) module"]
  4222. pub struct R8_UART2_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_lcr::R](R) reader structure"]
  4223. impl crate :: Readable for R8_UART2_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_lcr::W](W) writer structure"]
  4224. impl crate :: Writable for R8_UART2_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_LCR to value 0"]
  4225. impl crate :: Resettable for R8_UART2_LCR_SPEC { # [inline (always)]
  4226. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_IIR register accessor: an alias for `Reg<R8_UART2_IIR_SPEC>`"]
  4227. pub type R8_UART2_IIR = crate :: Reg < r8_uart2_iir :: R8_UART2_IIR_SPEC > ; # [doc = "UART2 interrupt identification"]
  4228. pub mod r8_uart2_iir { # [doc = "Register `R8_UART2_IIR` reader"]
  4229. pub struct R (crate :: R < R8_UART2_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_IIR_SPEC > ; # [inline (always)]
  4230. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_IIR_SPEC >> for R { # [inline (always)]
  4231. fn from (reader : crate :: R < R8_UART2_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
  4232. pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4233. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
  4234. pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4235. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
  4236. pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4237. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
  4238. # [inline (always)]
  4239. pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
  4240. # [inline (always)]
  4241. pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
  4242. # [inline (always)]
  4243. pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART2 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_iir](index.html) module"]
  4244. pub struct R8_UART2_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART2_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_iir::R](R) reader structure"]
  4245. impl crate :: Readable for R8_UART2_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_IIR to value 0x01"]
  4246. impl crate :: Resettable for R8_UART2_IIR_SPEC { # [inline (always)]
  4247. fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART2_LSR register accessor: an alias for `Reg<R8_UART2_LSR_SPEC>`"]
  4248. pub type R8_UART2_LSR = crate :: Reg < r8_uart2_lsr :: R8_UART2_LSR_SPEC > ; # [doc = "UART2 line status"]
  4249. pub mod r8_uart2_lsr { # [doc = "Register `R8_UART2_LSR` reader"]
  4250. pub struct R (crate :: R < R8_UART2_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_LSR_SPEC > ; # [inline (always)]
  4251. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_LSR_SPEC >> for R { # [inline (always)]
  4252. fn from (reader : crate :: R < R8_UART2_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
  4253. pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4254. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
  4255. pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4256. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
  4257. pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4258. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
  4259. pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4260. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
  4261. pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4262. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
  4263. pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4264. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
  4265. pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4266. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
  4267. pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4268. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
  4269. # [inline (always)]
  4270. pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
  4271. # [inline (always)]
  4272. pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
  4273. # [inline (always)]
  4274. pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
  4275. # [inline (always)]
  4276. pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
  4277. # [inline (always)]
  4278. pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
  4279. # [inline (always)]
  4280. pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
  4281. # [inline (always)]
  4282. pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
  4283. # [inline (always)]
  4284. pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART2 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_lsr](index.html) module"]
  4285. pub struct R8_UART2_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART2_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_lsr::R](R) reader structure"]
  4286. impl crate :: Readable for R8_UART2_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_LSR to value 0xc0"]
  4287. impl crate :: Resettable for R8_UART2_LSR_SPEC { # [inline (always)]
  4288. fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART2_RBR_R8_UART2_THR register accessor: an alias for `Reg<R8_UART2_RBR_R8_UART2_THR_SPEC>`"]
  4289. pub type R8_UART2_RBR_R8_UART2_THR = crate :: Reg < r8_uart2_rbr_r8_uart2_thr :: R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [doc = "UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte"]
  4290. pub mod r8_uart2_rbr_r8_uart2_thr { # [doc = "Register `R8_UART2_RBR_R8_UART2_THR` reader"]
  4291. pub struct R (crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [inline (always)]
  4292. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >> for R { # [inline (always)]
  4293. fn from (reader : crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_RBR_R8_UART2_THR` writer"]
  4294. pub struct W (crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [inline (always)]
  4295. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4296. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >> for W { # [inline (always)]
  4297. fn from (writer : crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART_RBR_R8_UART_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  4298. pub struct R8_UART_RBR_R8_UART_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART_RBR_R8_UART_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART_RBR_R8_UART_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART_RBR_R8_UART_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4299. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART_RBR_R8_UART_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  4300. pub struct R8_UART_RBR_R8_UART_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART_RBR_R8_UART_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4301. # [inline (always)]
  4302. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  4303. # [inline (always)]
  4304. pub fn r8_uart_rbr_r8_uart_thr (& self) -> R8_UART_RBR_R8_UART_THR_R { R8_UART_RBR_R8_UART_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
  4305. # [inline (always)]
  4306. pub fn r8_uart_rbr_r8_uart_thr (& mut self) -> R8_UART_RBR_R8_UART_THR_W { R8_UART_RBR_R8_UART_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
  4307. # [inline (always)]
  4308. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_rbr_r8_uart2_thr](index.html) module"]
  4309. pub struct R8_UART2_RBR_R8_UART2_THR_SPEC ; impl crate :: RegisterSpec for R8_UART2_RBR_R8_UART2_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_rbr_r8_uart2_thr::R](R) reader structure"]
  4310. impl crate :: Readable for R8_UART2_RBR_R8_UART2_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_rbr_r8_uart2_thr::W](W) writer structure"]
  4311. impl crate :: Writable for R8_UART2_RBR_R8_UART2_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_RBR_R8_UART2_THR to value 0"]
  4312. impl crate :: Resettable for R8_UART2_RBR_R8_UART2_THR_SPEC { # [inline (always)]
  4313. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_RFC register accessor: an alias for `Reg<R8_UART2_RFC_SPEC>`"]
  4314. pub type R8_UART2_RFC = crate :: Reg < r8_uart2_rfc :: R8_UART2_RFC_SPEC > ; # [doc = "UART2 receiver FIFO count"]
  4315. pub mod r8_uart2_rfc { # [doc = "Register `R8_UART2_RFC` reader"]
  4316. pub struct R (crate :: R < R8_UART2_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_RFC_SPEC > ; # [inline (always)]
  4317. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_RFC_SPEC >> for R { # [inline (always)]
  4318. fn from (reader : crate :: R < R8_UART2_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART2_RFC` reader - UART receiver FIFO count"]
  4319. pub struct R8_UART2_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4320. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
  4321. # [inline (always)]
  4322. pub fn r8_uart2_rfc (& self) -> R8_UART2_RFC_R { R8_UART2_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART2 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_rfc](index.html) module"]
  4323. pub struct R8_UART2_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART2_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_rfc::R](R) reader structure"]
  4324. impl crate :: Readable for R8_UART2_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_RFC to value 0"]
  4325. impl crate :: Resettable for R8_UART2_RFC_SPEC { # [inline (always)]
  4326. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_TFC register accessor: an alias for `Reg<R8_UART2_TFC_SPEC>`"]
  4327. pub type R8_UART2_TFC = crate :: Reg < r8_uart2_tfc :: R8_UART2_TFC_SPEC > ; # [doc = "UART2 transmitter FIFO count"]
  4328. pub mod r8_uart2_tfc { # [doc = "Register `R8_UART2_TFC` reader"]
  4329. pub struct R (crate :: R < R8_UART2_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_TFC_SPEC > ; # [inline (always)]
  4330. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_TFC_SPEC >> for R { # [inline (always)]
  4331. fn from (reader : crate :: R < R8_UART2_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART2_TFC` reader - UART transmitter FIFO count"]
  4332. pub struct R8_UART2_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4333. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
  4334. # [inline (always)]
  4335. pub fn r8_uart2_tfc (& self) -> R8_UART2_TFC_R { R8_UART2_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART2 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_tfc](index.html) module"]
  4336. pub struct R8_UART2_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART2_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_tfc::R](R) reader structure"]
  4337. impl crate :: Readable for R8_UART2_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_TFC to value 0"]
  4338. impl crate :: Resettable for R8_UART2_TFC_SPEC { # [inline (always)]
  4339. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART2_DL register accessor: an alias for `Reg<R16_UART2_DL_SPEC>`"]
  4340. pub type R16_UART2_DL = crate :: Reg < r16_uart2_dl :: R16_UART2_DL_SPEC > ; # [doc = "UART2 divisor latch"]
  4341. pub mod r16_uart2_dl { # [doc = "Register `R16_UART2_DL` reader"]
  4342. pub struct R (crate :: R < R16_UART2_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART2_DL_SPEC > ; # [inline (always)]
  4343. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART2_DL_SPEC >> for R { # [inline (always)]
  4344. fn from (reader : crate :: R < R16_UART2_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART2_DL` writer"]
  4345. pub struct W (crate :: W < R16_UART2_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART2_DL_SPEC > ; # [inline (always)]
  4346. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4347. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART2_DL_SPEC >> for W { # [inline (always)]
  4348. fn from (writer : crate :: W < R16_UART2_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART2_DL` reader - UART divisor latch"]
  4349. pub struct R16_UART2_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART2_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART2_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART2_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  4350. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART2_DL` writer - UART divisor latch"]
  4351. pub struct R16_UART2_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART2_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4352. # [inline (always)]
  4353. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
  4354. # [inline (always)]
  4355. pub fn r16_uart2_dl (& self) -> R16_UART2_DL_R { R16_UART2_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
  4356. # [inline (always)]
  4357. pub fn r16_uart2_dl (& mut self) -> R16_UART2_DL_W { R16_UART2_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
  4358. # [inline (always)]
  4359. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart2_dl](index.html) module"]
  4360. pub struct R16_UART2_DL_SPEC ; impl crate :: RegisterSpec for R16_UART2_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart2_dl::R](R) reader structure"]
  4361. impl crate :: Readable for R16_UART2_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart2_dl::W](W) writer structure"]
  4362. impl crate :: Writable for R16_UART2_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART2_DL to value 0"]
  4363. impl crate :: Resettable for R16_UART2_DL_SPEC { # [inline (always)]
  4364. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_DIV register accessor: an alias for `Reg<R8_UART2_DIV_SPEC>`"]
  4365. pub type R8_UART2_DIV = crate :: Reg < r8_uart2_div :: R8_UART2_DIV_SPEC > ; # [doc = "UART2 pre-divisor latch byte"]
  4366. pub mod r8_uart2_div { # [doc = "Register `R8_UART2_DIV` reader"]
  4367. pub struct R (crate :: R < R8_UART2_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_DIV_SPEC > ; # [inline (always)]
  4368. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_DIV_SPEC >> for R { # [inline (always)]
  4369. fn from (reader : crate :: R < R8_UART2_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_DIV` writer"]
  4370. pub struct W (crate :: W < R8_UART2_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_DIV_SPEC > ; # [inline (always)]
  4371. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4372. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_DIV_SPEC >> for W { # [inline (always)]
  4373. fn from (writer : crate :: W < R8_UART2_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART2_DIV` reader - UART pre-divisor latch byte"]
  4374. pub struct R8_UART2_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4375. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART2_DIV` writer - UART pre-divisor latch byte"]
  4376. pub struct R8_UART2_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART2_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4377. # [inline (always)]
  4378. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  4379. # [inline (always)]
  4380. pub fn r8_uart2_div (& self) -> R8_UART2_DIV_R { R8_UART2_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  4381. # [inline (always)]
  4382. pub fn r8_uart2_div (& mut self) -> R8_UART2_DIV_W { R8_UART2_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
  4383. # [inline (always)]
  4384. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_div](index.html) module"]
  4385. pub struct R8_UART2_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART2_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_div::R](R) reader structure"]
  4386. impl crate :: Readable for R8_UART2_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_div::W](W) writer structure"]
  4387. impl crate :: Writable for R8_UART2_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_DIV to value 0"]
  4388. impl crate :: Resettable for R8_UART2_DIV_SPEC { # [inline (always)]
  4389. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART3 register"]
  4390. pub struct UART3 { _marker : PhantomData < * const () > } unsafe impl Send for UART3 { } impl UART3 { # [doc = r"Pointer to the register block"]
  4391. pub const PTR : * const uart3 :: RegisterBlock = 0x4000_3c00 as * const _ ; # [doc = r"Return the pointer to the register block"]
  4392. # [inline (always)]
  4393. pub const fn ptr () -> * const uart3 :: RegisterBlock { Self :: PTR } } impl Deref for UART3 { type Target = uart3 :: RegisterBlock ; # [inline (always)]
  4394. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART3 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART3") . finish () } } # [doc = "UART3 register"]
  4395. pub mod uart3 { # [doc = r"Register block"]
  4396. # [repr (C)]
  4397. pub struct RegisterBlock { # [doc = "0x00 - UART3 modem control"]
  4398. pub r8_uart3_mcr : crate :: Reg < r8_uart3_mcr :: R8_UART3_MCR_SPEC > , # [doc = "0x01 - UART3 interrupt enable"]
  4399. pub r8_uart3_ier : crate :: Reg < r8_uart3_ier :: R8_UART3_IER_SPEC > , # [doc = "0x02 - UART3 FIFO control"]
  4400. pub r8_uart3_fcr : crate :: Reg < r8_uart3_fcr :: R8_UART3_FCR_SPEC > , # [doc = "0x03 - UART3 line control"]
  4401. pub r8_uart3_lcr : crate :: Reg < r8_uart3_lcr :: R8_UART3_LCR_SPEC > , # [doc = "0x04 - UART3 interrupt identification"]
  4402. pub r8_uart3_iir : crate :: Reg < r8_uart3_iir :: R8_UART3_IIR_SPEC > , # [doc = "0x05 - UART3 line status"]
  4403. pub r8_uart3_lsr : crate :: Reg < r8_uart3_lsr :: R8_UART3_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
  4404. , # [doc = "0x08 - UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte"]
  4405. pub r8_uart3_rbr_r8_uart3_thr : crate :: Reg < r8_uart3_rbr_r8_uart3_thr :: R8_UART3_RBR_R8_UART3_THR_SPEC > , _reserved7 : [u8 ; 0x01]
  4406. , # [doc = "0x0a - UART3 receiver FIFO count"]
  4407. pub r8_uart3_rfc : crate :: Reg < r8_uart3_rfc :: R8_UART3_RFC_SPEC > , # [doc = "0x0b - UART3 transmitter FIFO count"]
  4408. pub r8_uart3_tfc : crate :: Reg < r8_uart3_tfc :: R8_UART3_TFC_SPEC > , # [doc = "0x0c - UART3 divisor latch"]
  4409. pub r16_uart3_dl : crate :: Reg < r16_uart3_dl :: R16_UART3_DL_SPEC > , # [doc = "0x0e - UART3 pre-divisor latch byte"]
  4410. pub r8_uart3_div : crate :: Reg < r8_uart3_div :: R8_UART3_DIV_SPEC > , } # [doc = "R8_UART3_MCR register accessor: an alias for `Reg<R8_UART3_MCR_SPEC>`"]
  4411. pub type R8_UART3_MCR = crate :: Reg < r8_uart3_mcr :: R8_UART3_MCR_SPEC > ; # [doc = "UART3 modem control"]
  4412. pub mod r8_uart3_mcr { # [doc = "Register `R8_UART3_MCR` reader"]
  4413. pub struct R (crate :: R < R8_UART3_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_MCR_SPEC > ; # [inline (always)]
  4414. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_MCR_SPEC >> for R { # [inline (always)]
  4415. fn from (reader : crate :: R < R8_UART3_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_MCR` writer"]
  4416. pub struct W (crate :: W < R8_UART3_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_MCR_SPEC > ; # [inline (always)]
  4417. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4418. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_MCR_SPEC >> for W { # [inline (always)]
  4419. fn from (writer : crate :: W < R8_UART3_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
  4420. pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4421. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
  4422. pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
  4423. # [inline (always)]
  4424. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4425. # [inline (always)]
  4426. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4427. # [inline (always)]
  4428. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART control OUT2"]
  4429. # [inline (always)]
  4430. pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART control OUT2"]
  4431. # [inline (always)]
  4432. pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
  4433. # [inline (always)]
  4434. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_mcr](index.html) module"]
  4435. pub struct R8_UART3_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_mcr::R](R) reader structure"]
  4436. impl crate :: Readable for R8_UART3_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_mcr::W](W) writer structure"]
  4437. impl crate :: Writable for R8_UART3_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_MCR to value 0"]
  4438. impl crate :: Resettable for R8_UART3_MCR_SPEC { # [inline (always)]
  4439. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_IER register accessor: an alias for `Reg<R8_UART3_IER_SPEC>`"]
  4440. pub type R8_UART3_IER = crate :: Reg < r8_uart3_ier :: R8_UART3_IER_SPEC > ; # [doc = "UART3 interrupt enable"]
  4441. pub mod r8_uart3_ier { # [doc = "Register `R8_UART3_IER` reader"]
  4442. pub struct R (crate :: R < R8_UART3_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_IER_SPEC > ; # [inline (always)]
  4443. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_IER_SPEC >> for R { # [inline (always)]
  4444. fn from (reader : crate :: R < R8_UART3_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_IER` writer"]
  4445. pub struct W (crate :: W < R8_UART3_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_IER_SPEC > ; # [inline (always)]
  4446. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4447. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_IER_SPEC >> for W { # [inline (always)]
  4448. fn from (writer : crate :: W < R8_UART3_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
  4449. pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4450. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
  4451. pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
  4452. # [inline (always)]
  4453. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4454. # [inline (always)]
  4455. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4456. # [inline (always)]
  4457. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
  4458. pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4459. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
  4460. pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
  4461. # [inline (always)]
  4462. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4463. # [inline (always)]
  4464. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4465. # [inline (always)]
  4466. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
  4467. pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4468. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
  4469. pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
  4470. # [inline (always)]
  4471. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4472. # [inline (always)]
  4473. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4474. # [inline (always)]
  4475. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
  4476. pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4477. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
  4478. pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4479. # [inline (always)]
  4480. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4481. # [inline (always)]
  4482. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4483. # [inline (always)]
  4484. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
  4485. pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4486. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
  4487. pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  4488. # [inline (always)]
  4489. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4490. # [inline (always)]
  4491. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4492. # [inline (always)]
  4493. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  4494. # [inline (always)]
  4495. pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  4496. # [inline (always)]
  4497. pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  4498. # [inline (always)]
  4499. pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
  4500. # [inline (always)]
  4501. pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  4502. # [inline (always)]
  4503. pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
  4504. # [inline (always)]
  4505. pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
  4506. # [inline (always)]
  4507. pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
  4508. # [inline (always)]
  4509. pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
  4510. # [inline (always)]
  4511. pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
  4512. # [inline (always)]
  4513. pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  4514. # [inline (always)]
  4515. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_ier](index.html) module"]
  4516. pub struct R8_UART3_IER_SPEC ; impl crate :: RegisterSpec for R8_UART3_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_ier::R](R) reader structure"]
  4517. impl crate :: Readable for R8_UART3_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_ier::W](W) writer structure"]
  4518. impl crate :: Writable for R8_UART3_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_IER to value 0"]
  4519. impl crate :: Resettable for R8_UART3_IER_SPEC { # [inline (always)]
  4520. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_FCR register accessor: an alias for `Reg<R8_UART3_FCR_SPEC>`"]
  4521. pub type R8_UART3_FCR = crate :: Reg < r8_uart3_fcr :: R8_UART3_FCR_SPEC > ; # [doc = "UART3 FIFO control"]
  4522. pub mod r8_uart3_fcr { # [doc = "Register `R8_UART3_FCR` reader"]
  4523. pub struct R (crate :: R < R8_UART3_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_FCR_SPEC > ; # [inline (always)]
  4524. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_FCR_SPEC >> for R { # [inline (always)]
  4525. fn from (reader : crate :: R < R8_UART3_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_FCR` writer"]
  4526. pub struct W (crate :: W < R8_UART3_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_FCR_SPEC > ; # [inline (always)]
  4527. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4528. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_FCR_SPEC >> for W { # [inline (always)]
  4529. fn from (writer : crate :: W < R8_UART3_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
  4530. pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4531. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
  4532. pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4533. # [inline (always)]
  4534. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4535. # [inline (always)]
  4536. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4537. # [inline (always)]
  4538. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
  4539. pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4540. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
  4541. pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  4542. # [inline (always)]
  4543. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4544. # [inline (always)]
  4545. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4546. # [inline (always)]
  4547. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
  4548. pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4549. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
  4550. pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  4551. # [inline (always)]
  4552. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4553. # [inline (always)]
  4554. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4555. # [inline (always)]
  4556. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
  4557. pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4558. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
  4559. pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4560. # [inline (always)]
  4561. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
  4562. # [inline (always)]
  4563. pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  4564. # [inline (always)]
  4565. pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  4566. # [inline (always)]
  4567. pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  4568. # [inline (always)]
  4569. pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
  4570. # [inline (always)]
  4571. pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
  4572. # [inline (always)]
  4573. pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
  4574. # [inline (always)]
  4575. pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
  4576. # [inline (always)]
  4577. pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
  4578. # [inline (always)]
  4579. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_fcr](index.html) module"]
  4580. pub struct R8_UART3_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_fcr::R](R) reader structure"]
  4581. impl crate :: Readable for R8_UART3_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_fcr::W](W) writer structure"]
  4582. impl crate :: Writable for R8_UART3_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_FCR to value 0"]
  4583. impl crate :: Resettable for R8_UART3_FCR_SPEC { # [inline (always)]
  4584. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_LCR register accessor: an alias for `Reg<R8_UART3_LCR_SPEC>`"]
  4585. pub type R8_UART3_LCR = crate :: Reg < r8_uart3_lcr :: R8_UART3_LCR_SPEC > ; # [doc = "UART3 line control"]
  4586. pub mod r8_uart3_lcr { # [doc = "Register `R8_UART3_LCR` reader"]
  4587. pub struct R (crate :: R < R8_UART3_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_LCR_SPEC > ; # [inline (always)]
  4588. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_LCR_SPEC >> for R { # [inline (always)]
  4589. fn from (reader : crate :: R < R8_UART3_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_LCR` writer"]
  4590. pub struct W (crate :: W < R8_UART3_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_LCR_SPEC > ; # [inline (always)]
  4591. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4592. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_LCR_SPEC >> for W { # [inline (always)]
  4593. fn from (writer : crate :: W < R8_UART3_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
  4594. pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4595. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
  4596. pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4597. # [inline (always)]
  4598. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
  4599. pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4600. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
  4601. pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  4602. # [inline (always)]
  4603. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4604. # [inline (always)]
  4605. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4606. # [inline (always)]
  4607. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
  4608. pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4609. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
  4610. pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4611. # [inline (always)]
  4612. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4613. # [inline (always)]
  4614. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4615. # [inline (always)]
  4616. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
  4617. pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4618. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
  4619. pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4620. # [inline (always)]
  4621. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
  4622. pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4623. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
  4624. pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
  4625. # [inline (always)]
  4626. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4627. # [inline (always)]
  4628. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4629. # [inline (always)]
  4630. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit and UART general purpose bit"]
  4631. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4632. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit and UART general purpose bit"]
  4633. pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
  4634. # [inline (always)]
  4635. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4636. # [inline (always)]
  4637. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4638. # [inline (always)]
  4639. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
  4640. # [inline (always)]
  4641. pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
  4642. # [inline (always)]
  4643. pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
  4644. # [inline (always)]
  4645. pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
  4646. # [inline (always)]
  4647. pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
  4648. # [inline (always)]
  4649. pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit and UART general purpose bit"]
  4650. # [inline (always)]
  4651. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
  4652. # [inline (always)]
  4653. pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
  4654. # [inline (always)]
  4655. pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
  4656. # [inline (always)]
  4657. pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
  4658. # [inline (always)]
  4659. pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
  4660. # [inline (always)]
  4661. pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit and UART general purpose bit"]
  4662. # [inline (always)]
  4663. pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
  4664. # [inline (always)]
  4665. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_lcr](index.html) module"]
  4666. pub struct R8_UART3_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_lcr::R](R) reader structure"]
  4667. impl crate :: Readable for R8_UART3_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_lcr::W](W) writer structure"]
  4668. impl crate :: Writable for R8_UART3_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_LCR to value 0"]
  4669. impl crate :: Resettable for R8_UART3_LCR_SPEC { # [inline (always)]
  4670. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_IIR register accessor: an alias for `Reg<R8_UART3_IIR_SPEC>`"]
  4671. pub type R8_UART3_IIR = crate :: Reg < r8_uart3_iir :: R8_UART3_IIR_SPEC > ; # [doc = "UART3 interrupt identification"]
  4672. pub mod r8_uart3_iir { # [doc = "Register `R8_UART3_IIR` reader"]
  4673. pub struct R (crate :: R < R8_UART3_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_IIR_SPEC > ; # [inline (always)]
  4674. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_IIR_SPEC >> for R { # [inline (always)]
  4675. fn from (reader : crate :: R < R8_UART3_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
  4676. pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4677. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
  4678. pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4679. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
  4680. pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4681. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
  4682. # [inline (always)]
  4683. pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
  4684. # [inline (always)]
  4685. pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
  4686. # [inline (always)]
  4687. pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART3 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_iir](index.html) module"]
  4688. pub struct R8_UART3_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART3_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_iir::R](R) reader structure"]
  4689. impl crate :: Readable for R8_UART3_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_IIR to value 0x01"]
  4690. impl crate :: Resettable for R8_UART3_IIR_SPEC { # [inline (always)]
  4691. fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART3_LSR register accessor: an alias for `Reg<R8_UART3_LSR_SPEC>`"]
  4692. pub type R8_UART3_LSR = crate :: Reg < r8_uart3_lsr :: R8_UART3_LSR_SPEC > ; # [doc = "UART3 line status"]
  4693. pub mod r8_uart3_lsr { # [doc = "Register `R8_UART3_LSR` reader"]
  4694. pub struct R (crate :: R < R8_UART3_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_LSR_SPEC > ; # [inline (always)]
  4695. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_LSR_SPEC >> for R { # [inline (always)]
  4696. fn from (reader : crate :: R < R8_UART3_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
  4697. pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4698. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
  4699. pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4700. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
  4701. pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4702. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
  4703. pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4704. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
  4705. pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4706. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
  4707. pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4708. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
  4709. pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4710. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
  4711. pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4712. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
  4713. # [inline (always)]
  4714. pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
  4715. # [inline (always)]
  4716. pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
  4717. # [inline (always)]
  4718. pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
  4719. # [inline (always)]
  4720. pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
  4721. # [inline (always)]
  4722. pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
  4723. # [inline (always)]
  4724. pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
  4725. # [inline (always)]
  4726. pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
  4727. # [inline (always)]
  4728. pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART3 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_lsr](index.html) module"]
  4729. pub struct R8_UART3_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART3_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_lsr::R](R) reader structure"]
  4730. impl crate :: Readable for R8_UART3_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_LSR to value 0xc0"]
  4731. impl crate :: Resettable for R8_UART3_LSR_SPEC { # [inline (always)]
  4732. fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART3_RBR_R8_UART3_THR register accessor: an alias for `Reg<R8_UART3_RBR_R8_UART3_THR_SPEC>`"]
  4733. pub type R8_UART3_RBR_R8_UART3_THR = crate :: Reg < r8_uart3_rbr_r8_uart3_thr :: R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [doc = "UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte"]
  4734. pub mod r8_uart3_rbr_r8_uart3_thr { # [doc = "Register `R8_UART3_RBR_R8_UART3_THR` reader"]
  4735. pub struct R (crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [inline (always)]
  4736. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >> for R { # [inline (always)]
  4737. fn from (reader : crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_RBR_R8_UART3_THR` writer"]
  4738. pub struct W (crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [inline (always)]
  4739. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4740. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >> for W { # [inline (always)]
  4741. fn from (writer : crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART3_RBR_R8_UART3_THR` reader - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
  4742. pub struct R8_UART3_RBR_R8_UART3_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_RBR_R8_UART3_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_RBR_R8_UART3_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_RBR_R8_UART3_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4743. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART3_RBR_R8_UART3_THR` writer - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
  4744. pub struct R8_UART3_RBR_R8_UART3_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART3_RBR_R8_UART3_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4745. # [inline (always)]
  4746. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
  4747. # [inline (always)]
  4748. pub fn r8_uart3_rbr_r8_uart3_thr (& self) -> R8_UART3_RBR_R8_UART3_THR_R { R8_UART3_RBR_R8_UART3_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
  4749. # [inline (always)]
  4750. pub fn r8_uart3_rbr_r8_uart3_thr (& mut self) -> R8_UART3_RBR_R8_UART3_THR_W { R8_UART3_RBR_R8_UART3_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
  4751. # [inline (always)]
  4752. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_rbr_r8_uart3_thr](index.html) module"]
  4753. pub struct R8_UART3_RBR_R8_UART3_THR_SPEC ; impl crate :: RegisterSpec for R8_UART3_RBR_R8_UART3_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_rbr_r8_uart3_thr::R](R) reader structure"]
  4754. impl crate :: Readable for R8_UART3_RBR_R8_UART3_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_rbr_r8_uart3_thr::W](W) writer structure"]
  4755. impl crate :: Writable for R8_UART3_RBR_R8_UART3_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_RBR_R8_UART3_THR to value 0"]
  4756. impl crate :: Resettable for R8_UART3_RBR_R8_UART3_THR_SPEC { # [inline (always)]
  4757. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_RFC register accessor: an alias for `Reg<R8_UART3_RFC_SPEC>`"]
  4758. pub type R8_UART3_RFC = crate :: Reg < r8_uart3_rfc :: R8_UART3_RFC_SPEC > ; # [doc = "UART3 receiver FIFO count"]
  4759. pub mod r8_uart3_rfc { # [doc = "Register `R8_UART3_RFC` reader"]
  4760. pub struct R (crate :: R < R8_UART3_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_RFC_SPEC > ; # [inline (always)]
  4761. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_RFC_SPEC >> for R { # [inline (always)]
  4762. fn from (reader : crate :: R < R8_UART3_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART3_RFC` reader - UART receiver FIFO count"]
  4763. pub struct R8_UART3_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4764. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
  4765. # [inline (always)]
  4766. pub fn r8_uart3_rfc (& self) -> R8_UART3_RFC_R { R8_UART3_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART3 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_rfc](index.html) module"]
  4767. pub struct R8_UART3_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART3_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_rfc::R](R) reader structure"]
  4768. impl crate :: Readable for R8_UART3_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_RFC to value 0"]
  4769. impl crate :: Resettable for R8_UART3_RFC_SPEC { # [inline (always)]
  4770. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_TFC register accessor: an alias for `Reg<R8_UART3_TFC_SPEC>`"]
  4771. pub type R8_UART3_TFC = crate :: Reg < r8_uart3_tfc :: R8_UART3_TFC_SPEC > ; # [doc = "UART3 transmitter FIFO count"]
  4772. pub mod r8_uart3_tfc { # [doc = "Register `R8_UART3_TFC` reader"]
  4773. pub struct R (crate :: R < R8_UART3_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_TFC_SPEC > ; # [inline (always)]
  4774. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_TFC_SPEC >> for R { # [inline (always)]
  4775. fn from (reader : crate :: R < R8_UART3_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART3_TFC` reader - UART transmitter FIFO count"]
  4776. pub struct R8_UART3_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4777. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
  4778. # [inline (always)]
  4779. pub fn r8_uart3_tfc (& self) -> R8_UART3_TFC_R { R8_UART3_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART3 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_tfc](index.html) module"]
  4780. pub struct R8_UART3_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART3_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_tfc::R](R) reader structure"]
  4781. impl crate :: Readable for R8_UART3_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_TFC to value 0"]
  4782. impl crate :: Resettable for R8_UART3_TFC_SPEC { # [inline (always)]
  4783. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART3_DL register accessor: an alias for `Reg<R16_UART3_DL_SPEC>`"]
  4784. pub type R16_UART3_DL = crate :: Reg < r16_uart3_dl :: R16_UART3_DL_SPEC > ; # [doc = "UART3 divisor latch"]
  4785. pub mod r16_uart3_dl { # [doc = "Register `R16_UART3_DL` reader"]
  4786. pub struct R (crate :: R < R16_UART3_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART3_DL_SPEC > ; # [inline (always)]
  4787. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART3_DL_SPEC >> for R { # [inline (always)]
  4788. fn from (reader : crate :: R < R16_UART3_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART3_DL` writer"]
  4789. pub struct W (crate :: W < R16_UART3_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART3_DL_SPEC > ; # [inline (always)]
  4790. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4791. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART3_DL_SPEC >> for W { # [inline (always)]
  4792. fn from (writer : crate :: W < R16_UART3_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART3_DL` reader - UART divisor latch"]
  4793. pub struct R16_UART3_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART3_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART3_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART3_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  4794. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART3_DL` writer - UART divisor latch"]
  4795. pub struct R16_UART3_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART3_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4796. # [inline (always)]
  4797. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
  4798. # [inline (always)]
  4799. pub fn r16_uart3_dl (& self) -> R16_UART3_DL_R { R16_UART3_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
  4800. # [inline (always)]
  4801. pub fn r16_uart3_dl (& mut self) -> R16_UART3_DL_W { R16_UART3_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
  4802. # [inline (always)]
  4803. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart3_dl](index.html) module"]
  4804. pub struct R16_UART3_DL_SPEC ; impl crate :: RegisterSpec for R16_UART3_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart3_dl::R](R) reader structure"]
  4805. impl crate :: Readable for R16_UART3_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart3_dl::W](W) writer structure"]
  4806. impl crate :: Writable for R16_UART3_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART3_DL to value 0"]
  4807. impl crate :: Resettable for R16_UART3_DL_SPEC { # [inline (always)]
  4808. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_DIV register accessor: an alias for `Reg<R8_UART3_DIV_SPEC>`"]
  4809. pub type R8_UART3_DIV = crate :: Reg < r8_uart3_div :: R8_UART3_DIV_SPEC > ; # [doc = "UART3 pre-divisor latch byte"]
  4810. pub mod r8_uart3_div { # [doc = "Register `R8_UART3_DIV` reader"]
  4811. pub struct R (crate :: R < R8_UART3_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_DIV_SPEC > ; # [inline (always)]
  4812. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_DIV_SPEC >> for R { # [inline (always)]
  4813. fn from (reader : crate :: R < R8_UART3_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_DIV` writer"]
  4814. pub struct W (crate :: W < R8_UART3_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_DIV_SPEC > ; # [inline (always)]
  4815. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4816. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_DIV_SPEC >> for W { # [inline (always)]
  4817. fn from (writer : crate :: W < R8_UART3_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART3_DIV` reader - UART pre-divisor latch byte"]
  4818. pub struct R8_UART3_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  4819. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART3_DIV` writer - UART pre-divisor latch byte"]
  4820. pub struct R8_UART3_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART3_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  4821. # [inline (always)]
  4822. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  4823. # [inline (always)]
  4824. pub fn r8_uart3_div (& self) -> R8_UART3_DIV_R { R8_UART3_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
  4825. # [inline (always)]
  4826. pub fn r8_uart3_div (& mut self) -> R8_UART3_DIV_W { R8_UART3_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
  4827. # [inline (always)]
  4828. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_div](index.html) module"]
  4829. pub struct R8_UART3_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART3_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_div::R](R) reader structure"]
  4830. impl crate :: Readable for R8_UART3_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_div::W](W) writer structure"]
  4831. impl crate :: Writable for R8_UART3_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_DIV to value 0"]
  4832. impl crate :: Resettable for R8_UART3_DIV_SPEC { # [inline (always)]
  4833. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "SPI0 register"]
  4834. pub struct SPI0 { _marker : PhantomData < * const () > } unsafe impl Send for SPI0 { } impl SPI0 { # [doc = r"Pointer to the register block"]
  4835. pub const PTR : * const spi0 :: RegisterBlock = 0x4000_4000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  4836. # [inline (always)]
  4837. pub const fn ptr () -> * const spi0 :: RegisterBlock { Self :: PTR } } impl Deref for SPI0 { type Target = spi0 :: RegisterBlock ; # [inline (always)]
  4838. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SPI0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SPI0") . finish () } } # [doc = "SPI0 register"]
  4839. pub mod spi0 { # [doc = r"Register block"]
  4840. # [repr (C)]
  4841. pub struct RegisterBlock { # [doc = "0x00 - SPI0 mode control"]
  4842. pub r8_spi0_ctrl_mod : crate :: Reg < r8_spi0_ctrl_mod :: R8_SPI0_CTRL_MOD_SPEC > , # [doc = "0x01 - SPI0 configuration control"]
  4843. pub r8_spi0_ctrl_cfg : crate :: Reg < r8_spi0_ctrl_cfg :: R8_SPI0_CTRL_CFG_SPEC > , # [doc = "0x02 - SPI0 interrupt enable"]
  4844. pub r8_spi0_inter_en : crate :: Reg < r8_spi0_inter_en :: R8_SPI0_INTER_EN_SPEC > , # [doc = "0x03 - SPI0 master clock divisor_ SPI0 slave preset value"]
  4845. pub r8_spi0_clock_div_r8_spi0_slave_pre : crate :: Reg < r8_spi0_clock_div_r8_spi0_slave_pre :: R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > , # [doc = "0x04 - SPI0 data buffer"]
  4846. pub r8_spi0_buffer : crate :: Reg < r8_spi0_buffer :: R8_SPI0_BUFFER_SPEC > , # [doc = "0x05 - SPI0 work flag"]
  4847. pub r8_spi0_run_flag : crate :: Reg < r8_spi0_run_flag :: R8_SPI0_RUN_FLAG_SPEC > , # [doc = "0x06 - SPI0 interrupt flag"]
  4848. pub r8_spi0_int_flag : crate :: Reg < r8_spi0_int_flag :: R8_SPI0_INT_FLAG_SPEC > , # [doc = "0x07 - SPI0 FIFO count status"]
  4849. pub r8_spi0_fifo_count : crate :: Reg < r8_spi0_fifo_count :: R8_SPI0_FIFO_COUNT_SPEC > , _reserved8 : [u8 ; 0x04]
  4850. , # [doc = "0x0c - SPI0 total byte count, only low 12 bit"]
  4851. pub r16_spi0_total_cnt : crate :: Reg < r16_spi0_total_cnt :: R16_SPI0_TOTAL_CNT_SPEC > , _reserved9 : [u8 ; 0x02]
  4852. , # [doc = "0x10 - SPI0 FIFO register"]
  4853. pub r8_spi0_fifo : crate :: Reg < r8_spi0_fifo :: R8_SPI0_FIFO_SPEC > , _reserved10 : [u8 ; 0x02]
  4854. , # [doc = "0x13 - SPI0 FIFO count status"]
  4855. pub r8_spi0_fifo_count1 : crate :: Reg < r8_spi0_fifo_count1 :: R8_SPI0_FIFO_COUNT1_SPEC > , # [doc = "0x14 - SPI0 DMA current address"]
  4856. pub r32_spi0_dma_now : crate :: Reg < r32_spi0_dma_now :: R32_SPI0_DMA_NOW_SPEC > , # [doc = "0x18 - SPI0 DMA begin address"]
  4857. pub r32_spi0_dma_beg : crate :: Reg < r32_spi0_dma_beg :: R32_SPI0_DMA_BEG_SPEC > , # [doc = "0x1c - SPI0 DMA end address"]
  4858. pub r32_spi0_dma_end : crate :: Reg < r32_spi0_dma_end :: R32_SPI0_DMA_END_SPEC > , } # [doc = "R8_SPI0_CTRL_MOD register accessor: an alias for `Reg<R8_SPI0_CTRL_MOD_SPEC>`"]
  4859. pub type R8_SPI0_CTRL_MOD = crate :: Reg < r8_spi0_ctrl_mod :: R8_SPI0_CTRL_MOD_SPEC > ; # [doc = "SPI0 mode control"]
  4860. pub mod r8_spi0_ctrl_mod { # [doc = "Register `R8_SPI0_CTRL_MOD` reader"]
  4861. pub struct R (crate :: R < R8_SPI0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CTRL_MOD_SPEC > ; # [inline (always)]
  4862. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CTRL_MOD_SPEC >> for R { # [inline (always)]
  4863. fn from (reader : crate :: R < R8_SPI0_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CTRL_MOD` writer"]
  4864. pub struct W (crate :: W < R8_SPI0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CTRL_MOD_SPEC > ; # [inline (always)]
  4865. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4866. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CTRL_MOD_SPEC >> for W { # [inline (always)]
  4867. fn from (writer : crate :: W < R8_SPI0_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_MODE_SLAVE` reader - SPI slave mode"]
  4868. pub struct RB_SPI_MODE_SLAVE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MODE_SLAVE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MODE_SLAVE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MODE_SLAVE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4869. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MODE_SLAVE` writer - SPI slave mode"]
  4870. pub struct RB_SPI_MODE_SLAVE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MODE_SLAVE_W < 'a > { # [doc = r"Sets the field bit"]
  4871. # [inline (always)]
  4872. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4873. # [inline (always)]
  4874. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4875. # [inline (always)]
  4876. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_ALL_CLEAR` reader - force clear SPI FIFO and count"]
  4877. pub struct RB_SPI_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4878. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_ALL_CLEAR` writer - force clear SPI FIFO and count"]
  4879. pub struct RB_SPI_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
  4880. # [inline (always)]
  4881. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4882. # [inline (always)]
  4883. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4884. # [inline (always)]
  4885. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_2WIRE_MOD` reader - SPI enable 2 wire mode"]
  4886. pub struct RB_SPI_2WIRE_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_2WIRE_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_2WIRE_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_2WIRE_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4887. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_2WIRE_MOD` writer - SPI enable 2 wire mode"]
  4888. pub struct RB_SPI_2WIRE_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_2WIRE_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  4889. # [inline (always)]
  4890. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4891. # [inline (always)]
  4892. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4893. # [inline (always)]
  4894. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` reader - SPI master clock mode _SPI slave command mode"]
  4895. pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4896. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` writer - SPI master clock mode _SPI slave command mode"]
  4897. pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  4898. # [inline (always)]
  4899. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4900. # [inline (always)]
  4901. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4902. # [inline (always)]
  4903. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_FIFO_DIR` reader - SPI FIFO direction"]
  4904. pub struct RB_SPI_FIFO_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4905. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_DIR` writer - SPI FIFO direction"]
  4906. pub struct RB_SPI_FIFO_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FIFO_DIR_W < 'a > { # [doc = r"Sets the field bit"]
  4907. # [inline (always)]
  4908. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4909. # [inline (always)]
  4910. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4911. # [inline (always)]
  4912. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_SCK_OE` reader - SPI SCK output enable"]
  4913. pub struct RB_SPI_SCK_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SCK_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SCK_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SCK_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4914. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SCK_OE` writer - SPI SCK output enable"]
  4915. pub struct RB_SPI_SCK_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_SCK_OE_W < 'a > { # [doc = r"Sets the field bit"]
  4916. # [inline (always)]
  4917. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4918. # [inline (always)]
  4919. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4920. # [inline (always)]
  4921. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SPI_MOSI_OE` reader - SPI MOSI output enable"]
  4922. pub struct RB_SPI_MOSI_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MOSI_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MOSI_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MOSI_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4923. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MOSI_OE` writer - SPI MOSI output enable"]
  4924. pub struct RB_SPI_MOSI_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MOSI_OE_W < 'a > { # [doc = r"Sets the field bit"]
  4925. # [inline (always)]
  4926. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4927. # [inline (always)]
  4928. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4929. # [inline (always)]
  4930. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_MISO_OE` reader - SPI MISO output enable"]
  4931. pub struct RB_SPI_MISO_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MISO_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MISO_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MISO_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4932. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MISO_OE` writer - SPI MISO output enable"]
  4933. pub struct RB_SPI_MISO_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MISO_OE_W < 'a > { # [doc = r"Sets the field bit"]
  4934. # [inline (always)]
  4935. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4936. # [inline (always)]
  4937. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4938. # [inline (always)]
  4939. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - SPI slave mode"]
  4940. # [inline (always)]
  4941. pub fn rb_spi_mode_slave (& self) -> RB_SPI_MODE_SLAVE_R { RB_SPI_MODE_SLAVE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear SPI FIFO and count"]
  4942. # [inline (always)]
  4943. pub fn rb_spi_all_clear (& self) -> RB_SPI_ALL_CLEAR_R { RB_SPI_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SPI enable 2 wire mode"]
  4944. # [inline (always)]
  4945. pub fn rb_spi_2wire_mod (& self) -> RB_SPI_2WIRE_MOD_R { RB_SPI_2WIRE_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - SPI master clock mode _SPI slave command mode"]
  4946. # [inline (always)]
  4947. pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SPI FIFO direction"]
  4948. # [inline (always)]
  4949. pub fn rb_spi_fifo_dir (& self) -> RB_SPI_FIFO_DIR_R { RB_SPI_FIFO_DIR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI SCK output enable"]
  4950. # [inline (always)]
  4951. pub fn rb_spi_sck_oe (& self) -> RB_SPI_SCK_OE_R { RB_SPI_SCK_OE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI MOSI output enable"]
  4952. # [inline (always)]
  4953. pub fn rb_spi_mosi_oe (& self) -> RB_SPI_MOSI_OE_R { RB_SPI_MOSI_OE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI MISO output enable"]
  4954. # [inline (always)]
  4955. pub fn rb_spi_miso_oe (& self) -> RB_SPI_MISO_OE_R { RB_SPI_MISO_OE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI slave mode"]
  4956. # [inline (always)]
  4957. pub fn rb_spi_mode_slave (& mut self) -> RB_SPI_MODE_SLAVE_W { RB_SPI_MODE_SLAVE_W { w : self } } # [doc = "Bit 1 - force clear SPI FIFO and count"]
  4958. # [inline (always)]
  4959. pub fn rb_spi_all_clear (& mut self) -> RB_SPI_ALL_CLEAR_W { RB_SPI_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - SPI enable 2 wire mode"]
  4960. # [inline (always)]
  4961. pub fn rb_spi_2wire_mod (& mut self) -> RB_SPI_2WIRE_MOD_W { RB_SPI_2WIRE_MOD_W { w : self } } # [doc = "Bit 3 - SPI master clock mode _SPI slave command mode"]
  4962. # [inline (always)]
  4963. pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& mut self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { w : self } } # [doc = "Bit 4 - SPI FIFO direction"]
  4964. # [inline (always)]
  4965. pub fn rb_spi_fifo_dir (& mut self) -> RB_SPI_FIFO_DIR_W { RB_SPI_FIFO_DIR_W { w : self } } # [doc = "Bit 5 - SPI SCK output enable"]
  4966. # [inline (always)]
  4967. pub fn rb_spi_sck_oe (& mut self) -> RB_SPI_SCK_OE_W { RB_SPI_SCK_OE_W { w : self } } # [doc = "Bit 6 - SPI MOSI output enable"]
  4968. # [inline (always)]
  4969. pub fn rb_spi_mosi_oe (& mut self) -> RB_SPI_MOSI_OE_W { RB_SPI_MOSI_OE_W { w : self } } # [doc = "Bit 7 - SPI MISO output enable"]
  4970. # [inline (always)]
  4971. pub fn rb_spi_miso_oe (& mut self) -> RB_SPI_MISO_OE_W { RB_SPI_MISO_OE_W { w : self } } # [doc = "Writes raw bits to the register."]
  4972. # [inline (always)]
  4973. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_ctrl_mod](index.html) module"]
  4974. pub struct R8_SPI0_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_ctrl_mod::R](R) reader structure"]
  4975. impl crate :: Readable for R8_SPI0_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_ctrl_mod::W](W) writer structure"]
  4976. impl crate :: Writable for R8_SPI0_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CTRL_MOD to value 0x02"]
  4977. impl crate :: Resettable for R8_SPI0_CTRL_MOD_SPEC { # [inline (always)]
  4978. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_SPI0_CTRL_CFG register accessor: an alias for `Reg<R8_SPI0_CTRL_CFG_SPEC>`"]
  4979. pub type R8_SPI0_CTRL_CFG = crate :: Reg < r8_spi0_ctrl_cfg :: R8_SPI0_CTRL_CFG_SPEC > ; # [doc = "SPI0 configuration control"]
  4980. pub mod r8_spi0_ctrl_cfg { # [doc = "Register `R8_SPI0_CTRL_CFG` reader"]
  4981. pub struct R (crate :: R < R8_SPI0_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CTRL_CFG_SPEC > ; # [inline (always)]
  4982. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CTRL_CFG_SPEC >> for R { # [inline (always)]
  4983. fn from (reader : crate :: R < R8_SPI0_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CTRL_CFG` writer"]
  4984. pub struct W (crate :: W < R8_SPI0_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CTRL_CFG_SPEC > ; # [inline (always)]
  4985. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  4986. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CTRL_CFG_SPEC >> for W { # [inline (always)]
  4987. fn from (writer : crate :: W < R8_SPI0_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_DMA_ENABLE` reader - SPI DMA enable"]
  4988. pub struct RB_SPI_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4989. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_ENABLE` writer - SPI DMA enable"]
  4990. pub struct RB_SPI_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  4991. # [inline (always)]
  4992. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  4993. # [inline (always)]
  4994. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  4995. # [inline (always)]
  4996. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_DMA_LOOP` reader - SPI DMA address loop enable"]
  4997. pub struct RB_SPI_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  4998. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_LOOP` writer - SPI DMA address loop enable"]
  4999. pub struct RB_SPI_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
  5000. # [inline (always)]
  5001. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5002. # [inline (always)]
  5003. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5004. # [inline (always)]
  5005. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_AUTO_IF` reader - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5006. pub struct RB_SPI_AUTO_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_AUTO_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_AUTO_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_AUTO_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5007. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_AUTO_IF` writer - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5008. pub struct RB_SPI_AUTO_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_AUTO_IF_W < 'a > { # [doc = r"Sets the field bit"]
  5009. # [inline (always)]
  5010. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5011. # [inline (always)]
  5012. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5013. # [inline (always)]
  5014. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_BIT_ORDER` reader - SPI bit data order"]
  5015. pub struct RB_SPI_BIT_ORDER_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_BIT_ORDER_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_BIT_ORDER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_BIT_ORDER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5016. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_BIT_ORDER` writer - SPI bit data order"]
  5017. pub struct RB_SPI_BIT_ORDER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_BIT_ORDER_W < 'a > { # [doc = r"Sets the field bit"]
  5018. # [inline (always)]
  5019. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5020. # [inline (always)]
  5021. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5022. # [inline (always)]
  5023. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - SPI DMA enable"]
  5024. # [inline (always)]
  5025. pub fn rb_spi_dma_enable (& self) -> RB_SPI_DMA_ENABLE_R { RB_SPI_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - SPI DMA address loop enable"]
  5026. # [inline (always)]
  5027. pub fn rb_spi_dma_loop (& self) -> RB_SPI_DMA_LOOP_R { RB_SPI_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5028. # [inline (always)]
  5029. pub fn rb_spi_auto_if (& self) -> RB_SPI_AUTO_IF_R { RB_SPI_AUTO_IF_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI bit data order"]
  5030. # [inline (always)]
  5031. pub fn rb_spi_bit_order (& self) -> RB_SPI_BIT_ORDER_R { RB_SPI_BIT_ORDER_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI DMA enable"]
  5032. # [inline (always)]
  5033. pub fn rb_spi_dma_enable (& mut self) -> RB_SPI_DMA_ENABLE_W { RB_SPI_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - SPI DMA address loop enable"]
  5034. # [inline (always)]
  5035. pub fn rb_spi_dma_loop (& mut self) -> RB_SPI_DMA_LOOP_W { RB_SPI_DMA_LOOP_W { w : self } } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5036. # [inline (always)]
  5037. pub fn rb_spi_auto_if (& mut self) -> RB_SPI_AUTO_IF_W { RB_SPI_AUTO_IF_W { w : self } } # [doc = "Bit 5 - SPI bit data order"]
  5038. # [inline (always)]
  5039. pub fn rb_spi_bit_order (& mut self) -> RB_SPI_BIT_ORDER_W { RB_SPI_BIT_ORDER_W { w : self } } # [doc = "Writes raw bits to the register."]
  5040. # [inline (always)]
  5041. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_ctrl_cfg](index.html) module"]
  5042. pub struct R8_SPI0_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_ctrl_cfg::R](R) reader structure"]
  5043. impl crate :: Readable for R8_SPI0_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_ctrl_cfg::W](W) writer structure"]
  5044. impl crate :: Writable for R8_SPI0_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CTRL_CFG to value 0"]
  5045. impl crate :: Resettable for R8_SPI0_CTRL_CFG_SPEC { # [inline (always)]
  5046. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_INTER_EN register accessor: an alias for `Reg<R8_SPI0_INTER_EN_SPEC>`"]
  5047. pub type R8_SPI0_INTER_EN = crate :: Reg < r8_spi0_inter_en :: R8_SPI0_INTER_EN_SPEC > ; # [doc = "SPI0 interrupt enable"]
  5048. pub mod r8_spi0_inter_en { # [doc = "Register `R8_SPI0_INTER_EN` reader"]
  5049. pub struct R (crate :: R < R8_SPI0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_INTER_EN_SPEC > ; # [inline (always)]
  5050. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_INTER_EN_SPEC >> for R { # [inline (always)]
  5051. fn from (reader : crate :: R < R8_SPI0_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_INTER_EN` writer"]
  5052. pub struct W (crate :: W < R8_SPI0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_INTER_EN_SPEC > ; # [inline (always)]
  5053. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5054. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_INTER_EN_SPEC >> for W { # [inline (always)]
  5055. fn from (writer : crate :: W < R8_SPI0_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IE_CNT_END` reader - enable interrupt for SPI total byte count end"]
  5056. pub struct RB_SPI_IE_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5057. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_CNT_END` writer - enable interrupt for SPI total byte count end"]
  5058. pub struct RB_SPI_IE_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
  5059. # [inline (always)]
  5060. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5061. # [inline (always)]
  5062. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5063. # [inline (always)]
  5064. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IE_BYTE_END` reader - enable interrupt for SPI byte exchanged"]
  5065. pub struct RB_SPI_IE_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5066. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_BYTE_END` writer - enable interrupt for SPI byte exchanged"]
  5067. pub struct RB_SPI_IE_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
  5068. # [inline (always)]
  5069. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5070. # [inline (always)]
  5071. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5072. # [inline (always)]
  5073. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_HF` reader - enable interrupt for SPI FIFO half"]
  5074. pub struct RB_SPI_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5075. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_HF` writer - enable interrupt for SPI FIFO half"]
  5076. pub struct RB_SPI_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  5077. # [inline (always)]
  5078. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5079. # [inline (always)]
  5080. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5081. # [inline (always)]
  5082. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IE_DMA_END` reader - enable interrupt for SPI DMA completion"]
  5083. pub struct RB_SPI_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5084. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_DMA_END` writer - enable interrupt for SPI DMA completion"]
  5085. pub struct RB_SPI_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  5086. # [inline (always)]
  5087. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5088. # [inline (always)]
  5089. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5090. # [inline (always)]
  5091. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_OV` reader - enable interrupt for SPI FIFO overflow"]
  5092. pub struct RB_SPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5093. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_OV` writer - enable interrupt for SPI FIFO overflow"]
  5094. pub struct RB_SPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  5095. # [inline (always)]
  5096. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5097. # [inline (always)]
  5098. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5099. # [inline (always)]
  5100. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_IE_FST_BYTE` reader - enable interrupt for SPI slave mode first byte received"]
  5101. pub struct RB_SPI_IE_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5102. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FST_BYTE` writer - enable interrupt for SPI slave mode first byte received"]
  5103. pub struct RB_SPI_IE_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
  5104. # [inline (always)]
  5105. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5106. # [inline (always)]
  5107. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5108. # [inline (always)]
  5109. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
  5110. # [inline (always)]
  5111. pub fn rb_spi_ie_cnt_end (& self) -> RB_SPI_IE_CNT_END_R { RB_SPI_IE_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
  5112. # [inline (always)]
  5113. pub fn rb_spi_ie_byte_end (& self) -> RB_SPI_IE_BYTE_END_R { RB_SPI_IE_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
  5114. # [inline (always)]
  5115. pub fn rb_spi_ie_fifo_hf (& self) -> RB_SPI_IE_FIFO_HF_R { RB_SPI_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
  5116. # [inline (always)]
  5117. pub fn rb_spi_ie_dma_end (& self) -> RB_SPI_IE_DMA_END_R { RB_SPI_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
  5118. # [inline (always)]
  5119. pub fn rb_spi_ie_fifo_ov (& self) -> RB_SPI_IE_FIFO_OV_R { RB_SPI_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
  5120. # [inline (always)]
  5121. pub fn rb_spi_ie_fst_byte (& self) -> RB_SPI_IE_FST_BYTE_R { RB_SPI_IE_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
  5122. # [inline (always)]
  5123. pub fn rb_spi_ie_cnt_end (& mut self) -> RB_SPI_IE_CNT_END_W { RB_SPI_IE_CNT_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
  5124. # [inline (always)]
  5125. pub fn rb_spi_ie_byte_end (& mut self) -> RB_SPI_IE_BYTE_END_W { RB_SPI_IE_BYTE_END_W { w : self } } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
  5126. # [inline (always)]
  5127. pub fn rb_spi_ie_fifo_hf (& mut self) -> RB_SPI_IE_FIFO_HF_W { RB_SPI_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
  5128. # [inline (always)]
  5129. pub fn rb_spi_ie_dma_end (& mut self) -> RB_SPI_IE_DMA_END_W { RB_SPI_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
  5130. # [inline (always)]
  5131. pub fn rb_spi_ie_fifo_ov (& mut self) -> RB_SPI_IE_FIFO_OV_W { RB_SPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
  5132. # [inline (always)]
  5133. pub fn rb_spi_ie_fst_byte (& mut self) -> RB_SPI_IE_FST_BYTE_W { RB_SPI_IE_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5134. # [inline (always)]
  5135. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_inter_en](index.html) module"]
  5136. pub struct R8_SPI0_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_SPI0_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_inter_en::R](R) reader structure"]
  5137. impl crate :: Readable for R8_SPI0_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_inter_en::W](W) writer structure"]
  5138. impl crate :: Writable for R8_SPI0_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_INTER_EN to value 0"]
  5139. impl crate :: Resettable for R8_SPI0_INTER_EN_SPEC { # [inline (always)]
  5140. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE register accessor: an alias for `Reg<R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC>`"]
  5141. pub type R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE = crate :: Reg < r8_spi0_clock_div_r8_spi0_slave_pre :: R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [doc = "SPI0 master clock divisor_ SPI0 slave preset value"]
  5142. pub mod r8_spi0_clock_div_r8_spi0_slave_pre { # [doc = "Register `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` reader"]
  5143. pub struct R (crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [inline (always)]
  5144. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >> for R { # [inline (always)]
  5145. fn from (reader : crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` writer"]
  5146. pub struct W (crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [inline (always)]
  5147. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5148. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >> for W { # [inline (always)]
  5149. fn from (writer : crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` reader - master clock divisor _ SPI0 slave preset value"]
  5150. pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5151. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` writer - master clock divisor _ SPI0 slave preset value"]
  5152. pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5153. # [inline (always)]
  5154. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - master clock divisor _ SPI0 slave preset value"]
  5155. # [inline (always)]
  5156. pub fn r8_spi0_clock_div_r8_spi0_slave_pre (& self) -> R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - master clock divisor _ SPI0 slave preset value"]
  5157. # [inline (always)]
  5158. pub fn r8_spi0_clock_div_r8_spi0_slave_pre (& mut self) -> R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5159. # [inline (always)]
  5160. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 master clock divisor_ SPI0 slave preset value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_clock_div_r8_spi0_slave_pre](index.html) module"]
  5161. pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_clock_div_r8_spi0_slave_pre::R](R) reader structure"]
  5162. impl crate :: Readable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_clock_div_r8_spi0_slave_pre::W](W) writer structure"]
  5163. impl crate :: Writable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE to value 0x10"]
  5164. impl crate :: Resettable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { # [inline (always)]
  5165. fn reset_value () -> Self :: Ux { 0x10 } } } # [doc = "R8_SPI0_BUFFER register accessor: an alias for `Reg<R8_SPI0_BUFFER_SPEC>`"]
  5166. pub type R8_SPI0_BUFFER = crate :: Reg < r8_spi0_buffer :: R8_SPI0_BUFFER_SPEC > ; # [doc = "SPI0 data buffer"]
  5167. pub mod r8_spi0_buffer { # [doc = "Register `R8_SPI0_BUFFER` reader"]
  5168. pub struct R (crate :: R < R8_SPI0_BUFFER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_BUFFER_SPEC > ; # [inline (always)]
  5169. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_BUFFER_SPEC >> for R { # [inline (always)]
  5170. fn from (reader : crate :: R < R8_SPI0_BUFFER_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SPI0_BUFFER` reader - SPI data buffer"]
  5171. pub struct R8_SPI0_BUFFER_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_BUFFER_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_BUFFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_BUFFER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5172. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - SPI data buffer"]
  5173. # [inline (always)]
  5174. pub fn r8_spi0_buffer (& self) -> R8_SPI0_BUFFER_R { R8_SPI0_BUFFER_R :: new ((self . bits & 0xff) as u8) } } # [doc = "SPI0 data buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_buffer](index.html) module"]
  5175. pub struct R8_SPI0_BUFFER_SPEC ; impl crate :: RegisterSpec for R8_SPI0_BUFFER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_buffer::R](R) reader structure"]
  5176. impl crate :: Readable for R8_SPI0_BUFFER_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI0_BUFFER to value 0"]
  5177. impl crate :: Resettable for R8_SPI0_BUFFER_SPEC { # [inline (always)]
  5178. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_RUN_FLAG register accessor: an alias for `Reg<R8_SPI0_RUN_FLAG_SPEC>`"]
  5179. pub type R8_SPI0_RUN_FLAG = crate :: Reg < r8_spi0_run_flag :: R8_SPI0_RUN_FLAG_SPEC > ; # [doc = "SPI0 work flag"]
  5180. pub mod r8_spi0_run_flag { # [doc = "Register `R8_SPI0_RUN_FLAG` reader"]
  5181. pub struct R (crate :: R < R8_SPI0_RUN_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_RUN_FLAG_SPEC > ; # [inline (always)]
  5182. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_RUN_FLAG_SPEC >> for R { # [inline (always)]
  5183. fn from (reader : crate :: R < R8_SPI0_RUN_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_SPI_SLV_CMD_ACT` reader - SPI slave command flag"]
  5184. pub struct RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CMD_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CMD_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5185. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_READY` reader - SPI FIFO ready status"]
  5186. pub struct RB_SPI_FIFO_READY_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_READY_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_READY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_READY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5187. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_CS_LOAD` reader - SPI slave chip-select loading status"]
  5188. pub struct RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CS_LOAD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CS_LOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5189. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_SELECT` reader - SPI slave selection status"]
  5190. pub struct RB_SPI_SLV_SELECT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_SELECT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_SELECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_SELECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5191. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 4 - SPI slave command flag"]
  5192. # [inline (always)]
  5193. pub fn rb_spi_slv_cmd_act (& self) -> RB_SPI_SLV_CMD_ACT_R { RB_SPI_SLV_CMD_ACT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI FIFO ready status"]
  5194. # [inline (always)]
  5195. pub fn rb_spi_fifo_ready (& self) -> RB_SPI_FIFO_READY_R { RB_SPI_FIFO_READY_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI slave chip-select loading status"]
  5196. # [inline (always)]
  5197. pub fn rb_spi_slv_cs_load (& self) -> RB_SPI_SLV_CS_LOAD_R { RB_SPI_SLV_CS_LOAD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI slave selection status"]
  5198. # [inline (always)]
  5199. pub fn rb_spi_slv_select (& self) -> RB_SPI_SLV_SELECT_R { RB_SPI_SLV_SELECT_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "SPI0 work flag\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_run_flag](index.html) module"]
  5200. pub struct R8_SPI0_RUN_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_RUN_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_run_flag::R](R) reader structure"]
  5201. impl crate :: Readable for R8_SPI0_RUN_FLAG_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI0_RUN_FLAG to value 0"]
  5202. impl crate :: Resettable for R8_SPI0_RUN_FLAG_SPEC { # [inline (always)]
  5203. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_INT_FLAG register accessor: an alias for `Reg<R8_SPI0_INT_FLAG_SPEC>`"]
  5204. pub type R8_SPI0_INT_FLAG = crate :: Reg < r8_spi0_int_flag :: R8_SPI0_INT_FLAG_SPEC > ; # [doc = "SPI0 interrupt flag"]
  5205. pub mod r8_spi0_int_flag { # [doc = "Register `R8_SPI0_INT_FLAG` reader"]
  5206. pub struct R (crate :: R < R8_SPI0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_INT_FLAG_SPEC > ; # [inline (always)]
  5207. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_INT_FLAG_SPEC >> for R { # [inline (always)]
  5208. fn from (reader : crate :: R < R8_SPI0_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_INT_FLAG` writer"]
  5209. pub struct W (crate :: W < R8_SPI0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_INT_FLAG_SPEC > ; # [inline (always)]
  5210. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5211. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_INT_FLAG_SPEC >> for W { # [inline (always)]
  5212. fn from (writer : crate :: W < R8_SPI0_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IF_CNT_END` reader - interrupt flag for SPI total byte count end"]
  5213. pub struct RB_SPI_IF_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5214. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_CNT_END` writer - interrupt flag for SPI total byte count end"]
  5215. pub struct RB_SPI_IF_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
  5216. # [inline (always)]
  5217. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5218. # [inline (always)]
  5219. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5220. # [inline (always)]
  5221. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IF_BYTE_END` reader - interrupt flag for SPI byte exchanged"]
  5222. pub struct RB_SPI_IF_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5223. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_BYTE_END` writer - interrupt flag for SPI byte exchanged"]
  5224. pub struct RB_SPI_IF_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
  5225. # [inline (always)]
  5226. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5227. # [inline (always)]
  5228. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5229. # [inline (always)]
  5230. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_HF` reader - interrupt flag for SPI FIFO half"]
  5231. pub struct RB_SPI_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5232. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_HF` writer - interrupt flag for SPI FIFO half"]
  5233. pub struct RB_SPI_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  5234. # [inline (always)]
  5235. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5236. # [inline (always)]
  5237. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5238. # [inline (always)]
  5239. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IF_DMA_END` reader - interrupt flag for SPI DMA completion"]
  5240. pub struct RB_SPI_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5241. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_DMA_END` writer - interrupt flag for SPI DMA completion"]
  5242. pub struct RB_SPI_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  5243. # [inline (always)]
  5244. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5245. # [inline (always)]
  5246. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5247. # [inline (always)]
  5248. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_OV` reader - interrupt flag for SPI FIFO overflow"]
  5249. pub struct RB_SPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5250. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_OV` writer - interrupt flag for SPI FIFO overflow"]
  5251. pub struct RB_SPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  5252. # [inline (always)]
  5253. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5254. # [inline (always)]
  5255. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5256. # [inline (always)]
  5257. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_FREE` reader - current SPI free status"]
  5258. pub struct RB_SPI_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5259. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FREE` writer - current SPI free status"]
  5260. pub struct RB_SPI_FREE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FREE_W < 'a > { # [doc = r"Sets the field bit"]
  5261. # [inline (always)]
  5262. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5263. # [inline (always)]
  5264. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5265. # [inline (always)]
  5266. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_IF_FST_BYTE` reader - interrupt flag for SPI slave mode first byte received"]
  5267. pub struct RB_SPI_IF_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5268. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FST_BYTE` writer - interrupt flag for SPI slave mode first byte received"]
  5269. pub struct RB_SPI_IF_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
  5270. # [inline (always)]
  5271. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5272. # [inline (always)]
  5273. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5274. # [inline (always)]
  5275. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
  5276. # [inline (always)]
  5277. pub fn rb_spi_if_cnt_end (& self) -> RB_SPI_IF_CNT_END_R { RB_SPI_IF_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
  5278. # [inline (always)]
  5279. pub fn rb_spi_if_byte_end (& self) -> RB_SPI_IF_BYTE_END_R { RB_SPI_IF_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
  5280. # [inline (always)]
  5281. pub fn rb_spi_if_fifo_hf (& self) -> RB_SPI_IF_FIFO_HF_R { RB_SPI_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
  5282. # [inline (always)]
  5283. pub fn rb_spi_if_dma_end (& self) -> RB_SPI_IF_DMA_END_R { RB_SPI_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
  5284. # [inline (always)]
  5285. pub fn rb_spi_if_fifo_ov (& self) -> RB_SPI_IF_FIFO_OV_R { RB_SPI_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - current SPI free status"]
  5286. # [inline (always)]
  5287. pub fn rb_spi_free (& self) -> RB_SPI_FREE_R { RB_SPI_FREE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
  5288. # [inline (always)]
  5289. pub fn rb_spi_if_fst_byte (& self) -> RB_SPI_IF_FST_BYTE_R { RB_SPI_IF_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
  5290. # [inline (always)]
  5291. pub fn rb_spi_if_cnt_end (& mut self) -> RB_SPI_IF_CNT_END_W { RB_SPI_IF_CNT_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
  5292. # [inline (always)]
  5293. pub fn rb_spi_if_byte_end (& mut self) -> RB_SPI_IF_BYTE_END_W { RB_SPI_IF_BYTE_END_W { w : self } } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
  5294. # [inline (always)]
  5295. pub fn rb_spi_if_fifo_hf (& mut self) -> RB_SPI_IF_FIFO_HF_W { RB_SPI_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
  5296. # [inline (always)]
  5297. pub fn rb_spi_if_dma_end (& mut self) -> RB_SPI_IF_DMA_END_W { RB_SPI_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
  5298. # [inline (always)]
  5299. pub fn rb_spi_if_fifo_ov (& mut self) -> RB_SPI_IF_FIFO_OV_W { RB_SPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 6 - current SPI free status"]
  5300. # [inline (always)]
  5301. pub fn rb_spi_free (& mut self) -> RB_SPI_FREE_W { RB_SPI_FREE_W { w : self } } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
  5302. # [inline (always)]
  5303. pub fn rb_spi_if_fst_byte (& mut self) -> RB_SPI_IF_FST_BYTE_W { RB_SPI_IF_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5304. # [inline (always)]
  5305. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_int_flag](index.html) module"]
  5306. pub struct R8_SPI0_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_int_flag::R](R) reader structure"]
  5307. impl crate :: Readable for R8_SPI0_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_int_flag::W](W) writer structure"]
  5308. impl crate :: Writable for R8_SPI0_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_INT_FLAG to value 0"]
  5309. impl crate :: Resettable for R8_SPI0_INT_FLAG_SPEC { # [inline (always)]
  5310. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO_COUNT register accessor: an alias for `Reg<R8_SPI0_FIFO_COUNT_SPEC>`"]
  5311. pub type R8_SPI0_FIFO_COUNT = crate :: Reg < r8_spi0_fifo_count :: R8_SPI0_FIFO_COUNT_SPEC > ; # [doc = "SPI0 FIFO count status"]
  5312. pub mod r8_spi0_fifo_count { # [doc = "Register `R8_SPI0_FIFO_COUNT` reader"]
  5313. pub struct R (crate :: R < R8_SPI0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_COUNT_SPEC > ; # [inline (always)]
  5314. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_COUNT_SPEC >> for R { # [inline (always)]
  5315. fn from (reader : crate :: R < R8_SPI0_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO_COUNT` writer"]
  5316. pub struct W (crate :: W < R8_SPI0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_COUNT_SPEC > ; # [inline (always)]
  5317. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5318. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_COUNT_SPEC >> for W { # [inline (always)]
  5319. fn from (writer : crate :: W < R8_SPI0_FIFO_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO_COUNT` reader - SPI FIFO count status"]
  5320. pub struct R8_SPI0_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5321. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO_COUNT` writer - SPI FIFO count status"]
  5322. pub struct R8_SPI0_FIFO_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5323. # [inline (always)]
  5324. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count status"]
  5325. # [inline (always)]
  5326. pub fn r8_spi0_fifo_count (& self) -> R8_SPI0_FIFO_COUNT_R { R8_SPI0_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count status"]
  5327. # [inline (always)]
  5328. pub fn r8_spi0_fifo_count (& mut self) -> R8_SPI0_FIFO_COUNT_W { R8_SPI0_FIFO_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  5329. # [inline (always)]
  5330. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo_count](index.html) module"]
  5331. pub struct R8_SPI0_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo_count::R](R) reader structure"]
  5332. impl crate :: Readable for R8_SPI0_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo_count::W](W) writer structure"]
  5333. impl crate :: Writable for R8_SPI0_FIFO_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO_COUNT to value 0"]
  5334. impl crate :: Resettable for R8_SPI0_FIFO_COUNT_SPEC { # [inline (always)]
  5335. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SPI0_TOTAL_CNT register accessor: an alias for `Reg<R16_SPI0_TOTAL_CNT_SPEC>`"]
  5336. pub type R16_SPI0_TOTAL_CNT = crate :: Reg < r16_spi0_total_cnt :: R16_SPI0_TOTAL_CNT_SPEC > ; # [doc = "SPI0 total byte count, only low 12 bit"]
  5337. pub mod r16_spi0_total_cnt { # [doc = "Register `R16_SPI0_TOTAL_CNT` reader"]
  5338. pub struct R (crate :: R < R16_SPI0_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SPI0_TOTAL_CNT_SPEC > ; # [inline (always)]
  5339. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SPI0_TOTAL_CNT_SPEC >> for R { # [inline (always)]
  5340. fn from (reader : crate :: R < R16_SPI0_TOTAL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SPI0_TOTAL_CNT` writer"]
  5341. pub struct W (crate :: W < R16_SPI0_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SPI0_TOTAL_CNT_SPEC > ; # [inline (always)]
  5342. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5343. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SPI0_TOTAL_CNT_SPEC >> for W { # [inline (always)]
  5344. fn from (writer : crate :: W < R16_SPI0_TOTAL_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_TOTAL_CNT` reader - SPI total byte count, only low 12 bit"]
  5345. pub struct R16_SPI0_TOTAL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl R16_SPI0_TOTAL_CNT_R { pub (crate) fn new (bits : u16) -> Self { R16_SPI0_TOTAL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_TOTAL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  5346. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_TOTAL_CNT` writer - SPI total byte count, only low 12 bit"]
  5347. pub struct R16_SPI0_TOTAL_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_TOTAL_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5348. # [inline (always)]
  5349. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
  5350. # [inline (always)]
  5351. pub fn r16_spi0_total_cnt (& self) -> R16_SPI0_TOTAL_CNT_R { R16_SPI0_TOTAL_CNT_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
  5352. # [inline (always)]
  5353. pub fn r16_spi0_total_cnt (& mut self) -> R16_SPI0_TOTAL_CNT_W { R16_SPI0_TOTAL_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  5354. # [inline (always)]
  5355. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 total byte count, only low 12 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_spi0_total_cnt](index.html) module"]
  5356. pub struct R16_SPI0_TOTAL_CNT_SPEC ; impl crate :: RegisterSpec for R16_SPI0_TOTAL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_spi0_total_cnt::R](R) reader structure"]
  5357. impl crate :: Readable for R16_SPI0_TOTAL_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_spi0_total_cnt::W](W) writer structure"]
  5358. impl crate :: Writable for R16_SPI0_TOTAL_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SPI0_TOTAL_CNT to value 0"]
  5359. impl crate :: Resettable for R16_SPI0_TOTAL_CNT_SPEC { # [inline (always)]
  5360. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO register accessor: an alias for `Reg<R8_SPI0_FIFO_SPEC>`"]
  5361. pub type R8_SPI0_FIFO = crate :: Reg < r8_spi0_fifo :: R8_SPI0_FIFO_SPEC > ; # [doc = "SPI0 FIFO register"]
  5362. pub mod r8_spi0_fifo { # [doc = "Register `R8_SPI0_FIFO` reader"]
  5363. pub struct R (crate :: R < R8_SPI0_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_SPEC > ; # [inline (always)]
  5364. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_SPEC >> for R { # [inline (always)]
  5365. fn from (reader : crate :: R < R8_SPI0_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO` writer"]
  5366. pub struct W (crate :: W < R8_SPI0_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_SPEC > ; # [inline (always)]
  5367. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5368. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_SPEC >> for W { # [inline (always)]
  5369. fn from (writer : crate :: W < R8_SPI0_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO` reader - SPI FIFO register"]
  5370. pub struct R8_SPI0_FIFO_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5371. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO` writer - SPI FIFO register"]
  5372. pub struct R8_SPI0_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5373. # [inline (always)]
  5374. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO register"]
  5375. # [inline (always)]
  5376. pub fn r8_spi0_fifo (& self) -> R8_SPI0_FIFO_R { R8_SPI0_FIFO_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO register"]
  5377. # [inline (always)]
  5378. pub fn r8_spi0_fifo (& mut self) -> R8_SPI0_FIFO_W { R8_SPI0_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
  5379. # [inline (always)]
  5380. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo](index.html) module"]
  5381. pub struct R8_SPI0_FIFO_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo::R](R) reader structure"]
  5382. impl crate :: Readable for R8_SPI0_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo::W](W) writer structure"]
  5383. impl crate :: Writable for R8_SPI0_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO to value 0"]
  5384. impl crate :: Resettable for R8_SPI0_FIFO_SPEC { # [inline (always)]
  5385. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO_COUNT1 register accessor: an alias for `Reg<R8_SPI0_FIFO_COUNT1_SPEC>`"]
  5386. pub type R8_SPI0_FIFO_COUNT1 = crate :: Reg < r8_spi0_fifo_count1 :: R8_SPI0_FIFO_COUNT1_SPEC > ; # [doc = "SPI0 FIFO count status"]
  5387. pub mod r8_spi0_fifo_count1 { # [doc = "Register `R8_SPI0_FIFO_COUNT1` reader"]
  5388. pub struct R (crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_COUNT1_SPEC > ; # [inline (always)]
  5389. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >> for R { # [inline (always)]
  5390. fn from (reader : crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO_COUNT1` writer"]
  5391. pub struct W (crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_COUNT1_SPEC > ; # [inline (always)]
  5392. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5393. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >> for W { # [inline (always)]
  5394. fn from (writer : crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO_COUNT1` reader - SPI FIFO count statu"]
  5395. pub struct R8_SPI0_FIFO_COUNT1_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_COUNT1_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_COUNT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_COUNT1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5396. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO_COUNT1` writer - SPI FIFO count statu"]
  5397. pub struct R8_SPI0_FIFO_COUNT1_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_COUNT1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5398. # [inline (always)]
  5399. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count statu"]
  5400. # [inline (always)]
  5401. pub fn r8_spi0_fifo_count1 (& self) -> R8_SPI0_FIFO_COUNT1_R { R8_SPI0_FIFO_COUNT1_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count statu"]
  5402. # [inline (always)]
  5403. pub fn r8_spi0_fifo_count1 (& mut self) -> R8_SPI0_FIFO_COUNT1_W { R8_SPI0_FIFO_COUNT1_W { w : self } } # [doc = "Writes raw bits to the register."]
  5404. # [inline (always)]
  5405. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo_count1](index.html) module"]
  5406. pub struct R8_SPI0_FIFO_COUNT1_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_COUNT1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo_count1::R](R) reader structure"]
  5407. impl crate :: Readable for R8_SPI0_FIFO_COUNT1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo_count1::W](W) writer structure"]
  5408. impl crate :: Writable for R8_SPI0_FIFO_COUNT1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO_COUNT1 to value 0"]
  5409. impl crate :: Resettable for R8_SPI0_FIFO_COUNT1_SPEC { # [inline (always)]
  5410. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_NOW register accessor: an alias for `Reg<R32_SPI0_DMA_NOW_SPEC>`"]
  5411. pub type R32_SPI0_DMA_NOW = crate :: Reg < r32_spi0_dma_now :: R32_SPI0_DMA_NOW_SPEC > ; # [doc = "SPI0 DMA current address"]
  5412. pub mod r32_spi0_dma_now { # [doc = "Register `R32_SPI0_DMA_NOW` reader"]
  5413. pub struct R (crate :: R < R32_SPI0_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_NOW_SPEC > ; # [inline (always)]
  5414. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_NOW_SPEC >> for R { # [inline (always)]
  5415. fn from (reader : crate :: R < R32_SPI0_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_NOW` writer"]
  5416. pub struct W (crate :: W < R32_SPI0_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_NOW_SPEC > ; # [inline (always)]
  5417. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5418. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_NOW_SPEC >> for W { # [inline (always)]
  5419. fn from (writer : crate :: W < R32_SPI0_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_NOW` reader - SPI DMA current address"]
  5420. pub struct R16_SPI0_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  5421. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_NOW` writer - SPI DMA current address"]
  5422. pub struct R16_SPI0_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5423. # [inline (always)]
  5424. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA current address"]
  5425. # [inline (always)]
  5426. pub fn r16_spi0_dma_now (& self) -> R16_SPI0_DMA_NOW_R { R16_SPI0_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA current address"]
  5427. # [inline (always)]
  5428. pub fn r16_spi0_dma_now (& mut self) -> R16_SPI0_DMA_NOW_W { R16_SPI0_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
  5429. # [inline (always)]
  5430. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_now](index.html) module"]
  5431. pub struct R32_SPI0_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_now::R](R) reader structure"]
  5432. impl crate :: Readable for R32_SPI0_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_now::W](W) writer structure"]
  5433. impl crate :: Writable for R32_SPI0_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_NOW to value 0"]
  5434. impl crate :: Resettable for R32_SPI0_DMA_NOW_SPEC { # [inline (always)]
  5435. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_BEG register accessor: an alias for `Reg<R32_SPI0_DMA_BEG_SPEC>`"]
  5436. pub type R32_SPI0_DMA_BEG = crate :: Reg < r32_spi0_dma_beg :: R32_SPI0_DMA_BEG_SPEC > ; # [doc = "SPI0 DMA begin address"]
  5437. pub mod r32_spi0_dma_beg { # [doc = "Register `R32_SPI0_DMA_BEG` reader"]
  5438. pub struct R (crate :: R < R32_SPI0_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_BEG_SPEC > ; # [inline (always)]
  5439. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_BEG_SPEC >> for R { # [inline (always)]
  5440. fn from (reader : crate :: R < R32_SPI0_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_BEG` writer"]
  5441. pub struct W (crate :: W < R32_SPI0_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_BEG_SPEC > ; # [inline (always)]
  5442. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5443. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_BEG_SPEC >> for W { # [inline (always)]
  5444. fn from (writer : crate :: W < R32_SPI0_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_BEG` reader - SPI DMA begin address"]
  5445. pub struct R16_SPI0_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  5446. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_BEG` writer - SPI DMA begin address"]
  5447. pub struct R16_SPI0_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5448. # [inline (always)]
  5449. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA begin address"]
  5450. # [inline (always)]
  5451. pub fn r16_spi0_dma_beg (& self) -> R16_SPI0_DMA_BEG_R { R16_SPI0_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA begin address"]
  5452. # [inline (always)]
  5453. pub fn r16_spi0_dma_beg (& mut self) -> R16_SPI0_DMA_BEG_W { R16_SPI0_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
  5454. # [inline (always)]
  5455. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_beg](index.html) module"]
  5456. pub struct R32_SPI0_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_beg::R](R) reader structure"]
  5457. impl crate :: Readable for R32_SPI0_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_beg::W](W) writer structure"]
  5458. impl crate :: Writable for R32_SPI0_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_BEG to value 0"]
  5459. impl crate :: Resettable for R32_SPI0_DMA_BEG_SPEC { # [inline (always)]
  5460. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_END register accessor: an alias for `Reg<R32_SPI0_DMA_END_SPEC>`"]
  5461. pub type R32_SPI0_DMA_END = crate :: Reg < r32_spi0_dma_end :: R32_SPI0_DMA_END_SPEC > ; # [doc = "SPI0 DMA end address"]
  5462. pub mod r32_spi0_dma_end { # [doc = "Register `R32_SPI0_DMA_END` reader"]
  5463. pub struct R (crate :: R < R32_SPI0_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_END_SPEC > ; # [inline (always)]
  5464. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_END_SPEC >> for R { # [inline (always)]
  5465. fn from (reader : crate :: R < R32_SPI0_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_END` writer"]
  5466. pub struct W (crate :: W < R32_SPI0_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_END_SPEC > ; # [inline (always)]
  5467. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5468. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_END_SPEC >> for W { # [inline (always)]
  5469. fn from (writer : crate :: W < R32_SPI0_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_END` reader - SPI DMA end address"]
  5470. pub struct R16_SPI0_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  5471. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_END` writer - SPI DMA end address"]
  5472. pub struct R16_SPI0_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5473. # [inline (always)]
  5474. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA end address"]
  5475. # [inline (always)]
  5476. pub fn r16_spi0_dma_end (& self) -> R16_SPI0_DMA_END_R { R16_SPI0_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA end address"]
  5477. # [inline (always)]
  5478. pub fn r16_spi0_dma_end (& mut self) -> R16_SPI0_DMA_END_W { R16_SPI0_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  5479. # [inline (always)]
  5480. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_end](index.html) module"]
  5481. pub struct R32_SPI0_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_end::R](R) reader structure"]
  5482. impl crate :: Readable for R32_SPI0_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_end::W](W) writer structure"]
  5483. impl crate :: Writable for R32_SPI0_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_END to value 0"]
  5484. impl crate :: Resettable for R32_SPI0_DMA_END_SPEC { # [inline (always)]
  5485. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "SPI1 register"]
  5486. pub struct SPI1 { _marker : PhantomData < * const () > } unsafe impl Send for SPI1 { } impl SPI1 { # [doc = r"Pointer to the register block"]
  5487. pub const PTR : * const spi1 :: RegisterBlock = 0x4000_4400 as * const _ ; # [doc = r"Return the pointer to the register block"]
  5488. # [inline (always)]
  5489. pub const fn ptr () -> * const spi1 :: RegisterBlock { Self :: PTR } } impl Deref for SPI1 { type Target = spi1 :: RegisterBlock ; # [inline (always)]
  5490. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SPI1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SPI1") . finish () } } # [doc = "SPI1 register"]
  5491. pub mod spi1 { # [doc = r"Register block"]
  5492. # [repr (C)]
  5493. pub struct RegisterBlock { # [doc = "0x00 - SPI1 mode control"]
  5494. pub r8_spi1_ctrl_mod : crate :: Reg < r8_spi1_ctrl_mod :: R8_SPI1_CTRL_MOD_SPEC > , # [doc = "0x01 - SPI1 configuration control"]
  5495. pub r8_spi1_ctrl_cfg : crate :: Reg < r8_spi1_ctrl_cfg :: R8_SPI1_CTRL_CFG_SPEC > , # [doc = "0x02 - SPI1 interrupt enable"]
  5496. pub r8_spi1_inter_en : crate :: Reg < r8_spi1_inter_en :: R8_SPI1_INTER_EN_SPEC > , # [doc = "0x03 - SPI1 master clock divisor _ SPI1 slave preset value"]
  5497. pub r8_spi1_clock_div_r8_spi1_slave_pre : crate :: Reg < r8_spi1_clock_div_r8_spi1_slave_pre :: R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > , # [doc = "0x04 - SPI1 data buffer"]
  5498. pub r8_spi1_buffer : crate :: Reg < r8_spi1_buffer :: R8_SPI1_BUFFER_SPEC > , # [doc = "0x05 - SPI1 work flag"]
  5499. pub r8_spi1_run_flag : crate :: Reg < r8_spi1_run_flag :: R8_SPI1_RUN_FLAG_SPEC > , # [doc = "0x06 - SPI1 interrupt flag"]
  5500. pub r8_spi1_int_flag : crate :: Reg < r8_spi1_int_flag :: R8_SPI1_INT_FLAG_SPEC > , # [doc = "0x07 - SPI1 FIFO count status"]
  5501. pub r8_spi1_fifo_count : crate :: Reg < r8_spi1_fifo_count :: R8_SPI1_FIFO_COUNT_SPEC > , _reserved8 : [u8 ; 0x04]
  5502. , # [doc = "0x0c - SPI1 total byte count, only low 12 bit"]
  5503. pub r16_spi1_total_cnt : crate :: Reg < r16_spi1_total_cnt :: R16_SPI1_TOTAL_CNT_SPEC > , _reserved9 : [u8 ; 0x02]
  5504. , # [doc = "0x10 - SPI1 FIFO register"]
  5505. pub r8_spi1_fifo : crate :: Reg < r8_spi1_fifo :: R8_SPI1_FIFO_SPEC > , _reserved10 : [u8 ; 0x02]
  5506. , # [doc = "0x13 - SPI0 FIFO count status"]
  5507. pub r8_spi1_fifo_count1 : crate :: Reg < r8_spi1_fifo_count1 :: R8_SPI1_FIFO_COUNT1_SPEC > , # [doc = "0x14 - SPI1 DMA current address"]
  5508. pub r32_spi1_dma_now : crate :: Reg < r32_spi1_dma_now :: R32_SPI1_DMA_NOW_SPEC > , # [doc = "0x18 - SPI1 DMA begin address"]
  5509. pub r32_spi1_dma_beg : crate :: Reg < r32_spi1_dma_beg :: R32_SPI1_DMA_BEG_SPEC > , # [doc = "0x1c - SPI1 DMA end address"]
  5510. pub r32_spi1_dma_end : crate :: Reg < r32_spi1_dma_end :: R32_SPI1_DMA_END_SPEC > , } # [doc = "R8_SPI1_CTRL_MOD register accessor: an alias for `Reg<R8_SPI1_CTRL_MOD_SPEC>`"]
  5511. pub type R8_SPI1_CTRL_MOD = crate :: Reg < r8_spi1_ctrl_mod :: R8_SPI1_CTRL_MOD_SPEC > ; # [doc = "SPI1 mode control"]
  5512. pub mod r8_spi1_ctrl_mod { # [doc = "Register `R8_SPI1_CTRL_MOD` reader"]
  5513. pub struct R (crate :: R < R8_SPI1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CTRL_MOD_SPEC > ; # [inline (always)]
  5514. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CTRL_MOD_SPEC >> for R { # [inline (always)]
  5515. fn from (reader : crate :: R < R8_SPI1_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CTRL_MOD` writer"]
  5516. pub struct W (crate :: W < R8_SPI1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CTRL_MOD_SPEC > ; # [inline (always)]
  5517. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5518. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CTRL_MOD_SPEC >> for W { # [inline (always)]
  5519. fn from (writer : crate :: W < R8_SPI1_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_MODE_SLAVE` reader - SPI slave mode"]
  5520. pub struct RB_SPI_MODE_SLAVE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MODE_SLAVE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MODE_SLAVE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MODE_SLAVE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5521. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MODE_SLAVE` writer - SPI slave mode"]
  5522. pub struct RB_SPI_MODE_SLAVE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MODE_SLAVE_W < 'a > { # [doc = r"Sets the field bit"]
  5523. # [inline (always)]
  5524. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5525. # [inline (always)]
  5526. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5527. # [inline (always)]
  5528. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_ALL_CLEAR` reader - force clear SPI FIFO and count"]
  5529. pub struct RB_SPI_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5530. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_ALL_CLEAR` writer - force clear SPI FIFO and count"]
  5531. pub struct RB_SPI_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
  5532. # [inline (always)]
  5533. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5534. # [inline (always)]
  5535. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5536. # [inline (always)]
  5537. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_2WIRE_MOD` reader - SPI enable 2 wire mode"]
  5538. pub struct RB_SPI_2WIRE_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_2WIRE_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_2WIRE_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_2WIRE_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5539. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_2WIRE_MOD` writer - SPI enable 2 wire mode"]
  5540. pub struct RB_SPI_2WIRE_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_2WIRE_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  5541. # [inline (always)]
  5542. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5543. # [inline (always)]
  5544. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5545. # [inline (always)]
  5546. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` reader - SPI master clock mode _ SPI slave command mode"]
  5547. pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5548. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` writer - SPI master clock mode _ SPI slave command mode"]
  5549. pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  5550. # [inline (always)]
  5551. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5552. # [inline (always)]
  5553. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5554. # [inline (always)]
  5555. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_FIFO_DIR` reader - SPI FIFO direction"]
  5556. pub struct RB_SPI_FIFO_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5557. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_DIR` writer - SPI FIFO direction"]
  5558. pub struct RB_SPI_FIFO_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FIFO_DIR_W < 'a > { # [doc = r"Sets the field bit"]
  5559. # [inline (always)]
  5560. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5561. # [inline (always)]
  5562. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5563. # [inline (always)]
  5564. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_SCK_OE` reader - SPI SCK output enable"]
  5565. pub struct RB_SPI_SCK_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SCK_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SCK_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SCK_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5566. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SCK_OE` writer - SPI SCK output enable"]
  5567. pub struct RB_SPI_SCK_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_SCK_OE_W < 'a > { # [doc = r"Sets the field bit"]
  5568. # [inline (always)]
  5569. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5570. # [inline (always)]
  5571. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5572. # [inline (always)]
  5573. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SPI_MOSI_OE` reader - SPI MOSI output enable"]
  5574. pub struct RB_SPI_MOSI_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MOSI_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MOSI_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MOSI_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5575. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MOSI_OE` writer - SPI MOSI output enable"]
  5576. pub struct RB_SPI_MOSI_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MOSI_OE_W < 'a > { # [doc = r"Sets the field bit"]
  5577. # [inline (always)]
  5578. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5579. # [inline (always)]
  5580. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5581. # [inline (always)]
  5582. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_MISO_OE` reader - SPI MISO output enable"]
  5583. pub struct RB_SPI_MISO_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MISO_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MISO_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MISO_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5584. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MISO_OE` writer - SPI MISO output enable"]
  5585. pub struct RB_SPI_MISO_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MISO_OE_W < 'a > { # [doc = r"Sets the field bit"]
  5586. # [inline (always)]
  5587. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5588. # [inline (always)]
  5589. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5590. # [inline (always)]
  5591. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - SPI slave mode"]
  5592. # [inline (always)]
  5593. pub fn rb_spi_mode_slave (& self) -> RB_SPI_MODE_SLAVE_R { RB_SPI_MODE_SLAVE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear SPI FIFO and count"]
  5594. # [inline (always)]
  5595. pub fn rb_spi_all_clear (& self) -> RB_SPI_ALL_CLEAR_R { RB_SPI_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SPI enable 2 wire mode"]
  5596. # [inline (always)]
  5597. pub fn rb_spi_2wire_mod (& self) -> RB_SPI_2WIRE_MOD_R { RB_SPI_2WIRE_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - SPI master clock mode _ SPI slave command mode"]
  5598. # [inline (always)]
  5599. pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SPI FIFO direction"]
  5600. # [inline (always)]
  5601. pub fn rb_spi_fifo_dir (& self) -> RB_SPI_FIFO_DIR_R { RB_SPI_FIFO_DIR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI SCK output enable"]
  5602. # [inline (always)]
  5603. pub fn rb_spi_sck_oe (& self) -> RB_SPI_SCK_OE_R { RB_SPI_SCK_OE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI MOSI output enable"]
  5604. # [inline (always)]
  5605. pub fn rb_spi_mosi_oe (& self) -> RB_SPI_MOSI_OE_R { RB_SPI_MOSI_OE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI MISO output enable"]
  5606. # [inline (always)]
  5607. pub fn rb_spi_miso_oe (& self) -> RB_SPI_MISO_OE_R { RB_SPI_MISO_OE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI slave mode"]
  5608. # [inline (always)]
  5609. pub fn rb_spi_mode_slave (& mut self) -> RB_SPI_MODE_SLAVE_W { RB_SPI_MODE_SLAVE_W { w : self } } # [doc = "Bit 1 - force clear SPI FIFO and count"]
  5610. # [inline (always)]
  5611. pub fn rb_spi_all_clear (& mut self) -> RB_SPI_ALL_CLEAR_W { RB_SPI_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - SPI enable 2 wire mode"]
  5612. # [inline (always)]
  5613. pub fn rb_spi_2wire_mod (& mut self) -> RB_SPI_2WIRE_MOD_W { RB_SPI_2WIRE_MOD_W { w : self } } # [doc = "Bit 3 - SPI master clock mode _ SPI slave command mode"]
  5614. # [inline (always)]
  5615. pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& mut self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { w : self } } # [doc = "Bit 4 - SPI FIFO direction"]
  5616. # [inline (always)]
  5617. pub fn rb_spi_fifo_dir (& mut self) -> RB_SPI_FIFO_DIR_W { RB_SPI_FIFO_DIR_W { w : self } } # [doc = "Bit 5 - SPI SCK output enable"]
  5618. # [inline (always)]
  5619. pub fn rb_spi_sck_oe (& mut self) -> RB_SPI_SCK_OE_W { RB_SPI_SCK_OE_W { w : self } } # [doc = "Bit 6 - SPI MOSI output enable"]
  5620. # [inline (always)]
  5621. pub fn rb_spi_mosi_oe (& mut self) -> RB_SPI_MOSI_OE_W { RB_SPI_MOSI_OE_W { w : self } } # [doc = "Bit 7 - SPI MISO output enable"]
  5622. # [inline (always)]
  5623. pub fn rb_spi_miso_oe (& mut self) -> RB_SPI_MISO_OE_W { RB_SPI_MISO_OE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5624. # [inline (always)]
  5625. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_ctrl_mod](index.html) module"]
  5626. pub struct R8_SPI1_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_ctrl_mod::R](R) reader structure"]
  5627. impl crate :: Readable for R8_SPI1_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_ctrl_mod::W](W) writer structure"]
  5628. impl crate :: Writable for R8_SPI1_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CTRL_MOD to value 0x02"]
  5629. impl crate :: Resettable for R8_SPI1_CTRL_MOD_SPEC { # [inline (always)]
  5630. fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_SPI1_CTRL_CFG register accessor: an alias for `Reg<R8_SPI1_CTRL_CFG_SPEC>`"]
  5631. pub type R8_SPI1_CTRL_CFG = crate :: Reg < r8_spi1_ctrl_cfg :: R8_SPI1_CTRL_CFG_SPEC > ; # [doc = "SPI1 configuration control"]
  5632. pub mod r8_spi1_ctrl_cfg { # [doc = "Register `R8_SPI1_CTRL_CFG` reader"]
  5633. pub struct R (crate :: R < R8_SPI1_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CTRL_CFG_SPEC > ; # [inline (always)]
  5634. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CTRL_CFG_SPEC >> for R { # [inline (always)]
  5635. fn from (reader : crate :: R < R8_SPI1_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CTRL_CFG` writer"]
  5636. pub struct W (crate :: W < R8_SPI1_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CTRL_CFG_SPEC > ; # [inline (always)]
  5637. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5638. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CTRL_CFG_SPEC >> for W { # [inline (always)]
  5639. fn from (writer : crate :: W < R8_SPI1_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_DMA_ENABLE` reader - SPI DMA enable"]
  5640. pub struct RB_SPI_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5641. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_ENABLE` writer - SPI DMA enable"]
  5642. pub struct RB_SPI_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  5643. # [inline (always)]
  5644. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5645. # [inline (always)]
  5646. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5647. # [inline (always)]
  5648. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_DMA_LOOP` reader - SPI DMA address loop enable"]
  5649. pub struct RB_SPI_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5650. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_LOOP` writer - SPI DMA address loop enable"]
  5651. pub struct RB_SPI_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
  5652. # [inline (always)]
  5653. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5654. # [inline (always)]
  5655. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5656. # [inline (always)]
  5657. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_AUTO_IF` reader - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5658. pub struct RB_SPI_AUTO_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_AUTO_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_AUTO_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_AUTO_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5659. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_AUTO_IF` writer - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5660. pub struct RB_SPI_AUTO_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_AUTO_IF_W < 'a > { # [doc = r"Sets the field bit"]
  5661. # [inline (always)]
  5662. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5663. # [inline (always)]
  5664. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5665. # [inline (always)]
  5666. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_BIT_ORDER` reader - SPI bit data order"]
  5667. pub struct RB_SPI_BIT_ORDER_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_BIT_ORDER_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_BIT_ORDER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_BIT_ORDER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5668. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_BIT_ORDER` writer - SPI bit data order"]
  5669. pub struct RB_SPI_BIT_ORDER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_BIT_ORDER_W < 'a > { # [doc = r"Sets the field bit"]
  5670. # [inline (always)]
  5671. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5672. # [inline (always)]
  5673. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5674. # [inline (always)]
  5675. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - SPI DMA enable"]
  5676. # [inline (always)]
  5677. pub fn rb_spi_dma_enable (& self) -> RB_SPI_DMA_ENABLE_R { RB_SPI_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - SPI DMA address loop enable"]
  5678. # [inline (always)]
  5679. pub fn rb_spi_dma_loop (& self) -> RB_SPI_DMA_LOOP_R { RB_SPI_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5680. # [inline (always)]
  5681. pub fn rb_spi_auto_if (& self) -> RB_SPI_AUTO_IF_R { RB_SPI_AUTO_IF_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI bit data order"]
  5682. # [inline (always)]
  5683. pub fn rb_spi_bit_order (& self) -> RB_SPI_BIT_ORDER_R { RB_SPI_BIT_ORDER_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI DMA enable"]
  5684. # [inline (always)]
  5685. pub fn rb_spi_dma_enable (& mut self) -> RB_SPI_DMA_ENABLE_W { RB_SPI_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - SPI DMA address loop enable"]
  5686. # [inline (always)]
  5687. pub fn rb_spi_dma_loop (& mut self) -> RB_SPI_DMA_LOOP_W { RB_SPI_DMA_LOOP_W { w : self } } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
  5688. # [inline (always)]
  5689. pub fn rb_spi_auto_if (& mut self) -> RB_SPI_AUTO_IF_W { RB_SPI_AUTO_IF_W { w : self } } # [doc = "Bit 5 - SPI bit data order"]
  5690. # [inline (always)]
  5691. pub fn rb_spi_bit_order (& mut self) -> RB_SPI_BIT_ORDER_W { RB_SPI_BIT_ORDER_W { w : self } } # [doc = "Writes raw bits to the register."]
  5692. # [inline (always)]
  5693. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_ctrl_cfg](index.html) module"]
  5694. pub struct R8_SPI1_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_ctrl_cfg::R](R) reader structure"]
  5695. impl crate :: Readable for R8_SPI1_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_ctrl_cfg::W](W) writer structure"]
  5696. impl crate :: Writable for R8_SPI1_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CTRL_CFG to value 0"]
  5697. impl crate :: Resettable for R8_SPI1_CTRL_CFG_SPEC { # [inline (always)]
  5698. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_INTER_EN register accessor: an alias for `Reg<R8_SPI1_INTER_EN_SPEC>`"]
  5699. pub type R8_SPI1_INTER_EN = crate :: Reg < r8_spi1_inter_en :: R8_SPI1_INTER_EN_SPEC > ; # [doc = "SPI1 interrupt enable"]
  5700. pub mod r8_spi1_inter_en { # [doc = "Register `R8_SPI1_INTER_EN` reader"]
  5701. pub struct R (crate :: R < R8_SPI1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_INTER_EN_SPEC > ; # [inline (always)]
  5702. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_INTER_EN_SPEC >> for R { # [inline (always)]
  5703. fn from (reader : crate :: R < R8_SPI1_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_INTER_EN` writer"]
  5704. pub struct W (crate :: W < R8_SPI1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_INTER_EN_SPEC > ; # [inline (always)]
  5705. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5706. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_INTER_EN_SPEC >> for W { # [inline (always)]
  5707. fn from (writer : crate :: W < R8_SPI1_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IE_CNT_END` reader - enable interrupt for SPI total byte count end"]
  5708. pub struct RB_SPI_IE_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5709. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_CNT_END` writer - enable interrupt for SPI total byte count end"]
  5710. pub struct RB_SPI_IE_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
  5711. # [inline (always)]
  5712. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5713. # [inline (always)]
  5714. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5715. # [inline (always)]
  5716. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IE_BYTE_END` reader - enable interrupt for SPI byte exchanged"]
  5717. pub struct RB_SPI_IE_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5718. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_BYTE_END` writer - enable interrupt for SPI byte exchanged"]
  5719. pub struct RB_SPI_IE_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
  5720. # [inline (always)]
  5721. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5722. # [inline (always)]
  5723. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5724. # [inline (always)]
  5725. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_HF` reader - enable interrupt for SPI FIFO half"]
  5726. pub struct RB_SPI_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5727. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_HF` writer - enable interrupt for SPI FIFO half"]
  5728. pub struct RB_SPI_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  5729. # [inline (always)]
  5730. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5731. # [inline (always)]
  5732. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5733. # [inline (always)]
  5734. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IE_DMA_END` reader - enable interrupt for SPI DMA completion"]
  5735. pub struct RB_SPI_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5736. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_DMA_END` writer - enable interrupt for SPI DMA completion"]
  5737. pub struct RB_SPI_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  5738. # [inline (always)]
  5739. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5740. # [inline (always)]
  5741. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5742. # [inline (always)]
  5743. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_OV` reader - enable interrupt for SPI FIFO overflow"]
  5744. pub struct RB_SPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5745. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_OV` writer - enable interrupt for SPI FIFO overflow"]
  5746. pub struct RB_SPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  5747. # [inline (always)]
  5748. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5749. # [inline (always)]
  5750. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5751. # [inline (always)]
  5752. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_IE_FST_BYTE` reader - enable interrupt for SPI slave mode first byte received"]
  5753. pub struct RB_SPI_IE_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5754. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FST_BYTE` writer - enable interrupt for SPI slave mode first byte received"]
  5755. pub struct RB_SPI_IE_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
  5756. # [inline (always)]
  5757. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5758. # [inline (always)]
  5759. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5760. # [inline (always)]
  5761. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
  5762. # [inline (always)]
  5763. pub fn rb_spi_ie_cnt_end (& self) -> RB_SPI_IE_CNT_END_R { RB_SPI_IE_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
  5764. # [inline (always)]
  5765. pub fn rb_spi_ie_byte_end (& self) -> RB_SPI_IE_BYTE_END_R { RB_SPI_IE_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
  5766. # [inline (always)]
  5767. pub fn rb_spi_ie_fifo_hf (& self) -> RB_SPI_IE_FIFO_HF_R { RB_SPI_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
  5768. # [inline (always)]
  5769. pub fn rb_spi_ie_dma_end (& self) -> RB_SPI_IE_DMA_END_R { RB_SPI_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
  5770. # [inline (always)]
  5771. pub fn rb_spi_ie_fifo_ov (& self) -> RB_SPI_IE_FIFO_OV_R { RB_SPI_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
  5772. # [inline (always)]
  5773. pub fn rb_spi_ie_fst_byte (& self) -> RB_SPI_IE_FST_BYTE_R { RB_SPI_IE_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
  5774. # [inline (always)]
  5775. pub fn rb_spi_ie_cnt_end (& mut self) -> RB_SPI_IE_CNT_END_W { RB_SPI_IE_CNT_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
  5776. # [inline (always)]
  5777. pub fn rb_spi_ie_byte_end (& mut self) -> RB_SPI_IE_BYTE_END_W { RB_SPI_IE_BYTE_END_W { w : self } } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
  5778. # [inline (always)]
  5779. pub fn rb_spi_ie_fifo_hf (& mut self) -> RB_SPI_IE_FIFO_HF_W { RB_SPI_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
  5780. # [inline (always)]
  5781. pub fn rb_spi_ie_dma_end (& mut self) -> RB_SPI_IE_DMA_END_W { RB_SPI_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
  5782. # [inline (always)]
  5783. pub fn rb_spi_ie_fifo_ov (& mut self) -> RB_SPI_IE_FIFO_OV_W { RB_SPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
  5784. # [inline (always)]
  5785. pub fn rb_spi_ie_fst_byte (& mut self) -> RB_SPI_IE_FST_BYTE_W { RB_SPI_IE_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5786. # [inline (always)]
  5787. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_inter_en](index.html) module"]
  5788. pub struct R8_SPI1_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_SPI1_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_inter_en::R](R) reader structure"]
  5789. impl crate :: Readable for R8_SPI1_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_inter_en::W](W) writer structure"]
  5790. impl crate :: Writable for R8_SPI1_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_INTER_EN to value 0"]
  5791. impl crate :: Resettable for R8_SPI1_INTER_EN_SPEC { # [inline (always)]
  5792. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE register accessor: an alias for `Reg<R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC>`"]
  5793. pub type R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE = crate :: Reg < r8_spi1_clock_div_r8_spi1_slave_pre :: R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [doc = "SPI1 master clock divisor _ SPI1 slave preset value"]
  5794. pub mod r8_spi1_clock_div_r8_spi1_slave_pre { # [doc = "Register `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` reader"]
  5795. pub struct R (crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [inline (always)]
  5796. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >> for R { # [inline (always)]
  5797. fn from (reader : crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` writer"]
  5798. pub struct W (crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [inline (always)]
  5799. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5800. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >> for W { # [inline (always)]
  5801. fn from (writer : crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` reader - master clock divisor _ SPI1 slave preset value"]
  5802. pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5803. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` writer - master clock divisor _ SPI1 slave preset value"]
  5804. pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5805. # [inline (always)]
  5806. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - master clock divisor _ SPI1 slave preset value"]
  5807. # [inline (always)]
  5808. pub fn r8_spi1_clock_div_r8_spi1_slave_pre (& self) -> R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - master clock divisor _ SPI1 slave preset value"]
  5809. # [inline (always)]
  5810. pub fn r8_spi1_clock_div_r8_spi1_slave_pre (& mut self) -> R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5811. # [inline (always)]
  5812. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 master clock divisor _ SPI1 slave preset value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_clock_div_r8_spi1_slave_pre](index.html) module"]
  5813. pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_clock_div_r8_spi1_slave_pre::R](R) reader structure"]
  5814. impl crate :: Readable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_clock_div_r8_spi1_slave_pre::W](W) writer structure"]
  5815. impl crate :: Writable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE to value 0x10"]
  5816. impl crate :: Resettable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { # [inline (always)]
  5817. fn reset_value () -> Self :: Ux { 0x10 } } } # [doc = "R8_SPI1_BUFFER register accessor: an alias for `Reg<R8_SPI1_BUFFER_SPEC>`"]
  5818. pub type R8_SPI1_BUFFER = crate :: Reg < r8_spi1_buffer :: R8_SPI1_BUFFER_SPEC > ; # [doc = "SPI1 data buffer"]
  5819. pub mod r8_spi1_buffer { # [doc = "Register `R8_SPI1_BUFFER` reader"]
  5820. pub struct R (crate :: R < R8_SPI1_BUFFER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_BUFFER_SPEC > ; # [inline (always)]
  5821. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_BUFFER_SPEC >> for R { # [inline (always)]
  5822. fn from (reader : crate :: R < R8_SPI1_BUFFER_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SPI1_BUFFER` reader - SPI data buffer"]
  5823. pub struct R8_SPI1_BUFFER_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_BUFFER_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_BUFFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_BUFFER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5824. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - SPI data buffer"]
  5825. # [inline (always)]
  5826. pub fn r8_spi1_buffer (& self) -> R8_SPI1_BUFFER_R { R8_SPI1_BUFFER_R :: new ((self . bits & 0xff) as u8) } } # [doc = "SPI1 data buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_buffer](index.html) module"]
  5827. pub struct R8_SPI1_BUFFER_SPEC ; impl crate :: RegisterSpec for R8_SPI1_BUFFER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_buffer::R](R) reader structure"]
  5828. impl crate :: Readable for R8_SPI1_BUFFER_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI1_BUFFER to value 0"]
  5829. impl crate :: Resettable for R8_SPI1_BUFFER_SPEC { # [inline (always)]
  5830. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_RUN_FLAG register accessor: an alias for `Reg<R8_SPI1_RUN_FLAG_SPEC>`"]
  5831. pub type R8_SPI1_RUN_FLAG = crate :: Reg < r8_spi1_run_flag :: R8_SPI1_RUN_FLAG_SPEC > ; # [doc = "SPI1 work flag"]
  5832. pub mod r8_spi1_run_flag { # [doc = "Register `R8_SPI1_RUN_FLAG` reader"]
  5833. pub struct R (crate :: R < R8_SPI1_RUN_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_RUN_FLAG_SPEC > ; # [inline (always)]
  5834. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_RUN_FLAG_SPEC >> for R { # [inline (always)]
  5835. fn from (reader : crate :: R < R8_SPI1_RUN_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_SPI_SLV_CMD_ACT` reader - SPI slave command flag"]
  5836. pub struct RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CMD_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CMD_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5837. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_READY` reader - SPI FIFO ready status"]
  5838. pub struct RB_SPI_FIFO_READY_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_READY_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_READY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_READY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5839. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_CS_LOAD` reader - SPI slave chip-select loading status"]
  5840. pub struct RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CS_LOAD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CS_LOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5841. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_SELECT` reader - SPI slave selection status"]
  5842. pub struct RB_SPI_SLV_SELECT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_SELECT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_SELECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_SELECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5843. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 4 - SPI slave command flag"]
  5844. # [inline (always)]
  5845. pub fn rb_spi_slv_cmd_act (& self) -> RB_SPI_SLV_CMD_ACT_R { RB_SPI_SLV_CMD_ACT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI FIFO ready status"]
  5846. # [inline (always)]
  5847. pub fn rb_spi_fifo_ready (& self) -> RB_SPI_FIFO_READY_R { RB_SPI_FIFO_READY_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI slave chip-select loading status"]
  5848. # [inline (always)]
  5849. pub fn rb_spi_slv_cs_load (& self) -> RB_SPI_SLV_CS_LOAD_R { RB_SPI_SLV_CS_LOAD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI slave selection status"]
  5850. # [inline (always)]
  5851. pub fn rb_spi_slv_select (& self) -> RB_SPI_SLV_SELECT_R { RB_SPI_SLV_SELECT_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "SPI1 work flag\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_run_flag](index.html) module"]
  5852. pub struct R8_SPI1_RUN_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_RUN_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_run_flag::R](R) reader structure"]
  5853. impl crate :: Readable for R8_SPI1_RUN_FLAG_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI1_RUN_FLAG to value 0"]
  5854. impl crate :: Resettable for R8_SPI1_RUN_FLAG_SPEC { # [inline (always)]
  5855. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_INT_FLAG register accessor: an alias for `Reg<R8_SPI1_INT_FLAG_SPEC>`"]
  5856. pub type R8_SPI1_INT_FLAG = crate :: Reg < r8_spi1_int_flag :: R8_SPI1_INT_FLAG_SPEC > ; # [doc = "SPI1 interrupt flag"]
  5857. pub mod r8_spi1_int_flag { # [doc = "Register `R8_SPI1_INT_FLAG` reader"]
  5858. pub struct R (crate :: R < R8_SPI1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_INT_FLAG_SPEC > ; # [inline (always)]
  5859. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_INT_FLAG_SPEC >> for R { # [inline (always)]
  5860. fn from (reader : crate :: R < R8_SPI1_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_INT_FLAG` writer"]
  5861. pub struct W (crate :: W < R8_SPI1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_INT_FLAG_SPEC > ; # [inline (always)]
  5862. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5863. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_INT_FLAG_SPEC >> for W { # [inline (always)]
  5864. fn from (writer : crate :: W < R8_SPI1_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IF_CNT_END` reader - interrupt flag for SPI total byte count end"]
  5865. pub struct RB_SPI_IF_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5866. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_CNT_END` writer - interrupt flag for SPI total byte count end"]
  5867. pub struct RB_SPI_IF_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
  5868. # [inline (always)]
  5869. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5870. # [inline (always)]
  5871. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5872. # [inline (always)]
  5873. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IF_BYTE_END` reader - interrupt flag for SPI byte exchanged"]
  5874. pub struct RB_SPI_IF_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5875. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_BYTE_END` writer - interrupt flag for SPI byte exchanged"]
  5876. pub struct RB_SPI_IF_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
  5877. # [inline (always)]
  5878. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5879. # [inline (always)]
  5880. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5881. # [inline (always)]
  5882. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_HF` reader - interrupt flag for SPI FIFO half"]
  5883. pub struct RB_SPI_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5884. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_HF` writer - interrupt flag for SPI FIFO half"]
  5885. pub struct RB_SPI_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
  5886. # [inline (always)]
  5887. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5888. # [inline (always)]
  5889. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5890. # [inline (always)]
  5891. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IF_DMA_END` reader - interrupt flag for SPI DMA completion"]
  5892. pub struct RB_SPI_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5893. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_DMA_END` writer - interrupt flag for SPI DMA completion"]
  5894. pub struct RB_SPI_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
  5895. # [inline (always)]
  5896. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5897. # [inline (always)]
  5898. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5899. # [inline (always)]
  5900. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_OV` reader - interrupt flag for SPI FIFO overflow"]
  5901. pub struct RB_SPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5902. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_OV` writer - interrupt flag for SPI FIFO overflow"]
  5903. pub struct RB_SPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  5904. # [inline (always)]
  5905. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5906. # [inline (always)]
  5907. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5908. # [inline (always)]
  5909. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_FREE` reader - current SPI free status"]
  5910. pub struct RB_SPI_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5911. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FREE` writer - current SPI free status"]
  5912. pub struct RB_SPI_FREE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FREE_W < 'a > { # [doc = r"Sets the field bit"]
  5913. # [inline (always)]
  5914. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5915. # [inline (always)]
  5916. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5917. # [inline (always)]
  5918. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_IF_FST_BYTE` reader - interrupt flag for SPI slave mode first byte received"]
  5919. pub struct RB_SPI_IF_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  5920. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FST_BYTE` writer - interrupt flag for SPI slave mode first byte received"]
  5921. pub struct RB_SPI_IF_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
  5922. # [inline (always)]
  5923. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  5924. # [inline (always)]
  5925. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  5926. # [inline (always)]
  5927. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
  5928. # [inline (always)]
  5929. pub fn rb_spi_if_cnt_end (& self) -> RB_SPI_IF_CNT_END_R { RB_SPI_IF_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
  5930. # [inline (always)]
  5931. pub fn rb_spi_if_byte_end (& self) -> RB_SPI_IF_BYTE_END_R { RB_SPI_IF_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
  5932. # [inline (always)]
  5933. pub fn rb_spi_if_fifo_hf (& self) -> RB_SPI_IF_FIFO_HF_R { RB_SPI_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
  5934. # [inline (always)]
  5935. pub fn rb_spi_if_dma_end (& self) -> RB_SPI_IF_DMA_END_R { RB_SPI_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
  5936. # [inline (always)]
  5937. pub fn rb_spi_if_fifo_ov (& self) -> RB_SPI_IF_FIFO_OV_R { RB_SPI_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - current SPI free status"]
  5938. # [inline (always)]
  5939. pub fn rb_spi_free (& self) -> RB_SPI_FREE_R { RB_SPI_FREE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
  5940. # [inline (always)]
  5941. pub fn rb_spi_if_fst_byte (& self) -> RB_SPI_IF_FST_BYTE_R { RB_SPI_IF_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
  5942. # [inline (always)]
  5943. pub fn rb_spi_if_cnt_end (& mut self) -> RB_SPI_IF_CNT_END_W { RB_SPI_IF_CNT_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
  5944. # [inline (always)]
  5945. pub fn rb_spi_if_byte_end (& mut self) -> RB_SPI_IF_BYTE_END_W { RB_SPI_IF_BYTE_END_W { w : self } } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
  5946. # [inline (always)]
  5947. pub fn rb_spi_if_fifo_hf (& mut self) -> RB_SPI_IF_FIFO_HF_W { RB_SPI_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
  5948. # [inline (always)]
  5949. pub fn rb_spi_if_dma_end (& mut self) -> RB_SPI_IF_DMA_END_W { RB_SPI_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
  5950. # [inline (always)]
  5951. pub fn rb_spi_if_fifo_ov (& mut self) -> RB_SPI_IF_FIFO_OV_W { RB_SPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 6 - current SPI free status"]
  5952. # [inline (always)]
  5953. pub fn rb_spi_free (& mut self) -> RB_SPI_FREE_W { RB_SPI_FREE_W { w : self } } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
  5954. # [inline (always)]
  5955. pub fn rb_spi_if_fst_byte (& mut self) -> RB_SPI_IF_FST_BYTE_W { RB_SPI_IF_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
  5956. # [inline (always)]
  5957. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_int_flag](index.html) module"]
  5958. pub struct R8_SPI1_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_int_flag::R](R) reader structure"]
  5959. impl crate :: Readable for R8_SPI1_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_int_flag::W](W) writer structure"]
  5960. impl crate :: Writable for R8_SPI1_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_INT_FLAG to value 0"]
  5961. impl crate :: Resettable for R8_SPI1_INT_FLAG_SPEC { # [inline (always)]
  5962. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO_COUNT register accessor: an alias for `Reg<R8_SPI1_FIFO_COUNT_SPEC>`"]
  5963. pub type R8_SPI1_FIFO_COUNT = crate :: Reg < r8_spi1_fifo_count :: R8_SPI1_FIFO_COUNT_SPEC > ; # [doc = "SPI1 FIFO count status"]
  5964. pub mod r8_spi1_fifo_count { # [doc = "Register `R8_SPI1_FIFO_COUNT` reader"]
  5965. pub struct R (crate :: R < R8_SPI1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_COUNT_SPEC > ; # [inline (always)]
  5966. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_COUNT_SPEC >> for R { # [inline (always)]
  5967. fn from (reader : crate :: R < R8_SPI1_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO_COUNT` writer"]
  5968. pub struct W (crate :: W < R8_SPI1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_COUNT_SPEC > ; # [inline (always)]
  5969. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5970. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_COUNT_SPEC >> for W { # [inline (always)]
  5971. fn from (writer : crate :: W < R8_SPI1_FIFO_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO_COUNT` reader - SPI FIFO count status"]
  5972. pub struct R8_SPI1_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  5973. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO_COUNT` writer - SPI FIFO count status"]
  5974. pub struct R8_SPI1_FIFO_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  5975. # [inline (always)]
  5976. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count status"]
  5977. # [inline (always)]
  5978. pub fn r8_spi1_fifo_count (& self) -> R8_SPI1_FIFO_COUNT_R { R8_SPI1_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count status"]
  5979. # [inline (always)]
  5980. pub fn r8_spi1_fifo_count (& mut self) -> R8_SPI1_FIFO_COUNT_W { R8_SPI1_FIFO_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  5981. # [inline (always)]
  5982. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo_count](index.html) module"]
  5983. pub struct R8_SPI1_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo_count::R](R) reader structure"]
  5984. impl crate :: Readable for R8_SPI1_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo_count::W](W) writer structure"]
  5985. impl crate :: Writable for R8_SPI1_FIFO_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO_COUNT to value 0"]
  5986. impl crate :: Resettable for R8_SPI1_FIFO_COUNT_SPEC { # [inline (always)]
  5987. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SPI1_TOTAL_CNT register accessor: an alias for `Reg<R16_SPI1_TOTAL_CNT_SPEC>`"]
  5988. pub type R16_SPI1_TOTAL_CNT = crate :: Reg < r16_spi1_total_cnt :: R16_SPI1_TOTAL_CNT_SPEC > ; # [doc = "SPI1 total byte count, only low 12 bit"]
  5989. pub mod r16_spi1_total_cnt { # [doc = "Register `R16_SPI1_TOTAL_CNT` reader"]
  5990. pub struct R (crate :: R < R16_SPI1_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SPI1_TOTAL_CNT_SPEC > ; # [inline (always)]
  5991. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SPI1_TOTAL_CNT_SPEC >> for R { # [inline (always)]
  5992. fn from (reader : crate :: R < R16_SPI1_TOTAL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SPI1_TOTAL_CNT` writer"]
  5993. pub struct W (crate :: W < R16_SPI1_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SPI1_TOTAL_CNT_SPEC > ; # [inline (always)]
  5994. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  5995. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SPI1_TOTAL_CNT_SPEC >> for W { # [inline (always)]
  5996. fn from (writer : crate :: W < R16_SPI1_TOTAL_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_TOTAL_CNT` reader - SPI total byte count, only low 12 bit"]
  5997. pub struct R16_SPI1_TOTAL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl R16_SPI1_TOTAL_CNT_R { pub (crate) fn new (bits : u16) -> Self { R16_SPI1_TOTAL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_TOTAL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  5998. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_TOTAL_CNT` writer - SPI total byte count, only low 12 bit"]
  5999. pub struct R16_SPI1_TOTAL_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_TOTAL_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6000. # [inline (always)]
  6001. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
  6002. # [inline (always)]
  6003. pub fn r16_spi1_total_cnt (& self) -> R16_SPI1_TOTAL_CNT_R { R16_SPI1_TOTAL_CNT_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
  6004. # [inline (always)]
  6005. pub fn r16_spi1_total_cnt (& mut self) -> R16_SPI1_TOTAL_CNT_W { R16_SPI1_TOTAL_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  6006. # [inline (always)]
  6007. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 total byte count, only low 12 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_spi1_total_cnt](index.html) module"]
  6008. pub struct R16_SPI1_TOTAL_CNT_SPEC ; impl crate :: RegisterSpec for R16_SPI1_TOTAL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_spi1_total_cnt::R](R) reader structure"]
  6009. impl crate :: Readable for R16_SPI1_TOTAL_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_spi1_total_cnt::W](W) writer structure"]
  6010. impl crate :: Writable for R16_SPI1_TOTAL_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SPI1_TOTAL_CNT to value 0"]
  6011. impl crate :: Resettable for R16_SPI1_TOTAL_CNT_SPEC { # [inline (always)]
  6012. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO register accessor: an alias for `Reg<R8_SPI1_FIFO_SPEC>`"]
  6013. pub type R8_SPI1_FIFO = crate :: Reg < r8_spi1_fifo :: R8_SPI1_FIFO_SPEC > ; # [doc = "SPI1 FIFO register"]
  6014. pub mod r8_spi1_fifo { # [doc = "Register `R8_SPI1_FIFO` reader"]
  6015. pub struct R (crate :: R < R8_SPI1_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_SPEC > ; # [inline (always)]
  6016. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_SPEC >> for R { # [inline (always)]
  6017. fn from (reader : crate :: R < R8_SPI1_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO` writer"]
  6018. pub struct W (crate :: W < R8_SPI1_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_SPEC > ; # [inline (always)]
  6019. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6020. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_SPEC >> for W { # [inline (always)]
  6021. fn from (writer : crate :: W < R8_SPI1_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO` reader - SPI FIFO register"]
  6022. pub struct R8_SPI1_FIFO_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6023. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO` writer - SPI FIFO register"]
  6024. pub struct R8_SPI1_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6025. # [inline (always)]
  6026. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO register"]
  6027. # [inline (always)]
  6028. pub fn r8_spi1_fifo (& self) -> R8_SPI1_FIFO_R { R8_SPI1_FIFO_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO register"]
  6029. # [inline (always)]
  6030. pub fn r8_spi1_fifo (& mut self) -> R8_SPI1_FIFO_W { R8_SPI1_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
  6031. # [inline (always)]
  6032. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 FIFO register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo](index.html) module"]
  6033. pub struct R8_SPI1_FIFO_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo::R](R) reader structure"]
  6034. impl crate :: Readable for R8_SPI1_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo::W](W) writer structure"]
  6035. impl crate :: Writable for R8_SPI1_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO to value 0"]
  6036. impl crate :: Resettable for R8_SPI1_FIFO_SPEC { # [inline (always)]
  6037. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO_COUNT1 register accessor: an alias for `Reg<R8_SPI1_FIFO_COUNT1_SPEC>`"]
  6038. pub type R8_SPI1_FIFO_COUNT1 = crate :: Reg < r8_spi1_fifo_count1 :: R8_SPI1_FIFO_COUNT1_SPEC > ; # [doc = "SPI0 FIFO count status"]
  6039. pub mod r8_spi1_fifo_count1 { # [doc = "Register `R8_SPI1_FIFO_COUNT1` reader"]
  6040. pub struct R (crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_COUNT1_SPEC > ; # [inline (always)]
  6041. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >> for R { # [inline (always)]
  6042. fn from (reader : crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO_COUNT1` writer"]
  6043. pub struct W (crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_COUNT1_SPEC > ; # [inline (always)]
  6044. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6045. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >> for W { # [inline (always)]
  6046. fn from (writer : crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO_COUNT1` reader - SPI FIFO count statu"]
  6047. pub struct R8_SPI1_FIFO_COUNT1_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_COUNT1_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_COUNT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_COUNT1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6048. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO_COUNT1` writer - SPI FIFO count statu"]
  6049. pub struct R8_SPI1_FIFO_COUNT1_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_COUNT1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6050. # [inline (always)]
  6051. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count statu"]
  6052. # [inline (always)]
  6053. pub fn r8_spi1_fifo_count1 (& self) -> R8_SPI1_FIFO_COUNT1_R { R8_SPI1_FIFO_COUNT1_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count statu"]
  6054. # [inline (always)]
  6055. pub fn r8_spi1_fifo_count1 (& mut self) -> R8_SPI1_FIFO_COUNT1_W { R8_SPI1_FIFO_COUNT1_W { w : self } } # [doc = "Writes raw bits to the register."]
  6056. # [inline (always)]
  6057. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo_count1](index.html) module"]
  6058. pub struct R8_SPI1_FIFO_COUNT1_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_COUNT1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo_count1::R](R) reader structure"]
  6059. impl crate :: Readable for R8_SPI1_FIFO_COUNT1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo_count1::W](W) writer structure"]
  6060. impl crate :: Writable for R8_SPI1_FIFO_COUNT1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO_COUNT1 to value 0"]
  6061. impl crate :: Resettable for R8_SPI1_FIFO_COUNT1_SPEC { # [inline (always)]
  6062. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_NOW register accessor: an alias for `Reg<R32_SPI1_DMA_NOW_SPEC>`"]
  6063. pub type R32_SPI1_DMA_NOW = crate :: Reg < r32_spi1_dma_now :: R32_SPI1_DMA_NOW_SPEC > ; # [doc = "SPI1 DMA current address"]
  6064. pub mod r32_spi1_dma_now { # [doc = "Register `R32_SPI1_DMA_NOW` reader"]
  6065. pub struct R (crate :: R < R32_SPI1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_NOW_SPEC > ; # [inline (always)]
  6066. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_NOW_SPEC >> for R { # [inline (always)]
  6067. fn from (reader : crate :: R < R32_SPI1_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_NOW` writer"]
  6068. pub struct W (crate :: W < R32_SPI1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_NOW_SPEC > ; # [inline (always)]
  6069. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6070. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_NOW_SPEC >> for W { # [inline (always)]
  6071. fn from (writer : crate :: W < R32_SPI1_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_NOW` reader - SPI DMA current address"]
  6072. pub struct R16_SPI1_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6073. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_NOW` writer - SPI DMA current address"]
  6074. pub struct R16_SPI1_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6075. # [inline (always)]
  6076. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA current address"]
  6077. # [inline (always)]
  6078. pub fn r16_spi1_dma_now (& self) -> R16_SPI1_DMA_NOW_R { R16_SPI1_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA current address"]
  6079. # [inline (always)]
  6080. pub fn r16_spi1_dma_now (& mut self) -> R16_SPI1_DMA_NOW_W { R16_SPI1_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
  6081. # [inline (always)]
  6082. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_now](index.html) module"]
  6083. pub struct R32_SPI1_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_now::R](R) reader structure"]
  6084. impl crate :: Readable for R32_SPI1_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_now::W](W) writer structure"]
  6085. impl crate :: Writable for R32_SPI1_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_NOW to value 0"]
  6086. impl crate :: Resettable for R32_SPI1_DMA_NOW_SPEC { # [inline (always)]
  6087. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_BEG register accessor: an alias for `Reg<R32_SPI1_DMA_BEG_SPEC>`"]
  6088. pub type R32_SPI1_DMA_BEG = crate :: Reg < r32_spi1_dma_beg :: R32_SPI1_DMA_BEG_SPEC > ; # [doc = "SPI1 DMA begin address"]
  6089. pub mod r32_spi1_dma_beg { # [doc = "Register `R32_SPI1_DMA_BEG` reader"]
  6090. pub struct R (crate :: R < R32_SPI1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_BEG_SPEC > ; # [inline (always)]
  6091. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_BEG_SPEC >> for R { # [inline (always)]
  6092. fn from (reader : crate :: R < R32_SPI1_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_BEG` writer"]
  6093. pub struct W (crate :: W < R32_SPI1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_BEG_SPEC > ; # [inline (always)]
  6094. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6095. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_BEG_SPEC >> for W { # [inline (always)]
  6096. fn from (writer : crate :: W < R32_SPI1_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_BEG` reader - SPI DMA begin address"]
  6097. pub struct R16_SPI1_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6098. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_BEG` writer - SPI DMA begin address"]
  6099. pub struct R16_SPI1_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6100. # [inline (always)]
  6101. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA begin address"]
  6102. # [inline (always)]
  6103. pub fn r16_spi1_dma_beg (& self) -> R16_SPI1_DMA_BEG_R { R16_SPI1_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA begin address"]
  6104. # [inline (always)]
  6105. pub fn r16_spi1_dma_beg (& mut self) -> R16_SPI1_DMA_BEG_W { R16_SPI1_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
  6106. # [inline (always)]
  6107. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_beg](index.html) module"]
  6108. pub struct R32_SPI1_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_beg::R](R) reader structure"]
  6109. impl crate :: Readable for R32_SPI1_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_beg::W](W) writer structure"]
  6110. impl crate :: Writable for R32_SPI1_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_BEG to value 0"]
  6111. impl crate :: Resettable for R32_SPI1_DMA_BEG_SPEC { # [inline (always)]
  6112. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_END register accessor: an alias for `Reg<R32_SPI1_DMA_END_SPEC>`"]
  6113. pub type R32_SPI1_DMA_END = crate :: Reg < r32_spi1_dma_end :: R32_SPI1_DMA_END_SPEC > ; # [doc = "SPI1 DMA end address"]
  6114. pub mod r32_spi1_dma_end { # [doc = "Register `R32_SPI1_DMA_END` reader"]
  6115. pub struct R (crate :: R < R32_SPI1_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_END_SPEC > ; # [inline (always)]
  6116. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_END_SPEC >> for R { # [inline (always)]
  6117. fn from (reader : crate :: R < R32_SPI1_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_END` writer"]
  6118. pub struct W (crate :: W < R32_SPI1_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_END_SPEC > ; # [inline (always)]
  6119. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6120. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_END_SPEC >> for W { # [inline (always)]
  6121. fn from (writer : crate :: W < R32_SPI1_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_END` reader - SPI DMA end address"]
  6122. pub struct R16_SPI1_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6123. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_END` writer - SPI DMA end address"]
  6124. pub struct R16_SPI1_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6125. # [inline (always)]
  6126. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA end address"]
  6127. # [inline (always)]
  6128. pub fn r16_spi1_dma_end (& self) -> R16_SPI1_DMA_END_R { R16_SPI1_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA end address"]
  6129. # [inline (always)]
  6130. pub fn r16_spi1_dma_end (& mut self) -> R16_SPI1_DMA_END_W { R16_SPI1_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
  6131. # [inline (always)]
  6132. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_end](index.html) module"]
  6133. pub struct R32_SPI1_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_end::R](R) reader structure"]
  6134. impl crate :: Readable for R32_SPI1_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_end::W](W) writer structure"]
  6135. impl crate :: Writable for R32_SPI1_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_END to value 0"]
  6136. impl crate :: Resettable for R32_SPI1_DMA_END_SPEC { # [inline (always)]
  6137. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "PWMX register"]
  6138. pub struct PWMX { _marker : PhantomData < * const () > } unsafe impl Send for PWMX { } impl PWMX { # [doc = r"Pointer to the register block"]
  6139. pub const PTR : * const pwmx :: RegisterBlock = 0x4000_5000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  6140. # [inline (always)]
  6141. pub const fn ptr () -> * const pwmx :: RegisterBlock { Self :: PTR } } impl Deref for PWMX { type Target = pwmx :: RegisterBlock ; # [inline (always)]
  6142. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for PWMX { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("PWMX") . finish () } } # [doc = "PWMX register"]
  6143. pub mod pwmx { # [doc = r"Register block"]
  6144. # [repr (C)]
  6145. pub struct RegisterBlock { # [doc = "0x00 - PWM mode control"]
  6146. pub r8_pwm_ctrl_mod : crate :: Reg < r8_pwm_ctrl_mod :: R8_PWM_CTRL_MOD_SPEC > , # [doc = "0x01 - PWM configuration control"]
  6147. pub r8_pwm_ctrl_cfg : crate :: Reg < r8_pwm_ctrl_cfg :: R8_PWM_CTRL_CFG_SPEC > , # [doc = "0x02 - PWM clock divisor"]
  6148. pub r8_pwm_clock_div : crate :: Reg < r8_pwm_clock_div :: R8_PWM_CLOCK_DIV_SPEC > , _reserved3 : [u8 ; 0x01]
  6149. , # [doc = "0x04 - PWM data holding"]
  6150. pub r8_pwm0_data : crate :: Reg < r8_pwm0_data :: R8_PWM0_DATA_SPEC > , # [doc = "0x05 - PWM1 data holding"]
  6151. pub r8_pwm1_data : crate :: Reg < r8_pwm1_data :: R8_PWM1_DATA_SPEC > , # [doc = "0x06 - PWM2 data holding"]
  6152. pub r8_pwm2_data : crate :: Reg < r8_pwm2_data :: R8_PWM2_DATA_SPEC > , # [doc = "0x07 - PWM3 data holding"]
  6153. pub r8_pwm3_data : crate :: Reg < r8_pwm3_data :: R8_PWM3_DATA_SPEC > , } # [doc = "R8_PWM_CTRL_MOD register accessor: an alias for `Reg<R8_PWM_CTRL_MOD_SPEC>`"]
  6154. pub type R8_PWM_CTRL_MOD = crate :: Reg < r8_pwm_ctrl_mod :: R8_PWM_CTRL_MOD_SPEC > ; # [doc = "PWM mode control"]
  6155. pub mod r8_pwm_ctrl_mod { # [doc = "Register `R8_PWM_CTRL_MOD` reader"]
  6156. pub struct R (crate :: R < R8_PWM_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CTRL_MOD_SPEC > ; # [inline (always)]
  6157. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CTRL_MOD_SPEC >> for R { # [inline (always)]
  6158. fn from (reader : crate :: R < R8_PWM_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CTRL_MOD` writer"]
  6159. pub struct W (crate :: W < R8_PWM_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CTRL_MOD_SPEC > ; # [inline (always)]
  6160. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6161. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CTRL_MOD_SPEC >> for W { # [inline (always)]
  6162. fn from (writer : crate :: W < R8_PWM_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PWM0_OUT_EN` reader - PWM0 output enable"]
  6163. pub struct RB_PWM0_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM0_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM0_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM0_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6164. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM0_OUT_EN` writer - PWM0 output enable"]
  6165. pub struct RB_PWM0_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM0_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6166. # [inline (always)]
  6167. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6168. # [inline (always)]
  6169. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6170. # [inline (always)]
  6171. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_PWM1_OUT_EN` reader - PWM1 output enable"]
  6172. pub struct RB_PWM1_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM1_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM1_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM1_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6173. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM1_OUT_EN` writer - PWM1 output enable"]
  6174. pub struct RB_PWM1_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM1_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6175. # [inline (always)]
  6176. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6177. # [inline (always)]
  6178. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6179. # [inline (always)]
  6180. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_PWM2_OUT_EN` reader - PWM2 output enable"]
  6181. pub struct RB_PWM2_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM2_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM2_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM2_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6182. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM2_OUT_EN` writer - PWM2 output enable"]
  6183. pub struct RB_PWM2_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM2_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6184. # [inline (always)]
  6185. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6186. # [inline (always)]
  6187. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6188. # [inline (always)]
  6189. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_PWM3_OUT_EN` reader - PWM3 output enable"]
  6190. pub struct RB_PWM3_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM3_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM3_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM3_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6191. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM3_OUT_EN` writer - PWM3 output enable"]
  6192. pub struct RB_PWM3_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM3_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6193. # [inline (always)]
  6194. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6195. # [inline (always)]
  6196. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6197. # [inline (always)]
  6198. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_PWM0_POLAR` reader - PWM0 output polarity"]
  6199. pub struct RB_PWM0_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM0_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM0_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM0_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6200. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM0_POLAR` writer - PWM0 output polarity"]
  6201. pub struct RB_PWM0_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM0_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  6202. # [inline (always)]
  6203. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6204. # [inline (always)]
  6205. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6206. # [inline (always)]
  6207. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_PWM1_POLAR` reader - PWM1 output polarity"]
  6208. pub struct RB_PWM1_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM1_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM1_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM1_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6209. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM1_POLAR` writer - PWM1 output polarity"]
  6210. pub struct RB_PWM1_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM1_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  6211. # [inline (always)]
  6212. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6213. # [inline (always)]
  6214. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6215. # [inline (always)]
  6216. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_PWM2_POLAR` reader - PWM2 output polarity"]
  6217. pub struct RB_PWM2_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM2_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM2_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM2_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6218. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM2_POLAR` writer - PWM2 output polarity"]
  6219. pub struct RB_PWM2_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM2_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  6220. # [inline (always)]
  6221. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6222. # [inline (always)]
  6223. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6224. # [inline (always)]
  6225. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_PWM3_POLAR` reader - PWM3 output polarity"]
  6226. pub struct RB_PWM3_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM3_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM3_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM3_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6227. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM3_POLAR` writer - PWM3 output polarity"]
  6228. pub struct RB_PWM3_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM3_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  6229. # [inline (always)]
  6230. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6231. # [inline (always)]
  6232. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6233. # [inline (always)]
  6234. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - PWM0 output enable"]
  6235. # [inline (always)]
  6236. pub fn rb_pwm0_out_en (& self) -> RB_PWM0_OUT_EN_R { RB_PWM0_OUT_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - PWM1 output enable"]
  6237. # [inline (always)]
  6238. pub fn rb_pwm1_out_en (& self) -> RB_PWM1_OUT_EN_R { RB_PWM1_OUT_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - PWM2 output enable"]
  6239. # [inline (always)]
  6240. pub fn rb_pwm2_out_en (& self) -> RB_PWM2_OUT_EN_R { RB_PWM2_OUT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - PWM3 output enable"]
  6241. # [inline (always)]
  6242. pub fn rb_pwm3_out_en (& self) -> RB_PWM3_OUT_EN_R { RB_PWM3_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - PWM0 output polarity"]
  6243. # [inline (always)]
  6244. pub fn rb_pwm0_polar (& self) -> RB_PWM0_POLAR_R { RB_PWM0_POLAR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - PWM1 output polarity"]
  6245. # [inline (always)]
  6246. pub fn rb_pwm1_polar (& self) -> RB_PWM1_POLAR_R { RB_PWM1_POLAR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - PWM2 output polarity"]
  6247. # [inline (always)]
  6248. pub fn rb_pwm2_polar (& self) -> RB_PWM2_POLAR_R { RB_PWM2_POLAR_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - PWM3 output polarity"]
  6249. # [inline (always)]
  6250. pub fn rb_pwm3_polar (& self) -> RB_PWM3_POLAR_R { RB_PWM3_POLAR_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PWM0 output enable"]
  6251. # [inline (always)]
  6252. pub fn rb_pwm0_out_en (& mut self) -> RB_PWM0_OUT_EN_W { RB_PWM0_OUT_EN_W { w : self } } # [doc = "Bit 1 - PWM1 output enable"]
  6253. # [inline (always)]
  6254. pub fn rb_pwm1_out_en (& mut self) -> RB_PWM1_OUT_EN_W { RB_PWM1_OUT_EN_W { w : self } } # [doc = "Bit 2 - PWM2 output enable"]
  6255. # [inline (always)]
  6256. pub fn rb_pwm2_out_en (& mut self) -> RB_PWM2_OUT_EN_W { RB_PWM2_OUT_EN_W { w : self } } # [doc = "Bit 3 - PWM3 output enable"]
  6257. # [inline (always)]
  6258. pub fn rb_pwm3_out_en (& mut self) -> RB_PWM3_OUT_EN_W { RB_PWM3_OUT_EN_W { w : self } } # [doc = "Bit 4 - PWM0 output polarity"]
  6259. # [inline (always)]
  6260. pub fn rb_pwm0_polar (& mut self) -> RB_PWM0_POLAR_W { RB_PWM0_POLAR_W { w : self } } # [doc = "Bit 5 - PWM1 output polarity"]
  6261. # [inline (always)]
  6262. pub fn rb_pwm1_polar (& mut self) -> RB_PWM1_POLAR_W { RB_PWM1_POLAR_W { w : self } } # [doc = "Bit 6 - PWM2 output polarity"]
  6263. # [inline (always)]
  6264. pub fn rb_pwm2_polar (& mut self) -> RB_PWM2_POLAR_W { RB_PWM2_POLAR_W { w : self } } # [doc = "Bit 7 - PWM3 output polarity"]
  6265. # [inline (always)]
  6266. pub fn rb_pwm3_polar (& mut self) -> RB_PWM3_POLAR_W { RB_PWM3_POLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  6267. # [inline (always)]
  6268. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_ctrl_mod](index.html) module"]
  6269. pub struct R8_PWM_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_PWM_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_ctrl_mod::R](R) reader structure"]
  6270. impl crate :: Readable for R8_PWM_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_ctrl_mod::W](W) writer structure"]
  6271. impl crate :: Writable for R8_PWM_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CTRL_MOD to value 0"]
  6272. impl crate :: Resettable for R8_PWM_CTRL_MOD_SPEC { # [inline (always)]
  6273. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM_CTRL_CFG register accessor: an alias for `Reg<R8_PWM_CTRL_CFG_SPEC>`"]
  6274. pub type R8_PWM_CTRL_CFG = crate :: Reg < r8_pwm_ctrl_cfg :: R8_PWM_CTRL_CFG_SPEC > ; # [doc = "PWM configuration control"]
  6275. pub mod r8_pwm_ctrl_cfg { # [doc = "Register `R8_PWM_CTRL_CFG` reader"]
  6276. pub struct R (crate :: R < R8_PWM_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CTRL_CFG_SPEC > ; # [inline (always)]
  6277. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CTRL_CFG_SPEC >> for R { # [inline (always)]
  6278. fn from (reader : crate :: R < R8_PWM_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CTRL_CFG` writer"]
  6279. pub struct W (crate :: W < R8_PWM_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CTRL_CFG_SPEC > ; # [inline (always)]
  6280. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6281. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CTRL_CFG_SPEC >> for W { # [inline (always)]
  6282. fn from (writer : crate :: W < R8_PWM_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PWM_CYCLE_SEL` reader - PWM cycle selection"]
  6283. pub struct RB_PWM_CYCLE_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM_CYCLE_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM_CYCLE_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM_CYCLE_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6284. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM_CYCLE_SEL` writer - PWM cycle selection"]
  6285. pub struct RB_PWM_CYCLE_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM_CYCLE_SEL_W < 'a > { # [doc = r"Sets the field bit"]
  6286. # [inline (always)]
  6287. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6288. # [inline (always)]
  6289. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6290. # [inline (always)]
  6291. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PWM cycle selection"]
  6292. # [inline (always)]
  6293. pub fn rb_pwm_cycle_sel (& self) -> RB_PWM_CYCLE_SEL_R { RB_PWM_CYCLE_SEL_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PWM cycle selection"]
  6294. # [inline (always)]
  6295. pub fn rb_pwm_cycle_sel (& mut self) -> RB_PWM_CYCLE_SEL_W { RB_PWM_CYCLE_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
  6296. # [inline (always)]
  6297. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_ctrl_cfg](index.html) module"]
  6298. pub struct R8_PWM_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_PWM_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_ctrl_cfg::R](R) reader structure"]
  6299. impl crate :: Readable for R8_PWM_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_ctrl_cfg::W](W) writer structure"]
  6300. impl crate :: Writable for R8_PWM_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CTRL_CFG to value 0"]
  6301. impl crate :: Resettable for R8_PWM_CTRL_CFG_SPEC { # [inline (always)]
  6302. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM_CLOCK_DIV register accessor: an alias for `Reg<R8_PWM_CLOCK_DIV_SPEC>`"]
  6303. pub type R8_PWM_CLOCK_DIV = crate :: Reg < r8_pwm_clock_div :: R8_PWM_CLOCK_DIV_SPEC > ; # [doc = "PWM clock divisor"]
  6304. pub mod r8_pwm_clock_div { # [doc = "Register `R8_PWM_CLOCK_DIV` reader"]
  6305. pub struct R (crate :: R < R8_PWM_CLOCK_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CLOCK_DIV_SPEC > ; # [inline (always)]
  6306. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CLOCK_DIV_SPEC >> for R { # [inline (always)]
  6307. fn from (reader : crate :: R < R8_PWM_CLOCK_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CLOCK_DIV` writer"]
  6308. pub struct W (crate :: W < R8_PWM_CLOCK_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CLOCK_DIV_SPEC > ; # [inline (always)]
  6309. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6310. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CLOCK_DIV_SPEC >> for W { # [inline (always)]
  6311. fn from (writer : crate :: W < R8_PWM_CLOCK_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM_CLOCK_DIV` reader - PWM clock divisor"]
  6312. pub struct R8_PWM_CLOCK_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM_CLOCK_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM_CLOCK_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM_CLOCK_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6313. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM_CLOCK_DIV` writer - PWM clock divisor"]
  6314. pub struct R8_PWM_CLOCK_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM_CLOCK_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6315. # [inline (always)]
  6316. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - PWM clock divisor"]
  6317. # [inline (always)]
  6318. pub fn r8_pwm_clock_div (& self) -> R8_PWM_CLOCK_DIV_R { R8_PWM_CLOCK_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - PWM clock divisor"]
  6319. # [inline (always)]
  6320. pub fn r8_pwm_clock_div (& mut self) -> R8_PWM_CLOCK_DIV_W { R8_PWM_CLOCK_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
  6321. # [inline (always)]
  6322. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM clock divisor\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_clock_div](index.html) module"]
  6323. pub struct R8_PWM_CLOCK_DIV_SPEC ; impl crate :: RegisterSpec for R8_PWM_CLOCK_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_clock_div::R](R) reader structure"]
  6324. impl crate :: Readable for R8_PWM_CLOCK_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_clock_div::W](W) writer structure"]
  6325. impl crate :: Writable for R8_PWM_CLOCK_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CLOCK_DIV to value 0"]
  6326. impl crate :: Resettable for R8_PWM_CLOCK_DIV_SPEC { # [inline (always)]
  6327. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM0_DATA register accessor: an alias for `Reg<R8_PWM0_DATA_SPEC>`"]
  6328. pub type R8_PWM0_DATA = crate :: Reg < r8_pwm0_data :: R8_PWM0_DATA_SPEC > ; # [doc = "PWM data holding"]
  6329. pub mod r8_pwm0_data { # [doc = "Register `R8_PWM0_DATA` reader"]
  6330. pub struct R (crate :: R < R8_PWM0_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM0_DATA_SPEC > ; # [inline (always)]
  6331. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM0_DATA_SPEC >> for R { # [inline (always)]
  6332. fn from (reader : crate :: R < R8_PWM0_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM0_DATA` writer"]
  6333. pub struct W (crate :: W < R8_PWM0_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM0_DATA_SPEC > ; # [inline (always)]
  6334. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6335. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM0_DATA_SPEC >> for W { # [inline (always)]
  6336. fn from (writer : crate :: W < R8_PWM0_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM0_DATA` reader - PWM0 data holding"]
  6337. pub struct R8_PWM0_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM0_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM0_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM0_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6338. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM0_DATA` writer - PWM0 data holding"]
  6339. pub struct R8_PWM0_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM0_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6340. # [inline (always)]
  6341. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - PWM0 data holding"]
  6342. # [inline (always)]
  6343. pub fn r8_pwm0_data (& self) -> R8_PWM0_DATA_R { R8_PWM0_DATA_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - PWM0 data holding"]
  6344. # [inline (always)]
  6345. pub fn r8_pwm0_data (& mut self) -> R8_PWM0_DATA_W { R8_PWM0_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
  6346. # [inline (always)]
  6347. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm0_data](index.html) module"]
  6348. pub struct R8_PWM0_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM0_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm0_data::R](R) reader structure"]
  6349. impl crate :: Readable for R8_PWM0_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm0_data::W](W) writer structure"]
  6350. impl crate :: Writable for R8_PWM0_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM0_DATA to value 0"]
  6351. impl crate :: Resettable for R8_PWM0_DATA_SPEC { # [inline (always)]
  6352. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM1_DATA register accessor: an alias for `Reg<R8_PWM1_DATA_SPEC>`"]
  6353. pub type R8_PWM1_DATA = crate :: Reg < r8_pwm1_data :: R8_PWM1_DATA_SPEC > ; # [doc = "PWM1 data holding"]
  6354. pub mod r8_pwm1_data { # [doc = "Register `R8_PWM1_DATA` reader"]
  6355. pub struct R (crate :: R < R8_PWM1_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM1_DATA_SPEC > ; # [inline (always)]
  6356. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM1_DATA_SPEC >> for R { # [inline (always)]
  6357. fn from (reader : crate :: R < R8_PWM1_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM1_DATA` writer"]
  6358. pub struct W (crate :: W < R8_PWM1_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM1_DATA_SPEC > ; # [inline (always)]
  6359. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6360. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM1_DATA_SPEC >> for W { # [inline (always)]
  6361. fn from (writer : crate :: W < R8_PWM1_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM1_DATA` reader - PWM1 data holding"]
  6362. pub struct R8_PWM1_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM1_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM1_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM1_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6363. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM1_DATA` writer - PWM1 data holding"]
  6364. pub struct R8_PWM1_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM1_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6365. # [inline (always)]
  6366. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 8)) | ((value as u8 & 0xff) << 8) ; self . w } } impl R { # [doc = "Bits 8:15 - PWM1 data holding"]
  6367. # [inline (always)]
  6368. pub fn r8_pwm1_data (& self) -> R8_PWM1_DATA_R { R8_PWM1_DATA_R :: new (((self . bits >> 8) & 0xff) as u8) } } impl W { # [doc = "Bits 8:15 - PWM1 data holding"]
  6369. # [inline (always)]
  6370. pub fn r8_pwm1_data (& mut self) -> R8_PWM1_DATA_W { R8_PWM1_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
  6371. # [inline (always)]
  6372. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM1 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm1_data](index.html) module"]
  6373. pub struct R8_PWM1_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM1_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm1_data::R](R) reader structure"]
  6374. impl crate :: Readable for R8_PWM1_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm1_data::W](W) writer structure"]
  6375. impl crate :: Writable for R8_PWM1_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM1_DATA to value 0"]
  6376. impl crate :: Resettable for R8_PWM1_DATA_SPEC { # [inline (always)]
  6377. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM2_DATA register accessor: an alias for `Reg<R8_PWM2_DATA_SPEC>`"]
  6378. pub type R8_PWM2_DATA = crate :: Reg < r8_pwm2_data :: R8_PWM2_DATA_SPEC > ; # [doc = "PWM2 data holding"]
  6379. pub mod r8_pwm2_data { # [doc = "Register `R8_PWM2_DATA` reader"]
  6380. pub struct R (crate :: R < R8_PWM2_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM2_DATA_SPEC > ; # [inline (always)]
  6381. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM2_DATA_SPEC >> for R { # [inline (always)]
  6382. fn from (reader : crate :: R < R8_PWM2_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM2_DATA` writer"]
  6383. pub struct W (crate :: W < R8_PWM2_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM2_DATA_SPEC > ; # [inline (always)]
  6384. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6385. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM2_DATA_SPEC >> for W { # [inline (always)]
  6386. fn from (writer : crate :: W < R8_PWM2_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM2_DATA` reader - PWM2 data holding"]
  6387. pub struct R8_PWM2_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM2_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM2_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM2_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6388. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM2_DATA` writer - PWM2 data holding"]
  6389. pub struct R8_PWM2_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM2_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6390. # [inline (always)]
  6391. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 16)) | ((value as u8 & 0xff) << 16) ; self . w } } impl R { # [doc = "Bits 16:23 - PWM2 data holding"]
  6392. # [inline (always)]
  6393. pub fn r8_pwm2_data (& self) -> R8_PWM2_DATA_R { R8_PWM2_DATA_R :: new (((self . bits >> 16) & 0xff) as u8) } } impl W { # [doc = "Bits 16:23 - PWM2 data holding"]
  6394. # [inline (always)]
  6395. pub fn r8_pwm2_data (& mut self) -> R8_PWM2_DATA_W { R8_PWM2_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
  6396. # [inline (always)]
  6397. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM2 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm2_data](index.html) module"]
  6398. pub struct R8_PWM2_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM2_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm2_data::R](R) reader structure"]
  6399. impl crate :: Readable for R8_PWM2_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm2_data::W](W) writer structure"]
  6400. impl crate :: Writable for R8_PWM2_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM2_DATA to value 0"]
  6401. impl crate :: Resettable for R8_PWM2_DATA_SPEC { # [inline (always)]
  6402. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM3_DATA register accessor: an alias for `Reg<R8_PWM3_DATA_SPEC>`"]
  6403. pub type R8_PWM3_DATA = crate :: Reg < r8_pwm3_data :: R8_PWM3_DATA_SPEC > ; # [doc = "PWM3 data holding"]
  6404. pub mod r8_pwm3_data { # [doc = "Register `R8_PWM3_DATA` reader"]
  6405. pub struct R (crate :: R < R8_PWM3_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM3_DATA_SPEC > ; # [inline (always)]
  6406. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM3_DATA_SPEC >> for R { # [inline (always)]
  6407. fn from (reader : crate :: R < R8_PWM3_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM3_DATA` writer"]
  6408. pub struct W (crate :: W < R8_PWM3_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM3_DATA_SPEC > ; # [inline (always)]
  6409. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6410. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM3_DATA_SPEC >> for W { # [inline (always)]
  6411. fn from (writer : crate :: W < R8_PWM3_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM3_DATA` reader - PWM3 data holding"]
  6412. pub struct R8_PWM3_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM3_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM3_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM3_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6413. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM3_DATA` writer - PWM3 data holding"]
  6414. pub struct R8_PWM3_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM3_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6415. # [inline (always)]
  6416. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u8 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 24:31 - PWM3 data holding"]
  6417. # [inline (always)]
  6418. pub fn r8_pwm3_data (& self) -> R8_PWM3_DATA_R { R8_PWM3_DATA_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 24:31 - PWM3 data holding"]
  6419. # [inline (always)]
  6420. pub fn r8_pwm3_data (& mut self) -> R8_PWM3_DATA_W { R8_PWM3_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
  6421. # [inline (always)]
  6422. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM3 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm3_data](index.html) module"]
  6423. pub struct R8_PWM3_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM3_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm3_data::R](R) reader structure"]
  6424. impl crate :: Readable for R8_PWM3_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm3_data::W](W) writer structure"]
  6425. impl crate :: Writable for R8_PWM3_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM3_DATA to value 0"]
  6426. impl crate :: Resettable for R8_PWM3_DATA_SPEC { # [inline (always)]
  6427. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "HSPI register"]
  6428. pub struct HSPI { _marker : PhantomData < * const () > } unsafe impl Send for HSPI { } impl HSPI { # [doc = r"Pointer to the register block"]
  6429. pub const PTR : * const hspi :: RegisterBlock = 0x4000_6000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  6430. # [inline (always)]
  6431. pub const fn ptr () -> * const hspi :: RegisterBlock { Self :: PTR } } impl Deref for HSPI { type Target = hspi :: RegisterBlock ; # [inline (always)]
  6432. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for HSPI { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("HSPI") . finish () } } # [doc = "HSPI register"]
  6433. pub mod hspi { # [doc = r"Register block"]
  6434. # [repr (C)]
  6435. pub struct RegisterBlock { # [doc = "0x00 - parallel if tx or rx cfg"]
  6436. pub r8_hspi_cfg : crate :: Reg < r8_hspi_cfg :: R8_HSPI_CFG_SPEC > , # [doc = "0x01 - parallel if tx or rx control"]
  6437. pub r8_hspi_ctrl : crate :: Reg < r8_hspi_ctrl :: R8_HSPI_CTRL_SPEC > , # [doc = "0x02 - parallel if interrupt enable register"]
  6438. pub r8_hspi_int_en : crate :: Reg < r8_hspi_int_en :: R8_HSPI_INT_EN_SPEC > , # [doc = "0x03 - parallel if aux"]
  6439. pub r8_hspi_aux : crate :: Reg < r8_hspi_aux :: R8_HSPI_AUX_SPEC > , # [doc = "0x04 - parallel if dma tx addr0"]
  6440. pub r32_hspi_tx_addr0 : crate :: Reg < r32_hspi_tx_addr0 :: R32_HSPI_TX_ADDR0_SPEC > , # [doc = "0x08 - parallel if dma tx addr1"]
  6441. pub r32_hspi_tx_addr1 : crate :: Reg < r32_hspi_tx_addr1 :: R32_HSPI_TX_ADDR1_SPEC > , # [doc = "0x0c - parallel if dma rx addr0"]
  6442. pub r32_hspi_rx_addr0 : crate :: Reg < r32_hspi_rx_addr0 :: R32_HSPI_RX_ADDR0_SPEC > , # [doc = "0x10 - parallel if dma rx addr1"]
  6443. pub r32_hspi_rx_addr1 : crate :: Reg < r32_hspi_rx_addr1 :: R32_HSPI_RX_ADDR1_SPEC > , # [doc = "0x14 - parallel if dma length0"]
  6444. pub r16_hspi_dma_len0 : crate :: Reg < r16_hspi_dma_len0 :: R16_HSPI_DMA_LEN0_SPEC > , # [doc = "0x16 - parallel if receive length0"]
  6445. pub r16_hspi_rx_len0 : crate :: Reg < r16_hspi_rx_len0 :: R16_HSPI_RX_LEN0_SPEC > , # [doc = "0x18 - parallel if dma length1"]
  6446. pub r16_hspi_dma_len1 : crate :: Reg < r16_hspi_dma_len1 :: R16_HSPI_DMA_LEN1_SPEC > , # [doc = "0x1a - parallel if receive length1"]
  6447. pub r16_hspi_rx_len1 : crate :: Reg < r16_hspi_rx_len1 :: R16_HSPI_RX_LEN1_SPEC > , # [doc = "0x1c - parallel if tx burst config register"]
  6448. pub r16_hspi_burst_cfg : crate :: Reg < r16_hspi_burst_cfg :: R16_HSPI_BURST_CFG_SPEC > , # [doc = "0x1e - parallel if tx burst count"]
  6449. pub r8_hspi_burst_cnt : crate :: Reg < r8_hspi_burst_cnt :: R8_HSPI_BURST_CNT_SPEC > , _reserved14 : [u8 ; 0x01]
  6450. , # [doc = "0x20 - parallel if user defined field 0 register"]
  6451. pub r32_hspi_udf0 : crate :: Reg < r32_hspi_udf0 :: R32_HSPI_UDF0_SPEC > , # [doc = "0x24 - parallel if user defined field 1 register"]
  6452. pub r32_hspi_udf1 : crate :: Reg < r32_hspi_udf1 :: R32_HSPI_UDF1_SPEC > , # [doc = "0x28 - parallel if interrupt flag"]
  6453. pub r8_hspi_int_flag : crate :: Reg < r8_hspi_int_flag :: R8_HSPI_INT_FLAG_SPEC > , # [doc = "0x29 - parallel rtx status"]
  6454. pub r8_hspi_rtx_status : crate :: Reg < r8_hspi_rtx_status :: R8_HSPI_RTX_STATUS_SPEC > , # [doc = "0x2a - parallel TX sequence ctrl"]
  6455. pub r8_hspi_tx_sc : crate :: Reg < r8_hspi_tx_sc :: R8_HSPI_TX_SC_SPEC > , # [doc = "0x2b - parallel RX sequence ctrl"]
  6456. pub hspi_rx_sc : crate :: Reg < hspi_rx_sc :: HSPI_RX_SC_SPEC > , } # [doc = "R8_HSPI_CFG register accessor: an alias for `Reg<R8_HSPI_CFG_SPEC>`"]
  6457. pub type R8_HSPI_CFG = crate :: Reg < r8_hspi_cfg :: R8_HSPI_CFG_SPEC > ; # [doc = "parallel if tx or rx cfg"]
  6458. pub mod r8_hspi_cfg { # [doc = "Register `R8_HSPI_CFG` reader"]
  6459. pub struct R (crate :: R < R8_HSPI_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_CFG_SPEC > ; # [inline (always)]
  6460. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_CFG_SPEC >> for R { # [inline (always)]
  6461. fn from (reader : crate :: R < R8_HSPI_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_CFG` writer"]
  6462. pub struct W (crate :: W < R8_HSPI_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_CFG_SPEC > ; # [inline (always)]
  6463. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6464. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_CFG_SPEC >> for W { # [inline (always)]
  6465. fn from (writer : crate :: W < R8_HSPI_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_MODE` reader - parallel if mode"]
  6466. pub struct RB_HSPI_MODE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_MODE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_MODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6467. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_MODE` writer - parallel if mode"]
  6468. pub struct RB_HSPI_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_MODE_W < 'a > { # [doc = r"Sets the field bit"]
  6469. # [inline (always)]
  6470. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6471. # [inline (always)]
  6472. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6473. # [inline (always)]
  6474. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_DUALDMA` reader - parallel if dualdma mode enable"]
  6475. pub struct RB_HSPI_DUALDMA_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_DUALDMA_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_DUALDMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DUALDMA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6476. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DUALDMA` writer - parallel if dualdma mode enable"]
  6477. pub struct RB_HSPI_DUALDMA_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DUALDMA_W < 'a > { # [doc = r"Sets the field bit"]
  6478. # [inline (always)]
  6479. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6480. # [inline (always)]
  6481. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6482. # [inline (always)]
  6483. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_MSK_SIZE` reader - parallel if data mode"]
  6484. pub struct RB_HSPI_MSK_SIZE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_MSK_SIZE_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_MSK_SIZE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_MSK_SIZE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6485. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_MSK_SIZE` writer - parallel if data mode"]
  6486. pub struct RB_HSPI_MSK_SIZE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_MSK_SIZE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6487. # [inline (always)]
  6488. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 2)) | ((value as u8 & 0x03) << 2) ; self . w } } # [doc = "Field `RB_HSPI_TX_TOG_EN` reader - parallel if tx addr toggle enable"]
  6489. pub struct RB_HSPI_TX_TOG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TX_TOG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TX_TOG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_TOG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6490. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_TOG_EN` writer - parallel if tx addr toggle enable"]
  6491. pub struct RB_HSPI_TX_TOG_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_TOG_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6492. # [inline (always)]
  6493. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6494. # [inline (always)]
  6495. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6496. # [inline (always)]
  6497. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_HSPI_RX_TOG_EN` reader - parallel if rx addr toggle enable"]
  6498. pub struct RB_HSPI_RX_TOG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RX_TOG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RX_TOG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_TOG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6499. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_TOG_EN` writer - parallel if rx addr toggle enable"]
  6500. pub struct RB_HSPI_RX_TOG_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_TOG_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6501. # [inline (always)]
  6502. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6503. # [inline (always)]
  6504. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6505. # [inline (always)]
  6506. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_HSPI_HW_ACK` reader - parallel if tx ack by hardware"]
  6507. pub struct RB_HSPI_HW_ACK_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_HW_ACK_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_HW_ACK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_HW_ACK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6508. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_HW_ACK` writer - parallel if tx ack by hardware"]
  6509. pub struct RB_HSPI_HW_ACK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_HW_ACK_W < 'a > { # [doc = r"Sets the field bit"]
  6510. # [inline (always)]
  6511. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6512. # [inline (always)]
  6513. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6514. # [inline (always)]
  6515. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - parallel if mode"]
  6516. # [inline (always)]
  6517. pub fn rb_hspi_mode (& self) -> RB_HSPI_MODE_R { RB_HSPI_MODE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if dualdma mode enable"]
  6518. # [inline (always)]
  6519. pub fn rb_hspi_dualdma (& self) -> RB_HSPI_DUALDMA_R { RB_HSPI_DUALDMA_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bits 2:3 - parallel if data mode"]
  6520. # [inline (always)]
  6521. pub fn rb_hspi_msk_size (& self) -> RB_HSPI_MSK_SIZE_R { RB_HSPI_MSK_SIZE_R :: new (((self . bits >> 2) & 0x03) as u8) } # [doc = "Bit 5 - parallel if tx addr toggle enable"]
  6522. # [inline (always)]
  6523. pub fn rb_hspi_tx_tog_en (& self) -> RB_HSPI_TX_TOG_EN_R { RB_HSPI_TX_TOG_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - parallel if rx addr toggle enable"]
  6524. # [inline (always)]
  6525. pub fn rb_hspi_rx_tog_en (& self) -> RB_HSPI_RX_TOG_EN_R { RB_HSPI_RX_TOG_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - parallel if tx ack by hardware"]
  6526. # [inline (always)]
  6527. pub fn rb_hspi_hw_ack (& self) -> RB_HSPI_HW_ACK_R { RB_HSPI_HW_ACK_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if mode"]
  6528. # [inline (always)]
  6529. pub fn rb_hspi_mode (& mut self) -> RB_HSPI_MODE_W { RB_HSPI_MODE_W { w : self } } # [doc = "Bit 1 - parallel if dualdma mode enable"]
  6530. # [inline (always)]
  6531. pub fn rb_hspi_dualdma (& mut self) -> RB_HSPI_DUALDMA_W { RB_HSPI_DUALDMA_W { w : self } } # [doc = "Bits 2:3 - parallel if data mode"]
  6532. # [inline (always)]
  6533. pub fn rb_hspi_msk_size (& mut self) -> RB_HSPI_MSK_SIZE_W { RB_HSPI_MSK_SIZE_W { w : self } } # [doc = "Bit 5 - parallel if tx addr toggle enable"]
  6534. # [inline (always)]
  6535. pub fn rb_hspi_tx_tog_en (& mut self) -> RB_HSPI_TX_TOG_EN_W { RB_HSPI_TX_TOG_EN_W { w : self } } # [doc = "Bit 6 - parallel if rx addr toggle enable"]
  6536. # [inline (always)]
  6537. pub fn rb_hspi_rx_tog_en (& mut self) -> RB_HSPI_RX_TOG_EN_W { RB_HSPI_RX_TOG_EN_W { w : self } } # [doc = "Bit 7 - parallel if tx ack by hardware"]
  6538. # [inline (always)]
  6539. pub fn rb_hspi_hw_ack (& mut self) -> RB_HSPI_HW_ACK_W { RB_HSPI_HW_ACK_W { w : self } } # [doc = "Writes raw bits to the register."]
  6540. # [inline (always)]
  6541. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx or rx cfg\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_cfg](index.html) module"]
  6542. pub struct R8_HSPI_CFG_SPEC ; impl crate :: RegisterSpec for R8_HSPI_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_cfg::R](R) reader structure"]
  6543. impl crate :: Readable for R8_HSPI_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_cfg::W](W) writer structure"]
  6544. impl crate :: Writable for R8_HSPI_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_CFG to value 0x82"]
  6545. impl crate :: Resettable for R8_HSPI_CFG_SPEC { # [inline (always)]
  6546. fn reset_value () -> Self :: Ux { 0x82 } } } # [doc = "R8_HSPI_CTRL register accessor: an alias for `Reg<R8_HSPI_CTRL_SPEC>`"]
  6547. pub type R8_HSPI_CTRL = crate :: Reg < r8_hspi_ctrl :: R8_HSPI_CTRL_SPEC > ; # [doc = "parallel if tx or rx control"]
  6548. pub mod r8_hspi_ctrl { # [doc = "Register `R8_HSPI_CTRL` reader"]
  6549. pub struct R (crate :: R < R8_HSPI_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_CTRL_SPEC > ; # [inline (always)]
  6550. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_CTRL_SPEC >> for R { # [inline (always)]
  6551. fn from (reader : crate :: R < R8_HSPI_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_CTRL` writer"]
  6552. pub struct W (crate :: W < R8_HSPI_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_CTRL_SPEC > ; # [inline (always)]
  6553. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6554. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_CTRL_SPEC >> for W { # [inline (always)]
  6555. fn from (writer : crate :: W < R8_HSPI_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_ENABLE` reader - parallel if enable"]
  6556. pub struct RB_HSPI_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6557. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ENABLE` writer - parallel if enable"]
  6558. pub struct RB_HSPI_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  6559. # [inline (always)]
  6560. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6561. # [inline (always)]
  6562. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6563. # [inline (always)]
  6564. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_DMA_EN` reader - parallel if dma enable"]
  6565. pub struct RB_HSPI_DMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_DMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_DMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6566. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_EN` writer - parallel if dma enable"]
  6567. pub struct RB_HSPI_DMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6568. # [inline (always)]
  6569. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6570. # [inline (always)]
  6571. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6572. # [inline (always)]
  6573. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_SW_ACT` reader - parallel if transmit software trigger"]
  6574. pub struct RB_HSPI_SW_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_SW_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_SW_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_SW_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6575. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_SW_ACT` writer - parallel if transmit software trigger"]
  6576. pub struct RB_HSPI_SW_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_SW_ACT_W < 'a > { # [doc = r"Sets the field bit"]
  6577. # [inline (always)]
  6578. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6579. # [inline (always)]
  6580. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6581. # [inline (always)]
  6582. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_ALL_CLR` reader - parallel if all clear"]
  6583. pub struct RB_HSPI_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6584. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ALL_CLR` writer - parallel if all clear"]
  6585. pub struct RB_HSPI_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  6586. # [inline (always)]
  6587. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6588. # [inline (always)]
  6589. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6590. # [inline (always)]
  6591. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_HSPI_TRX_RST` reader - parallel if tx and rx logic clear, high action"]
  6592. pub struct RB_HSPI_TRX_RST_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TRX_RST_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TRX_RST_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TRX_RST_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6593. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TRX_RST` writer - parallel if tx and rx logic clear, high action"]
  6594. pub struct RB_HSPI_TRX_RST_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TRX_RST_W < 'a > { # [doc = r"Sets the field bit"]
  6595. # [inline (always)]
  6596. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6597. # [inline (always)]
  6598. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6599. # [inline (always)]
  6600. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - parallel if enable"]
  6601. # [inline (always)]
  6602. pub fn rb_hspi_enable (& self) -> RB_HSPI_ENABLE_R { RB_HSPI_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if dma enable"]
  6603. # [inline (always)]
  6604. pub fn rb_hspi_dma_en (& self) -> RB_HSPI_DMA_EN_R { RB_HSPI_DMA_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if transmit software trigger"]
  6605. # [inline (always)]
  6606. pub fn rb_hspi_sw_act (& self) -> RB_HSPI_SW_ACT_R { RB_HSPI_SW_ACT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - parallel if all clear"]
  6607. # [inline (always)]
  6608. pub fn rb_hspi_all_clr (& self) -> RB_HSPI_ALL_CLR_R { RB_HSPI_ALL_CLR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - parallel if tx and rx logic clear, high action"]
  6609. # [inline (always)]
  6610. pub fn rb_hspi_trx_rst (& self) -> RB_HSPI_TRX_RST_R { RB_HSPI_TRX_RST_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if enable"]
  6611. # [inline (always)]
  6612. pub fn rb_hspi_enable (& mut self) -> RB_HSPI_ENABLE_W { RB_HSPI_ENABLE_W { w : self } } # [doc = "Bit 1 - parallel if dma enable"]
  6613. # [inline (always)]
  6614. pub fn rb_hspi_dma_en (& mut self) -> RB_HSPI_DMA_EN_W { RB_HSPI_DMA_EN_W { w : self } } # [doc = "Bit 2 - parallel if transmit software trigger"]
  6615. # [inline (always)]
  6616. pub fn rb_hspi_sw_act (& mut self) -> RB_HSPI_SW_ACT_W { RB_HSPI_SW_ACT_W { w : self } } # [doc = "Bit 3 - parallel if all clear"]
  6617. # [inline (always)]
  6618. pub fn rb_hspi_all_clr (& mut self) -> RB_HSPI_ALL_CLR_W { RB_HSPI_ALL_CLR_W { w : self } } # [doc = "Bit 4 - parallel if tx and rx logic clear, high action"]
  6619. # [inline (always)]
  6620. pub fn rb_hspi_trx_rst (& mut self) -> RB_HSPI_TRX_RST_W { RB_HSPI_TRX_RST_W { w : self } } # [doc = "Writes raw bits to the register."]
  6621. # [inline (always)]
  6622. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx or rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_ctrl](index.html) module"]
  6623. pub struct R8_HSPI_CTRL_SPEC ; impl crate :: RegisterSpec for R8_HSPI_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_ctrl::R](R) reader structure"]
  6624. impl crate :: Readable for R8_HSPI_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_ctrl::W](W) writer structure"]
  6625. impl crate :: Writable for R8_HSPI_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_CTRL to value 0x18"]
  6626. impl crate :: Resettable for R8_HSPI_CTRL_SPEC { # [inline (always)]
  6627. fn reset_value () -> Self :: Ux { 0x18 } } } # [doc = "R8_HSPI_INT_EN register accessor: an alias for `Reg<R8_HSPI_INT_EN_SPEC>`"]
  6628. pub type R8_HSPI_INT_EN = crate :: Reg < r8_hspi_int_en :: R8_HSPI_INT_EN_SPEC > ; # [doc = "parallel if interrupt enable register"]
  6629. pub mod r8_hspi_int_en { # [doc = "Register `R8_HSPI_INT_EN` reader"]
  6630. pub struct R (crate :: R < R8_HSPI_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_INT_EN_SPEC > ; # [inline (always)]
  6631. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_INT_EN_SPEC >> for R { # [inline (always)]
  6632. fn from (reader : crate :: R < R8_HSPI_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_INT_EN` writer"]
  6633. pub struct W (crate :: W < R8_HSPI_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_INT_EN_SPEC > ; # [inline (always)]
  6634. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6635. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_INT_EN_SPEC >> for W { # [inline (always)]
  6636. fn from (writer : crate :: W < R8_HSPI_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_IE_T_DONE` reader - parallel if transmit done interrupt enable"]
  6637. pub struct RB_HSPI_IE_T_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_T_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_T_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_T_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6638. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_T_DONE` writer - parallel if transmit done interrupt enable"]
  6639. pub struct RB_HSPI_IE_T_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_T_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  6640. # [inline (always)]
  6641. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6642. # [inline (always)]
  6643. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6644. # [inline (always)]
  6645. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_IE_R_DONE` reader - parallel if receive done interrupt enable"]
  6646. pub struct RB_HSPI_IE_R_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_R_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_R_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_R_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6647. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_R_DONE` writer - parallel if receive done interrupt enable"]
  6648. pub struct RB_HSPI_IE_R_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_R_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  6649. # [inline (always)]
  6650. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6651. # [inline (always)]
  6652. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6653. # [inline (always)]
  6654. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_IE_FIFO_OV` reader - parallel if fifo overflow interrupt enable"]
  6655. pub struct RB_HSPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6656. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_FIFO_OV` writer - parallel if fifo overflow interrupt enable"]
  6657. pub struct RB_HSPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  6658. # [inline (always)]
  6659. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6660. # [inline (always)]
  6661. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6662. # [inline (always)]
  6663. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_IE_B_DONE` reader - parallel if tx burst done interrupt enable"]
  6664. pub struct RB_HSPI_IE_B_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_B_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_B_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_B_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6665. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_B_DONE` writer - parallel if tx burst done interrupt enable"]
  6666. pub struct RB_HSPI_IE_B_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_B_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  6667. # [inline (always)]
  6668. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6669. # [inline (always)]
  6670. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6671. # [inline (always)]
  6672. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - parallel if transmit done interrupt enable"]
  6673. # [inline (always)]
  6674. pub fn rb_hspi_ie_t_done (& self) -> RB_HSPI_IE_T_DONE_R { RB_HSPI_IE_T_DONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if receive done interrupt enable"]
  6675. # [inline (always)]
  6676. pub fn rb_hspi_ie_r_done (& self) -> RB_HSPI_IE_R_DONE_R { RB_HSPI_IE_R_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if fifo overflow interrupt enable"]
  6677. # [inline (always)]
  6678. pub fn rb_hspi_ie_fifo_ov (& self) -> RB_HSPI_IE_FIFO_OV_R { RB_HSPI_IE_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - parallel if tx burst done interrupt enable"]
  6679. # [inline (always)]
  6680. pub fn rb_hspi_ie_b_done (& self) -> RB_HSPI_IE_B_DONE_R { RB_HSPI_IE_B_DONE_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if transmit done interrupt enable"]
  6681. # [inline (always)]
  6682. pub fn rb_hspi_ie_t_done (& mut self) -> RB_HSPI_IE_T_DONE_W { RB_HSPI_IE_T_DONE_W { w : self } } # [doc = "Bit 1 - parallel if receive done interrupt enable"]
  6683. # [inline (always)]
  6684. pub fn rb_hspi_ie_r_done (& mut self) -> RB_HSPI_IE_R_DONE_W { RB_HSPI_IE_R_DONE_W { w : self } } # [doc = "Bit 2 - parallel if fifo overflow interrupt enable"]
  6685. # [inline (always)]
  6686. pub fn rb_hspi_ie_fifo_ov (& mut self) -> RB_HSPI_IE_FIFO_OV_W { RB_HSPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 3 - parallel if tx burst done interrupt enable"]
  6687. # [inline (always)]
  6688. pub fn rb_hspi_ie_b_done (& mut self) -> RB_HSPI_IE_B_DONE_W { RB_HSPI_IE_B_DONE_W { w : self } } # [doc = "Writes raw bits to the register."]
  6689. # [inline (always)]
  6690. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_int_en](index.html) module"]
  6691. pub struct R8_HSPI_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_HSPI_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_int_en::R](R) reader structure"]
  6692. impl crate :: Readable for R8_HSPI_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_int_en::W](W) writer structure"]
  6693. impl crate :: Writable for R8_HSPI_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_INT_EN to value 0"]
  6694. impl crate :: Resettable for R8_HSPI_INT_EN_SPEC { # [inline (always)]
  6695. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_AUX register accessor: an alias for `Reg<R8_HSPI_AUX_SPEC>`"]
  6696. pub type R8_HSPI_AUX = crate :: Reg < r8_hspi_aux :: R8_HSPI_AUX_SPEC > ; # [doc = "parallel if aux"]
  6697. pub mod r8_hspi_aux { # [doc = "Register `R8_HSPI_AUX` reader"]
  6698. pub struct R (crate :: R < R8_HSPI_AUX_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_AUX_SPEC > ; # [inline (always)]
  6699. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_AUX_SPEC >> for R { # [inline (always)]
  6700. fn from (reader : crate :: R < R8_HSPI_AUX_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_AUX` writer"]
  6701. pub struct W (crate :: W < R8_HSPI_AUX_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_AUX_SPEC > ; # [inline (always)]
  6702. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6703. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_AUX_SPEC >> for W { # [inline (always)]
  6704. fn from (writer : crate :: W < R8_HSPI_AUX_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TCK_MOD` reader - parallel if tx clk polar control"]
  6705. pub struct RB_HSPI_TCK_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TCK_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TCK_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TCK_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6706. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TCK_MOD` writer - parallel if tx clk polar control"]
  6707. pub struct RB_HSPI_TCK_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TCK_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  6708. # [inline (always)]
  6709. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6710. # [inline (always)]
  6711. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6712. # [inline (always)]
  6713. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_RCK_MOD` reader - parallel if rx clk polar control"]
  6714. pub struct RB_HSPI_RCK_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RCK_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RCK_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RCK_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6715. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RCK_MOD` writer - parallel if rx clk polar control"]
  6716. pub struct RB_HSPI_RCK_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RCK_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  6717. # [inline (always)]
  6718. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6719. # [inline (always)]
  6720. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6721. # [inline (always)]
  6722. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_ACK_TX_MOD` reader - parallel if tx ack mode cfg"]
  6723. pub struct RB_HSPI_ACK_TX_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ACK_TX_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ACK_TX_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ACK_TX_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6724. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ACK_TX_MOD` writer - parallel if tx ack mode cfg"]
  6725. pub struct RB_HSPI_ACK_TX_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ACK_TX_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  6726. # [inline (always)]
  6727. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6728. # [inline (always)]
  6729. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6730. # [inline (always)]
  6731. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_ACK_CNT_SEL` reader - delay time of parallel if send ack when receive done"]
  6732. pub struct RB_HSPI_ACK_CNT_SEL_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_ACK_CNT_SEL_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_ACK_CNT_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ACK_CNT_SEL_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6733. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ACK_CNT_SEL` writer - delay time of parallel if send ack when receive done"]
  6734. pub struct RB_HSPI_ACK_CNT_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ACK_CNT_SEL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6735. # [inline (always)]
  6736. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } impl R { # [doc = "Bit 0 - parallel if tx clk polar control"]
  6737. # [inline (always)]
  6738. pub fn rb_hspi_tck_mod (& self) -> RB_HSPI_TCK_MOD_R { RB_HSPI_TCK_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if rx clk polar control"]
  6739. # [inline (always)]
  6740. pub fn rb_hspi_rck_mod (& self) -> RB_HSPI_RCK_MOD_R { RB_HSPI_RCK_MOD_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if tx ack mode cfg"]
  6741. # [inline (always)]
  6742. pub fn rb_hspi_ack_tx_mod (& self) -> RB_HSPI_ACK_TX_MOD_R { RB_HSPI_ACK_TX_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - delay time of parallel if send ack when receive done"]
  6743. # [inline (always)]
  6744. pub fn rb_hspi_ack_cnt_sel (& self) -> RB_HSPI_ACK_CNT_SEL_R { RB_HSPI_ACK_CNT_SEL_R :: new (((self . bits >> 3) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - parallel if tx clk polar control"]
  6745. # [inline (always)]
  6746. pub fn rb_hspi_tck_mod (& mut self) -> RB_HSPI_TCK_MOD_W { RB_HSPI_TCK_MOD_W { w : self } } # [doc = "Bit 1 - parallel if rx clk polar control"]
  6747. # [inline (always)]
  6748. pub fn rb_hspi_rck_mod (& mut self) -> RB_HSPI_RCK_MOD_W { RB_HSPI_RCK_MOD_W { w : self } } # [doc = "Bit 2 - parallel if tx ack mode cfg"]
  6749. # [inline (always)]
  6750. pub fn rb_hspi_ack_tx_mod (& mut self) -> RB_HSPI_ACK_TX_MOD_W { RB_HSPI_ACK_TX_MOD_W { w : self } } # [doc = "Bits 3:4 - delay time of parallel if send ack when receive done"]
  6751. # [inline (always)]
  6752. pub fn rb_hspi_ack_cnt_sel (& mut self) -> RB_HSPI_ACK_CNT_SEL_W { RB_HSPI_ACK_CNT_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
  6753. # [inline (always)]
  6754. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if aux\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_aux](index.html) module"]
  6755. pub struct R8_HSPI_AUX_SPEC ; impl crate :: RegisterSpec for R8_HSPI_AUX_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_aux::R](R) reader structure"]
  6756. impl crate :: Readable for R8_HSPI_AUX_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_aux::W](W) writer structure"]
  6757. impl crate :: Writable for R8_HSPI_AUX_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_AUX to value 0"]
  6758. impl crate :: Resettable for R8_HSPI_AUX_SPEC { # [inline (always)]
  6759. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_TX_ADDR0 register accessor: an alias for `Reg<R32_HSPI_TX_ADDR0_SPEC>`"]
  6760. pub type R32_HSPI_TX_ADDR0 = crate :: Reg < r32_hspi_tx_addr0 :: R32_HSPI_TX_ADDR0_SPEC > ; # [doc = "parallel if dma tx addr0"]
  6761. pub mod r32_hspi_tx_addr0 { # [doc = "Register `R32_HSPI_TX_ADDR0` reader"]
  6762. pub struct R (crate :: R < R32_HSPI_TX_ADDR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_TX_ADDR0_SPEC > ; # [inline (always)]
  6763. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_TX_ADDR0_SPEC >> for R { # [inline (always)]
  6764. fn from (reader : crate :: R < R32_HSPI_TX_ADDR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_TX_ADDR0` writer"]
  6765. pub struct W (crate :: W < R32_HSPI_TX_ADDR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_TX_ADDR0_SPEC > ; # [inline (always)]
  6766. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6767. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_TX_ADDR0_SPEC >> for W { # [inline (always)]
  6768. fn from (writer : crate :: W < R32_HSPI_TX_ADDR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_ADDR0` reader - parallel if dma tx addr0"]
  6769. pub struct RB_HSPI_TX_ADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_TX_ADDR0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_TX_ADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_ADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6770. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_ADDR0` writer - parallel if dma tx addr0"]
  6771. pub struct RB_HSPI_TX_ADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_ADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6772. # [inline (always)]
  6773. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma tx addr0"]
  6774. # [inline (always)]
  6775. pub fn rb_hspi_tx_addr0 (& self) -> RB_HSPI_TX_ADDR0_R { RB_HSPI_TX_ADDR0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma tx addr0"]
  6776. # [inline (always)]
  6777. pub fn rb_hspi_tx_addr0 (& mut self) -> RB_HSPI_TX_ADDR0_W { RB_HSPI_TX_ADDR0_W { w : self } } # [doc = "Writes raw bits to the register."]
  6778. # [inline (always)]
  6779. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma tx addr0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_tx_addr0](index.html) module"]
  6780. pub struct R32_HSPI_TX_ADDR0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_TX_ADDR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_tx_addr0::R](R) reader structure"]
  6781. impl crate :: Readable for R32_HSPI_TX_ADDR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_tx_addr0::W](W) writer structure"]
  6782. impl crate :: Writable for R32_HSPI_TX_ADDR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_TX_ADDR0 to value 0"]
  6783. impl crate :: Resettable for R32_HSPI_TX_ADDR0_SPEC { # [inline (always)]
  6784. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_TX_ADDR1 register accessor: an alias for `Reg<R32_HSPI_TX_ADDR1_SPEC>`"]
  6785. pub type R32_HSPI_TX_ADDR1 = crate :: Reg < r32_hspi_tx_addr1 :: R32_HSPI_TX_ADDR1_SPEC > ; # [doc = "parallel if dma tx addr1"]
  6786. pub mod r32_hspi_tx_addr1 { # [doc = "Register `R32_HSPI_TX_ADDR1` reader"]
  6787. pub struct R (crate :: R < R32_HSPI_TX_ADDR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_TX_ADDR1_SPEC > ; # [inline (always)]
  6788. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_TX_ADDR1_SPEC >> for R { # [inline (always)]
  6789. fn from (reader : crate :: R < R32_HSPI_TX_ADDR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_TX_ADDR1` writer"]
  6790. pub struct W (crate :: W < R32_HSPI_TX_ADDR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_TX_ADDR1_SPEC > ; # [inline (always)]
  6791. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6792. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_TX_ADDR1_SPEC >> for W { # [inline (always)]
  6793. fn from (writer : crate :: W < R32_HSPI_TX_ADDR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_ADDR1` reader - parallel if dma tx addr1"]
  6794. pub struct RB_HSPI_TX_ADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_TX_ADDR1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_TX_ADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_ADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6795. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_ADDR1` writer - parallel if dma tx addr1"]
  6796. pub struct RB_HSPI_TX_ADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_ADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6797. # [inline (always)]
  6798. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma tx addr1"]
  6799. # [inline (always)]
  6800. pub fn rb_hspi_tx_addr1 (& self) -> RB_HSPI_TX_ADDR1_R { RB_HSPI_TX_ADDR1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma tx addr1"]
  6801. # [inline (always)]
  6802. pub fn rb_hspi_tx_addr1 (& mut self) -> RB_HSPI_TX_ADDR1_W { RB_HSPI_TX_ADDR1_W { w : self } } # [doc = "Writes raw bits to the register."]
  6803. # [inline (always)]
  6804. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma tx addr1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_tx_addr1](index.html) module"]
  6805. pub struct R32_HSPI_TX_ADDR1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_TX_ADDR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_tx_addr1::R](R) reader structure"]
  6806. impl crate :: Readable for R32_HSPI_TX_ADDR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_tx_addr1::W](W) writer structure"]
  6807. impl crate :: Writable for R32_HSPI_TX_ADDR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_TX_ADDR1 to value 0"]
  6808. impl crate :: Resettable for R32_HSPI_TX_ADDR1_SPEC { # [inline (always)]
  6809. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_RX_ADDR0 register accessor: an alias for `Reg<R32_HSPI_RX_ADDR0_SPEC>`"]
  6810. pub type R32_HSPI_RX_ADDR0 = crate :: Reg < r32_hspi_rx_addr0 :: R32_HSPI_RX_ADDR0_SPEC > ; # [doc = "parallel if dma rx addr0"]
  6811. pub mod r32_hspi_rx_addr0 { # [doc = "Register `R32_HSPI_RX_ADDR0` reader"]
  6812. pub struct R (crate :: R < R32_HSPI_RX_ADDR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_RX_ADDR0_SPEC > ; # [inline (always)]
  6813. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_RX_ADDR0_SPEC >> for R { # [inline (always)]
  6814. fn from (reader : crate :: R < R32_HSPI_RX_ADDR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_RX_ADDR0` writer"]
  6815. pub struct W (crate :: W < R32_HSPI_RX_ADDR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_RX_ADDR0_SPEC > ; # [inline (always)]
  6816. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6817. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_RX_ADDR0_SPEC >> for W { # [inline (always)]
  6818. fn from (writer : crate :: W < R32_HSPI_RX_ADDR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_ADDR0` reader - parallel if dma rx addr0"]
  6819. pub struct RB_HSPI_RX_ADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_RX_ADDR0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_RX_ADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_ADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6820. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_ADDR0` writer - parallel if dma rx addr0"]
  6821. pub struct RB_HSPI_RX_ADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_ADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6822. # [inline (always)]
  6823. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma rx addr0"]
  6824. # [inline (always)]
  6825. pub fn rb_hspi_rx_addr0 (& self) -> RB_HSPI_RX_ADDR0_R { RB_HSPI_RX_ADDR0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma rx addr0"]
  6826. # [inline (always)]
  6827. pub fn rb_hspi_rx_addr0 (& mut self) -> RB_HSPI_RX_ADDR0_W { RB_HSPI_RX_ADDR0_W { w : self } } # [doc = "Writes raw bits to the register."]
  6828. # [inline (always)]
  6829. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma rx addr0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_rx_addr0](index.html) module"]
  6830. pub struct R32_HSPI_RX_ADDR0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_RX_ADDR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_rx_addr0::R](R) reader structure"]
  6831. impl crate :: Readable for R32_HSPI_RX_ADDR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_rx_addr0::W](W) writer structure"]
  6832. impl crate :: Writable for R32_HSPI_RX_ADDR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_RX_ADDR0 to value 0"]
  6833. impl crate :: Resettable for R32_HSPI_RX_ADDR0_SPEC { # [inline (always)]
  6834. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_RX_ADDR1 register accessor: an alias for `Reg<R32_HSPI_RX_ADDR1_SPEC>`"]
  6835. pub type R32_HSPI_RX_ADDR1 = crate :: Reg < r32_hspi_rx_addr1 :: R32_HSPI_RX_ADDR1_SPEC > ; # [doc = "parallel if dma rx addr1"]
  6836. pub mod r32_hspi_rx_addr1 { # [doc = "Register `R32_HSPI_RX_ADDR1` reader"]
  6837. pub struct R (crate :: R < R32_HSPI_RX_ADDR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_RX_ADDR1_SPEC > ; # [inline (always)]
  6838. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_RX_ADDR1_SPEC >> for R { # [inline (always)]
  6839. fn from (reader : crate :: R < R32_HSPI_RX_ADDR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_RX_ADDR1` writer"]
  6840. pub struct W (crate :: W < R32_HSPI_RX_ADDR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_RX_ADDR1_SPEC > ; # [inline (always)]
  6841. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6842. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_RX_ADDR1_SPEC >> for W { # [inline (always)]
  6843. fn from (writer : crate :: W < R32_HSPI_RX_ADDR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_ADDR1` reader - parallel if dma rx addr1"]
  6844. pub struct RB_HSPI_RX_ADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_RX_ADDR1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_RX_ADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_ADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  6845. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_ADDR1` writer - parallel if dma rx addr1"]
  6846. pub struct RB_HSPI_RX_ADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_ADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6847. # [inline (always)]
  6848. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma rx addr1"]
  6849. # [inline (always)]
  6850. pub fn rb_hspi_rx_addr1 (& self) -> RB_HSPI_RX_ADDR1_R { RB_HSPI_RX_ADDR1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma rx addr1"]
  6851. # [inline (always)]
  6852. pub fn rb_hspi_rx_addr1 (& mut self) -> RB_HSPI_RX_ADDR1_W { RB_HSPI_RX_ADDR1_W { w : self } } # [doc = "Writes raw bits to the register."]
  6853. # [inline (always)]
  6854. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma rx addr1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_rx_addr1](index.html) module"]
  6855. pub struct R32_HSPI_RX_ADDR1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_RX_ADDR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_rx_addr1::R](R) reader structure"]
  6856. impl crate :: Readable for R32_HSPI_RX_ADDR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_rx_addr1::W](W) writer structure"]
  6857. impl crate :: Writable for R32_HSPI_RX_ADDR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_RX_ADDR1 to value 0"]
  6858. impl crate :: Resettable for R32_HSPI_RX_ADDR1_SPEC { # [inline (always)]
  6859. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_DMA_LEN0 register accessor: an alias for `Reg<R16_HSPI_DMA_LEN0_SPEC>`"]
  6860. pub type R16_HSPI_DMA_LEN0 = crate :: Reg < r16_hspi_dma_len0 :: R16_HSPI_DMA_LEN0_SPEC > ; # [doc = "parallel if dma length0"]
  6861. pub mod r16_hspi_dma_len0 { # [doc = "Register `R16_HSPI_DMA_LEN0` reader"]
  6862. pub struct R (crate :: R < R16_HSPI_DMA_LEN0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_DMA_LEN0_SPEC > ; # [inline (always)]
  6863. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_DMA_LEN0_SPEC >> for R { # [inline (always)]
  6864. fn from (reader : crate :: R < R16_HSPI_DMA_LEN0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_DMA_LEN0` writer"]
  6865. pub struct W (crate :: W < R16_HSPI_DMA_LEN0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_DMA_LEN0_SPEC > ; # [inline (always)]
  6866. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6867. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_DMA_LEN0_SPEC >> for W { # [inline (always)]
  6868. fn from (writer : crate :: W < R16_HSPI_DMA_LEN0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_DMA_LEN0` reader - parallel if dma length0"]
  6869. pub struct RB_HSPI_DMA_LEN0_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_DMA_LEN0_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_DMA_LEN0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_LEN0_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  6870. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_LEN0` writer - parallel if dma length0"]
  6871. pub struct RB_HSPI_DMA_LEN0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_LEN0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6872. # [inline (always)]
  6873. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length0"]
  6874. # [inline (always)]
  6875. pub fn rb_hspi_dma_len0 (& self) -> RB_HSPI_DMA_LEN0_R { RB_HSPI_DMA_LEN0_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length0"]
  6876. # [inline (always)]
  6877. pub fn rb_hspi_dma_len0 (& mut self) -> RB_HSPI_DMA_LEN0_W { RB_HSPI_DMA_LEN0_W { w : self } } # [doc = "Writes raw bits to the register."]
  6878. # [inline (always)]
  6879. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma length0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_dma_len0](index.html) module"]
  6880. pub struct R16_HSPI_DMA_LEN0_SPEC ; impl crate :: RegisterSpec for R16_HSPI_DMA_LEN0_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_dma_len0::R](R) reader structure"]
  6881. impl crate :: Readable for R16_HSPI_DMA_LEN0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_dma_len0::W](W) writer structure"]
  6882. impl crate :: Writable for R16_HSPI_DMA_LEN0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_DMA_LEN0 to value 0"]
  6883. impl crate :: Resettable for R16_HSPI_DMA_LEN0_SPEC { # [inline (always)]
  6884. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_RX_LEN0 register accessor: an alias for `Reg<R16_HSPI_RX_LEN0_SPEC>`"]
  6885. pub type R16_HSPI_RX_LEN0 = crate :: Reg < r16_hspi_rx_len0 :: R16_HSPI_RX_LEN0_SPEC > ; # [doc = "parallel if receive length0"]
  6886. pub mod r16_hspi_rx_len0 { # [doc = "Register `R16_HSPI_RX_LEN0` reader"]
  6887. pub struct R (crate :: R < R16_HSPI_RX_LEN0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_RX_LEN0_SPEC > ; # [inline (always)]
  6888. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_RX_LEN0_SPEC >> for R { # [inline (always)]
  6889. fn from (reader : crate :: R < R16_HSPI_RX_LEN0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_RX_LEN0` writer"]
  6890. pub struct W (crate :: W < R16_HSPI_RX_LEN0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_RX_LEN0_SPEC > ; # [inline (always)]
  6891. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6892. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_RX_LEN0_SPEC >> for W { # [inline (always)]
  6893. fn from (writer : crate :: W < R16_HSPI_RX_LEN0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_LEN0` reader - parallel if dma length0"]
  6894. pub struct RB_HSPI_RX_LEN0_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_RX_LEN0_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_RX_LEN0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_LEN0_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  6895. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_LEN0` writer - parallel if dma length0"]
  6896. pub struct RB_HSPI_RX_LEN0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_LEN0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6897. # [inline (always)]
  6898. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length0"]
  6899. # [inline (always)]
  6900. pub fn rb_hspi_rx_len0 (& self) -> RB_HSPI_RX_LEN0_R { RB_HSPI_RX_LEN0_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length0"]
  6901. # [inline (always)]
  6902. pub fn rb_hspi_rx_len0 (& mut self) -> RB_HSPI_RX_LEN0_W { RB_HSPI_RX_LEN0_W { w : self } } # [doc = "Writes raw bits to the register."]
  6903. # [inline (always)]
  6904. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if receive length0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_rx_len0](index.html) module"]
  6905. pub struct R16_HSPI_RX_LEN0_SPEC ; impl crate :: RegisterSpec for R16_HSPI_RX_LEN0_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_rx_len0::R](R) reader structure"]
  6906. impl crate :: Readable for R16_HSPI_RX_LEN0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_rx_len0::W](W) writer structure"]
  6907. impl crate :: Writable for R16_HSPI_RX_LEN0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_RX_LEN0 to value 0"]
  6908. impl crate :: Resettable for R16_HSPI_RX_LEN0_SPEC { # [inline (always)]
  6909. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_DMA_LEN1 register accessor: an alias for `Reg<R16_HSPI_DMA_LEN1_SPEC>`"]
  6910. pub type R16_HSPI_DMA_LEN1 = crate :: Reg < r16_hspi_dma_len1 :: R16_HSPI_DMA_LEN1_SPEC > ; # [doc = "parallel if dma length1"]
  6911. pub mod r16_hspi_dma_len1 { # [doc = "Register `R16_HSPI_DMA_LEN1` reader"]
  6912. pub struct R (crate :: R < R16_HSPI_DMA_LEN1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_DMA_LEN1_SPEC > ; # [inline (always)]
  6913. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_DMA_LEN1_SPEC >> for R { # [inline (always)]
  6914. fn from (reader : crate :: R < R16_HSPI_DMA_LEN1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_DMA_LEN1` writer"]
  6915. pub struct W (crate :: W < R16_HSPI_DMA_LEN1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_DMA_LEN1_SPEC > ; # [inline (always)]
  6916. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6917. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_DMA_LEN1_SPEC >> for W { # [inline (always)]
  6918. fn from (writer : crate :: W < R16_HSPI_DMA_LEN1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_DMA_LEN1` reader - parallel if dma length1"]
  6919. pub struct RB_HSPI_DMA_LEN1_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_DMA_LEN1_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_DMA_LEN1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_LEN1_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  6920. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_LEN1` writer - parallel if dma length1"]
  6921. pub struct RB_HSPI_DMA_LEN1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_LEN1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6922. # [inline (always)]
  6923. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length1"]
  6924. # [inline (always)]
  6925. pub fn rb_hspi_dma_len1 (& self) -> RB_HSPI_DMA_LEN1_R { RB_HSPI_DMA_LEN1_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length1"]
  6926. # [inline (always)]
  6927. pub fn rb_hspi_dma_len1 (& mut self) -> RB_HSPI_DMA_LEN1_W { RB_HSPI_DMA_LEN1_W { w : self } } # [doc = "Writes raw bits to the register."]
  6928. # [inline (always)]
  6929. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma length1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_dma_len1](index.html) module"]
  6930. pub struct R16_HSPI_DMA_LEN1_SPEC ; impl crate :: RegisterSpec for R16_HSPI_DMA_LEN1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_dma_len1::R](R) reader structure"]
  6931. impl crate :: Readable for R16_HSPI_DMA_LEN1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_dma_len1::W](W) writer structure"]
  6932. impl crate :: Writable for R16_HSPI_DMA_LEN1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_DMA_LEN1 to value 0"]
  6933. impl crate :: Resettable for R16_HSPI_DMA_LEN1_SPEC { # [inline (always)]
  6934. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_RX_LEN1 register accessor: an alias for `Reg<R16_HSPI_RX_LEN1_SPEC>`"]
  6935. pub type R16_HSPI_RX_LEN1 = crate :: Reg < r16_hspi_rx_len1 :: R16_HSPI_RX_LEN1_SPEC > ; # [doc = "parallel if receive length1"]
  6936. pub mod r16_hspi_rx_len1 { # [doc = "Register `R16_HSPI_RX_LEN1` reader"]
  6937. pub struct R (crate :: R < R16_HSPI_RX_LEN1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_RX_LEN1_SPEC > ; # [inline (always)]
  6938. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_RX_LEN1_SPEC >> for R { # [inline (always)]
  6939. fn from (reader : crate :: R < R16_HSPI_RX_LEN1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_RX_LEN1` writer"]
  6940. pub struct W (crate :: W < R16_HSPI_RX_LEN1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_RX_LEN1_SPEC > ; # [inline (always)]
  6941. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6942. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_RX_LEN1_SPEC >> for W { # [inline (always)]
  6943. fn from (writer : crate :: W < R16_HSPI_RX_LEN1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_LEN1` reader - parallel if dma length1"]
  6944. pub struct RB_HSPI_RX_LEN1_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_RX_LEN1_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_RX_LEN1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_LEN1_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  6945. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_LEN1` writer - parallel if dma length1"]
  6946. pub struct RB_HSPI_RX_LEN1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_LEN1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6947. # [inline (always)]
  6948. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length1"]
  6949. # [inline (always)]
  6950. pub fn rb_hspi_rx_len1 (& self) -> RB_HSPI_RX_LEN1_R { RB_HSPI_RX_LEN1_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length1"]
  6951. # [inline (always)]
  6952. pub fn rb_hspi_rx_len1 (& mut self) -> RB_HSPI_RX_LEN1_W { RB_HSPI_RX_LEN1_W { w : self } } # [doc = "Writes raw bits to the register."]
  6953. # [inline (always)]
  6954. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if receive length1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_rx_len1](index.html) module"]
  6955. pub struct R16_HSPI_RX_LEN1_SPEC ; impl crate :: RegisterSpec for R16_HSPI_RX_LEN1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_rx_len1::R](R) reader structure"]
  6956. impl crate :: Readable for R16_HSPI_RX_LEN1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_rx_len1::W](W) writer structure"]
  6957. impl crate :: Writable for R16_HSPI_RX_LEN1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_RX_LEN1 to value 0"]
  6958. impl crate :: Resettable for R16_HSPI_RX_LEN1_SPEC { # [inline (always)]
  6959. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_BURST_CFG register accessor: an alias for `Reg<R16_HSPI_BURST_CFG_SPEC>`"]
  6960. pub type R16_HSPI_BURST_CFG = crate :: Reg < r16_hspi_burst_cfg :: R16_HSPI_BURST_CFG_SPEC > ; # [doc = "parallel if tx burst config register"]
  6961. pub mod r16_hspi_burst_cfg { # [doc = "Register `R16_HSPI_BURST_CFG` reader"]
  6962. pub struct R (crate :: R < R16_HSPI_BURST_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_BURST_CFG_SPEC > ; # [inline (always)]
  6963. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_BURST_CFG_SPEC >> for R { # [inline (always)]
  6964. fn from (reader : crate :: R < R16_HSPI_BURST_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_BURST_CFG` writer"]
  6965. pub struct W (crate :: W < R16_HSPI_BURST_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_BURST_CFG_SPEC > ; # [inline (always)]
  6966. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  6967. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_BURST_CFG_SPEC >> for W { # [inline (always)]
  6968. fn from (writer : crate :: W < R16_HSPI_BURST_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_BURST_EN` reader - burst transmit enable"]
  6969. pub struct RB_HSPI_BURST_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_BURST_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_BURST_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  6970. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_EN` writer - burst transmit enable"]
  6971. pub struct RB_HSPI_BURST_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_EN_W < 'a > { # [doc = r"Sets the field bit"]
  6972. # [inline (always)]
  6973. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  6974. # [inline (always)]
  6975. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  6976. # [inline (always)]
  6977. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_BURST_LEN` reader - burst transmit length"]
  6978. pub struct RB_HSPI_BURST_LEN_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_BURST_LEN_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_BURST_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_LEN_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  6979. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_LEN` writer - burst transmit length"]
  6980. pub struct RB_HSPI_BURST_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  6981. # [inline (always)]
  6982. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 8)) | ((value as u16 & 0xff) << 8) ; self . w } } impl R { # [doc = "Bit 0 - burst transmit enable"]
  6983. # [inline (always)]
  6984. pub fn rb_hspi_burst_en (& self) -> RB_HSPI_BURST_EN_R { RB_HSPI_BURST_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 8:15 - burst transmit length"]
  6985. # [inline (always)]
  6986. pub fn rb_hspi_burst_len (& self) -> RB_HSPI_BURST_LEN_R { RB_HSPI_BURST_LEN_R :: new (((self . bits >> 8) & 0xff) as u8) } } impl W { # [doc = "Bit 0 - burst transmit enable"]
  6987. # [inline (always)]
  6988. pub fn rb_hspi_burst_en (& mut self) -> RB_HSPI_BURST_EN_W { RB_HSPI_BURST_EN_W { w : self } } # [doc = "Bits 8:15 - burst transmit length"]
  6989. # [inline (always)]
  6990. pub fn rb_hspi_burst_len (& mut self) -> RB_HSPI_BURST_LEN_W { RB_HSPI_BURST_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  6991. # [inline (always)]
  6992. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx burst config register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_burst_cfg](index.html) module"]
  6993. pub struct R16_HSPI_BURST_CFG_SPEC ; impl crate :: RegisterSpec for R16_HSPI_BURST_CFG_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_burst_cfg::R](R) reader structure"]
  6994. impl crate :: Readable for R16_HSPI_BURST_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_burst_cfg::W](W) writer structure"]
  6995. impl crate :: Writable for R16_HSPI_BURST_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_BURST_CFG to value 0"]
  6996. impl crate :: Resettable for R16_HSPI_BURST_CFG_SPEC { # [inline (always)]
  6997. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_BURST_CNT register accessor: an alias for `Reg<R8_HSPI_BURST_CNT_SPEC>`"]
  6998. pub type R8_HSPI_BURST_CNT = crate :: Reg < r8_hspi_burst_cnt :: R8_HSPI_BURST_CNT_SPEC > ; # [doc = "parallel if tx burst count"]
  6999. pub mod r8_hspi_burst_cnt { # [doc = "Register `R8_HSPI_BURST_CNT` reader"]
  7000. pub struct R (crate :: R < R8_HSPI_BURST_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_BURST_CNT_SPEC > ; # [inline (always)]
  7001. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_BURST_CNT_SPEC >> for R { # [inline (always)]
  7002. fn from (reader : crate :: R < R8_HSPI_BURST_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_BURST_CNT` writer"]
  7003. pub struct W (crate :: W < R8_HSPI_BURST_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_BURST_CNT_SPEC > ; # [inline (always)]
  7004. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7005. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_BURST_CNT_SPEC >> for W { # [inline (always)]
  7006. fn from (writer : crate :: W < R8_HSPI_BURST_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_BURST_CNT` reader - parallel if tx burst count"]
  7007. pub struct RB_HSPI_BURST_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_BURST_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_BURST_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  7008. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_CNT` writer - parallel if tx burst count"]
  7009. pub struct RB_HSPI_BURST_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7010. # [inline (always)]
  7011. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - parallel if tx burst count"]
  7012. # [inline (always)]
  7013. pub fn rb_hspi_burst_cnt (& self) -> RB_HSPI_BURST_CNT_R { RB_HSPI_BURST_CNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - parallel if tx burst count"]
  7014. # [inline (always)]
  7015. pub fn rb_hspi_burst_cnt (& mut self) -> RB_HSPI_BURST_CNT_W { RB_HSPI_BURST_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
  7016. # [inline (always)]
  7017. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx burst count\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_burst_cnt](index.html) module"]
  7018. pub struct R8_HSPI_BURST_CNT_SPEC ; impl crate :: RegisterSpec for R8_HSPI_BURST_CNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_burst_cnt::R](R) reader structure"]
  7019. impl crate :: Readable for R8_HSPI_BURST_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_burst_cnt::W](W) writer structure"]
  7020. impl crate :: Writable for R8_HSPI_BURST_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_BURST_CNT to value 0"]
  7021. impl crate :: Resettable for R8_HSPI_BURST_CNT_SPEC { # [inline (always)]
  7022. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_UDF0 register accessor: an alias for `Reg<R32_HSPI_UDF0_SPEC>`"]
  7023. pub type R32_HSPI_UDF0 = crate :: Reg < r32_hspi_udf0 :: R32_HSPI_UDF0_SPEC > ; # [doc = "parallel if user defined field 0 register"]
  7024. pub mod r32_hspi_udf0 { # [doc = "Register `R32_HSPI_UDF0` reader"]
  7025. pub struct R (crate :: R < R32_HSPI_UDF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_UDF0_SPEC > ; # [inline (always)]
  7026. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_UDF0_SPEC >> for R { # [inline (always)]
  7027. fn from (reader : crate :: R < R32_HSPI_UDF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_UDF0` writer"]
  7028. pub struct W (crate :: W < R32_HSPI_UDF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_UDF0_SPEC > ; # [inline (always)]
  7029. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7030. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_UDF0_SPEC >> for W { # [inline (always)]
  7031. fn from (writer : crate :: W < R32_HSPI_UDF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_UDF0` reader - parallel if user defined field 0 register"]
  7032. pub struct RB_HSPI_UDF0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_UDF0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_UDF0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_UDF0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7033. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_UDF0` writer - parallel if user defined field 0 register"]
  7034. pub struct RB_HSPI_UDF0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_UDF0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7035. # [inline (always)]
  7036. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03ff_ffff) | (value as u32 & 0x03ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:25 - parallel if user defined field 0 register"]
  7037. # [inline (always)]
  7038. pub fn rb_hspi_udf0 (& self) -> RB_HSPI_UDF0_R { RB_HSPI_UDF0_R :: new ((self . bits & 0x03ff_ffff) as u32) } } impl W { # [doc = "Bits 0:25 - parallel if user defined field 0 register"]
  7039. # [inline (always)]
  7040. pub fn rb_hspi_udf0 (& mut self) -> RB_HSPI_UDF0_W { RB_HSPI_UDF0_W { w : self } } # [doc = "Writes raw bits to the register."]
  7041. # [inline (always)]
  7042. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if user defined field 0 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_udf0](index.html) module"]
  7043. pub struct R32_HSPI_UDF0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_UDF0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_udf0::R](R) reader structure"]
  7044. impl crate :: Readable for R32_HSPI_UDF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_udf0::W](W) writer structure"]
  7045. impl crate :: Writable for R32_HSPI_UDF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_UDF0 to value 0"]
  7046. impl crate :: Resettable for R32_HSPI_UDF0_SPEC { # [inline (always)]
  7047. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_UDF1 register accessor: an alias for `Reg<R32_HSPI_UDF1_SPEC>`"]
  7048. pub type R32_HSPI_UDF1 = crate :: Reg < r32_hspi_udf1 :: R32_HSPI_UDF1_SPEC > ; # [doc = "parallel if user defined field 1 register"]
  7049. pub mod r32_hspi_udf1 { # [doc = "Register `R32_HSPI_UDF1` reader"]
  7050. pub struct R (crate :: R < R32_HSPI_UDF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_UDF1_SPEC > ; # [inline (always)]
  7051. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_UDF1_SPEC >> for R { # [inline (always)]
  7052. fn from (reader : crate :: R < R32_HSPI_UDF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_UDF1` writer"]
  7053. pub struct W (crate :: W < R32_HSPI_UDF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_UDF1_SPEC > ; # [inline (always)]
  7054. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7055. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_UDF1_SPEC >> for W { # [inline (always)]
  7056. fn from (writer : crate :: W < R32_HSPI_UDF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_UDF1` reader - parallel if user defined field 1 register"]
  7057. pub struct RB_HSPI_UDF1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_UDF1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_UDF1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_UDF1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7058. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_UDF1` writer - parallel if user defined field 1 register"]
  7059. pub struct RB_HSPI_UDF1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_UDF1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7060. # [inline (always)]
  7061. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03ff_ffff) | (value as u32 & 0x03ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:25 - parallel if user defined field 1 register"]
  7062. # [inline (always)]
  7063. pub fn rb_hspi_udf1 (& self) -> RB_HSPI_UDF1_R { RB_HSPI_UDF1_R :: new ((self . bits & 0x03ff_ffff) as u32) } } impl W { # [doc = "Bits 0:25 - parallel if user defined field 1 register"]
  7064. # [inline (always)]
  7065. pub fn rb_hspi_udf1 (& mut self) -> RB_HSPI_UDF1_W { RB_HSPI_UDF1_W { w : self } } # [doc = "Writes raw bits to the register."]
  7066. # [inline (always)]
  7067. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if user defined field 1 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_udf1](index.html) module"]
  7068. pub struct R32_HSPI_UDF1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_UDF1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_udf1::R](R) reader structure"]
  7069. impl crate :: Readable for R32_HSPI_UDF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_udf1::W](W) writer structure"]
  7070. impl crate :: Writable for R32_HSPI_UDF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_UDF1 to value 0"]
  7071. impl crate :: Resettable for R32_HSPI_UDF1_SPEC { # [inline (always)]
  7072. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_INT_FLAG register accessor: an alias for `Reg<R8_HSPI_INT_FLAG_SPEC>`"]
  7073. pub type R8_HSPI_INT_FLAG = crate :: Reg < r8_hspi_int_flag :: R8_HSPI_INT_FLAG_SPEC > ; # [doc = "parallel if interrupt flag"]
  7074. pub mod r8_hspi_int_flag { # [doc = "Register `R8_HSPI_INT_FLAG` reader"]
  7075. pub struct R (crate :: R < R8_HSPI_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_INT_FLAG_SPEC > ; # [inline (always)]
  7076. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_INT_FLAG_SPEC >> for R { # [inline (always)]
  7077. fn from (reader : crate :: R < R8_HSPI_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_INT_FLAG` writer"]
  7078. pub struct W (crate :: W < R8_HSPI_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_INT_FLAG_SPEC > ; # [inline (always)]
  7079. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7080. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_INT_FLAG_SPEC >> for W { # [inline (always)]
  7081. fn from (writer : crate :: W < R8_HSPI_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_IF_T_DONE` reader - interrupt flag for parallel if transmit done"]
  7082. pub struct RB_HSPI_IF_T_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_T_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_T_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_T_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7083. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_T_DONE` writer - interrupt flag for parallel if transmit done"]
  7084. pub struct RB_HSPI_IF_T_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_T_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  7085. # [inline (always)]
  7086. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7087. # [inline (always)]
  7088. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7089. # [inline (always)]
  7090. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_IF_R_DONE` reader - interrupt flag for parallel if receive done"]
  7091. pub struct RB_HSPI_IF_R_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_R_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_R_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_R_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7092. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_R_DONE` writer - interrupt flag for parallel if receive done"]
  7093. pub struct RB_HSPI_IF_R_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_R_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  7094. # [inline (always)]
  7095. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7096. # [inline (always)]
  7097. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7098. # [inline (always)]
  7099. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_IF_FIFO_OV` reader - interrupt flag for parallel if FIFO overflow"]
  7100. pub struct RB_HSPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7101. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_FIFO_OV` writer - interrupt flag for parallel if FIFO overflow"]
  7102. pub struct RB_HSPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  7103. # [inline (always)]
  7104. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7105. # [inline (always)]
  7106. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7107. # [inline (always)]
  7108. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_IF_B_DONE` reader - interrupt flag for parallel if tx burst done"]
  7109. pub struct RB_HSPI_IF_B_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_B_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_B_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_B_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7110. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_B_DONE` writer - interrupt flag for parallel if tx burst done"]
  7111. pub struct RB_HSPI_IF_B_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_B_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  7112. # [inline (always)]
  7113. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7114. # [inline (always)]
  7115. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7116. # [inline (always)]
  7117. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for parallel if transmit done"]
  7118. # [inline (always)]
  7119. pub fn rb_hspi_if_t_done (& self) -> RB_HSPI_IF_T_DONE_R { RB_HSPI_IF_T_DONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for parallel if receive done"]
  7120. # [inline (always)]
  7121. pub fn rb_hspi_if_r_done (& self) -> RB_HSPI_IF_R_DONE_R { RB_HSPI_IF_R_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for parallel if FIFO overflow"]
  7122. # [inline (always)]
  7123. pub fn rb_hspi_if_fifo_ov (& self) -> RB_HSPI_IF_FIFO_OV_R { RB_HSPI_IF_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for parallel if tx burst done"]
  7124. # [inline (always)]
  7125. pub fn rb_hspi_if_b_done (& self) -> RB_HSPI_IF_B_DONE_R { RB_HSPI_IF_B_DONE_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for parallel if transmit done"]
  7126. # [inline (always)]
  7127. pub fn rb_hspi_if_t_done (& mut self) -> RB_HSPI_IF_T_DONE_W { RB_HSPI_IF_T_DONE_W { w : self } } # [doc = "Bit 1 - interrupt flag for parallel if receive done"]
  7128. # [inline (always)]
  7129. pub fn rb_hspi_if_r_done (& mut self) -> RB_HSPI_IF_R_DONE_W { RB_HSPI_IF_R_DONE_W { w : self } } # [doc = "Bit 2 - interrupt flag for parallel if FIFO overflow"]
  7130. # [inline (always)]
  7131. pub fn rb_hspi_if_fifo_ov (& mut self) -> RB_HSPI_IF_FIFO_OV_W { RB_HSPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 3 - interrupt flag for parallel if tx burst done"]
  7132. # [inline (always)]
  7133. pub fn rb_hspi_if_b_done (& mut self) -> RB_HSPI_IF_B_DONE_W { RB_HSPI_IF_B_DONE_W { w : self } } # [doc = "Writes raw bits to the register."]
  7134. # [inline (always)]
  7135. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_int_flag](index.html) module"]
  7136. pub struct R8_HSPI_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_HSPI_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_int_flag::R](R) reader structure"]
  7137. impl crate :: Readable for R8_HSPI_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_int_flag::W](W) writer structure"]
  7138. impl crate :: Writable for R8_HSPI_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_INT_FLAG to value 0"]
  7139. impl crate :: Resettable for R8_HSPI_INT_FLAG_SPEC { # [inline (always)]
  7140. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_RTX_STATUS register accessor: an alias for `Reg<R8_HSPI_RTX_STATUS_SPEC>`"]
  7141. pub type R8_HSPI_RTX_STATUS = crate :: Reg < r8_hspi_rtx_status :: R8_HSPI_RTX_STATUS_SPEC > ; # [doc = "parallel rtx status"]
  7142. pub mod r8_hspi_rtx_status { # [doc = "Register `R8_HSPI_RTX_STATUS` reader"]
  7143. pub struct R (crate :: R < R8_HSPI_RTX_STATUS_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_RTX_STATUS_SPEC > ; # [inline (always)]
  7144. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_RTX_STATUS_SPEC >> for R { # [inline (always)]
  7145. fn from (reader : crate :: R < R8_HSPI_RTX_STATUS_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_RTX_STATUS` writer"]
  7146. pub struct W (crate :: W < R8_HSPI_RTX_STATUS_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_RTX_STATUS_SPEC > ; # [inline (always)]
  7147. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7148. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_RTX_STATUS_SPEC >> for W { # [inline (always)]
  7149. fn from (writer : crate :: W < R8_HSPI_RTX_STATUS_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_CRC_ERR` reader - CRC error occur"]
  7150. pub struct RB_HSPI_CRC_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_CRC_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_CRC_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_CRC_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7151. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_CRC_ERR` writer - CRC error occur"]
  7152. pub struct RB_HSPI_CRC_ERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_CRC_ERR_W < 'a > { # [doc = r"Sets the field bit"]
  7153. # [inline (always)]
  7154. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7155. # [inline (always)]
  7156. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7157. # [inline (always)]
  7158. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_NUM_MIS` reader - rx and tx sequence number mismatch"]
  7159. pub struct RB_HSPI_NUM_MIS_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_NUM_MIS_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_NUM_MIS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_NUM_MIS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7160. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_NUM_MIS` writer - rx and tx sequence number mismatch"]
  7161. pub struct RB_HSPI_NUM_MIS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_NUM_MIS_W < 'a > { # [doc = r"Sets the field bit"]
  7162. # [inline (always)]
  7163. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7164. # [inline (always)]
  7165. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7166. # [inline (always)]
  7167. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 1 - CRC error occur"]
  7168. # [inline (always)]
  7169. pub fn rb_hspi_crc_err (& self) -> RB_HSPI_CRC_ERR_R { RB_HSPI_CRC_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - rx and tx sequence number mismatch"]
  7170. # [inline (always)]
  7171. pub fn rb_hspi_num_mis (& self) -> RB_HSPI_NUM_MIS_R { RB_HSPI_NUM_MIS_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - CRC error occur"]
  7172. # [inline (always)]
  7173. pub fn rb_hspi_crc_err (& mut self) -> RB_HSPI_CRC_ERR_W { RB_HSPI_CRC_ERR_W { w : self } } # [doc = "Bit 2 - rx and tx sequence number mismatch"]
  7174. # [inline (always)]
  7175. pub fn rb_hspi_num_mis (& mut self) -> RB_HSPI_NUM_MIS_W { RB_HSPI_NUM_MIS_W { w : self } } # [doc = "Writes raw bits to the register."]
  7176. # [inline (always)]
  7177. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel rtx status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_rtx_status](index.html) module"]
  7178. pub struct R8_HSPI_RTX_STATUS_SPEC ; impl crate :: RegisterSpec for R8_HSPI_RTX_STATUS_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_rtx_status::R](R) reader structure"]
  7179. impl crate :: Readable for R8_HSPI_RTX_STATUS_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_rtx_status::W](W) writer structure"]
  7180. impl crate :: Writable for R8_HSPI_RTX_STATUS_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_RTX_STATUS to value 0"]
  7181. impl crate :: Resettable for R8_HSPI_RTX_STATUS_SPEC { # [inline (always)]
  7182. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_TX_SC register accessor: an alias for `Reg<R8_HSPI_TX_SC_SPEC>`"]
  7183. pub type R8_HSPI_TX_SC = crate :: Reg < r8_hspi_tx_sc :: R8_HSPI_TX_SC_SPEC > ; # [doc = "parallel TX sequence ctrl"]
  7184. pub mod r8_hspi_tx_sc { # [doc = "Register `R8_HSPI_TX_SC` reader"]
  7185. pub struct R (crate :: R < R8_HSPI_TX_SC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_TX_SC_SPEC > ; # [inline (always)]
  7186. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_TX_SC_SPEC >> for R { # [inline (always)]
  7187. fn from (reader : crate :: R < R8_HSPI_TX_SC_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_TX_SC` writer"]
  7188. pub struct W (crate :: W < R8_HSPI_TX_SC_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_TX_SC_SPEC > ; # [inline (always)]
  7189. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7190. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_TX_SC_SPEC >> for W { # [inline (always)]
  7191. fn from (writer : crate :: W < R8_HSPI_TX_SC_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_NUM` reader - parallel if tx sequence num"]
  7192. pub struct RB_HSPI_TX_NUM_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_TX_NUM_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_TX_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_NUM_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  7193. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_NUM` writer - parallel if tx sequence num"]
  7194. pub struct RB_HSPI_TX_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7195. # [inline (always)]
  7196. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } # [doc = "Field `RB_HSPI_TX_TOG` reader - parallel if tx addr toggle flag"]
  7197. pub struct RB_HSPI_TX_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TX_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TX_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7198. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_TOG` writer - parallel if tx addr toggle flag"]
  7199. pub struct RB_HSPI_TX_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_TOG_W < 'a > { # [doc = r"Sets the field bit"]
  7200. # [inline (always)]
  7201. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7202. # [inline (always)]
  7203. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7204. # [inline (always)]
  7205. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bits 0:3 - parallel if tx sequence num"]
  7206. # [inline (always)]
  7207. pub fn rb_hspi_tx_num (& self) -> RB_HSPI_TX_NUM_R { RB_HSPI_TX_NUM_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bit 4 - parallel if tx addr toggle flag"]
  7208. # [inline (always)]
  7209. pub fn rb_hspi_tx_tog (& self) -> RB_HSPI_TX_TOG_R { RB_HSPI_TX_TOG_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bits 0:3 - parallel if tx sequence num"]
  7210. # [inline (always)]
  7211. pub fn rb_hspi_tx_num (& mut self) -> RB_HSPI_TX_NUM_W { RB_HSPI_TX_NUM_W { w : self } } # [doc = "Bit 4 - parallel if tx addr toggle flag"]
  7212. # [inline (always)]
  7213. pub fn rb_hspi_tx_tog (& mut self) -> RB_HSPI_TX_TOG_W { RB_HSPI_TX_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  7214. # [inline (always)]
  7215. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel TX sequence ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_tx_sc](index.html) module"]
  7216. pub struct R8_HSPI_TX_SC_SPEC ; impl crate :: RegisterSpec for R8_HSPI_TX_SC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_tx_sc::R](R) reader structure"]
  7217. impl crate :: Readable for R8_HSPI_TX_SC_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_tx_sc::W](W) writer structure"]
  7218. impl crate :: Writable for R8_HSPI_TX_SC_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_TX_SC to value 0"]
  7219. impl crate :: Resettable for R8_HSPI_TX_SC_SPEC { # [inline (always)]
  7220. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "HSPI_RX_SC register accessor: an alias for `Reg<HSPI_RX_SC_SPEC>`"]
  7221. pub type HSPI_RX_SC = crate :: Reg < hspi_rx_sc :: HSPI_RX_SC_SPEC > ; # [doc = "parallel RX sequence ctrl"]
  7222. pub mod hspi_rx_sc { # [doc = "Register `HSPI_RX_SC` reader"]
  7223. pub struct R (crate :: R < HSPI_RX_SC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < HSPI_RX_SC_SPEC > ; # [inline (always)]
  7224. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < HSPI_RX_SC_SPEC >> for R { # [inline (always)]
  7225. fn from (reader : crate :: R < HSPI_RX_SC_SPEC >) -> Self { R (reader) } } # [doc = "Register `HSPI_RX_SC` writer"]
  7226. pub struct W (crate :: W < HSPI_RX_SC_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < HSPI_RX_SC_SPEC > ; # [inline (always)]
  7227. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7228. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < HSPI_RX_SC_SPEC >> for W { # [inline (always)]
  7229. fn from (writer : crate :: W < HSPI_RX_SC_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_NUM` reader - parallel if rx sequence num"]
  7230. pub struct RB_HSPI_RX_NUM_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_RX_NUM_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_RX_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_NUM_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  7231. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_NUM` writer - parallel if rx sequence num"]
  7232. pub struct RB_HSPI_RX_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7233. # [inline (always)]
  7234. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } # [doc = "Field `RB_HSPI_RX_TOG` reader - parallel if rx addr toggle flag"]
  7235. pub struct RB_HSPI_RX_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RX_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RX_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7236. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_TOG` writer - parallel if rx addr toggle flag"]
  7237. pub struct RB_HSPI_RX_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_TOG_W < 'a > { # [doc = r"Sets the field bit"]
  7238. # [inline (always)]
  7239. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7240. # [inline (always)]
  7241. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7242. # [inline (always)]
  7243. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bits 0:3 - parallel if rx sequence num"]
  7244. # [inline (always)]
  7245. pub fn rb_hspi_rx_num (& self) -> RB_HSPI_RX_NUM_R { RB_HSPI_RX_NUM_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bit 4 - parallel if rx addr toggle flag"]
  7246. # [inline (always)]
  7247. pub fn rb_hspi_rx_tog (& self) -> RB_HSPI_RX_TOG_R { RB_HSPI_RX_TOG_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bits 0:3 - parallel if rx sequence num"]
  7248. # [inline (always)]
  7249. pub fn rb_hspi_rx_num (& mut self) -> RB_HSPI_RX_NUM_W { RB_HSPI_RX_NUM_W { w : self } } # [doc = "Bit 4 - parallel if rx addr toggle flag"]
  7250. # [inline (always)]
  7251. pub fn rb_hspi_rx_tog (& mut self) -> RB_HSPI_RX_TOG_W { RB_HSPI_RX_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  7252. # [inline (always)]
  7253. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel RX sequence ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hspi_rx_sc](index.html) module"]
  7254. pub struct HSPI_RX_SC_SPEC ; impl crate :: RegisterSpec for HSPI_RX_SC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [hspi_rx_sc::R](R) reader structure"]
  7255. impl crate :: Readable for HSPI_RX_SC_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [hspi_rx_sc::W](W) writer structure"]
  7256. impl crate :: Writable for HSPI_RX_SC_SPEC { type Writer = W ; } # [doc = "`reset()` method sets HSPI_RX_SC to value 0"]
  7257. impl crate :: Resettable for HSPI_RX_SC_SPEC { # [inline (always)]
  7258. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "ECDC register"]
  7259. pub struct ECDC { _marker : PhantomData < * const () > } unsafe impl Send for ECDC { } impl ECDC { # [doc = r"Pointer to the register block"]
  7260. pub const PTR : * const ecdc :: RegisterBlock = 0x4000_7000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  7261. # [inline (always)]
  7262. pub const fn ptr () -> * const ecdc :: RegisterBlock { Self :: PTR } } impl Deref for ECDC { type Target = ecdc :: RegisterBlock ; # [inline (always)]
  7263. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for ECDC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("ECDC") . finish () } } # [doc = "ECDC register"]
  7264. pub mod ecdc { # [doc = r"Register block"]
  7265. # [repr (C)]
  7266. pub struct RegisterBlock { # [doc = "0x00 - ECED AES/SM4 register"]
  7267. pub r16_ecec_ctrl : crate :: Reg < r16_ecec_ctrl :: R16_ECEC_CTRL_SPEC > , # [doc = "0x02 - Interupt enable register"]
  7268. pub r8_ecdc_int_en : crate :: Reg < r8_ecdc_int_en :: R8_ECDC_INT_EN_SPEC > , _reserved2 : [u8 ; 0x03]
  7269. , # [doc = "0x06 - Interupt flag register"]
  7270. pub r8_ecdc_int_fg : crate :: Reg < r8_ecdc_int_fg :: R8_ECDC_INT_FG_SPEC > , _reserved3 : [u8 ; 0x01]
  7271. , # [doc = "0x08 - User key 224-255 register"]
  7272. pub r32_ecdc_key_255t224 : crate :: Reg < r32_ecdc_key_255t224 :: R32_ECDC_KEY_255T224_SPEC > , # [doc = "0x0c - User key 192-223 register"]
  7273. pub r32_ecdc_key_223t192 : crate :: Reg < r32_ecdc_key_223t192 :: R32_ECDC_KEY_223T192_SPEC > , # [doc = "0x10 - User key 160-191 register"]
  7274. pub r32_ecdc_key_191t160 : crate :: Reg < r32_ecdc_key_191t160 :: R32_ECDC_KEY_191T160_SPEC > , # [doc = "0x14 - User key 128-159 register"]
  7275. pub r32_ecdc_key_159t128 : crate :: Reg < r32_ecdc_key_159t128 :: R32_ECDC_KEY_159T128_SPEC > , # [doc = "0x18 - User key 96-127 register"]
  7276. pub r32_ecdc_key_127t96 : crate :: Reg < r32_ecdc_key_127t96 :: R32_ECDC_KEY_127T96_SPEC > , # [doc = "0x1c - User key 64-95 register"]
  7277. pub r32_ecdc_key_95t64 : crate :: Reg < r32_ecdc_key_95t64 :: R32_ECDC_KEY_95T64_SPEC > , # [doc = "0x20 - User key 32-63 register"]
  7278. pub r32_ecdc_key_63t32 : crate :: Reg < r32_ecdc_key_63t32 :: R32_ECDC_KEY_63T32_SPEC > , # [doc = "0x24 - User key 0-31 register"]
  7279. pub r32_ecdc_key_31t0 : crate :: Reg < r32_ecdc_key_31t0 :: R32_ECDC_KEY_31T0_SPEC > , # [doc = "0x28 - CTR mode count 96-127 register"]
  7280. pub r32_ecdc_iv_127t96 : crate :: Reg < r32_ecdc_iv_127t96 :: R32_ECDC_IV_127T96_SPEC > , # [doc = "0x2c - CTR mode count 64-95 register"]
  7281. pub r32_ecdc_iv_95t64 : crate :: Reg < r32_ecdc_iv_95t64 :: R32_ECDC_IV_95T64_SPEC > , # [doc = "0x30 - CTR mode count 32-63 register"]
  7282. pub r32_ecdc_iv_63t32 : crate :: Reg < r32_ecdc_iv_63t32 :: R32_ECDC_IV_63T32_SPEC > , # [doc = "0x34 - CTR mode count 0-31 register"]
  7283. pub r32_ecdc_iv_31t0 : crate :: Reg < r32_ecdc_iv_31t0 :: R32_ECDC_IV_31T0_SPEC > , _reserved15 : [u8 ; 0x08]
  7284. , # [doc = "0x40 - Single encryption and decryption of original data 96-127 register"]
  7285. pub r32_ecdc_sgsd_127t96 : crate :: Reg < r32_ecdc_sgsd_127t96 :: R32_ECDC_SGSD_127T96_SPEC > , # [doc = "0x44 - Single encryption and decryption of original data 64-95 register"]
  7286. pub r32_ecdc_sgsd_95t64 : crate :: Reg < r32_ecdc_sgsd_95t64 :: R32_ECDC_SGSD_95T64_SPEC > , # [doc = "0x48 - Single encryption and decryption of original data 32-63 register"]
  7287. pub r32_ecdc_sgsd_63t32 : crate :: Reg < r32_ecdc_sgsd_63t32 :: R32_ECDC_SGSD_63T32_SPEC > , # [doc = "0x4c - Single encryption and decryption of original data 0-31 register"]
  7288. pub r32_ecdc_sgsd_31t0 : crate :: Reg < r32_ecdc_sgsd_31t0 :: R32_ECDC_SGSD_31T0_SPEC > , # [doc = "0x50 - Single encryption and decryption result 96-127 register"]
  7289. pub r32_ecdc_sgrt_127t96 : crate :: Reg < r32_ecdc_sgrt_127t96 :: R32_ECDC_SGRT_127T96_SPEC > , # [doc = "0x54 - Single encryption and decryption result 64-95 register"]
  7290. pub r32_ecdc_sgrt_95t64 : crate :: Reg < r32_ecdc_sgrt_95t64 :: R32_ECDC_SGRT_95T64_SPEC > , # [doc = "0x58 - Single encryption and decryption result 0-31 register"]
  7291. pub r32_ecdc_sgrt_63t32 : crate :: Reg < r32_ecdc_sgrt_63t32 :: R32_ECDC_SGRT_63T32_SPEC > , # [doc = "0x5c - Single encryption and decryption result 0-31 register"]
  7292. pub rb_ecdc_sgrt_31t0 : crate :: Reg < rb_ecdc_sgrt_31t0 :: RB_ECDC_SGRT_31T0_SPEC > , # [doc = "0x60 - encryption and decryption sram start address register"]
  7293. pub r32_ecdc_sram_addr : crate :: Reg < r32_ecdc_sram_addr :: R32_ECDC_SRAM_ADDR_SPEC > , # [doc = "0x64 - encryption and decryption sram size register"]
  7294. pub r32_ecdc_sram_len : crate :: Reg < r32_ecdc_sram_len :: R32_ECDC_SRAM_LEN_SPEC > , } # [doc = "R16_ECEC_CTRL register accessor: an alias for `Reg<R16_ECEC_CTRL_SPEC>`"]
  7295. pub type R16_ECEC_CTRL = crate :: Reg < r16_ecec_ctrl :: R16_ECEC_CTRL_SPEC > ; # [doc = "ECED AES/SM4 register"]
  7296. pub mod r16_ecec_ctrl { # [doc = "Register `R16_ECEC_CTRL` reader"]
  7297. pub struct R (crate :: R < R16_ECEC_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_ECEC_CTRL_SPEC > ; # [inline (always)]
  7298. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_ECEC_CTRL_SPEC >> for R { # [inline (always)]
  7299. fn from (reader : crate :: R < R16_ECEC_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_ECEC_CTRL` writer"]
  7300. pub struct W (crate :: W < R16_ECEC_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_ECEC_CTRL_SPEC > ; # [inline (always)]
  7301. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7302. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_ECEC_CTRL_SPEC >> for W { # [inline (always)]
  7303. fn from (writer : crate :: W < R16_ECEC_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEYEX_EN` reader - enable key expansion"]
  7304. pub struct RB_ECDC_KEYEX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_KEYEX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_KEYEX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEYEX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7305. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEYEX_EN` writer - enable key expansion"]
  7306. pub struct RB_ECDC_KEYEX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEYEX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  7307. # [inline (always)]
  7308. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7309. # [inline (always)]
  7310. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7311. # [inline (always)]
  7312. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_RDPERI_EN` reader - when write data to dma"]
  7313. pub struct RB_ECDC_RDPERI_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_RDPERI_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_RDPERI_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_RDPERI_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7314. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_RDPERI_EN` writer - when write data to dma"]
  7315. pub struct RB_ECDC_RDPERI_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_RDPERI_EN_W < 'a > { # [doc = r"Sets the field bit"]
  7316. # [inline (always)]
  7317. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7318. # [inline (always)]
  7319. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7320. # [inline (always)]
  7321. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_WRPERI_EN` reader - when read data from dma"]
  7322. pub struct RB_ECDC_WRPERI_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_WRPERI_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_WRPERI_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_WRPERI_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7323. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_WRPERI_EN` writer - when read data from dma"]
  7324. pub struct RB_ECDC_WRPERI_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_WRPERI_EN_W < 'a > { # [doc = r"Sets the field bit"]
  7325. # [inline (always)]
  7326. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7327. # [inline (always)]
  7328. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7329. # [inline (always)]
  7330. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_ECDC_MODE_SEL` reader - ECDC mode select"]
  7331. pub struct RB_ECDC_MODE_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_MODE_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_MODE_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_MODE_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7332. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_MODE_SEL` writer - ECDC mode select"]
  7333. pub struct RB_ECDC_MODE_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_MODE_SEL_W < 'a > { # [doc = r"Sets the field bit"]
  7334. # [inline (always)]
  7335. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7336. # [inline (always)]
  7337. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7338. # [inline (always)]
  7339. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_ECDC_CLKDIV_MASK` reader - Clock divide factor"]
  7340. pub struct RB_ECDC_CLKDIV_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_ECDC_CLKDIV_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_ECDC_CLKDIV_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_CLKDIV_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  7341. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_CLKDIV_MASK` writer - Clock divide factor"]
  7342. pub struct RB_ECDC_CLKDIV_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_CLKDIV_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7343. # [inline (always)]
  7344. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x07 << 4)) | ((value as u16 & 0x07) << 4) ; self . w } } # [doc = "Field `RB_ECDC_WRSRAM_EN` reader - module dma enable"]
  7345. pub struct RB_ECDC_WRSRAM_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_WRSRAM_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_WRSRAM_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_WRSRAM_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7346. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_WRSRAM_EN` writer - module dma enable"]
  7347. pub struct RB_ECDC_WRSRAM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_WRSRAM_EN_W < 'a > { # [doc = r"Sets the field bit"]
  7348. # [inline (always)]
  7349. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7350. # [inline (always)]
  7351. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7352. # [inline (always)]
  7353. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_ECDC_ALGRM_MOD` reader - Encryption and decryption algorithm mode selection"]
  7354. pub struct RB_ECDC_ALGRM_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_ALGRM_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_ALGRM_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_ALGRM_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7355. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_ALGRM_MOD` writer - Encryption and decryption algorithm mode selection"]
  7356. pub struct RB_ECDC_ALGRM_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_ALGRM_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  7357. # [inline (always)]
  7358. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7359. # [inline (always)]
  7360. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7361. # [inline (always)]
  7362. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_ECDC_CIPHER_MOD` reader - Block cipher mode selection"]
  7363. pub struct RB_ECDC_CIPHER_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_CIPHER_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_CIPHER_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_CIPHER_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7364. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_CIPHER_MOD` writer - Block cipher mode selection"]
  7365. pub struct RB_ECDC_CIPHER_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_CIPHER_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  7366. # [inline (always)]
  7367. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7368. # [inline (always)]
  7369. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7370. # [inline (always)]
  7371. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } # [doc = "Field `RB_ECDC_KLEN_MASK` reader - Key length setting"]
  7372. pub struct RB_ECDC_KLEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_ECDC_KLEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_ECDC_KLEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KLEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  7373. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KLEN_MASK` writer - Key length setting"]
  7374. pub struct RB_ECDC_KLEN_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KLEN_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7375. # [inline (always)]
  7376. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 10)) | ((value as u16 & 0x03) << 10) ; self . w } } # [doc = "Field `RB_ECDC_DAT_MOD` reader - source data and result data is bit endian"]
  7377. pub struct RB_ECDC_DAT_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_DAT_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_DAT_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_DAT_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7378. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_DAT_MOD` writer - source data and result data is bit endian"]
  7379. pub struct RB_ECDC_DAT_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_DAT_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  7380. # [inline (always)]
  7381. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7382. # [inline (always)]
  7383. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7384. # [inline (always)]
  7385. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 13)) | ((value as u16 & 0x01) << 13) ; self . w } } impl R { # [doc = "Bit 0 - enable key expansion"]
  7386. # [inline (always)]
  7387. pub fn rb_ecdc_keyex_en (& self) -> RB_ECDC_KEYEX_EN_R { RB_ECDC_KEYEX_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - when write data to dma"]
  7388. # [inline (always)]
  7389. pub fn rb_ecdc_rdperi_en (& self) -> RB_ECDC_RDPERI_EN_R { RB_ECDC_RDPERI_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - when read data from dma"]
  7390. # [inline (always)]
  7391. pub fn rb_ecdc_wrperi_en (& self) -> RB_ECDC_WRPERI_EN_R { RB_ECDC_WRPERI_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - ECDC mode select"]
  7392. # [inline (always)]
  7393. pub fn rb_ecdc_mode_sel (& self) -> RB_ECDC_MODE_SEL_R { RB_ECDC_MODE_SEL_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:6 - Clock divide factor"]
  7394. # [inline (always)]
  7395. pub fn rb_ecdc_clkdiv_mask (& self) -> RB_ECDC_CLKDIV_MASK_R { RB_ECDC_CLKDIV_MASK_R :: new (((self . bits >> 4) & 0x07) as u8) } # [doc = "Bit 7 - module dma enable"]
  7396. # [inline (always)]
  7397. pub fn rb_ecdc_wrsram_en (& self) -> RB_ECDC_WRSRAM_EN_R { RB_ECDC_WRSRAM_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - Encryption and decryption algorithm mode selection"]
  7398. # [inline (always)]
  7399. pub fn rb_ecdc_algrm_mod (& self) -> RB_ECDC_ALGRM_MOD_R { RB_ECDC_ALGRM_MOD_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - Block cipher mode selection"]
  7400. # [inline (always)]
  7401. pub fn rb_ecdc_cipher_mod (& self) -> RB_ECDC_CIPHER_MOD_R { RB_ECDC_CIPHER_MOD_R :: new (((self . bits >> 9) & 0x01) != 0) } # [doc = "Bits 10:11 - Key length setting"]
  7402. # [inline (always)]
  7403. pub fn rb_ecdc_klen_mask (& self) -> RB_ECDC_KLEN_MASK_R { RB_ECDC_KLEN_MASK_R :: new (((self . bits >> 10) & 0x03) as u8) } # [doc = "Bit 13 - source data and result data is bit endian"]
  7404. # [inline (always)]
  7405. pub fn rb_ecdc_dat_mod (& self) -> RB_ECDC_DAT_MOD_R { RB_ECDC_DAT_MOD_R :: new (((self . bits >> 13) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable key expansion"]
  7406. # [inline (always)]
  7407. pub fn rb_ecdc_keyex_en (& mut self) -> RB_ECDC_KEYEX_EN_W { RB_ECDC_KEYEX_EN_W { w : self } } # [doc = "Bit 1 - when write data to dma"]
  7408. # [inline (always)]
  7409. pub fn rb_ecdc_rdperi_en (& mut self) -> RB_ECDC_RDPERI_EN_W { RB_ECDC_RDPERI_EN_W { w : self } } # [doc = "Bit 2 - when read data from dma"]
  7410. # [inline (always)]
  7411. pub fn rb_ecdc_wrperi_en (& mut self) -> RB_ECDC_WRPERI_EN_W { RB_ECDC_WRPERI_EN_W { w : self } } # [doc = "Bit 3 - ECDC mode select"]
  7412. # [inline (always)]
  7413. pub fn rb_ecdc_mode_sel (& mut self) -> RB_ECDC_MODE_SEL_W { RB_ECDC_MODE_SEL_W { w : self } } # [doc = "Bits 4:6 - Clock divide factor"]
  7414. # [inline (always)]
  7415. pub fn rb_ecdc_clkdiv_mask (& mut self) -> RB_ECDC_CLKDIV_MASK_W { RB_ECDC_CLKDIV_MASK_W { w : self } } # [doc = "Bit 7 - module dma enable"]
  7416. # [inline (always)]
  7417. pub fn rb_ecdc_wrsram_en (& mut self) -> RB_ECDC_WRSRAM_EN_W { RB_ECDC_WRSRAM_EN_W { w : self } } # [doc = "Bit 8 - Encryption and decryption algorithm mode selection"]
  7418. # [inline (always)]
  7419. pub fn rb_ecdc_algrm_mod (& mut self) -> RB_ECDC_ALGRM_MOD_W { RB_ECDC_ALGRM_MOD_W { w : self } } # [doc = "Bit 9 - Block cipher mode selection"]
  7420. # [inline (always)]
  7421. pub fn rb_ecdc_cipher_mod (& mut self) -> RB_ECDC_CIPHER_MOD_W { RB_ECDC_CIPHER_MOD_W { w : self } } # [doc = "Bits 10:11 - Key length setting"]
  7422. # [inline (always)]
  7423. pub fn rb_ecdc_klen_mask (& mut self) -> RB_ECDC_KLEN_MASK_W { RB_ECDC_KLEN_MASK_W { w : self } } # [doc = "Bit 13 - source data and result data is bit endian"]
  7424. # [inline (always)]
  7425. pub fn rb_ecdc_dat_mod (& mut self) -> RB_ECDC_DAT_MOD_W { RB_ECDC_DAT_MOD_W { w : self } } # [doc = "Writes raw bits to the register."]
  7426. # [inline (always)]
  7427. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "ECED AES/SM4 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_ecec_ctrl](index.html) module"]
  7428. pub struct R16_ECEC_CTRL_SPEC ; impl crate :: RegisterSpec for R16_ECEC_CTRL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_ecec_ctrl::R](R) reader structure"]
  7429. impl crate :: Readable for R16_ECEC_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_ecec_ctrl::W](W) writer structure"]
  7430. impl crate :: Writable for R16_ECEC_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_ECEC_CTRL to value 0x20"]
  7431. impl crate :: Resettable for R16_ECEC_CTRL_SPEC { # [inline (always)]
  7432. fn reset_value () -> Self :: Ux { 0x20 } } } # [doc = "R8_ECDC_INT_EN register accessor: an alias for `Reg<R8_ECDC_INT_EN_SPEC>`"]
  7433. pub type R8_ECDC_INT_EN = crate :: Reg < r8_ecdc_int_en :: R8_ECDC_INT_EN_SPEC > ; # [doc = "Interupt enable register"]
  7434. pub mod r8_ecdc_int_en { # [doc = "Register `R8_ECDC_INT_EN` reader"]
  7435. pub struct R (crate :: R < R8_ECDC_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_ECDC_INT_EN_SPEC > ; # [inline (always)]
  7436. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_ECDC_INT_EN_SPEC >> for R { # [inline (always)]
  7437. fn from (reader : crate :: R < R8_ECDC_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_ECDC_INT_EN` writer"]
  7438. pub struct W (crate :: W < R8_ECDC_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_ECDC_INT_EN_SPEC > ; # [inline (always)]
  7439. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7440. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_ECDC_INT_EN_SPEC >> for W { # [inline (always)]
  7441. fn from (writer : crate :: W < R8_ECDC_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IE_EKDONE` reader - Key extension completion interrupt enable"]
  7442. pub struct RB_ECDC_IE_EKDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_EKDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_EKDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_EKDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7443. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_EKDONE` writer - Key extension completion interrupt enable"]
  7444. pub struct RB_ECDC_IE_EKDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_EKDONE_W < 'a > { # [doc = r"Sets the field bit"]
  7445. # [inline (always)]
  7446. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7447. # [inline (always)]
  7448. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7449. # [inline (always)]
  7450. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_IE_SINGLE` reader - Single encryption and decryption completion interrupt enable"]
  7451. pub struct RB_ECDC_IE_SINGLE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_SINGLE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_SINGLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_SINGLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7452. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_SINGLE` writer - Single encryption and decryption completion interrupt enable"]
  7453. pub struct RB_ECDC_IE_SINGLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_SINGLE_W < 'a > { # [doc = r"Sets the field bit"]
  7454. # [inline (always)]
  7455. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7456. # [inline (always)]
  7457. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7458. # [inline (always)]
  7459. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_IE_WRSRAM` reader - Memory to memory encryption and decryption completion interrupt enable"]
  7460. pub struct RB_ECDC_IE_WRSRAM_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_WRSRAM_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_WRSRAM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_WRSRAM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7461. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_WRSRAM` writer - Memory to memory encryption and decryption completion interrupt enable"]
  7462. pub struct RB_ECDC_IE_WRSRAM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_WRSRAM_W < 'a > { # [doc = r"Sets the field bit"]
  7463. # [inline (always)]
  7464. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7465. # [inline (always)]
  7466. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7467. # [inline (always)]
  7468. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - Key extension completion interrupt enable"]
  7469. # [inline (always)]
  7470. pub fn rb_ecdc_ie_ekdone (& self) -> RB_ECDC_IE_EKDONE_R { RB_ECDC_IE_EKDONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Single encryption and decryption completion interrupt enable"]
  7471. # [inline (always)]
  7472. pub fn rb_ecdc_ie_single (& self) -> RB_ECDC_IE_SINGLE_R { RB_ECDC_IE_SINGLE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt enable"]
  7473. # [inline (always)]
  7474. pub fn rb_ecdc_ie_wrsram (& self) -> RB_ECDC_IE_WRSRAM_R { RB_ECDC_IE_WRSRAM_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Key extension completion interrupt enable"]
  7475. # [inline (always)]
  7476. pub fn rb_ecdc_ie_ekdone (& mut self) -> RB_ECDC_IE_EKDONE_W { RB_ECDC_IE_EKDONE_W { w : self } } # [doc = "Bit 1 - Single encryption and decryption completion interrupt enable"]
  7477. # [inline (always)]
  7478. pub fn rb_ecdc_ie_single (& mut self) -> RB_ECDC_IE_SINGLE_W { RB_ECDC_IE_SINGLE_W { w : self } } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt enable"]
  7479. # [inline (always)]
  7480. pub fn rb_ecdc_ie_wrsram (& mut self) -> RB_ECDC_IE_WRSRAM_W { RB_ECDC_IE_WRSRAM_W { w : self } } # [doc = "Writes raw bits to the register."]
  7481. # [inline (always)]
  7482. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_ecdc_int_en](index.html) module"]
  7483. pub struct R8_ECDC_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_ECDC_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_ecdc_int_en::R](R) reader structure"]
  7484. impl crate :: Readable for R8_ECDC_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_ecdc_int_en::W](W) writer structure"]
  7485. impl crate :: Writable for R8_ECDC_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_ECDC_INT_EN to value 0"]
  7486. impl crate :: Resettable for R8_ECDC_INT_EN_SPEC { # [inline (always)]
  7487. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_ECDC_INT_FG register accessor: an alias for `Reg<R8_ECDC_INT_FG_SPEC>`"]
  7488. pub type R8_ECDC_INT_FG = crate :: Reg < r8_ecdc_int_fg :: R8_ECDC_INT_FG_SPEC > ; # [doc = "Interupt flag register"]
  7489. pub mod r8_ecdc_int_fg { # [doc = "Register `R8_ECDC_INT_FG` reader"]
  7490. pub struct R (crate :: R < R8_ECDC_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_ECDC_INT_FG_SPEC > ; # [inline (always)]
  7491. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_ECDC_INT_FG_SPEC >> for R { # [inline (always)]
  7492. fn from (reader : crate :: R < R8_ECDC_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_ECDC_INT_FG` writer"]
  7493. pub struct W (crate :: W < R8_ECDC_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_ECDC_INT_FG_SPEC > ; # [inline (always)]
  7494. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7495. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_ECDC_INT_FG_SPEC >> for W { # [inline (always)]
  7496. fn from (writer : crate :: W < R8_ECDC_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IF_EKDONE` reader - Key extension completion interrupt flag"]
  7497. pub struct RB_ECDC_IF_EKDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_EKDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_EKDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_EKDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7498. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_EKDONE` writer - Key extension completion interrupt flag"]
  7499. pub struct RB_ECDC_IF_EKDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_EKDONE_W < 'a > { # [doc = r"Sets the field bit"]
  7500. # [inline (always)]
  7501. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7502. # [inline (always)]
  7503. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7504. # [inline (always)]
  7505. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_IF_SINGLE` reader - Single encryption and decryption completion interrupt flag"]
  7506. pub struct RB_ECDC_IF_SINGLE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_SINGLE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_SINGLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_SINGLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7507. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_SINGLE` writer - Single encryption and decryption completion interrupt flag"]
  7508. pub struct RB_ECDC_IF_SINGLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_SINGLE_W < 'a > { # [doc = r"Sets the field bit"]
  7509. # [inline (always)]
  7510. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7511. # [inline (always)]
  7512. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7513. # [inline (always)]
  7514. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_IF_WRSRAM` reader - Memory to memory encryption and decryption completion interrupt flag"]
  7515. pub struct RB_ECDC_IF_WRSRAM_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_WRSRAM_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_WRSRAM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_WRSRAM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  7516. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_WRSRAM` writer - Memory to memory encryption and decryption completion interrupt flag"]
  7517. pub struct RB_ECDC_IF_WRSRAM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_WRSRAM_W < 'a > { # [doc = r"Sets the field bit"]
  7518. # [inline (always)]
  7519. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  7520. # [inline (always)]
  7521. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  7522. # [inline (always)]
  7523. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - Key extension completion interrupt flag"]
  7524. # [inline (always)]
  7525. pub fn rb_ecdc_if_ekdone (& self) -> RB_ECDC_IF_EKDONE_R { RB_ECDC_IF_EKDONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Single encryption and decryption completion interrupt flag"]
  7526. # [inline (always)]
  7527. pub fn rb_ecdc_if_single (& self) -> RB_ECDC_IF_SINGLE_R { RB_ECDC_IF_SINGLE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt flag"]
  7528. # [inline (always)]
  7529. pub fn rb_ecdc_if_wrsram (& self) -> RB_ECDC_IF_WRSRAM_R { RB_ECDC_IF_WRSRAM_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Key extension completion interrupt flag"]
  7530. # [inline (always)]
  7531. pub fn rb_ecdc_if_ekdone (& mut self) -> RB_ECDC_IF_EKDONE_W { RB_ECDC_IF_EKDONE_W { w : self } } # [doc = "Bit 1 - Single encryption and decryption completion interrupt flag"]
  7532. # [inline (always)]
  7533. pub fn rb_ecdc_if_single (& mut self) -> RB_ECDC_IF_SINGLE_W { RB_ECDC_IF_SINGLE_W { w : self } } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt flag"]
  7534. # [inline (always)]
  7535. pub fn rb_ecdc_if_wrsram (& mut self) -> RB_ECDC_IF_WRSRAM_W { RB_ECDC_IF_WRSRAM_W { w : self } } # [doc = "Writes raw bits to the register."]
  7536. # [inline (always)]
  7537. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_ecdc_int_fg](index.html) module"]
  7538. pub struct R8_ECDC_INT_FG_SPEC ; impl crate :: RegisterSpec for R8_ECDC_INT_FG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_ecdc_int_fg::R](R) reader structure"]
  7539. impl crate :: Readable for R8_ECDC_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_ecdc_int_fg::W](W) writer structure"]
  7540. impl crate :: Writable for R8_ECDC_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_ECDC_INT_FG to value 0"]
  7541. impl crate :: Resettable for R8_ECDC_INT_FG_SPEC { # [inline (always)]
  7542. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_255T224 register accessor: an alias for `Reg<R32_ECDC_KEY_255T224_SPEC>`"]
  7543. pub type R32_ECDC_KEY_255T224 = crate :: Reg < r32_ecdc_key_255t224 :: R32_ECDC_KEY_255T224_SPEC > ; # [doc = "User key 224-255 register"]
  7544. pub mod r32_ecdc_key_255t224 { # [doc = "Register `R32_ECDC_KEY_255T224` reader"]
  7545. pub struct R (crate :: R < R32_ECDC_KEY_255T224_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_255T224_SPEC > ; # [inline (always)]
  7546. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_255T224_SPEC >> for R { # [inline (always)]
  7547. fn from (reader : crate :: R < R32_ECDC_KEY_255T224_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_255T224` writer"]
  7548. pub struct W (crate :: W < R32_ECDC_KEY_255T224_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_255T224_SPEC > ; # [inline (always)]
  7549. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7550. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_255T224_SPEC >> for W { # [inline (always)]
  7551. fn from (writer : crate :: W < R32_ECDC_KEY_255T224_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_255T224` reader - User key 224-255 register"]
  7552. pub struct RB_ECDC_KEY_255T224_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_255T224_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_255T224_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_255T224_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7553. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_255T224` writer - User key 224-255 register"]
  7554. pub struct RB_ECDC_KEY_255T224_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_255T224_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7555. # [inline (always)]
  7556. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 224-255 register"]
  7557. # [inline (always)]
  7558. pub fn rb_ecdc_key_255t224 (& self) -> RB_ECDC_KEY_255T224_R { RB_ECDC_KEY_255T224_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 224-255 register"]
  7559. # [inline (always)]
  7560. pub fn rb_ecdc_key_255t224 (& mut self) -> RB_ECDC_KEY_255T224_W { RB_ECDC_KEY_255T224_W { w : self } } # [doc = "Writes raw bits to the register."]
  7561. # [inline (always)]
  7562. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 224-255 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_255t224](index.html) module"]
  7563. pub struct R32_ECDC_KEY_255T224_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_255T224_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_255t224::R](R) reader structure"]
  7564. impl crate :: Readable for R32_ECDC_KEY_255T224_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_255t224::W](W) writer structure"]
  7565. impl crate :: Writable for R32_ECDC_KEY_255T224_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_255T224 to value 0"]
  7566. impl crate :: Resettable for R32_ECDC_KEY_255T224_SPEC { # [inline (always)]
  7567. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_223T192 register accessor: an alias for `Reg<R32_ECDC_KEY_223T192_SPEC>`"]
  7568. pub type R32_ECDC_KEY_223T192 = crate :: Reg < r32_ecdc_key_223t192 :: R32_ECDC_KEY_223T192_SPEC > ; # [doc = "User key 192-223 register"]
  7569. pub mod r32_ecdc_key_223t192 { # [doc = "Register `R32_ECDC_KEY_223T192` reader"]
  7570. pub struct R (crate :: R < R32_ECDC_KEY_223T192_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_223T192_SPEC > ; # [inline (always)]
  7571. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_223T192_SPEC >> for R { # [inline (always)]
  7572. fn from (reader : crate :: R < R32_ECDC_KEY_223T192_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_223T192` writer"]
  7573. pub struct W (crate :: W < R32_ECDC_KEY_223T192_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_223T192_SPEC > ; # [inline (always)]
  7574. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7575. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_223T192_SPEC >> for W { # [inline (always)]
  7576. fn from (writer : crate :: W < R32_ECDC_KEY_223T192_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_223T192` reader - User key 192-223 register"]
  7577. pub struct RB_ECDC_KEY_223T192_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_223T192_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_223T192_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_223T192_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7578. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_223T192` writer - User key 192-223 register"]
  7579. pub struct RB_ECDC_KEY_223T192_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_223T192_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7580. # [inline (always)]
  7581. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 192-223 register"]
  7582. # [inline (always)]
  7583. pub fn rb_ecdc_key_223t192 (& self) -> RB_ECDC_KEY_223T192_R { RB_ECDC_KEY_223T192_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 192-223 register"]
  7584. # [inline (always)]
  7585. pub fn rb_ecdc_key_223t192 (& mut self) -> RB_ECDC_KEY_223T192_W { RB_ECDC_KEY_223T192_W { w : self } } # [doc = "Writes raw bits to the register."]
  7586. # [inline (always)]
  7587. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 192-223 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_223t192](index.html) module"]
  7588. pub struct R32_ECDC_KEY_223T192_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_223T192_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_223t192::R](R) reader structure"]
  7589. impl crate :: Readable for R32_ECDC_KEY_223T192_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_223t192::W](W) writer structure"]
  7590. impl crate :: Writable for R32_ECDC_KEY_223T192_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_223T192 to value 0"]
  7591. impl crate :: Resettable for R32_ECDC_KEY_223T192_SPEC { # [inline (always)]
  7592. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_191T160 register accessor: an alias for `Reg<R32_ECDC_KEY_191T160_SPEC>`"]
  7593. pub type R32_ECDC_KEY_191T160 = crate :: Reg < r32_ecdc_key_191t160 :: R32_ECDC_KEY_191T160_SPEC > ; # [doc = "User key 160-191 register"]
  7594. pub mod r32_ecdc_key_191t160 { # [doc = "Register `R32_ECDC_KEY_191T160` reader"]
  7595. pub struct R (crate :: R < R32_ECDC_KEY_191T160_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_191T160_SPEC > ; # [inline (always)]
  7596. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_191T160_SPEC >> for R { # [inline (always)]
  7597. fn from (reader : crate :: R < R32_ECDC_KEY_191T160_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_191T160` writer"]
  7598. pub struct W (crate :: W < R32_ECDC_KEY_191T160_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_191T160_SPEC > ; # [inline (always)]
  7599. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7600. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_191T160_SPEC >> for W { # [inline (always)]
  7601. fn from (writer : crate :: W < R32_ECDC_KEY_191T160_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_191T160` reader - User key 160-191 register"]
  7602. pub struct RB_ECDC_KEY_191T160_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_191T160_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_191T160_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_191T160_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7603. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_191T160` writer - User key 160-191 register"]
  7604. pub struct RB_ECDC_KEY_191T160_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_191T160_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7605. # [inline (always)]
  7606. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 160-191 register"]
  7607. # [inline (always)]
  7608. pub fn rb_ecdc_key_191t160 (& self) -> RB_ECDC_KEY_191T160_R { RB_ECDC_KEY_191T160_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 160-191 register"]
  7609. # [inline (always)]
  7610. pub fn rb_ecdc_key_191t160 (& mut self) -> RB_ECDC_KEY_191T160_W { RB_ECDC_KEY_191T160_W { w : self } } # [doc = "Writes raw bits to the register."]
  7611. # [inline (always)]
  7612. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 160-191 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_191t160](index.html) module"]
  7613. pub struct R32_ECDC_KEY_191T160_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_191T160_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_191t160::R](R) reader structure"]
  7614. impl crate :: Readable for R32_ECDC_KEY_191T160_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_191t160::W](W) writer structure"]
  7615. impl crate :: Writable for R32_ECDC_KEY_191T160_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_191T160 to value 0"]
  7616. impl crate :: Resettable for R32_ECDC_KEY_191T160_SPEC { # [inline (always)]
  7617. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_159T128 register accessor: an alias for `Reg<R32_ECDC_KEY_159T128_SPEC>`"]
  7618. pub type R32_ECDC_KEY_159T128 = crate :: Reg < r32_ecdc_key_159t128 :: R32_ECDC_KEY_159T128_SPEC > ; # [doc = "User key 128-159 register"]
  7619. pub mod r32_ecdc_key_159t128 { # [doc = "Register `R32_ECDC_KEY_159T128` reader"]
  7620. pub struct R (crate :: R < R32_ECDC_KEY_159T128_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_159T128_SPEC > ; # [inline (always)]
  7621. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_159T128_SPEC >> for R { # [inline (always)]
  7622. fn from (reader : crate :: R < R32_ECDC_KEY_159T128_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_159T128` writer"]
  7623. pub struct W (crate :: W < R32_ECDC_KEY_159T128_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_159T128_SPEC > ; # [inline (always)]
  7624. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7625. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_159T128_SPEC >> for W { # [inline (always)]
  7626. fn from (writer : crate :: W < R32_ECDC_KEY_159T128_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_159T128` reader - User key 128-159 register"]
  7627. pub struct RB_ECDC_KEY_159T128_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_159T128_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_159T128_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_159T128_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7628. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_159T128` writer - User key 128-159 register"]
  7629. pub struct RB_ECDC_KEY_159T128_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_159T128_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7630. # [inline (always)]
  7631. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 128-159 register"]
  7632. # [inline (always)]
  7633. pub fn rb_ecdc_key_159t128 (& self) -> RB_ECDC_KEY_159T128_R { RB_ECDC_KEY_159T128_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 128-159 register"]
  7634. # [inline (always)]
  7635. pub fn rb_ecdc_key_159t128 (& mut self) -> RB_ECDC_KEY_159T128_W { RB_ECDC_KEY_159T128_W { w : self } } # [doc = "Writes raw bits to the register."]
  7636. # [inline (always)]
  7637. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 128-159 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_159t128](index.html) module"]
  7638. pub struct R32_ECDC_KEY_159T128_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_159T128_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_159t128::R](R) reader structure"]
  7639. impl crate :: Readable for R32_ECDC_KEY_159T128_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_159t128::W](W) writer structure"]
  7640. impl crate :: Writable for R32_ECDC_KEY_159T128_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_159T128 to value 0"]
  7641. impl crate :: Resettable for R32_ECDC_KEY_159T128_SPEC { # [inline (always)]
  7642. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_127T96 register accessor: an alias for `Reg<R32_ECDC_KEY_127T96_SPEC>`"]
  7643. pub type R32_ECDC_KEY_127T96 = crate :: Reg < r32_ecdc_key_127t96 :: R32_ECDC_KEY_127T96_SPEC > ; # [doc = "User key 96-127 register"]
  7644. pub mod r32_ecdc_key_127t96 { # [doc = "Register `R32_ECDC_KEY_127T96` reader"]
  7645. pub struct R (crate :: R < R32_ECDC_KEY_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_127T96_SPEC > ; # [inline (always)]
  7646. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_127T96_SPEC >> for R { # [inline (always)]
  7647. fn from (reader : crate :: R < R32_ECDC_KEY_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_127T96` writer"]
  7648. pub struct W (crate :: W < R32_ECDC_KEY_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_127T96_SPEC > ; # [inline (always)]
  7649. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7650. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_127T96_SPEC >> for W { # [inline (always)]
  7651. fn from (writer : crate :: W < R32_ECDC_KEY_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_127T96` reader - User key 96-127 register"]
  7652. pub struct RB_ECDC_KEY_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7653. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_127T96` writer - User key 96-127 register"]
  7654. pub struct RB_ECDC_KEY_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7655. # [inline (always)]
  7656. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 96-127 register"]
  7657. # [inline (always)]
  7658. pub fn rb_ecdc_key_127t96 (& self) -> RB_ECDC_KEY_127T96_R { RB_ECDC_KEY_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 96-127 register"]
  7659. # [inline (always)]
  7660. pub fn rb_ecdc_key_127t96 (& mut self) -> RB_ECDC_KEY_127T96_W { RB_ECDC_KEY_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
  7661. # [inline (always)]
  7662. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_127t96](index.html) module"]
  7663. pub struct R32_ECDC_KEY_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_127t96::R](R) reader structure"]
  7664. impl crate :: Readable for R32_ECDC_KEY_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_127t96::W](W) writer structure"]
  7665. impl crate :: Writable for R32_ECDC_KEY_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_127T96 to value 0"]
  7666. impl crate :: Resettable for R32_ECDC_KEY_127T96_SPEC { # [inline (always)]
  7667. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_95T64 register accessor: an alias for `Reg<R32_ECDC_KEY_95T64_SPEC>`"]
  7668. pub type R32_ECDC_KEY_95T64 = crate :: Reg < r32_ecdc_key_95t64 :: R32_ECDC_KEY_95T64_SPEC > ; # [doc = "User key 64-95 register"]
  7669. pub mod r32_ecdc_key_95t64 { # [doc = "Register `R32_ECDC_KEY_95T64` reader"]
  7670. pub struct R (crate :: R < R32_ECDC_KEY_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_95T64_SPEC > ; # [inline (always)]
  7671. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_95T64_SPEC >> for R { # [inline (always)]
  7672. fn from (reader : crate :: R < R32_ECDC_KEY_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_95T64` writer"]
  7673. pub struct W (crate :: W < R32_ECDC_KEY_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_95T64_SPEC > ; # [inline (always)]
  7674. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7675. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_95T64_SPEC >> for W { # [inline (always)]
  7676. fn from (writer : crate :: W < R32_ECDC_KEY_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_95T64` reader - User key 64-95 register"]
  7677. pub struct RB_ECDC_KEY_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7678. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_95T64` writer - User key 64-95 register"]
  7679. pub struct RB_ECDC_KEY_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7680. # [inline (always)]
  7681. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 64-95 register"]
  7682. # [inline (always)]
  7683. pub fn rb_ecdc_key_95t64 (& self) -> RB_ECDC_KEY_95T64_R { RB_ECDC_KEY_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 64-95 register"]
  7684. # [inline (always)]
  7685. pub fn rb_ecdc_key_95t64 (& mut self) -> RB_ECDC_KEY_95T64_W { RB_ECDC_KEY_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
  7686. # [inline (always)]
  7687. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_95t64](index.html) module"]
  7688. pub struct R32_ECDC_KEY_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_95t64::R](R) reader structure"]
  7689. impl crate :: Readable for R32_ECDC_KEY_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_95t64::W](W) writer structure"]
  7690. impl crate :: Writable for R32_ECDC_KEY_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_95T64 to value 0"]
  7691. impl crate :: Resettable for R32_ECDC_KEY_95T64_SPEC { # [inline (always)]
  7692. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_63T32 register accessor: an alias for `Reg<R32_ECDC_KEY_63T32_SPEC>`"]
  7693. pub type R32_ECDC_KEY_63T32 = crate :: Reg < r32_ecdc_key_63t32 :: R32_ECDC_KEY_63T32_SPEC > ; # [doc = "User key 32-63 register"]
  7694. pub mod r32_ecdc_key_63t32 { # [doc = "Register `R32_ECDC_KEY_63T32` reader"]
  7695. pub struct R (crate :: R < R32_ECDC_KEY_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_63T32_SPEC > ; # [inline (always)]
  7696. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_63T32_SPEC >> for R { # [inline (always)]
  7697. fn from (reader : crate :: R < R32_ECDC_KEY_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_63T32` writer"]
  7698. pub struct W (crate :: W < R32_ECDC_KEY_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_63T32_SPEC > ; # [inline (always)]
  7699. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7700. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_63T32_SPEC >> for W { # [inline (always)]
  7701. fn from (writer : crate :: W < R32_ECDC_KEY_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_63T32` reader - User key 32-63 register"]
  7702. pub struct RB_ECDC_KEY_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7703. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_63T32` writer - User key 32-63 register"]
  7704. pub struct RB_ECDC_KEY_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7705. # [inline (always)]
  7706. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 32-63 register"]
  7707. # [inline (always)]
  7708. pub fn rb_ecdc_key_63t32 (& self) -> RB_ECDC_KEY_63T32_R { RB_ECDC_KEY_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 32-63 register"]
  7709. # [inline (always)]
  7710. pub fn rb_ecdc_key_63t32 (& mut self) -> RB_ECDC_KEY_63T32_W { RB_ECDC_KEY_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
  7711. # [inline (always)]
  7712. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_63t32](index.html) module"]
  7713. pub struct R32_ECDC_KEY_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_63t32::R](R) reader structure"]
  7714. impl crate :: Readable for R32_ECDC_KEY_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_63t32::W](W) writer structure"]
  7715. impl crate :: Writable for R32_ECDC_KEY_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_63T32 to value 0"]
  7716. impl crate :: Resettable for R32_ECDC_KEY_63T32_SPEC { # [inline (always)]
  7717. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_31T0 register accessor: an alias for `Reg<R32_ECDC_KEY_31T0_SPEC>`"]
  7718. pub type R32_ECDC_KEY_31T0 = crate :: Reg < r32_ecdc_key_31t0 :: R32_ECDC_KEY_31T0_SPEC > ; # [doc = "User key 0-31 register"]
  7719. pub mod r32_ecdc_key_31t0 { # [doc = "Register `R32_ECDC_KEY_31T0` reader"]
  7720. pub struct R (crate :: R < R32_ECDC_KEY_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_31T0_SPEC > ; # [inline (always)]
  7721. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_31T0_SPEC >> for R { # [inline (always)]
  7722. fn from (reader : crate :: R < R32_ECDC_KEY_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_31T0` writer"]
  7723. pub struct W (crate :: W < R32_ECDC_KEY_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_31T0_SPEC > ; # [inline (always)]
  7724. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7725. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_31T0_SPEC >> for W { # [inline (always)]
  7726. fn from (writer : crate :: W < R32_ECDC_KEY_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_31T0` reader - User key 0-31 register"]
  7727. pub struct RB_ECDC_KEY_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7728. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_31T0` writer - User key 0-31 register"]
  7729. pub struct RB_ECDC_KEY_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7730. # [inline (always)]
  7731. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 0-31 register"]
  7732. # [inline (always)]
  7733. pub fn rb_ecdc_key_31t0 (& self) -> RB_ECDC_KEY_31T0_R { RB_ECDC_KEY_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 0-31 register"]
  7734. # [inline (always)]
  7735. pub fn rb_ecdc_key_31t0 (& mut self) -> RB_ECDC_KEY_31T0_W { RB_ECDC_KEY_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
  7736. # [inline (always)]
  7737. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_31t0](index.html) module"]
  7738. pub struct R32_ECDC_KEY_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_31t0::R](R) reader structure"]
  7739. impl crate :: Readable for R32_ECDC_KEY_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_31t0::W](W) writer structure"]
  7740. impl crate :: Writable for R32_ECDC_KEY_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_31T0 to value 0"]
  7741. impl crate :: Resettable for R32_ECDC_KEY_31T0_SPEC { # [inline (always)]
  7742. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_127T96 register accessor: an alias for `Reg<R32_ECDC_IV_127T96_SPEC>`"]
  7743. pub type R32_ECDC_IV_127T96 = crate :: Reg < r32_ecdc_iv_127t96 :: R32_ECDC_IV_127T96_SPEC > ; # [doc = "CTR mode count 96-127 register"]
  7744. pub mod r32_ecdc_iv_127t96 { # [doc = "Register `R32_ECDC_IV_127T96` reader"]
  7745. pub struct R (crate :: R < R32_ECDC_IV_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_127T96_SPEC > ; # [inline (always)]
  7746. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_127T96_SPEC >> for R { # [inline (always)]
  7747. fn from (reader : crate :: R < R32_ECDC_IV_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_127T96` writer"]
  7748. pub struct W (crate :: W < R32_ECDC_IV_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_127T96_SPEC > ; # [inline (always)]
  7749. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7750. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_127T96_SPEC >> for W { # [inline (always)]
  7751. fn from (writer : crate :: W < R32_ECDC_IV_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_127T96` reader - CTR mode count 96-127 register"]
  7752. pub struct RB_ECDC_IV_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7753. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_127T96` writer - CTR mode count 96-127 register"]
  7754. pub struct RB_ECDC_IV_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7755. # [inline (always)]
  7756. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 96-127 register"]
  7757. # [inline (always)]
  7758. pub fn rb_ecdc_iv_127t96 (& self) -> RB_ECDC_IV_127T96_R { RB_ECDC_IV_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 96-127 register"]
  7759. # [inline (always)]
  7760. pub fn rb_ecdc_iv_127t96 (& mut self) -> RB_ECDC_IV_127T96_W { RB_ECDC_IV_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
  7761. # [inline (always)]
  7762. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_127t96](index.html) module"]
  7763. pub struct R32_ECDC_IV_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_127t96::R](R) reader structure"]
  7764. impl crate :: Readable for R32_ECDC_IV_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_127t96::W](W) writer structure"]
  7765. impl crate :: Writable for R32_ECDC_IV_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_127T96 to value 0"]
  7766. impl crate :: Resettable for R32_ECDC_IV_127T96_SPEC { # [inline (always)]
  7767. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_95T64 register accessor: an alias for `Reg<R32_ECDC_IV_95T64_SPEC>`"]
  7768. pub type R32_ECDC_IV_95T64 = crate :: Reg < r32_ecdc_iv_95t64 :: R32_ECDC_IV_95T64_SPEC > ; # [doc = "CTR mode count 64-95 register"]
  7769. pub mod r32_ecdc_iv_95t64 { # [doc = "Register `R32_ECDC_IV_95T64` reader"]
  7770. pub struct R (crate :: R < R32_ECDC_IV_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_95T64_SPEC > ; # [inline (always)]
  7771. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_95T64_SPEC >> for R { # [inline (always)]
  7772. fn from (reader : crate :: R < R32_ECDC_IV_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_95T64` writer"]
  7773. pub struct W (crate :: W < R32_ECDC_IV_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_95T64_SPEC > ; # [inline (always)]
  7774. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7775. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_95T64_SPEC >> for W { # [inline (always)]
  7776. fn from (writer : crate :: W < R32_ECDC_IV_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_95T64` reader - CTR mode count 64-95 register"]
  7777. pub struct RB_ECDC_IV_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7778. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_95T64` writer - CTR mode count 64-95 register"]
  7779. pub struct RB_ECDC_IV_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7780. # [inline (always)]
  7781. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 64-95 register"]
  7782. # [inline (always)]
  7783. pub fn rb_ecdc_iv_95t64 (& self) -> RB_ECDC_IV_95T64_R { RB_ECDC_IV_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 64-95 register"]
  7784. # [inline (always)]
  7785. pub fn rb_ecdc_iv_95t64 (& mut self) -> RB_ECDC_IV_95T64_W { RB_ECDC_IV_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
  7786. # [inline (always)]
  7787. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_95t64](index.html) module"]
  7788. pub struct R32_ECDC_IV_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_95t64::R](R) reader structure"]
  7789. impl crate :: Readable for R32_ECDC_IV_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_95t64::W](W) writer structure"]
  7790. impl crate :: Writable for R32_ECDC_IV_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_95T64 to value 0"]
  7791. impl crate :: Resettable for R32_ECDC_IV_95T64_SPEC { # [inline (always)]
  7792. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_63T32 register accessor: an alias for `Reg<R32_ECDC_IV_63T32_SPEC>`"]
  7793. pub type R32_ECDC_IV_63T32 = crate :: Reg < r32_ecdc_iv_63t32 :: R32_ECDC_IV_63T32_SPEC > ; # [doc = "CTR mode count 32-63 register"]
  7794. pub mod r32_ecdc_iv_63t32 { # [doc = "Register `R32_ECDC_IV_63T32` reader"]
  7795. pub struct R (crate :: R < R32_ECDC_IV_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_63T32_SPEC > ; # [inline (always)]
  7796. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_63T32_SPEC >> for R { # [inline (always)]
  7797. fn from (reader : crate :: R < R32_ECDC_IV_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_63T32` writer"]
  7798. pub struct W (crate :: W < R32_ECDC_IV_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_63T32_SPEC > ; # [inline (always)]
  7799. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7800. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_63T32_SPEC >> for W { # [inline (always)]
  7801. fn from (writer : crate :: W < R32_ECDC_IV_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_63T32` reader - CTR mode count 32-63 register"]
  7802. pub struct RB_ECDC_IV_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7803. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_63T32` writer - CTR mode count 32-63 register"]
  7804. pub struct RB_ECDC_IV_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7805. # [inline (always)]
  7806. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 32-63 register"]
  7807. # [inline (always)]
  7808. pub fn rb_ecdc_iv_63t32 (& self) -> RB_ECDC_IV_63T32_R { RB_ECDC_IV_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 32-63 register"]
  7809. # [inline (always)]
  7810. pub fn rb_ecdc_iv_63t32 (& mut self) -> RB_ECDC_IV_63T32_W { RB_ECDC_IV_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
  7811. # [inline (always)]
  7812. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_63t32](index.html) module"]
  7813. pub struct R32_ECDC_IV_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_63t32::R](R) reader structure"]
  7814. impl crate :: Readable for R32_ECDC_IV_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_63t32::W](W) writer structure"]
  7815. impl crate :: Writable for R32_ECDC_IV_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_63T32 to value 0"]
  7816. impl crate :: Resettable for R32_ECDC_IV_63T32_SPEC { # [inline (always)]
  7817. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_31T0 register accessor: an alias for `Reg<R32_ECDC_IV_31T0_SPEC>`"]
  7818. pub type R32_ECDC_IV_31T0 = crate :: Reg < r32_ecdc_iv_31t0 :: R32_ECDC_IV_31T0_SPEC > ; # [doc = "CTR mode count 0-31 register"]
  7819. pub mod r32_ecdc_iv_31t0 { # [doc = "Register `R32_ECDC_IV_31T0` reader"]
  7820. pub struct R (crate :: R < R32_ECDC_IV_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_31T0_SPEC > ; # [inline (always)]
  7821. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_31T0_SPEC >> for R { # [inline (always)]
  7822. fn from (reader : crate :: R < R32_ECDC_IV_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_31T0` writer"]
  7823. pub struct W (crate :: W < R32_ECDC_IV_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_31T0_SPEC > ; # [inline (always)]
  7824. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7825. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_31T0_SPEC >> for W { # [inline (always)]
  7826. fn from (writer : crate :: W < R32_ECDC_IV_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_31T0` reader - CTR mode count 0-31 register"]
  7827. pub struct RB_ECDC_IV_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7828. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_31T0` writer - CTR mode count 0-31 register"]
  7829. pub struct RB_ECDC_IV_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7830. # [inline (always)]
  7831. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 0-31 register"]
  7832. # [inline (always)]
  7833. pub fn rb_ecdc_iv_31t0 (& self) -> RB_ECDC_IV_31T0_R { RB_ECDC_IV_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 0-31 register"]
  7834. # [inline (always)]
  7835. pub fn rb_ecdc_iv_31t0 (& mut self) -> RB_ECDC_IV_31T0_W { RB_ECDC_IV_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
  7836. # [inline (always)]
  7837. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_31t0](index.html) module"]
  7838. pub struct R32_ECDC_IV_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_31t0::R](R) reader structure"]
  7839. impl crate :: Readable for R32_ECDC_IV_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_31t0::W](W) writer structure"]
  7840. impl crate :: Writable for R32_ECDC_IV_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_31T0 to value 0"]
  7841. impl crate :: Resettable for R32_ECDC_IV_31T0_SPEC { # [inline (always)]
  7842. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_127T96 register accessor: an alias for `Reg<R32_ECDC_SGSD_127T96_SPEC>`"]
  7843. pub type R32_ECDC_SGSD_127T96 = crate :: Reg < r32_ecdc_sgsd_127t96 :: R32_ECDC_SGSD_127T96_SPEC > ; # [doc = "Single encryption and decryption of original data 96-127 register"]
  7844. pub mod r32_ecdc_sgsd_127t96 { # [doc = "Register `R32_ECDC_SGSD_127T96` reader"]
  7845. pub struct R (crate :: R < R32_ECDC_SGSD_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_127T96_SPEC > ; # [inline (always)]
  7846. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_127T96_SPEC >> for R { # [inline (always)]
  7847. fn from (reader : crate :: R < R32_ECDC_SGSD_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_127T96` writer"]
  7848. pub struct W (crate :: W < R32_ECDC_SGSD_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_127T96_SPEC > ; # [inline (always)]
  7849. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7850. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_127T96_SPEC >> for W { # [inline (always)]
  7851. fn from (writer : crate :: W < R32_ECDC_SGSD_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_127T96` reader - Single encryption and decryption of original data 96-127 register"]
  7852. pub struct RB_ECDC_SGSD_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7853. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_127T96` writer - Single encryption and decryption of original data 96-127 register"]
  7854. pub struct RB_ECDC_SGSD_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7855. # [inline (always)]
  7856. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 96-127 register"]
  7857. # [inline (always)]
  7858. pub fn rb_ecdc_sgsd_127t96 (& self) -> RB_ECDC_SGSD_127T96_R { RB_ECDC_SGSD_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 96-127 register"]
  7859. # [inline (always)]
  7860. pub fn rb_ecdc_sgsd_127t96 (& mut self) -> RB_ECDC_SGSD_127T96_W { RB_ECDC_SGSD_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
  7861. # [inline (always)]
  7862. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_127t96](index.html) module"]
  7863. pub struct R32_ECDC_SGSD_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_127t96::R](R) reader structure"]
  7864. impl crate :: Readable for R32_ECDC_SGSD_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_127t96::W](W) writer structure"]
  7865. impl crate :: Writable for R32_ECDC_SGSD_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_127T96 to value 0"]
  7866. impl crate :: Resettable for R32_ECDC_SGSD_127T96_SPEC { # [inline (always)]
  7867. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_95T64 register accessor: an alias for `Reg<R32_ECDC_SGSD_95T64_SPEC>`"]
  7868. pub type R32_ECDC_SGSD_95T64 = crate :: Reg < r32_ecdc_sgsd_95t64 :: R32_ECDC_SGSD_95T64_SPEC > ; # [doc = "Single encryption and decryption of original data 64-95 register"]
  7869. pub mod r32_ecdc_sgsd_95t64 { # [doc = "Register `R32_ECDC_SGSD_95T64` reader"]
  7870. pub struct R (crate :: R < R32_ECDC_SGSD_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_95T64_SPEC > ; # [inline (always)]
  7871. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_95T64_SPEC >> for R { # [inline (always)]
  7872. fn from (reader : crate :: R < R32_ECDC_SGSD_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_95T64` writer"]
  7873. pub struct W (crate :: W < R32_ECDC_SGSD_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_95T64_SPEC > ; # [inline (always)]
  7874. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7875. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_95T64_SPEC >> for W { # [inline (always)]
  7876. fn from (writer : crate :: W < R32_ECDC_SGSD_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_95T64` reader - Single encryption and decryption of original data 64-95 register"]
  7877. pub struct RB_ECDC_SGSD_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7878. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_95T64` writer - Single encryption and decryption of original data 64-95 register"]
  7879. pub struct RB_ECDC_SGSD_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7880. # [inline (always)]
  7881. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 64-95 register"]
  7882. # [inline (always)]
  7883. pub fn rb_ecdc_sgsd_95t64 (& self) -> RB_ECDC_SGSD_95T64_R { RB_ECDC_SGSD_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 64-95 register"]
  7884. # [inline (always)]
  7885. pub fn rb_ecdc_sgsd_95t64 (& mut self) -> RB_ECDC_SGSD_95T64_W { RB_ECDC_SGSD_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
  7886. # [inline (always)]
  7887. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_95t64](index.html) module"]
  7888. pub struct R32_ECDC_SGSD_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_95t64::R](R) reader structure"]
  7889. impl crate :: Readable for R32_ECDC_SGSD_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_95t64::W](W) writer structure"]
  7890. impl crate :: Writable for R32_ECDC_SGSD_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_95T64 to value 0"]
  7891. impl crate :: Resettable for R32_ECDC_SGSD_95T64_SPEC { # [inline (always)]
  7892. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_63T32 register accessor: an alias for `Reg<R32_ECDC_SGSD_63T32_SPEC>`"]
  7893. pub type R32_ECDC_SGSD_63T32 = crate :: Reg < r32_ecdc_sgsd_63t32 :: R32_ECDC_SGSD_63T32_SPEC > ; # [doc = "Single encryption and decryption of original data 32-63 register"]
  7894. pub mod r32_ecdc_sgsd_63t32 { # [doc = "Register `R32_ECDC_SGSD_63T32` reader"]
  7895. pub struct R (crate :: R < R32_ECDC_SGSD_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_63T32_SPEC > ; # [inline (always)]
  7896. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_63T32_SPEC >> for R { # [inline (always)]
  7897. fn from (reader : crate :: R < R32_ECDC_SGSD_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_63T32` writer"]
  7898. pub struct W (crate :: W < R32_ECDC_SGSD_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_63T32_SPEC > ; # [inline (always)]
  7899. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7900. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_63T32_SPEC >> for W { # [inline (always)]
  7901. fn from (writer : crate :: W < R32_ECDC_SGSD_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_63T32` reader - Single encryption and decryption of original data 32-63 register"]
  7902. pub struct RB_ECDC_SGSD_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7903. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_63T32` writer - Single encryption and decryption of original data 32-63 register"]
  7904. pub struct RB_ECDC_SGSD_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7905. # [inline (always)]
  7906. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 32-63 register"]
  7907. # [inline (always)]
  7908. pub fn rb_ecdc_sgsd_63t32 (& self) -> RB_ECDC_SGSD_63T32_R { RB_ECDC_SGSD_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 32-63 register"]
  7909. # [inline (always)]
  7910. pub fn rb_ecdc_sgsd_63t32 (& mut self) -> RB_ECDC_SGSD_63T32_W { RB_ECDC_SGSD_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
  7911. # [inline (always)]
  7912. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_63t32](index.html) module"]
  7913. pub struct R32_ECDC_SGSD_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_63t32::R](R) reader structure"]
  7914. impl crate :: Readable for R32_ECDC_SGSD_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_63t32::W](W) writer structure"]
  7915. impl crate :: Writable for R32_ECDC_SGSD_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_63T32 to value 0"]
  7916. impl crate :: Resettable for R32_ECDC_SGSD_63T32_SPEC { # [inline (always)]
  7917. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_31T0 register accessor: an alias for `Reg<R32_ECDC_SGSD_31T0_SPEC>`"]
  7918. pub type R32_ECDC_SGSD_31T0 = crate :: Reg < r32_ecdc_sgsd_31t0 :: R32_ECDC_SGSD_31T0_SPEC > ; # [doc = "Single encryption and decryption of original data 0-31 register"]
  7919. pub mod r32_ecdc_sgsd_31t0 { # [doc = "Register `R32_ECDC_SGSD_31T0` reader"]
  7920. pub struct R (crate :: R < R32_ECDC_SGSD_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_31T0_SPEC > ; # [inline (always)]
  7921. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_31T0_SPEC >> for R { # [inline (always)]
  7922. fn from (reader : crate :: R < R32_ECDC_SGSD_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_31T0` writer"]
  7923. pub struct W (crate :: W < R32_ECDC_SGSD_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_31T0_SPEC > ; # [inline (always)]
  7924. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7925. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_31T0_SPEC >> for W { # [inline (always)]
  7926. fn from (writer : crate :: W < R32_ECDC_SGSD_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_31T0` reader - Single encryption and decryption of original data 0-31 register"]
  7927. pub struct RB_ECDC_SGSD_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7928. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_31T0` writer - Single encryption and decryption of original data 0-31 register"]
  7929. pub struct RB_ECDC_SGSD_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7930. # [inline (always)]
  7931. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 0-31 register"]
  7932. # [inline (always)]
  7933. pub fn rb_ecdc_sgsd_31t0 (& self) -> RB_ECDC_SGSD_31T0_R { RB_ECDC_SGSD_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 0-31 register"]
  7934. # [inline (always)]
  7935. pub fn rb_ecdc_sgsd_31t0 (& mut self) -> RB_ECDC_SGSD_31T0_W { RB_ECDC_SGSD_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
  7936. # [inline (always)]
  7937. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_31t0](index.html) module"]
  7938. pub struct R32_ECDC_SGSD_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_31t0::R](R) reader structure"]
  7939. impl crate :: Readable for R32_ECDC_SGSD_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_31t0::W](W) writer structure"]
  7940. impl crate :: Writable for R32_ECDC_SGSD_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_31T0 to value 0"]
  7941. impl crate :: Resettable for R32_ECDC_SGSD_31T0_SPEC { # [inline (always)]
  7942. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_127T96 register accessor: an alias for `Reg<R32_ECDC_SGRT_127T96_SPEC>`"]
  7943. pub type R32_ECDC_SGRT_127T96 = crate :: Reg < r32_ecdc_sgrt_127t96 :: R32_ECDC_SGRT_127T96_SPEC > ; # [doc = "Single encryption and decryption result 96-127 register"]
  7944. pub mod r32_ecdc_sgrt_127t96 { # [doc = "Register `R32_ECDC_SGRT_127T96` reader"]
  7945. pub struct R (crate :: R < R32_ECDC_SGRT_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_127T96_SPEC > ; # [inline (always)]
  7946. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_127T96_SPEC >> for R { # [inline (always)]
  7947. fn from (reader : crate :: R < R32_ECDC_SGRT_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_127T96` writer"]
  7948. pub struct W (crate :: W < R32_ECDC_SGRT_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_127T96_SPEC > ; # [inline (always)]
  7949. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7950. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_127T96_SPEC >> for W { # [inline (always)]
  7951. fn from (writer : crate :: W < R32_ECDC_SGRT_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_127T96` reader - Single encryption and decryption result 96-127 register"]
  7952. pub struct RB_ECDC_SGRT_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7953. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_127T96` writer - Single encryption and decryption result 96-127 register"]
  7954. pub struct RB_ECDC_SGRT_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7955. # [inline (always)]
  7956. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 96-127 register"]
  7957. # [inline (always)]
  7958. pub fn rb_ecdc_sgrt_127t96 (& self) -> RB_ECDC_SGRT_127T96_R { RB_ECDC_SGRT_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 96-127 register"]
  7959. # [inline (always)]
  7960. pub fn rb_ecdc_sgrt_127t96 (& mut self) -> RB_ECDC_SGRT_127T96_W { RB_ECDC_SGRT_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
  7961. # [inline (always)]
  7962. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_127t96](index.html) module"]
  7963. pub struct R32_ECDC_SGRT_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_127t96::R](R) reader structure"]
  7964. impl crate :: Readable for R32_ECDC_SGRT_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_127t96::W](W) writer structure"]
  7965. impl crate :: Writable for R32_ECDC_SGRT_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_127T96 to value 0"]
  7966. impl crate :: Resettable for R32_ECDC_SGRT_127T96_SPEC { # [inline (always)]
  7967. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_95T64 register accessor: an alias for `Reg<R32_ECDC_SGRT_95T64_SPEC>`"]
  7968. pub type R32_ECDC_SGRT_95T64 = crate :: Reg < r32_ecdc_sgrt_95t64 :: R32_ECDC_SGRT_95T64_SPEC > ; # [doc = "Single encryption and decryption result 64-95 register"]
  7969. pub mod r32_ecdc_sgrt_95t64 { # [doc = "Register `R32_ECDC_SGRT_95T64` reader"]
  7970. pub struct R (crate :: R < R32_ECDC_SGRT_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_95T64_SPEC > ; # [inline (always)]
  7971. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_95T64_SPEC >> for R { # [inline (always)]
  7972. fn from (reader : crate :: R < R32_ECDC_SGRT_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_95T64` writer"]
  7973. pub struct W (crate :: W < R32_ECDC_SGRT_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_95T64_SPEC > ; # [inline (always)]
  7974. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  7975. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_95T64_SPEC >> for W { # [inline (always)]
  7976. fn from (writer : crate :: W < R32_ECDC_SGRT_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_95T64` reader - Single encryption and decryption result 64-95 register"]
  7977. pub struct RB_ECDC_SGRT_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  7978. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_95T64` writer - Single encryption and decryption result 64-95 register"]
  7979. pub struct RB_ECDC_SGRT_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
  7980. # [inline (always)]
  7981. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 64-95 register"]
  7982. # [inline (always)]
  7983. pub fn rb_ecdc_sgrt_95t64 (& self) -> RB_ECDC_SGRT_95T64_R { RB_ECDC_SGRT_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 64-95 register"]
  7984. # [inline (always)]
  7985. pub fn rb_ecdc_sgrt_95t64 (& mut self) -> RB_ECDC_SGRT_95T64_W { RB_ECDC_SGRT_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
  7986. # [inline (always)]
  7987. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_95t64](index.html) module"]
  7988. pub struct R32_ECDC_SGRT_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_95t64::R](R) reader structure"]
  7989. impl crate :: Readable for R32_ECDC_SGRT_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_95t64::W](W) writer structure"]
  7990. impl crate :: Writable for R32_ECDC_SGRT_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_95T64 to value 0"]
  7991. impl crate :: Resettable for R32_ECDC_SGRT_95T64_SPEC { # [inline (always)]
  7992. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_63T32 register accessor: an alias for `Reg<R32_ECDC_SGRT_63T32_SPEC>`"]
  7993. pub type R32_ECDC_SGRT_63T32 = crate :: Reg < r32_ecdc_sgrt_63t32 :: R32_ECDC_SGRT_63T32_SPEC > ; # [doc = "Single encryption and decryption result 0-31 register"]
  7994. pub mod r32_ecdc_sgrt_63t32 { # [doc = "Register `R32_ECDC_SGRT_63T32` reader"]
  7995. pub struct R (crate :: R < R32_ECDC_SGRT_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_63T32_SPEC > ; # [inline (always)]
  7996. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_63T32_SPEC >> for R { # [inline (always)]
  7997. fn from (reader : crate :: R < R32_ECDC_SGRT_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_63T32` writer"]
  7998. pub struct W (crate :: W < R32_ECDC_SGRT_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_63T32_SPEC > ; # [inline (always)]
  7999. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8000. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_63T32_SPEC >> for W { # [inline (always)]
  8001. fn from (writer : crate :: W < R32_ECDC_SGRT_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_63T32` reader - Single encryption and decryption result 0-31 register"]
  8002. pub struct RB_ECDC_SGRT_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  8003. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_63T32` writer - Single encryption and decryption result 0-31 register"]
  8004. pub struct RB_ECDC_SGRT_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8005. # [inline (always)]
  8006. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
  8007. # [inline (always)]
  8008. pub fn rb_ecdc_sgrt_63t32 (& self) -> RB_ECDC_SGRT_63T32_R { RB_ECDC_SGRT_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
  8009. # [inline (always)]
  8010. pub fn rb_ecdc_sgrt_63t32 (& mut self) -> RB_ECDC_SGRT_63T32_W { RB_ECDC_SGRT_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
  8011. # [inline (always)]
  8012. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_63t32](index.html) module"]
  8013. pub struct R32_ECDC_SGRT_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_63t32::R](R) reader structure"]
  8014. impl crate :: Readable for R32_ECDC_SGRT_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_63t32::W](W) writer structure"]
  8015. impl crate :: Writable for R32_ECDC_SGRT_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_63T32 to value 0"]
  8016. impl crate :: Resettable for R32_ECDC_SGRT_63T32_SPEC { # [inline (always)]
  8017. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "RB_ECDC_SGRT_31T0 register accessor: an alias for `Reg<RB_ECDC_SGRT_31T0_SPEC>`"]
  8018. pub type RB_ECDC_SGRT_31T0 = crate :: Reg < rb_ecdc_sgrt_31t0 :: RB_ECDC_SGRT_31T0_SPEC > ; # [doc = "Single encryption and decryption result 0-31 register"]
  8019. pub mod rb_ecdc_sgrt_31t0 { # [doc = "Register `RB_ECDC_SGRT_31T0` reader"]
  8020. pub struct R (crate :: R < RB_ECDC_SGRT_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < RB_ECDC_SGRT_31T0_SPEC > ; # [inline (always)]
  8021. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RB_ECDC_SGRT_31T0_SPEC >> for R { # [inline (always)]
  8022. fn from (reader : crate :: R < RB_ECDC_SGRT_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `RB_ECDC_SGRT_31T0` writer"]
  8023. pub struct W (crate :: W < RB_ECDC_SGRT_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < RB_ECDC_SGRT_31T0_SPEC > ; # [inline (always)]
  8024. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8025. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < RB_ECDC_SGRT_31T0_SPEC >> for W { # [inline (always)]
  8026. fn from (writer : crate :: W < RB_ECDC_SGRT_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_31T0` reader - Single encryption and decryption result 0-31 register"]
  8027. pub struct RB_ECDC_SGRT_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  8028. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_31T0` writer - Single encryption and decryption result 0-31 register"]
  8029. pub struct RB_ECDC_SGRT_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8030. # [inline (always)]
  8031. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
  8032. # [inline (always)]
  8033. pub fn rb_ecdc_sgrt_31t0 (& self) -> RB_ECDC_SGRT_31T0_R { RB_ECDC_SGRT_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
  8034. # [inline (always)]
  8035. pub fn rb_ecdc_sgrt_31t0 (& mut self) -> RB_ECDC_SGRT_31T0_W { RB_ECDC_SGRT_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
  8036. # [inline (always)]
  8037. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rb_ecdc_sgrt_31t0](index.html) module"]
  8038. pub struct RB_ECDC_SGRT_31T0_SPEC ; impl crate :: RegisterSpec for RB_ECDC_SGRT_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [rb_ecdc_sgrt_31t0::R](R) reader structure"]
  8039. impl crate :: Readable for RB_ECDC_SGRT_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [rb_ecdc_sgrt_31t0::W](W) writer structure"]
  8040. impl crate :: Writable for RB_ECDC_SGRT_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets RB_ECDC_SGRT_31T0 to value 0"]
  8041. impl crate :: Resettable for RB_ECDC_SGRT_31T0_SPEC { # [inline (always)]
  8042. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SRAM_ADDR register accessor: an alias for `Reg<R32_ECDC_SRAM_ADDR_SPEC>`"]
  8043. pub type R32_ECDC_SRAM_ADDR = crate :: Reg < r32_ecdc_sram_addr :: R32_ECDC_SRAM_ADDR_SPEC > ; # [doc = "encryption and decryption sram start address register"]
  8044. pub mod r32_ecdc_sram_addr { # [doc = "Register `R32_ECDC_SRAM_ADDR` reader"]
  8045. pub struct R (crate :: R < R32_ECDC_SRAM_ADDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SRAM_ADDR_SPEC > ; # [inline (always)]
  8046. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SRAM_ADDR_SPEC >> for R { # [inline (always)]
  8047. fn from (reader : crate :: R < R32_ECDC_SRAM_ADDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SRAM_ADDR` writer"]
  8048. pub struct W (crate :: W < R32_ECDC_SRAM_ADDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SRAM_ADDR_SPEC > ; # [inline (always)]
  8049. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8050. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SRAM_ADDR_SPEC >> for W { # [inline (always)]
  8051. fn from (writer : crate :: W < R32_ECDC_SRAM_ADDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SRAM_ADDR` reader - encryption and decryption sram start address register"]
  8052. pub struct RB_ECDC_SRAM_ADDR_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SRAM_ADDR_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SRAM_ADDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SRAM_ADDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  8053. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SRAM_ADDR` writer - encryption and decryption sram start address register"]
  8054. pub struct RB_ECDC_SRAM_ADDR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SRAM_ADDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8055. # [inline (always)]
  8056. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - encryption and decryption sram start address register"]
  8057. # [inline (always)]
  8058. pub fn rb_ecdc_sram_addr (& self) -> RB_ECDC_SRAM_ADDR_R { RB_ECDC_SRAM_ADDR_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - encryption and decryption sram start address register"]
  8059. # [inline (always)]
  8060. pub fn rb_ecdc_sram_addr (& mut self) -> RB_ECDC_SRAM_ADDR_W { RB_ECDC_SRAM_ADDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  8061. # [inline (always)]
  8062. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "encryption and decryption sram start address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sram_addr](index.html) module"]
  8063. pub struct R32_ECDC_SRAM_ADDR_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SRAM_ADDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sram_addr::R](R) reader structure"]
  8064. impl crate :: Readable for R32_ECDC_SRAM_ADDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sram_addr::W](W) writer structure"]
  8065. impl crate :: Writable for R32_ECDC_SRAM_ADDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SRAM_ADDR to value 0"]
  8066. impl crate :: Resettable for R32_ECDC_SRAM_ADDR_SPEC { # [inline (always)]
  8067. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SRAM_LEN register accessor: an alias for `Reg<R32_ECDC_SRAM_LEN_SPEC>`"]
  8068. pub type R32_ECDC_SRAM_LEN = crate :: Reg < r32_ecdc_sram_len :: R32_ECDC_SRAM_LEN_SPEC > ; # [doc = "encryption and decryption sram size register"]
  8069. pub mod r32_ecdc_sram_len { # [doc = "Register `R32_ECDC_SRAM_LEN` reader"]
  8070. pub struct R (crate :: R < R32_ECDC_SRAM_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SRAM_LEN_SPEC > ; # [inline (always)]
  8071. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SRAM_LEN_SPEC >> for R { # [inline (always)]
  8072. fn from (reader : crate :: R < R32_ECDC_SRAM_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SRAM_LEN` writer"]
  8073. pub struct W (crate :: W < R32_ECDC_SRAM_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SRAM_LEN_SPEC > ; # [inline (always)]
  8074. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8075. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SRAM_LEN_SPEC >> for W { # [inline (always)]
  8076. fn from (writer : crate :: W < R32_ECDC_SRAM_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SRAM_LEN` reader - encryption and decryption sram size register"]
  8077. pub struct RB_ECDC_SRAM_LEN_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SRAM_LEN_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SRAM_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SRAM_LEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  8078. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SRAM_LEN` writer - encryption and decryption sram size register"]
  8079. pub struct RB_ECDC_SRAM_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SRAM_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8080. # [inline (always)]
  8081. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - encryption and decryption sram size register"]
  8082. # [inline (always)]
  8083. pub fn rb_ecdc_sram_len (& self) -> RB_ECDC_SRAM_LEN_R { RB_ECDC_SRAM_LEN_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - encryption and decryption sram size register"]
  8084. # [inline (always)]
  8085. pub fn rb_ecdc_sram_len (& mut self) -> RB_ECDC_SRAM_LEN_W { RB_ECDC_SRAM_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  8086. # [inline (always)]
  8087. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "encryption and decryption sram size register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sram_len](index.html) module"]
  8088. pub struct R32_ECDC_SRAM_LEN_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SRAM_LEN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sram_len::R](R) reader structure"]
  8089. impl crate :: Readable for R32_ECDC_SRAM_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sram_len::W](W) writer structure"]
  8090. impl crate :: Writable for R32_ECDC_SRAM_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SRAM_LEN to value 0"]
  8091. impl crate :: Resettable for R32_ECDC_SRAM_LEN_SPEC { # [inline (always)]
  8092. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "USBHS register"]
  8093. pub struct USBHS { _marker : PhantomData < * const () > } unsafe impl Send for USBHS { } impl USBHS { # [doc = r"Pointer to the register block"]
  8094. pub const PTR : * const usbhs :: RegisterBlock = 0x4000_9000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  8095. # [inline (always)]
  8096. pub const fn ptr () -> * const usbhs :: RegisterBlock { Self :: PTR } } impl Deref for USBHS { type Target = usbhs :: RegisterBlock ; # [inline (always)]
  8097. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for USBHS { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("USBHS") . finish () } } # [doc = "USBHS register"]
  8098. pub mod usbhs { # [doc = r"Register block"]
  8099. # [repr (C)]
  8100. pub struct RegisterBlock { # [doc = "0x00 - USB base control"]
  8101. pub r8_usb_ctrl : crate :: Reg < r8_usb_ctrl :: R8_USB_CTRL_SPEC > , # [doc = "0x01 - USB host control register"]
  8102. pub r8_uhost_ctrl : crate :: Reg < r8_uhost_ctrl :: R8_UHOST_CTRL_SPEC > , # [doc = "0x02 - USB interrupt enable"]
  8103. pub r8_usb_int_en : crate :: Reg < r8_usb_int_en :: R8_USB_INT_EN_SPEC > , # [doc = "0x03 - USB device address"]
  8104. pub r8_usb_dev_ad : crate :: Reg < r8_usb_dev_ad :: R8_USB_DEV_AD_SPEC > , # [doc = "0x04 - USB frame number register"]
  8105. pub r16_usb_frame_no : crate :: Reg < r16_usb_frame_no :: R16_USB_FRAME_NO_SPEC > , # [doc = "0x06 - USB suspend register"]
  8106. pub r8_usb_suspend : crate :: Reg < r8_usb_suspend :: R8_USB_SUSPEND_SPEC > , _reserved6 : [u8 ; 0x01]
  8107. , # [doc = "0x08 - USB actual speed register"]
  8108. pub r8_usb_spd_type : crate :: Reg < r8_usb_spd_type :: R8_USB_SPD_TYPE_SPEC > , # [doc = "0x09 - USB miscellaneous status"]
  8109. pub r8_usb_mis_st : crate :: Reg < r8_usb_mis_st :: R8_USB_MIS_ST_SPEC > , # [doc = "0x0a - USB interrupt flag"]
  8110. pub r8_usb_int_fg : crate :: Reg < r8_usb_int_fg :: R8_USB_INT_FG_SPEC > , # [doc = "0x0b - USB interrupt status"]
  8111. pub r8_usb_int_st : crate :: Reg < r8_usb_int_st :: R8_USB_INT_ST_SPEC > , # [doc = "0x0c - USB receiving length"]
  8112. pub r6_usb_rx_len : crate :: Reg < r6_usb_rx_len :: R6_USB_RX_LEN_SPEC > , _reserved11 : [u8 ; 0x02]
  8113. , # [doc = "0x10 - endpoint 1(9) 4(8,12) mode"]
  8114. pub r8_uep4_1_mod : crate :: Reg < r8_uep4_1_mod :: R8_UEP4_1_MOD_SPEC > , # [doc = "0x11 - endpoint 2(10) 3(11) mode and USB host endpoint mode control register"]
  8115. pub r8_uep2_3_mod_r8_uh_ep_mod : crate :: Reg < r8_uep2_3_mod_r8_uh_ep_mod :: R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > , # [doc = "0x12 - endpoint 5(13) 6(14) mode"]
  8116. pub r8_uep5_6_mod : crate :: Reg < r8_uep5_6_mod :: R8_UEP5_6_MOD_SPEC > , # [doc = "0x13 - endpoint 7(15) mode"]
  8117. pub r8_uep7_mod : crate :: Reg < r8_uep7_mod :: R8_UEP7_MOD_SPEC > , # [doc = "0x14 - endpoint 0 DMA buffer address"]
  8118. pub r32_uep0_rt_dma : crate :: Reg < r32_uep0_rt_dma :: R32_UEP0_RT_DMA_SPEC > , # [doc = "0x18 - endpoint 1 DMA buffer address"]
  8119. pub r32_uep1_rx_dma : crate :: Reg < r32_uep1_rx_dma :: R32_UEP1_RX_DMA_SPEC > , # [doc = "0x1c - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  8120. pub r32_uep2_rx_dma_r32_uh_rx_dma : crate :: Reg < r32_uep2_rx_dma_r32_uh_rx_dma :: R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > , # [doc = "0x20 - endpoint 3 DMA buffer address;host tx endpoint buffer high address"]
  8121. pub r32_uep3_rx_dma : crate :: Reg < r32_uep3_rx_dma :: R32_UEP3_RX_DMA_SPEC > , # [doc = "0x24 - endpoint 4 DMA buffer address"]
  8122. pub r32_uep4_rx_dma : crate :: Reg < r32_uep4_rx_dma :: R32_UEP4_RX_DMA_SPEC > , # [doc = "0x28 - endpoint 5 DMA buffer address"]
  8123. pub r32_uep5_rx_dma : crate :: Reg < r32_uep5_rx_dma :: R32_UEP5_RX_DMA_SPEC > , # [doc = "0x2c - endpoint 6 DMA buffer address"]
  8124. pub r32_uep6_rx_dma : crate :: Reg < r32_uep6_rx_dma :: R32_UEP6_RX_DMA_SPEC > , # [doc = "0x30 - endpoint 7 DMA buffer address"]
  8125. pub r32_uep7_rx_dma : crate :: Reg < r32_uep7_rx_dma :: R32_UEP7_RX_DMA_SPEC > , # [doc = "0x34 - endpoint 1 DMA TX buffer address"]
  8126. pub r32_uep1_tx_dma : crate :: Reg < r32_uep1_tx_dma :: R32_UEP1_TX_DMA_SPEC > , # [doc = "0x38 - endpoint 2 DMA TX buffer address"]
  8127. pub r32_uep2_tx_dma : crate :: Reg < r32_uep2_tx_dma :: R32_UEP2_TX_DMA_SPEC > , # [doc = "0x3c - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  8128. pub r32_uep3_tx_dma_r32_uh_tx_dma : crate :: Reg < r32_uep3_tx_dma_r32_uh_tx_dma :: R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > , # [doc = "0x40 - endpoint 4 DMA TX buffer address"]
  8129. pub r32_uep4_tx_dma : crate :: Reg < r32_uep4_tx_dma :: R32_UEP4_TX_DMA_SPEC > , # [doc = "0x44 - endpoint 5 DMA TX buffer address"]
  8130. pub r32_uep5_tx_dma : crate :: Reg < r32_uep5_tx_dma :: R32_UEP5_TX_DMA_SPEC > , # [doc = "0x48 - endpoint 4 DMA TX buffer address"]
  8131. pub r32_uep6_tx_dma : crate :: Reg < r32_uep6_tx_dma :: R32_UEP6_TX_DMA_SPEC > , # [doc = "0x4c - endpoint 7 DMA TX buffer address"]
  8132. pub r32_uep7_tx_dma : crate :: Reg < r32_uep7_tx_dma :: R32_UEP7_TX_DMA_SPEC > , # [doc = "0x50 - endpoint 0 receive max length"]
  8133. pub r16_uep0_max_len : crate :: Reg < r16_uep0_max_len :: R16_UEP0_MAX_LEN_SPEC > , _reserved31 : [u8 ; 0x02]
  8134. , # [doc = "0x54 - endpoint 1 receive max length"]
  8135. pub r16_uep1_max_len : crate :: Reg < r16_uep1_max_len :: R16_UEP1_MAX_LEN_SPEC > , _reserved32 : [u8 ; 0x02]
  8136. , # [doc = "0x58 - endpoint 2 receive max length and USB host receive max packet length register"]
  8137. pub r16_uep2_max_len_r16_uh_max_len : crate :: Reg < r16_uep2_max_len_r16_uh_max_len :: R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > , _reserved33 : [u8 ; 0x02]
  8138. , # [doc = "0x5c - endpoint 3 receive max length"]
  8139. pub r16_uep3_max_len : crate :: Reg < r16_uep3_max_len :: R16_UEP3_MAX_LEN_SPEC > , _reserved34 : [u8 ; 0x02]
  8140. , # [doc = "0x60 - endpoint 4 receive max length"]
  8141. pub r16_uep4_max_len : crate :: Reg < r16_uep4_max_len :: R16_UEP4_MAX_LEN_SPEC > , _reserved35 : [u8 ; 0x02]
  8142. , # [doc = "0x64 - endpoint 5 receive max length"]
  8143. pub r16_uep5_max_len : crate :: Reg < r16_uep5_max_len :: R16_UEP5_MAX_LEN_SPEC > , _reserved36 : [u8 ; 0x02]
  8144. , # [doc = "0x68 - endpoint 6 receive max length"]
  8145. pub r16_uep6_max_len : crate :: Reg < r16_uep6_max_len :: R16_UEP6_MAX_LEN_SPEC > , _reserved37 : [u8 ; 0x02]
  8146. , # [doc = "0x6c - endpoint 7 receive max length"]
  8147. pub r16_uep7_max_len : crate :: Reg < r16_uep7_max_len :: R16_UEP7_MAX_LEN_SPEC > , _reserved38 : [u8 ; 0x02]
  8148. , # [doc = "0x70 - endpoint 0 transmittal length"]
  8149. pub r16_uep0_t_len : crate :: Reg < r16_uep0_t_len :: R16_UEP0_T_LEN_SPEC > , # [doc = "0x72 - endpoint 0 tx control"]
  8150. pub r8_uep0_tx_ctrl : crate :: Reg < r8_uep0_tx_ctrl :: R8_UEP0_TX_CTRL_SPEC > , # [doc = "0x73 - endpoint 0 rx control"]
  8151. pub r8_uep0_rx_ctrl : crate :: Reg < r8_uep0_rx_ctrl :: R8_UEP0_RX_CTRL_SPEC > , # [doc = "0x74 - endpoint 1 transmittal length"]
  8152. pub r16_uep1_t_len : crate :: Reg < r16_uep1_t_len :: R16_UEP1_T_LEN_SPEC > , # [doc = "0x76 - endpoint 1 tx control"]
  8153. pub r8_uep1_tx_ctrl : crate :: Reg < r8_uep1_tx_ctrl :: R8_UEP1_TX_CTRL_SPEC > , # [doc = "0x77 - endpoint 1 rx control"]
  8154. pub r8_uep1_rx_ctrl : crate :: Reg < r8_uep1_rx_ctrl :: R8_UEP1_RX_CTRL_SPEC > , # [doc = "0x78 - endpoint 2 transmittal length and Set usb host token register"]
  8155. pub r16_uep2_t_len_r16_uh_ep_pid : crate :: Reg < r16_uep2_t_len_r16_uh_ep_pid :: R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > , # [doc = "0x7a - endpoint 2 tx control"]
  8156. pub r8_uep2_tx_ctrl : crate :: Reg < r8_uep2_tx_ctrl :: R8_UEP2_TX_CTRL_SPEC > , # [doc = "0x7b - endpoint 2 rx control and USb host receive endpoint control register"]
  8157. pub r8_uep2_rx_ctrl_r8_uh_rx_ctrl : crate :: Reg < r8_uep2_rx_ctrl_r8_uh_rx_ctrl :: R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > , # [doc = "0x7c - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  8158. pub r16_uep3_t_len_r16_uh_tx_len : crate :: Reg < r16_uep3_t_len_r16_uh_tx_len :: R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > , # [doc = "0x7e - endpoint 3 tx control and host transmittal endpoint control"]
  8159. pub r8_uep3_tx_ctrl_r8_uh_tx_ctrl : crate :: Reg < r8_uep3_tx_ctrl_r8_uh_tx_ctrl :: R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > , # [doc = "0x7f - endpoint 3 rx control"]
  8160. pub r8_uep3_rx_ctrl : crate :: Reg < r8_uep3_rx_ctrl :: R8_UEP3_RX_CTRL_SPEC > , # [doc = "0x80 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  8161. pub r16_uep4_t_len_r16_uh_split_data : crate :: Reg < r16_uep4_t_len_r16_uh_split_data :: R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > , # [doc = "0x82 - endpoint 4 tx control"]
  8162. pub r8_uep4_tx_ctrl : crate :: Reg < r8_uep4_tx_ctrl :: R8_UEP4_TX_CTRL_SPEC > , # [doc = "0x83 - endpoint 4 rx control"]
  8163. pub r8_uep4_rx_ctrl : crate :: Reg < r8_uep4_rx_ctrl :: R8_UEP4_RX_CTRL_SPEC > , # [doc = "0x84 - endpoint 5 transmittal length"]
  8164. pub r16_uep5_t_len : crate :: Reg < r16_uep5_t_len :: R16_UEP5_T_LEN_SPEC > , # [doc = "0x86 - endpoint 5 tx control"]
  8165. pub r8_uep5_tx_ctrl : crate :: Reg < r8_uep5_tx_ctrl :: R8_UEP5_TX_CTRL_SPEC > , # [doc = "0x87 - endpoint 5 rx control"]
  8166. pub r8_uep5_rx_ctrl : crate :: Reg < r8_uep5_rx_ctrl :: R8_UEP5_RX_CTRL_SPEC > , # [doc = "0x88 - endpoint 6 transmittal length"]
  8167. pub r16_uep6_t_len : crate :: Reg < r16_uep6_t_len :: R16_UEP6_T_LEN_SPEC > , # [doc = "0x8a - endpoint 6 tx control"]
  8168. pub r8_uep6_tx_ctrl : crate :: Reg < r8_uep6_tx_ctrl :: R8_UEP6_TX_CTRL_SPEC > , # [doc = "0x8b - endpoint 6 rx control"]
  8169. pub r8_uep6_rx_ctrl : crate :: Reg < r8_uep6_rx_ctrl :: R8_UEP6_RX_CTRL_SPEC > , # [doc = "0x8c - endpoint 7 transmittal length"]
  8170. pub r16_uep7_t_len : crate :: Reg < r16_uep7_t_len :: R16_UEP7_T_LEN_SPEC > , # [doc = "0x8e - endpoint 7 tx control"]
  8171. pub r8_uep7_tx_ctrl : crate :: Reg < r8_uep7_tx_ctrl :: R8_UEP7_TX_CTRL_SPEC > , # [doc = "0x8f - endpoint 7 rx control"]
  8172. pub r8_uep7_rx_ctrl : crate :: Reg < r8_uep7_rx_ctrl :: R8_UEP7_RX_CTRL_SPEC > , } # [doc = "R8_USB_CTRL register accessor: an alias for `Reg<R8_USB_CTRL_SPEC>`"]
  8173. pub type R8_USB_CTRL = crate :: Reg < r8_usb_ctrl :: R8_USB_CTRL_SPEC > ; # [doc = "USB base control"]
  8174. pub mod r8_usb_ctrl { # [doc = "Register `R8_USB_CTRL` reader"]
  8175. pub struct R (crate :: R < R8_USB_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_CTRL_SPEC > ; # [inline (always)]
  8176. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_CTRL_SPEC >> for R { # [inline (always)]
  8177. fn from (reader : crate :: R < R8_USB_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_CTRL` writer"]
  8178. pub struct W (crate :: W < R8_USB_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_CTRL_SPEC > ; # [inline (always)]
  8179. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8180. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_CTRL_SPEC >> for W { # [inline (always)]
  8181. fn from (writer : crate :: W < R8_USB_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_DMA_EN` reader - DMA enable and DMA interrupt enable for USB"]
  8182. pub struct RB_USB_DMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_DMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_DMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_DMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8183. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_DMA_EN` writer - DMA enable and DMA interrupt enable for USB"]
  8184. pub struct RB_USB_DMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_DMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8185. # [inline (always)]
  8186. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8187. # [inline (always)]
  8188. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8189. # [inline (always)]
  8190. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_CLR_ALL` reader - force clear FIFO and count of USB"]
  8191. pub struct RB_USB_CLR_ALL_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_CLR_ALL_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_CLR_ALL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_CLR_ALL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8192. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_CLR_ALL` writer - force clear FIFO and count of USB"]
  8193. pub struct RB_USB_CLR_ALL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_CLR_ALL_W < 'a > { # [doc = r"Sets the field bit"]
  8194. # [inline (always)]
  8195. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8196. # [inline (always)]
  8197. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8198. # [inline (always)]
  8199. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_RESET_SIE` reader - force reset USB SIE, need software clear"]
  8200. pub struct RB_USB_RESET_SIE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_RESET_SIE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_RESET_SIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_RESET_SIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8201. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_RESET_SIE` writer - force reset USB SIE, need software clear"]
  8202. pub struct RB_USB_RESET_SIE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_RESET_SIE_W < 'a > { # [doc = r"Sets the field bit"]
  8203. # [inline (always)]
  8204. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8205. # [inline (always)]
  8206. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8207. # [inline (always)]
  8208. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_INT_BUSY` reader - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
  8209. pub struct RB_USB_INT_BUSY_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_INT_BUSY_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_INT_BUSY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_INT_BUSY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8210. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_INT_BUSY` writer - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
  8211. pub struct RB_USB_INT_BUSY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_INT_BUSY_W < 'a > { # [doc = r"Sets the field bit"]
  8212. # [inline (always)]
  8213. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8214. # [inline (always)]
  8215. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8216. # [inline (always)]
  8217. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DEV_PU_EN` reader - USB device enable and internal pullup resistance enable"]
  8218. pub struct RB_DEV_PU_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_DEV_PU_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_DEV_PU_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_PU_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8219. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_PU_EN` writer - USB device enable and internal pullup resistance enable"]
  8220. pub struct RB_DEV_PU_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DEV_PU_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8221. # [inline (always)]
  8222. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8223. # [inline (always)]
  8224. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8225. # [inline (always)]
  8226. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_SPTP_MASK` reader - enable USB low speed"]
  8227. pub struct RB_USB_SPTP_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_USB_SPTP_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_USB_SPTP_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SPTP_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  8228. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SPTP_MASK` writer - enable USB low speed"]
  8229. pub struct RB_USB_SPTP_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_SPTP_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8230. # [inline (always)]
  8231. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 5)) | ((value as u8 & 0x03) << 5) ; self . w } } # [doc = "Field `RB_USB_MODE` reader - enable USB host mode: 0=device mode, 1=host mode"]
  8232. pub struct RB_USB_MODE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_MODE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_MODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8233. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_MODE` writer - enable USB host mode: 0=device mode, 1=host mode"]
  8234. pub struct RB_USB_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_MODE_W < 'a > { # [doc = r"Sets the field bit"]
  8235. # [inline (always)]
  8236. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8237. # [inline (always)]
  8238. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8239. # [inline (always)]
  8240. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - DMA enable and DMA interrupt enable for USB"]
  8241. # [inline (always)]
  8242. pub fn rb_usb_dma_en (& self) -> RB_USB_DMA_EN_R { RB_USB_DMA_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear FIFO and count of USB"]
  8243. # [inline (always)]
  8244. pub fn rb_usb_clr_all (& self) -> RB_USB_CLR_ALL_R { RB_USB_CLR_ALL_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - force reset USB SIE, need software clear"]
  8245. # [inline (always)]
  8246. pub fn rb_usb_reset_sie (& self) -> RB_USB_RESET_SIE_R { RB_USB_RESET_SIE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
  8247. # [inline (always)]
  8248. pub fn rb_usb_int_busy (& self) -> RB_USB_INT_BUSY_R { RB_USB_INT_BUSY_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - USB device enable and internal pullup resistance enable"]
  8249. # [inline (always)]
  8250. pub fn rb_dev_pu_en (& self) -> RB_DEV_PU_EN_R { RB_DEV_PU_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 5:6 - enable USB low speed"]
  8251. # [inline (always)]
  8252. pub fn rb_usb_sptp_mask (& self) -> RB_USB_SPTP_MASK_R { RB_USB_SPTP_MASK_R :: new (((self . bits >> 5) & 0x03) as u8) } # [doc = "Bit 7 - enable USB host mode: 0=device mode, 1=host mode"]
  8253. # [inline (always)]
  8254. pub fn rb_usb_mode (& self) -> RB_USB_MODE_R { RB_USB_MODE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DMA enable and DMA interrupt enable for USB"]
  8255. # [inline (always)]
  8256. pub fn rb_usb_dma_en (& mut self) -> RB_USB_DMA_EN_W { RB_USB_DMA_EN_W { w : self } } # [doc = "Bit 1 - force clear FIFO and count of USB"]
  8257. # [inline (always)]
  8258. pub fn rb_usb_clr_all (& mut self) -> RB_USB_CLR_ALL_W { RB_USB_CLR_ALL_W { w : self } } # [doc = "Bit 2 - force reset USB SIE, need software clear"]
  8259. # [inline (always)]
  8260. pub fn rb_usb_reset_sie (& mut self) -> RB_USB_RESET_SIE_W { RB_USB_RESET_SIE_W { w : self } } # [doc = "Bit 3 - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
  8261. # [inline (always)]
  8262. pub fn rb_usb_int_busy (& mut self) -> RB_USB_INT_BUSY_W { RB_USB_INT_BUSY_W { w : self } } # [doc = "Bit 4 - USB device enable and internal pullup resistance enable"]
  8263. # [inline (always)]
  8264. pub fn rb_dev_pu_en (& mut self) -> RB_DEV_PU_EN_W { RB_DEV_PU_EN_W { w : self } } # [doc = "Bits 5:6 - enable USB low speed"]
  8265. # [inline (always)]
  8266. pub fn rb_usb_sptp_mask (& mut self) -> RB_USB_SPTP_MASK_W { RB_USB_SPTP_MASK_W { w : self } } # [doc = "Bit 7 - enable USB host mode: 0=device mode, 1=host mode"]
  8267. # [inline (always)]
  8268. pub fn rb_usb_mode (& mut self) -> RB_USB_MODE_W { RB_USB_MODE_W { w : self } } # [doc = "Writes raw bits to the register."]
  8269. # [inline (always)]
  8270. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB base control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_ctrl](index.html) module"]
  8271. pub struct R8_USB_CTRL_SPEC ; impl crate :: RegisterSpec for R8_USB_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_ctrl::R](R) reader structure"]
  8272. impl crate :: Readable for R8_USB_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_ctrl::W](W) writer structure"]
  8273. impl crate :: Writable for R8_USB_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_CTRL to value 0x06"]
  8274. impl crate :: Resettable for R8_USB_CTRL_SPEC { # [inline (always)]
  8275. fn reset_value () -> Self :: Ux { 0x06 } } } # [doc = "R8_UHOST_CTRL register accessor: an alias for `Reg<R8_UHOST_CTRL_SPEC>`"]
  8276. pub type R8_UHOST_CTRL = crate :: Reg < r8_uhost_ctrl :: R8_UHOST_CTRL_SPEC > ; # [doc = "USB host control register"]
  8277. pub mod r8_uhost_ctrl { # [doc = "Register `R8_UHOST_CTRL` reader"]
  8278. pub struct R (crate :: R < R8_UHOST_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UHOST_CTRL_SPEC > ; # [inline (always)]
  8279. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UHOST_CTRL_SPEC >> for R { # [inline (always)]
  8280. fn from (reader : crate :: R < R8_UHOST_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UHOST_CTRL` writer"]
  8281. pub struct W (crate :: W < R8_UHOST_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UHOST_CTRL_SPEC > ; # [inline (always)]
  8282. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8283. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UHOST_CTRL_SPEC >> for W { # [inline (always)]
  8284. fn from (writer : crate :: W < R8_UHOST_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UH_BUS_RESET` reader - USB host send bus reset signal"]
  8285. pub struct RB_UH_BUS_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8286. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_RESET` writer - USB host send bus reset signal"]
  8287. pub struct RB_UH_BUS_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_RESET_W < 'a > { # [doc = r"Sets the field bit"]
  8288. # [inline (always)]
  8289. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8290. # [inline (always)]
  8291. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8292. # [inline (always)]
  8293. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UH_BUS_SUSPEND` reader - USB host send bus suspend signal"]
  8294. pub struct RB_UH_BUS_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8295. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_SUSPEND` writer - USB host send bus suspend signal"]
  8296. pub struct RB_UH_BUS_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
  8297. # [inline (always)]
  8298. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8299. # [inline (always)]
  8300. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8301. # [inline (always)]
  8302. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_UH_BUS_RESUME` reader - USB host suspend state and wake up device"]
  8303. pub struct RB_UH_BUS_RESUME_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_RESUME_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_RESUME_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_RESUME_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8304. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_RESUME` writer - USB host suspend state and wake up device"]
  8305. pub struct RB_UH_BUS_RESUME_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_RESUME_W < 'a > { # [doc = r"Sets the field bit"]
  8306. # [inline (always)]
  8307. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8308. # [inline (always)]
  8309. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8310. # [inline (always)]
  8311. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UH_AUTOSOF_EN` reader - Automatically generate sof packet enable control"]
  8312. pub struct RB_UH_AUTOSOF_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_AUTOSOF_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_AUTOSOF_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_AUTOSOF_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8313. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_AUTOSOF_EN` writer - Automatically generate sof packet enable control"]
  8314. pub struct RB_UH_AUTOSOF_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_AUTOSOF_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8315. # [inline (always)]
  8316. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8317. # [inline (always)]
  8318. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8319. # [inline (always)]
  8320. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - USB host send bus reset signal"]
  8321. # [inline (always)]
  8322. pub fn rb_uh_bus_reset (& self) -> RB_UH_BUS_RESET_R { RB_UH_BUS_RESET_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - USB host send bus suspend signal"]
  8323. # [inline (always)]
  8324. pub fn rb_uh_bus_suspend (& self) -> RB_UH_BUS_SUSPEND_R { RB_UH_BUS_SUSPEND_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - USB host suspend state and wake up device"]
  8325. # [inline (always)]
  8326. pub fn rb_uh_bus_resume (& self) -> RB_UH_BUS_RESUME_R { RB_UH_BUS_RESUME_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 7 - Automatically generate sof packet enable control"]
  8327. # [inline (always)]
  8328. pub fn rb_uh_autosof_en (& self) -> RB_UH_AUTOSOF_EN_R { RB_UH_AUTOSOF_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - USB host send bus reset signal"]
  8329. # [inline (always)]
  8330. pub fn rb_uh_bus_reset (& mut self) -> RB_UH_BUS_RESET_W { RB_UH_BUS_RESET_W { w : self } } # [doc = "Bit 1 - USB host send bus suspend signal"]
  8331. # [inline (always)]
  8332. pub fn rb_uh_bus_suspend (& mut self) -> RB_UH_BUS_SUSPEND_W { RB_UH_BUS_SUSPEND_W { w : self } } # [doc = "Bit 2 - USB host suspend state and wake up device"]
  8333. # [inline (always)]
  8334. pub fn rb_uh_bus_resume (& mut self) -> RB_UH_BUS_RESUME_W { RB_UH_BUS_RESUME_W { w : self } } # [doc = "Bit 7 - Automatically generate sof packet enable control"]
  8335. # [inline (always)]
  8336. pub fn rb_uh_autosof_en (& mut self) -> RB_UH_AUTOSOF_EN_W { RB_UH_AUTOSOF_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  8337. # [inline (always)]
  8338. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB host control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uhost_ctrl](index.html) module"]
  8339. pub struct R8_UHOST_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UHOST_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uhost_ctrl::R](R) reader structure"]
  8340. impl crate :: Readable for R8_UHOST_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uhost_ctrl::W](W) writer structure"]
  8341. impl crate :: Writable for R8_UHOST_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UHOST_CTRL to value 0"]
  8342. impl crate :: Resettable for R8_UHOST_CTRL_SPEC { # [inline (always)]
  8343. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_INT_EN register accessor: an alias for `Reg<R8_USB_INT_EN_SPEC>`"]
  8344. pub type R8_USB_INT_EN = crate :: Reg < r8_usb_int_en :: R8_USB_INT_EN_SPEC > ; # [doc = "USB interrupt enable"]
  8345. pub mod r8_usb_int_en { # [doc = "Register `R8_USB_INT_EN` reader"]
  8346. pub struct R (crate :: R < R8_USB_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_EN_SPEC > ; # [inline (always)]
  8347. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_EN_SPEC >> for R { # [inline (always)]
  8348. fn from (reader : crate :: R < R8_USB_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_INT_EN` writer"]
  8349. pub struct W (crate :: W < R8_USB_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_INT_EN_SPEC > ; # [inline (always)]
  8350. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8351. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_INT_EN_SPEC >> for W { # [inline (always)]
  8352. fn from (writer : crate :: W < R8_USB_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_IE_BUSRST_RB_USB_IE_DETECT` reader - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
  8353. pub struct RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8354. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_BUSRST_RB_USB_IE_DETECT` writer - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
  8355. pub struct RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W < 'a > { # [doc = r"Sets the field bit"]
  8356. # [inline (always)]
  8357. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8358. # [inline (always)]
  8359. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8360. # [inline (always)]
  8361. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_IE_TRANS` reader - enable interrupt for USB transfer completion"]
  8362. pub struct RB_USB_IE_TRANS_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_TRANS_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_TRANS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_TRANS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8363. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_TRANS` writer - enable interrupt for USB transfer completion"]
  8364. pub struct RB_USB_IE_TRANS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_TRANS_W < 'a > { # [doc = r"Sets the field bit"]
  8365. # [inline (always)]
  8366. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8367. # [inline (always)]
  8368. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8369. # [inline (always)]
  8370. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_IE_SUSPEND` reader - enable interrupt for USB suspend or resume event"]
  8371. pub struct RB_USB_IE_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8372. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SUSPEND` writer - enable interrupt for USB suspend or resume event"]
  8373. pub struct RB_USB_IE_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
  8374. # [inline (always)]
  8375. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8376. # [inline (always)]
  8377. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8378. # [inline (always)]
  8379. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_IE_SOF` reader - enable interrupt for host SOF timer action for USB host mode"]
  8380. pub struct RB_USB_IE_SOF_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SOF_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SOF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SOF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8381. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SOF` writer - enable interrupt for host SOF timer action for USB host mode"]
  8382. pub struct RB_USB_IE_SOF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SOF_W < 'a > { # [doc = r"Sets the field bit"]
  8383. # [inline (always)]
  8384. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8385. # [inline (always)]
  8386. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8387. # [inline (always)]
  8388. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_USB_IE_FIFOOV` reader - enable interrupt for FIFO overflow"]
  8389. pub struct RB_USB_IE_FIFOOV_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_FIFOOV_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_FIFOOV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_FIFOOV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8390. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_FIFOOV` writer - enable interrupt for FIFO overflow"]
  8391. pub struct RB_USB_IE_FIFOOV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_FIFOOV_W < 'a > { # [doc = r"Sets the field bit"]
  8392. # [inline (always)]
  8393. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8394. # [inline (always)]
  8395. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8396. # [inline (always)]
  8397. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_IE_SETUPACT` reader - Setup packet end interrupt"]
  8398. pub struct RB_USB_IE_SETUPACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SETUPACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SETUPACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SETUPACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8399. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SETUPACT` writer - Setup packet end interrupt"]
  8400. pub struct RB_USB_IE_SETUPACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SETUPACT_W < 'a > { # [doc = r"Sets the field bit"]
  8401. # [inline (always)]
  8402. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8403. # [inline (always)]
  8404. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8405. # [inline (always)]
  8406. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_USB_IE_ISOACT` reader - Synchronous transmission received control token packet interrupt"]
  8407. pub struct RB_USB_IE_ISOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_ISOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_ISOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_ISOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8408. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_ISOACT` writer - Synchronous transmission received control token packet interrupt"]
  8409. pub struct RB_USB_IE_ISOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_ISOACT_W < 'a > { # [doc = r"Sets the field bit"]
  8410. # [inline (always)]
  8411. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8412. # [inline (always)]
  8413. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8414. # [inline (always)]
  8415. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_USB_IE_DEV_NAK` reader - enable interrupt for NAK responded for USB device mode"]
  8416. pub struct RB_USB_IE_DEV_NAK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_DEV_NAK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_DEV_NAK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_DEV_NAK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8417. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_DEV_NAK` writer - enable interrupt for NAK responded for USB device mode"]
  8418. pub struct RB_USB_IE_DEV_NAK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_DEV_NAK_W < 'a > { # [doc = r"Sets the field bit"]
  8419. # [inline (always)]
  8420. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8421. # [inline (always)]
  8422. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8423. # [inline (always)]
  8424. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
  8425. # [inline (always)]
  8426. pub fn rb_usb_ie_busrst_rb_usb_ie_detect (& self) -> RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for USB transfer completion"]
  8427. # [inline (always)]
  8428. pub fn rb_usb_ie_trans (& self) -> RB_USB_IE_TRANS_R { RB_USB_IE_TRANS_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for USB suspend or resume event"]
  8429. # [inline (always)]
  8430. pub fn rb_usb_ie_suspend (& self) -> RB_USB_IE_SUSPEND_R { RB_USB_IE_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for host SOF timer action for USB host mode"]
  8431. # [inline (always)]
  8432. pub fn rb_usb_ie_sof (& self) -> RB_USB_IE_SOF_R { RB_USB_IE_SOF_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for FIFO overflow"]
  8433. # [inline (always)]
  8434. pub fn rb_usb_ie_fifoov (& self) -> RB_USB_IE_FIFOOV_R { RB_USB_IE_FIFOOV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - Setup packet end interrupt"]
  8435. # [inline (always)]
  8436. pub fn rb_usb_ie_setupact (& self) -> RB_USB_IE_SETUPACT_R { RB_USB_IE_SETUPACT_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - Synchronous transmission received control token packet interrupt"]
  8437. # [inline (always)]
  8438. pub fn rb_usb_ie_isoact (& self) -> RB_USB_IE_ISOACT_R { RB_USB_IE_ISOACT_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for NAK responded for USB device mode"]
  8439. # [inline (always)]
  8440. pub fn rb_usb_ie_dev_nak (& self) -> RB_USB_IE_DEV_NAK_R { RB_USB_IE_DEV_NAK_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
  8441. # [inline (always)]
  8442. pub fn rb_usb_ie_busrst_rb_usb_ie_detect (& mut self) -> RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W { w : self } } # [doc = "Bit 1 - enable interrupt for USB transfer completion"]
  8443. # [inline (always)]
  8444. pub fn rb_usb_ie_trans (& mut self) -> RB_USB_IE_TRANS_W { RB_USB_IE_TRANS_W { w : self } } # [doc = "Bit 2 - enable interrupt for USB suspend or resume event"]
  8445. # [inline (always)]
  8446. pub fn rb_usb_ie_suspend (& mut self) -> RB_USB_IE_SUSPEND_W { RB_USB_IE_SUSPEND_W { w : self } } # [doc = "Bit 3 - enable interrupt for host SOF timer action for USB host mode"]
  8447. # [inline (always)]
  8448. pub fn rb_usb_ie_sof (& mut self) -> RB_USB_IE_SOF_W { RB_USB_IE_SOF_W { w : self } } # [doc = "Bit 4 - enable interrupt for FIFO overflow"]
  8449. # [inline (always)]
  8450. pub fn rb_usb_ie_fifoov (& mut self) -> RB_USB_IE_FIFOOV_W { RB_USB_IE_FIFOOV_W { w : self } } # [doc = "Bit 5 - Setup packet end interrupt"]
  8451. # [inline (always)]
  8452. pub fn rb_usb_ie_setupact (& mut self) -> RB_USB_IE_SETUPACT_W { RB_USB_IE_SETUPACT_W { w : self } } # [doc = "Bit 6 - Synchronous transmission received control token packet interrupt"]
  8453. # [inline (always)]
  8454. pub fn rb_usb_ie_isoact (& mut self) -> RB_USB_IE_ISOACT_W { RB_USB_IE_ISOACT_W { w : self } } # [doc = "Bit 7 - enable interrupt for NAK responded for USB device mode"]
  8455. # [inline (always)]
  8456. pub fn rb_usb_ie_dev_nak (& mut self) -> RB_USB_IE_DEV_NAK_W { RB_USB_IE_DEV_NAK_W { w : self } } # [doc = "Writes raw bits to the register."]
  8457. # [inline (always)]
  8458. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_en](index.html) module"]
  8459. pub struct R8_USB_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_en::R](R) reader structure"]
  8460. impl crate :: Readable for R8_USB_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_int_en::W](W) writer structure"]
  8461. impl crate :: Writable for R8_USB_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_INT_EN to value 0"]
  8462. impl crate :: Resettable for R8_USB_INT_EN_SPEC { # [inline (always)]
  8463. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_DEV_AD register accessor: an alias for `Reg<R8_USB_DEV_AD_SPEC>`"]
  8464. pub type R8_USB_DEV_AD = crate :: Reg < r8_usb_dev_ad :: R8_USB_DEV_AD_SPEC > ; # [doc = "USB device address"]
  8465. pub mod r8_usb_dev_ad { # [doc = "Register `R8_USB_DEV_AD` reader"]
  8466. pub struct R (crate :: R < R8_USB_DEV_AD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_DEV_AD_SPEC > ; # [inline (always)]
  8467. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_DEV_AD_SPEC >> for R { # [inline (always)]
  8468. fn from (reader : crate :: R < R8_USB_DEV_AD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_DEV_AD` writer"]
  8469. pub struct W (crate :: W < R8_USB_DEV_AD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_DEV_AD_SPEC > ; # [inline (always)]
  8470. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8471. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_DEV_AD_SPEC >> for W { # [inline (always)]
  8472. fn from (writer : crate :: W < R8_USB_DEV_AD_SPEC >) -> Self { W (writer) } } # [doc = "Field `USB_ADDR_MASK` reader - bit mask for USB device address"]
  8473. pub struct USB_ADDR_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl USB_ADDR_MASK_R { pub (crate) fn new (bits : u8) -> Self { USB_ADDR_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_ADDR_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  8474. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `USB_ADDR_MASK` writer - bit mask for USB device address"]
  8475. pub struct USB_ADDR_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > USB_ADDR_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  8476. # [inline (always)]
  8477. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x7f) | (value as u8 & 0x7f) ; self . w } } impl R { # [doc = "Bits 0:6 - bit mask for USB device address"]
  8478. # [inline (always)]
  8479. pub fn usb_addr_mask (& self) -> USB_ADDR_MASK_R { USB_ADDR_MASK_R :: new ((self . bits & 0x7f) as u8) } } impl W { # [doc = "Bits 0:6 - bit mask for USB device address"]
  8480. # [inline (always)]
  8481. pub fn usb_addr_mask (& mut self) -> USB_ADDR_MASK_W { USB_ADDR_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
  8482. # [inline (always)]
  8483. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB device address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_dev_ad](index.html) module"]
  8484. pub struct R8_USB_DEV_AD_SPEC ; impl crate :: RegisterSpec for R8_USB_DEV_AD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_dev_ad::R](R) reader structure"]
  8485. impl crate :: Readable for R8_USB_DEV_AD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_dev_ad::W](W) writer structure"]
  8486. impl crate :: Writable for R8_USB_DEV_AD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_DEV_AD to value 0"]
  8487. impl crate :: Resettable for R8_USB_DEV_AD_SPEC { # [inline (always)]
  8488. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_USB_FRAME_NO register accessor: an alias for `Reg<R16_USB_FRAME_NO_SPEC>`"]
  8489. pub type R16_USB_FRAME_NO = crate :: Reg < r16_usb_frame_no :: R16_USB_FRAME_NO_SPEC > ; # [doc = "USB frame number register"]
  8490. pub mod r16_usb_frame_no { # [doc = "Register `R16_USB_FRAME_NO` reader"]
  8491. pub struct R (crate :: R < R16_USB_FRAME_NO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_USB_FRAME_NO_SPEC > ; # [inline (always)]
  8492. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_USB_FRAME_NO_SPEC >> for R { # [inline (always)]
  8493. fn from (reader : crate :: R < R16_USB_FRAME_NO_SPEC >) -> Self { R (reader) } } # [doc = "Field `USB_FRAME_NO` reader - USB frame number"]
  8494. pub struct USB_FRAME_NO_R (crate :: FieldReader < u16 , u16 >) ; impl USB_FRAME_NO_R { pub (crate) fn new (bits : u16) -> Self { USB_FRAME_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_FRAME_NO_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  8495. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - USB frame number"]
  8496. # [inline (always)]
  8497. pub fn usb_frame_no (& self) -> USB_FRAME_NO_R { USB_FRAME_NO_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "USB frame number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_usb_frame_no](index.html) module"]
  8498. pub struct R16_USB_FRAME_NO_SPEC ; impl crate :: RegisterSpec for R16_USB_FRAME_NO_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_usb_frame_no::R](R) reader structure"]
  8499. impl crate :: Readable for R16_USB_FRAME_NO_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_USB_FRAME_NO to value 0"]
  8500. impl crate :: Resettable for R16_USB_FRAME_NO_SPEC { # [inline (always)]
  8501. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_SUSPEND register accessor: an alias for `Reg<R8_USB_SUSPEND_SPEC>`"]
  8502. pub type R8_USB_SUSPEND = crate :: Reg < r8_usb_suspend :: R8_USB_SUSPEND_SPEC > ; # [doc = "USB suspend register"]
  8503. pub mod r8_usb_suspend { # [doc = "Register `R8_USB_SUSPEND` reader"]
  8504. pub struct R (crate :: R < R8_USB_SUSPEND_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_SUSPEND_SPEC > ; # [inline (always)]
  8505. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_SUSPEND_SPEC >> for R { # [inline (always)]
  8506. fn from (reader : crate :: R < R8_USB_SUSPEND_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_SUSPEND` writer"]
  8507. pub struct W (crate :: W < R8_USB_SUSPEND_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_SUSPEND_SPEC > ; # [inline (always)]
  8508. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8509. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_SUSPEND_SPEC >> for W { # [inline (always)]
  8510. fn from (writer : crate :: W < R8_USB_SUSPEND_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DEV_WAKEUP` reader - Remote wake-up control bit"]
  8511. pub struct RB_DEV_WAKEUP_R (crate :: FieldReader < bool , bool >) ; impl RB_DEV_WAKEUP_R { pub (crate) fn new (bits : bool) -> Self { RB_DEV_WAKEUP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_WAKEUP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8512. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_WAKEUP` writer - Remote wake-up control bit"]
  8513. pub struct RB_DEV_WAKEUP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DEV_WAKEUP_W < 'a > { # [doc = r"Sets the field bit"]
  8514. # [inline (always)]
  8515. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8516. # [inline (always)]
  8517. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8518. # [inline (always)]
  8519. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 1 - Remote wake-up control bit"]
  8520. # [inline (always)]
  8521. pub fn rb_dev_wakeup (& self) -> RB_DEV_WAKEUP_R { RB_DEV_WAKEUP_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - Remote wake-up control bit"]
  8522. # [inline (always)]
  8523. pub fn rb_dev_wakeup (& mut self) -> RB_DEV_WAKEUP_W { RB_DEV_WAKEUP_W { w : self } } # [doc = "Writes raw bits to the register."]
  8524. # [inline (always)]
  8525. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB suspend register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_suspend](index.html) module"]
  8526. pub struct R8_USB_SUSPEND_SPEC ; impl crate :: RegisterSpec for R8_USB_SUSPEND_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_suspend::R](R) reader structure"]
  8527. impl crate :: Readable for R8_USB_SUSPEND_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_suspend::W](W) writer structure"]
  8528. impl crate :: Writable for R8_USB_SUSPEND_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_SUSPEND to value 0"]
  8529. impl crate :: Resettable for R8_USB_SUSPEND_SPEC { # [inline (always)]
  8530. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_SPD_TYPE register accessor: an alias for `Reg<R8_USB_SPD_TYPE_SPEC>`"]
  8531. pub type R8_USB_SPD_TYPE = crate :: Reg < r8_usb_spd_type :: R8_USB_SPD_TYPE_SPEC > ; # [doc = "USB actual speed register"]
  8532. pub mod r8_usb_spd_type { # [doc = "Register `R8_USB_SPD_TYPE` reader"]
  8533. pub struct R (crate :: R < R8_USB_SPD_TYPE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_SPD_TYPE_SPEC > ; # [inline (always)]
  8534. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_SPD_TYPE_SPEC >> for R { # [inline (always)]
  8535. fn from (reader : crate :: R < R8_USB_SPD_TYPE_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_USBSPEED_MASK` reader - USB actual speed"]
  8536. pub struct RB_USBSPEED_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_USBSPEED_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_USBSPEED_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBSPEED_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  8537. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:1 - USB actual speed"]
  8538. # [inline (always)]
  8539. pub fn rb_usbspeed_mask (& self) -> RB_USBSPEED_MASK_R { RB_USBSPEED_MASK_R :: new ((self . bits & 0x03) as u8) } } # [doc = "USB actual speed register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_spd_type](index.html) module"]
  8540. pub struct R8_USB_SPD_TYPE_SPEC ; impl crate :: RegisterSpec for R8_USB_SPD_TYPE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_spd_type::R](R) reader structure"]
  8541. impl crate :: Readable for R8_USB_SPD_TYPE_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_SPD_TYPE to value 0"]
  8542. impl crate :: Resettable for R8_USB_SPD_TYPE_SPEC { # [inline (always)]
  8543. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_MIS_ST register accessor: an alias for `Reg<R8_USB_MIS_ST_SPEC>`"]
  8544. pub type R8_USB_MIS_ST = crate :: Reg < r8_usb_mis_st :: R8_USB_MIS_ST_SPEC > ; # [doc = "USB miscellaneous status"]
  8545. pub mod r8_usb_mis_st { # [doc = "Register `R8_USB_MIS_ST` reader"]
  8546. pub struct R (crate :: R < R8_USB_MIS_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_MIS_ST_SPEC > ; # [inline (always)]
  8547. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_MIS_ST_SPEC >> for R { # [inline (always)]
  8548. fn from (reader : crate :: R < R8_USB_MIS_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_USB_SPLIT_EN` reader - RO,indicate host allow SPLIT packet"]
  8549. pub struct RB_USB_SPLIT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SPLIT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SPLIT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SPLIT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8550. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ATTACH` reader - RO, indicate device attached status on USB host"]
  8551. pub struct RB_USB_ATTACH_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ATTACH_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ATTACH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ATTACH_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8552. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USBBUS_SUSPEND` reader - RO, indicate USB suspend status"]
  8553. pub struct RB_USBBUS_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USBBUS_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USBBUS_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBBUS_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8554. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USBBUS_RESET` reader - RO, indicate USB bus reset status"]
  8555. pub struct RB_USBBUS_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_USBBUS_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_USBBUS_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBBUS_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8556. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_FIFO_RDY` reader - RO, indicate USB receiving FIFO ready status (not empty)"]
  8557. pub struct RB_USB_FIFO_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_FIFO_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_FIFO_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8558. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SIE_FREE` reader - RO, indicate USB SIE free status"]
  8559. pub struct RB_USB_SIE_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SIE_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SIE_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SIE_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8560. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SOF_ACT` reader - RO, indicate host SOF timer action status for USB host"]
  8561. pub struct RB_USB_SOF_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SOF_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SOF_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SOF_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8562. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SOF_PRES` reader - RO, indicate host SOF timer presage status"]
  8563. pub struct RB_USB_SOF_PRES_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SOF_PRES_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SOF_PRES_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SOF_PRES_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8564. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - RO,indicate host allow SPLIT packet"]
  8565. # [inline (always)]
  8566. pub fn rb_usb_split_en (& self) -> RB_USB_SPLIT_EN_R { RB_USB_SPLIT_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - RO, indicate device attached status on USB host"]
  8567. # [inline (always)]
  8568. pub fn rb_usb_attach (& self) -> RB_USB_ATTACH_R { RB_USB_ATTACH_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - RO, indicate USB suspend status"]
  8569. # [inline (always)]
  8570. pub fn rb_usbbus_suspend (& self) -> RB_USBBUS_SUSPEND_R { RB_USBBUS_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - RO, indicate USB bus reset status"]
  8571. # [inline (always)]
  8572. pub fn rb_usbbus_reset (& self) -> RB_USBBUS_RESET_R { RB_USBBUS_RESET_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - RO, indicate USB receiving FIFO ready status (not empty)"]
  8573. # [inline (always)]
  8574. pub fn rb_usb_fifo_rdy (& self) -> RB_USB_FIFO_RDY_R { RB_USB_FIFO_RDY_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - RO, indicate USB SIE free status"]
  8575. # [inline (always)]
  8576. pub fn rb_usb_sie_free (& self) -> RB_USB_SIE_FREE_R { RB_USB_SIE_FREE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - RO, indicate host SOF timer action status for USB host"]
  8577. # [inline (always)]
  8578. pub fn rb_usb_sof_act (& self) -> RB_USB_SOF_ACT_R { RB_USB_SOF_ACT_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - RO, indicate host SOF timer presage status"]
  8579. # [inline (always)]
  8580. pub fn rb_usb_sof_pres (& self) -> RB_USB_SOF_PRES_R { RB_USB_SOF_PRES_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "USB miscellaneous status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_mis_st](index.html) module"]
  8581. pub struct R8_USB_MIS_ST_SPEC ; impl crate :: RegisterSpec for R8_USB_MIS_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_mis_st::R](R) reader structure"]
  8582. impl crate :: Readable for R8_USB_MIS_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_MIS_ST to value 0x20"]
  8583. impl crate :: Resettable for R8_USB_MIS_ST_SPEC { # [inline (always)]
  8584. fn reset_value () -> Self :: Ux { 0x20 } } } # [doc = "R8_USB_INT_FG register accessor: an alias for `Reg<R8_USB_INT_FG_SPEC>`"]
  8585. pub type R8_USB_INT_FG = crate :: Reg < r8_usb_int_fg :: R8_USB_INT_FG_SPEC > ; # [doc = "USB interrupt flag"]
  8586. pub mod r8_usb_int_fg { # [doc = "Register `R8_USB_INT_FG` reader"]
  8587. pub struct R (crate :: R < R8_USB_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_FG_SPEC > ; # [inline (always)]
  8588. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_FG_SPEC >> for R { # [inline (always)]
  8589. fn from (reader : crate :: R < R8_USB_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_INT_FG` writer"]
  8590. pub struct W (crate :: W < R8_USB_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_INT_FG_SPEC > ; # [inline (always)]
  8591. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8592. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_INT_FG_SPEC >> for W { # [inline (always)]
  8593. fn from (writer : crate :: W < R8_USB_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_IF_BUSRST_RB_USB_IF_DETECT` reader - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
  8594. pub struct RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8595. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_BUSRST_RB_USB_IF_DETECT` writer - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
  8596. pub struct RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W < 'a > { # [doc = r"Sets the field bit"]
  8597. # [inline (always)]
  8598. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8599. # [inline (always)]
  8600. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8601. # [inline (always)]
  8602. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_IF_TRANSFER` reader - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
  8603. pub struct RB_USB_IF_TRANSFER_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_TRANSFER_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_TRANSFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_TRANSFER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8604. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_TRANSFER` writer - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
  8605. pub struct RB_USB_IF_TRANSFER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_TRANSFER_W < 'a > { # [doc = r"Sets the field bit"]
  8606. # [inline (always)]
  8607. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8608. # [inline (always)]
  8609. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8610. # [inline (always)]
  8611. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_IF_SUSPEND` reader - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
  8612. pub struct RB_USB_IF_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8613. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_SUSPEND` writer - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
  8614. pub struct RB_USB_IF_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
  8615. # [inline (always)]
  8616. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8617. # [inline (always)]
  8618. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8619. # [inline (always)]
  8620. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_IF_HST_SOF` reader - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
  8621. pub struct RB_USB_IF_HST_SOF_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_HST_SOF_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_HST_SOF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_HST_SOF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8622. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_HST_SOF` writer - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
  8623. pub struct RB_USB_IF_HST_SOF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_HST_SOF_W < 'a > { # [doc = r"Sets the field bit"]
  8624. # [inline (always)]
  8625. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8626. # [inline (always)]
  8627. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8628. # [inline (always)]
  8629. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_USB_IF_FIFOOV` reader - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
  8630. pub struct RB_USB_IF_FIFOOV_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_FIFOOV_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_FIFOOV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_FIFOOV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8631. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_FIFOOV` writer - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
  8632. pub struct RB_USB_IF_FIFOOV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_FIFOOV_W < 'a > { # [doc = r"Sets the field bit"]
  8633. # [inline (always)]
  8634. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8635. # [inline (always)]
  8636. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8637. # [inline (always)]
  8638. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_IF_SETUOACT` reader - RO, Setup transaction end interrupt flag"]
  8639. pub struct RB_USB_IF_SETUOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_SETUOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_SETUOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_SETUOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8640. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_SETUOACT` writer - RO, Setup transaction end interrupt flag"]
  8641. pub struct RB_USB_IF_SETUOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_SETUOACT_W < 'a > { # [doc = r"Sets the field bit"]
  8642. # [inline (always)]
  8643. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8644. # [inline (always)]
  8645. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8646. # [inline (always)]
  8647. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_USB_IF_ISOACT` reader - RO, Synchronous transmission received control token packet interrupt flag"]
  8648. pub struct RB_USB_IF_ISOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_ISOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_ISOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_ISOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8649. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_ISOACT` writer - RO, Synchronous transmission received control token packet interrupt flag"]
  8650. pub struct RB_USB_IF_ISOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_ISOACT_W < 'a > { # [doc = r"Sets the field bit"]
  8651. # [inline (always)]
  8652. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8653. # [inline (always)]
  8654. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8655. # [inline (always)]
  8656. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bit 0 - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
  8657. # [inline (always)]
  8658. pub fn rb_usb_if_busrst_rb_usb_if_detect (& self) -> RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
  8659. # [inline (always)]
  8660. pub fn rb_usb_if_transfer (& self) -> RB_USB_IF_TRANSFER_R { RB_USB_IF_TRANSFER_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
  8661. # [inline (always)]
  8662. pub fn rb_usb_if_suspend (& self) -> RB_USB_IF_SUSPEND_R { RB_USB_IF_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
  8663. # [inline (always)]
  8664. pub fn rb_usb_if_hst_sof (& self) -> RB_USB_IF_HST_SOF_R { RB_USB_IF_HST_SOF_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
  8665. # [inline (always)]
  8666. pub fn rb_usb_if_fifoov (& self) -> RB_USB_IF_FIFOOV_R { RB_USB_IF_FIFOOV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - RO, Setup transaction end interrupt flag"]
  8667. # [inline (always)]
  8668. pub fn rb_usb_if_setuoact (& self) -> RB_USB_IF_SETUOACT_R { RB_USB_IF_SETUOACT_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - RO, Synchronous transmission received control token packet interrupt flag"]
  8669. # [inline (always)]
  8670. pub fn rb_usb_if_isoact (& self) -> RB_USB_IF_ISOACT_R { RB_USB_IF_ISOACT_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
  8671. # [inline (always)]
  8672. pub fn rb_usb_if_busrst_rb_usb_if_detect (& mut self) -> RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W { w : self } } # [doc = "Bit 1 - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
  8673. # [inline (always)]
  8674. pub fn rb_usb_if_transfer (& mut self) -> RB_USB_IF_TRANSFER_W { RB_USB_IF_TRANSFER_W { w : self } } # [doc = "Bit 2 - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
  8675. # [inline (always)]
  8676. pub fn rb_usb_if_suspend (& mut self) -> RB_USB_IF_SUSPEND_W { RB_USB_IF_SUSPEND_W { w : self } } # [doc = "Bit 3 - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
  8677. # [inline (always)]
  8678. pub fn rb_usb_if_hst_sof (& mut self) -> RB_USB_IF_HST_SOF_W { RB_USB_IF_HST_SOF_W { w : self } } # [doc = "Bit 4 - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
  8679. # [inline (always)]
  8680. pub fn rb_usb_if_fifoov (& mut self) -> RB_USB_IF_FIFOOV_W { RB_USB_IF_FIFOOV_W { w : self } } # [doc = "Bit 5 - RO, Setup transaction end interrupt flag"]
  8681. # [inline (always)]
  8682. pub fn rb_usb_if_setuoact (& mut self) -> RB_USB_IF_SETUOACT_W { RB_USB_IF_SETUOACT_W { w : self } } # [doc = "Bit 6 - RO, Synchronous transmission received control token packet interrupt flag"]
  8683. # [inline (always)]
  8684. pub fn rb_usb_if_isoact (& mut self) -> RB_USB_IF_ISOACT_W { RB_USB_IF_ISOACT_W { w : self } } # [doc = "Writes raw bits to the register."]
  8685. # [inline (always)]
  8686. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_fg](index.html) module"]
  8687. pub struct R8_USB_INT_FG_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_FG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_fg::R](R) reader structure"]
  8688. impl crate :: Readable for R8_USB_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_int_fg::W](W) writer structure"]
  8689. impl crate :: Writable for R8_USB_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_INT_FG to value 0"]
  8690. impl crate :: Resettable for R8_USB_INT_FG_SPEC { # [inline (always)]
  8691. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_INT_ST register accessor: an alias for `Reg<R8_USB_INT_ST_SPEC>`"]
  8692. pub type R8_USB_INT_ST = crate :: Reg < r8_usb_int_st :: R8_USB_INT_ST_SPEC > ; # [doc = "USB interrupt status"]
  8693. pub mod r8_usb_int_st { # [doc = "Register `R8_USB_INT_ST` reader"]
  8694. pub struct R (crate :: R < R8_USB_INT_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_ST_SPEC > ; # [inline (always)]
  8695. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_ST_SPEC >> for R { # [inline (always)]
  8696. fn from (reader : crate :: R < R8_USB_INT_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_HOST_RES_MASK_RB_DEV_ENDP_MASK` reader - RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received;RO, bit mask of current transfer endpoint number for USB device mode"]
  8697. pub struct RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  8698. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_TOKEN_MASK` reader - RO, bit mask of current token PID code received for USB device mode"]
  8699. pub struct RB_DEV_TOKEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DEV_TOKEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_DEV_TOKEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_TOKEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  8700. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ST_TOGOK` reader - RO, indicate current USB transfer toggle is OK"]
  8701. pub struct RB_USB_ST_TOGOK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ST_TOGOK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ST_TOGOK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ST_TOGOK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8702. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ST_NAK` reader - RO, indicate current USB transfer is NAK received for USB device mode"]
  8703. pub struct RB_USB_ST_NAK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ST_NAK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ST_NAK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ST_NAK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8704. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:3 - RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received;RO, bit mask of current transfer endpoint number for USB device mode"]
  8705. # [inline (always)]
  8706. pub fn rb_host_res_mask_rb_dev_endp_mask (& self) -> RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bits 4:5 - RO, bit mask of current token PID code received for USB device mode"]
  8707. # [inline (always)]
  8708. pub fn rb_dev_token_mask (& self) -> RB_DEV_TOKEN_MASK_R { RB_DEV_TOKEN_MASK_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - RO, indicate current USB transfer toggle is OK"]
  8709. # [inline (always)]
  8710. pub fn rb_usb_st_togok (& self) -> RB_USB_ST_TOGOK_R { RB_USB_ST_TOGOK_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - RO, indicate current USB transfer is NAK received for USB device mode"]
  8711. # [inline (always)]
  8712. pub fn rb_usb_st_nak (& self) -> RB_USB_ST_NAK_R { RB_USB_ST_NAK_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "USB interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_st](index.html) module"]
  8713. pub struct R8_USB_INT_ST_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_st::R](R) reader structure"]
  8714. impl crate :: Readable for R8_USB_INT_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_INT_ST to value 0"]
  8715. impl crate :: Resettable for R8_USB_INT_ST_SPEC { # [inline (always)]
  8716. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R6_USB_RX_LEN register accessor: an alias for `Reg<R6_USB_RX_LEN_SPEC>`"]
  8717. pub type R6_USB_RX_LEN = crate :: Reg < r6_usb_rx_len :: R6_USB_RX_LEN_SPEC > ; # [doc = "USB receiving length"]
  8718. pub mod r6_usb_rx_len { # [doc = "Register `R6_USB_RX_LEN` reader"]
  8719. pub struct R (crate :: R < R6_USB_RX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R6_USB_RX_LEN_SPEC > ; # [inline (always)]
  8720. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R6_USB_RX_LEN_SPEC >> for R { # [inline (always)]
  8721. fn from (reader : crate :: R < R6_USB_RX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Field `USB_RX_LEN` reader - length of received bytes"]
  8722. pub struct USB_RX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl USB_RX_LEN_R { pub (crate) fn new (bits : u16) -> Self { USB_RX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_RX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  8723. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - length of received bytes"]
  8724. # [inline (always)]
  8725. pub fn usb_rx_len (& self) -> USB_RX_LEN_R { USB_RX_LEN_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "USB receiving length\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r6_usb_rx_len](index.html) module"]
  8726. pub struct R6_USB_RX_LEN_SPEC ; impl crate :: RegisterSpec for R6_USB_RX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r6_usb_rx_len::R](R) reader structure"]
  8727. impl crate :: Readable for R6_USB_RX_LEN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R6_USB_RX_LEN to value 0"]
  8728. impl crate :: Resettable for R6_USB_RX_LEN_SPEC { # [inline (always)]
  8729. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_1_MOD register accessor: an alias for `Reg<R8_UEP4_1_MOD_SPEC>`"]
  8730. pub type R8_UEP4_1_MOD = crate :: Reg < r8_uep4_1_mod :: R8_UEP4_1_MOD_SPEC > ; # [doc = "endpoint 1(9) 4(8,12) mode"]
  8731. pub mod r8_uep4_1_mod { # [doc = "Register `R8_UEP4_1_MOD` reader"]
  8732. pub struct R (crate :: R < R8_UEP4_1_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_1_MOD_SPEC > ; # [inline (always)]
  8733. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_1_MOD_SPEC >> for R { # [inline (always)]
  8734. fn from (reader : crate :: R < R8_UEP4_1_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_1_MOD` writer"]
  8735. pub struct W (crate :: W < R8_UEP4_1_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_1_MOD_SPEC > ; # [inline (always)]
  8736. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8737. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_1_MOD_SPEC >> for W { # [inline (always)]
  8738. fn from (writer : crate :: W < R8_UEP4_1_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP4_BUF_MOD` reader - buffer mode of USB endpoint 4(8,12)"]
  8739. pub struct RB_UEP4_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8740. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_BUF_MOD` writer - buffer mode of USB endpoint 4(8,12)"]
  8741. pub struct RB_UEP4_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  8742. # [inline (always)]
  8743. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8744. # [inline (always)]
  8745. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8746. # [inline (always)]
  8747. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP4_TX_EN` reader - enable USB endpoint 4(8,12) transmittal (IN)"]
  8748. pub struct RB_UEP4_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8749. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_TX_EN` writer - enable USB endpoint 4(8,12) transmittal (IN)"]
  8750. pub struct RB_UEP4_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8751. # [inline (always)]
  8752. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8753. # [inline (always)]
  8754. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8755. # [inline (always)]
  8756. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP4_RX_EN` reader - enable USB endpoint 4(8,12) receiving (OUT)"]
  8757. pub struct RB_UEP4_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8758. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_RX_EN` writer - enable USB endpoint 4(8,12) receiving (OUT)"]
  8759. pub struct RB_UEP4_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8760. # [inline (always)]
  8761. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8762. # [inline (always)]
  8763. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8764. # [inline (always)]
  8765. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP1_BUF_MOD` reader - buffer mode of USB endpoint 1(9)"]
  8766. pub struct RB_UEP1_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8767. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_BUF_MOD` writer - buffer mode of USB endpoint 1(9)"]
  8768. pub struct RB_UEP1_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  8769. # [inline (always)]
  8770. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8771. # [inline (always)]
  8772. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8773. # [inline (always)]
  8774. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP1_TX_EN` reader - enable USB endpoint 1(9) transmittal (IN)"]
  8775. pub struct RB_UEP1_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8776. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_TX_EN` writer - enable USB endpoint 1(9) transmittal (IN)"]
  8777. pub struct RB_UEP1_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8778. # [inline (always)]
  8779. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8780. # [inline (always)]
  8781. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8782. # [inline (always)]
  8783. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP1_RX_EN` reader - enable USB endpoint 1(9) receiving (OUT)"]
  8784. pub struct RB_UEP1_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8785. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_RX_EN` writer - enable USB endpoint 1(9) receiving (OUT)"]
  8786. pub struct RB_UEP1_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8787. # [inline (always)]
  8788. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8789. # [inline (always)]
  8790. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8791. # [inline (always)]
  8792. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 4(8,12)"]
  8793. # [inline (always)]
  8794. pub fn rb_uep4_buf_mod (& self) -> RB_UEP4_BUF_MOD_R { RB_UEP4_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 4(8,12) transmittal (IN)"]
  8795. # [inline (always)]
  8796. pub fn rb_uep4_tx_en (& self) -> RB_UEP4_TX_EN_R { RB_UEP4_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 4(8,12) receiving (OUT)"]
  8797. # [inline (always)]
  8798. pub fn rb_uep4_rx_en (& self) -> RB_UEP4_RX_EN_R { RB_UEP4_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 1(9)"]
  8799. # [inline (always)]
  8800. pub fn rb_uep1_buf_mod (& self) -> RB_UEP1_BUF_MOD_R { RB_UEP1_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 1(9) transmittal (IN)"]
  8801. # [inline (always)]
  8802. pub fn rb_uep1_tx_en (& self) -> RB_UEP1_TX_EN_R { RB_UEP1_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 1(9) receiving (OUT)"]
  8803. # [inline (always)]
  8804. pub fn rb_uep1_rx_en (& self) -> RB_UEP1_RX_EN_R { RB_UEP1_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 4(8,12)"]
  8805. # [inline (always)]
  8806. pub fn rb_uep4_buf_mod (& mut self) -> RB_UEP4_BUF_MOD_W { RB_UEP4_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 4(8,12) transmittal (IN)"]
  8807. # [inline (always)]
  8808. pub fn rb_uep4_tx_en (& mut self) -> RB_UEP4_TX_EN_W { RB_UEP4_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 4(8,12) receiving (OUT)"]
  8809. # [inline (always)]
  8810. pub fn rb_uep4_rx_en (& mut self) -> RB_UEP4_RX_EN_W { RB_UEP4_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 1(9)"]
  8811. # [inline (always)]
  8812. pub fn rb_uep1_buf_mod (& mut self) -> RB_UEP1_BUF_MOD_W { RB_UEP1_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 1(9) transmittal (IN)"]
  8813. # [inline (always)]
  8814. pub fn rb_uep1_tx_en (& mut self) -> RB_UEP1_TX_EN_W { RB_UEP1_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 1(9) receiving (OUT)"]
  8815. # [inline (always)]
  8816. pub fn rb_uep1_rx_en (& mut self) -> RB_UEP1_RX_EN_W { RB_UEP1_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  8817. # [inline (always)]
  8818. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1(9) 4(8,12) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_1_mod](index.html) module"]
  8819. pub struct R8_UEP4_1_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP4_1_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_1_mod::R](R) reader structure"]
  8820. impl crate :: Readable for R8_UEP4_1_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_1_mod::W](W) writer structure"]
  8821. impl crate :: Writable for R8_UEP4_1_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_1_MOD to value 0"]
  8822. impl crate :: Resettable for R8_UEP4_1_MOD_SPEC { # [inline (always)]
  8823. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_3_MOD_R8_UH_EP_MOD register accessor: an alias for `Reg<R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC>`"]
  8824. pub type R8_UEP2_3_MOD_R8_UH_EP_MOD = crate :: Reg < r8_uep2_3_mod_r8_uh_ep_mod :: R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [doc = "endpoint 2(10) 3(11) mode and USB host endpoint mode control register"]
  8825. pub mod r8_uep2_3_mod_r8_uh_ep_mod { # [doc = "Register `R8_UEP2_3_MOD_R8_UH_EP_MOD` reader"]
  8826. pub struct R (crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [inline (always)]
  8827. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >> for R { # [inline (always)]
  8828. fn from (reader : crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_3_MOD_R8_UH_EP_MOD` writer"]
  8829. pub struct W (crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [inline (always)]
  8830. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8831. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >> for W { # [inline (always)]
  8832. fn from (writer : crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP2_BUF_MOD_RB_UH_RX_EN` reader - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
  8833. pub struct RB_UEP2_BUF_MOD_RB_UH_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_BUF_MOD_RB_UH_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8834. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_BUF_MOD_RB_UH_RX_EN` writer - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
  8835. pub struct RB_UEP2_BUF_MOD_RB_UH_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_BUF_MOD_RB_UH_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8836. # [inline (always)]
  8837. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8838. # [inline (always)]
  8839. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8840. # [inline (always)]
  8841. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP2_TX_EN` reader - enable USB endpoint 2(10) transmittal (IN)"]
  8842. pub struct RB_UEP2_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8843. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_TX_EN` writer - enable USB endpoint 2(10) transmittal (IN)"]
  8844. pub struct RB_UEP2_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8845. # [inline (always)]
  8846. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8847. # [inline (always)]
  8848. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8849. # [inline (always)]
  8850. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP2_RX_EN` reader - enable USB endpoint 2(10) receiving (OUT)"]
  8851. pub struct RB_UEP2_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8852. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_RX_EN` writer - enable USB endpoint 2(10) receiving (OUT)"]
  8853. pub struct RB_UEP2_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8854. # [inline (always)]
  8855. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8856. # [inline (always)]
  8857. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8858. # [inline (always)]
  8859. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP3_BUF_MOD` reader - buffer mode of USB endpoint 3(11)"]
  8860. pub struct RB_UEP3_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8861. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_BUF_MOD` writer - buffer mode of USB endpoint 3(11)"]
  8862. pub struct RB_UEP3_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  8863. # [inline (always)]
  8864. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8865. # [inline (always)]
  8866. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8867. # [inline (always)]
  8868. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP3_TX_EN_RB_UH_TX_EN` reader - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
  8869. pub struct RB_UEP3_TX_EN_RB_UH_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_TX_EN_RB_UH_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_TX_EN_RB_UH_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_TX_EN_RB_UH_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8870. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_TX_EN_RB_UH_TX_EN` writer - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
  8871. pub struct RB_UEP3_TX_EN_RB_UH_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_TX_EN_RB_UH_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8872. # [inline (always)]
  8873. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8874. # [inline (always)]
  8875. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8876. # [inline (always)]
  8877. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP3_RX_EN` reader - enable USB endpoint 3(11) receiving (OUT)"]
  8878. pub struct RB_UEP3_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8879. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_RX_EN` writer - enable USB endpoint 3(11) receiving (OUT)"]
  8880. pub struct RB_UEP3_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8881. # [inline (always)]
  8882. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8883. # [inline (always)]
  8884. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8885. # [inline (always)]
  8886. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
  8887. # [inline (always)]
  8888. pub fn rb_uep2_buf_mod_rb_uh_rx_en (& self) -> RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { RB_UEP2_BUF_MOD_RB_UH_RX_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 2(10) transmittal (IN)"]
  8889. # [inline (always)]
  8890. pub fn rb_uep2_tx_en (& self) -> RB_UEP2_TX_EN_R { RB_UEP2_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 2(10) receiving (OUT)"]
  8891. # [inline (always)]
  8892. pub fn rb_uep2_rx_en (& self) -> RB_UEP2_RX_EN_R { RB_UEP2_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 3(11)"]
  8893. # [inline (always)]
  8894. pub fn rb_uep3_buf_mod (& self) -> RB_UEP3_BUF_MOD_R { RB_UEP3_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
  8895. # [inline (always)]
  8896. pub fn rb_uep3_tx_en_rb_uh_tx_en (& self) -> RB_UEP3_TX_EN_RB_UH_TX_EN_R { RB_UEP3_TX_EN_RB_UH_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 3(11) receiving (OUT)"]
  8897. # [inline (always)]
  8898. pub fn rb_uep3_rx_en (& self) -> RB_UEP3_RX_EN_R { RB_UEP3_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
  8899. # [inline (always)]
  8900. pub fn rb_uep2_buf_mod_rb_uh_rx_en (& mut self) -> RB_UEP2_BUF_MOD_RB_UH_RX_EN_W { RB_UEP2_BUF_MOD_RB_UH_RX_EN_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 2(10) transmittal (IN)"]
  8901. # [inline (always)]
  8902. pub fn rb_uep2_tx_en (& mut self) -> RB_UEP2_TX_EN_W { RB_UEP2_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 2(10) receiving (OUT)"]
  8903. # [inline (always)]
  8904. pub fn rb_uep2_rx_en (& mut self) -> RB_UEP2_RX_EN_W { RB_UEP2_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 3(11)"]
  8905. # [inline (always)]
  8906. pub fn rb_uep3_buf_mod (& mut self) -> RB_UEP3_BUF_MOD_W { RB_UEP3_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
  8907. # [inline (always)]
  8908. pub fn rb_uep3_tx_en_rb_uh_tx_en (& mut self) -> RB_UEP3_TX_EN_RB_UH_TX_EN_W { RB_UEP3_TX_EN_RB_UH_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 3(11) receiving (OUT)"]
  8909. # [inline (always)]
  8910. pub fn rb_uep3_rx_en (& mut self) -> RB_UEP3_RX_EN_W { RB_UEP3_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  8911. # [inline (always)]
  8912. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2(10) 3(11) mode and USB host endpoint mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_3_mod_r8_uh_ep_mod](index.html) module"]
  8913. pub struct R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_3_mod_r8_uh_ep_mod::R](R) reader structure"]
  8914. impl crate :: Readable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_3_mod_r8_uh_ep_mod::W](W) writer structure"]
  8915. impl crate :: Writable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_3_MOD_R8_UH_EP_MOD to value 0"]
  8916. impl crate :: Resettable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { # [inline (always)]
  8917. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_6_MOD register accessor: an alias for `Reg<R8_UEP5_6_MOD_SPEC>`"]
  8918. pub type R8_UEP5_6_MOD = crate :: Reg < r8_uep5_6_mod :: R8_UEP5_6_MOD_SPEC > ; # [doc = "endpoint 5(13) 6(14) mode"]
  8919. pub mod r8_uep5_6_mod { # [doc = "Register `R8_UEP5_6_MOD` reader"]
  8920. pub struct R (crate :: R < R8_UEP5_6_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_6_MOD_SPEC > ; # [inline (always)]
  8921. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_6_MOD_SPEC >> for R { # [inline (always)]
  8922. fn from (reader : crate :: R < R8_UEP5_6_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_6_MOD` writer"]
  8923. pub struct W (crate :: W < R8_UEP5_6_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_6_MOD_SPEC > ; # [inline (always)]
  8924. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  8925. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_6_MOD_SPEC >> for W { # [inline (always)]
  8926. fn from (writer : crate :: W < R8_UEP5_6_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP5_BUF_MOD` reader - buffer mode of USB endpoint 5(13)"]
  8927. pub struct RB_UEP5_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8928. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_BUF_MOD` writer - buffer mode of USB endpoint 5(13)"]
  8929. pub struct RB_UEP5_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  8930. # [inline (always)]
  8931. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8932. # [inline (always)]
  8933. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8934. # [inline (always)]
  8935. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP5_TX_EN` reader - enable USB endpoint 5(13) transmittal (IN)"]
  8936. pub struct RB_UEP5_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8937. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_TX_EN` writer - enable USB endpoint 5(13) transmittal (IN)"]
  8938. pub struct RB_UEP5_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8939. # [inline (always)]
  8940. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8941. # [inline (always)]
  8942. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8943. # [inline (always)]
  8944. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP5_RX_EN` reader - enable USB endpoint 5(13) receiving (OUT)"]
  8945. pub struct RB_UEP5_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8946. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_RX_EN` writer - enable USB endpoint 5(13) receiving (OUT)"]
  8947. pub struct RB_UEP5_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8948. # [inline (always)]
  8949. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8950. # [inline (always)]
  8951. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8952. # [inline (always)]
  8953. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP6_BUF_MOD` reader - buffer mode of USB endpoint 6(14)"]
  8954. pub struct RB_UEP6_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8955. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_BUF_MOD` writer - buffer mode of USB endpoint 6(14)"]
  8956. pub struct RB_UEP6_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  8957. # [inline (always)]
  8958. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8959. # [inline (always)]
  8960. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8961. # [inline (always)]
  8962. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP6_TX_EN` reader - enable USB endpoint 6(14) transmittal (IN)"]
  8963. pub struct RB_UEP6_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8964. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_TX_EN` writer - enable USB endpoint 6(14) transmittal (IN)"]
  8965. pub struct RB_UEP6_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8966. # [inline (always)]
  8967. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8968. # [inline (always)]
  8969. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8970. # [inline (always)]
  8971. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP6_RX_EN` reader - enable USB endpoint 6(14) receiving (OUT)"]
  8972. pub struct RB_UEP6_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  8973. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_RX_EN` writer - enable USB endpoint 6(14) receiving (OUT)"]
  8974. pub struct RB_UEP6_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  8975. # [inline (always)]
  8976. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  8977. # [inline (always)]
  8978. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  8979. # [inline (always)]
  8980. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 5(13)"]
  8981. # [inline (always)]
  8982. pub fn rb_uep5_buf_mod (& self) -> RB_UEP5_BUF_MOD_R { RB_UEP5_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 5(13) transmittal (IN)"]
  8983. # [inline (always)]
  8984. pub fn rb_uep5_tx_en (& self) -> RB_UEP5_TX_EN_R { RB_UEP5_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 5(13) receiving (OUT)"]
  8985. # [inline (always)]
  8986. pub fn rb_uep5_rx_en (& self) -> RB_UEP5_RX_EN_R { RB_UEP5_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 6(14)"]
  8987. # [inline (always)]
  8988. pub fn rb_uep6_buf_mod (& self) -> RB_UEP6_BUF_MOD_R { RB_UEP6_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 6(14) transmittal (IN)"]
  8989. # [inline (always)]
  8990. pub fn rb_uep6_tx_en (& self) -> RB_UEP6_TX_EN_R { RB_UEP6_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 6(14) receiving (OUT)"]
  8991. # [inline (always)]
  8992. pub fn rb_uep6_rx_en (& self) -> RB_UEP6_RX_EN_R { RB_UEP6_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 5(13)"]
  8993. # [inline (always)]
  8994. pub fn rb_uep5_buf_mod (& mut self) -> RB_UEP5_BUF_MOD_W { RB_UEP5_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 5(13) transmittal (IN)"]
  8995. # [inline (always)]
  8996. pub fn rb_uep5_tx_en (& mut self) -> RB_UEP5_TX_EN_W { RB_UEP5_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 5(13) receiving (OUT)"]
  8997. # [inline (always)]
  8998. pub fn rb_uep5_rx_en (& mut self) -> RB_UEP5_RX_EN_W { RB_UEP5_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 6(14)"]
  8999. # [inline (always)]
  9000. pub fn rb_uep6_buf_mod (& mut self) -> RB_UEP6_BUF_MOD_W { RB_UEP6_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 6(14) transmittal (IN)"]
  9001. # [inline (always)]
  9002. pub fn rb_uep6_tx_en (& mut self) -> RB_UEP6_TX_EN_W { RB_UEP6_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 6(14) receiving (OUT)"]
  9003. # [inline (always)]
  9004. pub fn rb_uep6_rx_en (& mut self) -> RB_UEP6_RX_EN_W { RB_UEP6_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9005. # [inline (always)]
  9006. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5(13) 6(14) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_6_mod](index.html) module"]
  9007. pub struct R8_UEP5_6_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP5_6_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_6_mod::R](R) reader structure"]
  9008. impl crate :: Readable for R8_UEP5_6_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_6_mod::W](W) writer structure"]
  9009. impl crate :: Writable for R8_UEP5_6_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_6_MOD to value 0"]
  9010. impl crate :: Resettable for R8_UEP5_6_MOD_SPEC { # [inline (always)]
  9011. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_MOD register accessor: an alias for `Reg<R8_UEP7_MOD_SPEC>`"]
  9012. pub type R8_UEP7_MOD = crate :: Reg < r8_uep7_mod :: R8_UEP7_MOD_SPEC > ; # [doc = "endpoint 7(15) mode"]
  9013. pub mod r8_uep7_mod { # [doc = "Register `R8_UEP7_MOD` reader"]
  9014. pub struct R (crate :: R < R8_UEP7_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_MOD_SPEC > ; # [inline (always)]
  9015. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_MOD_SPEC >> for R { # [inline (always)]
  9016. fn from (reader : crate :: R < R8_UEP7_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_MOD` writer"]
  9017. pub struct W (crate :: W < R8_UEP7_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_MOD_SPEC > ; # [inline (always)]
  9018. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9019. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_MOD_SPEC >> for W { # [inline (always)]
  9020. fn from (writer : crate :: W < R8_UEP7_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP7_BUF_MOD` reader - buffer mode of USB endpoint 7(15)"]
  9021. pub struct RB_UEP7_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9022. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_BUF_MOD` writer - buffer mode of USB endpoint 7(15)"]
  9023. pub struct RB_UEP7_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
  9024. # [inline (always)]
  9025. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9026. # [inline (always)]
  9027. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9028. # [inline (always)]
  9029. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP7_TX_EN` reader - enable USB endpoint 7(15) transmittal (IN)"]
  9030. pub struct RB_UEP7_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9031. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_TX_EN` writer - enable USB endpoint 7(15) transmittal (IN)"]
  9032. pub struct RB_UEP7_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  9033. # [inline (always)]
  9034. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9035. # [inline (always)]
  9036. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9037. # [inline (always)]
  9038. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP7_RX_EN` reader - enable USB endpoint 7(15) receiving (OUT)"]
  9039. pub struct RB_UEP7_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9040. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_RX_EN` writer - enable USB endpoint 7(15) receiving (OUT)"]
  9041. pub struct RB_UEP7_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
  9042. # [inline (always)]
  9043. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9044. # [inline (always)]
  9045. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9046. # [inline (always)]
  9047. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 7(15)"]
  9048. # [inline (always)]
  9049. pub fn rb_uep7_buf_mod (& self) -> RB_UEP7_BUF_MOD_R { RB_UEP7_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 7(15) transmittal (IN)"]
  9050. # [inline (always)]
  9051. pub fn rb_uep7_tx_en (& self) -> RB_UEP7_TX_EN_R { RB_UEP7_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 7(15) receiving (OUT)"]
  9052. # [inline (always)]
  9053. pub fn rb_uep7_rx_en (& self) -> RB_UEP7_RX_EN_R { RB_UEP7_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 7(15)"]
  9054. # [inline (always)]
  9055. pub fn rb_uep7_buf_mod (& mut self) -> RB_UEP7_BUF_MOD_W { RB_UEP7_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 7(15) transmittal (IN)"]
  9056. # [inline (always)]
  9057. pub fn rb_uep7_tx_en (& mut self) -> RB_UEP7_TX_EN_W { RB_UEP7_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 7(15) receiving (OUT)"]
  9058. # [inline (always)]
  9059. pub fn rb_uep7_rx_en (& mut self) -> RB_UEP7_RX_EN_W { RB_UEP7_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9060. # [inline (always)]
  9061. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7(15) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_mod](index.html) module"]
  9062. pub struct R8_UEP7_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP7_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_mod::R](R) reader structure"]
  9063. impl crate :: Readable for R8_UEP7_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_mod::W](W) writer structure"]
  9064. impl crate :: Writable for R8_UEP7_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_MOD to value 0"]
  9065. impl crate :: Resettable for R8_UEP7_MOD_SPEC { # [inline (always)]
  9066. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP0_RT_DMA register accessor: an alias for `Reg<R32_UEP0_RT_DMA_SPEC>`"]
  9067. pub type R32_UEP0_RT_DMA = crate :: Reg < r32_uep0_rt_dma :: R32_UEP0_RT_DMA_SPEC > ; # [doc = "endpoint 0 DMA buffer address"]
  9068. pub mod r32_uep0_rt_dma { # [doc = "Register `R32_UEP0_RT_DMA` reader"]
  9069. pub struct R (crate :: R < R32_UEP0_RT_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP0_RT_DMA_SPEC > ; # [inline (always)]
  9070. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP0_RT_DMA_SPEC >> for R { # [inline (always)]
  9071. fn from (reader : crate :: R < R32_UEP0_RT_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP0_RT_DMA` writer"]
  9072. pub struct W (crate :: W < R32_UEP0_RT_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP0_RT_DMA_SPEC > ; # [inline (always)]
  9073. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9074. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP0_RT_DMA_SPEC >> for W { # [inline (always)]
  9075. fn from (writer : crate :: W < R32_UEP0_RT_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_RT_DMA` reader - endpoint 0 DMA buffer address"]
  9076. pub struct UEP0_RT_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP0_RT_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP0_RT_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_RT_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9077. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_RT_DMA` writer - endpoint 0 DMA buffer address"]
  9078. pub struct UEP0_RT_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_RT_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9079. # [inline (always)]
  9080. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 0 DMA buffer address"]
  9081. # [inline (always)]
  9082. pub fn uep0_rt_dma (& self) -> UEP0_RT_DMA_R { UEP0_RT_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 0 DMA buffer address"]
  9083. # [inline (always)]
  9084. pub fn uep0_rt_dma (& mut self) -> UEP0_RT_DMA_W { UEP0_RT_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9085. # [inline (always)]
  9086. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep0_rt_dma](index.html) module"]
  9087. pub struct R32_UEP0_RT_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP0_RT_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep0_rt_dma::R](R) reader structure"]
  9088. impl crate :: Readable for R32_UEP0_RT_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep0_rt_dma::W](W) writer structure"]
  9089. impl crate :: Writable for R32_UEP0_RT_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP0_RT_DMA to value 0"]
  9090. impl crate :: Resettable for R32_UEP0_RT_DMA_SPEC { # [inline (always)]
  9091. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP1_RX_DMA register accessor: an alias for `Reg<R32_UEP1_RX_DMA_SPEC>`"]
  9092. pub type R32_UEP1_RX_DMA = crate :: Reg < r32_uep1_rx_dma :: R32_UEP1_RX_DMA_SPEC > ; # [doc = "endpoint 1 DMA buffer address"]
  9093. pub mod r32_uep1_rx_dma { # [doc = "Register `R32_UEP1_RX_DMA` reader"]
  9094. pub struct R (crate :: R < R32_UEP1_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP1_RX_DMA_SPEC > ; # [inline (always)]
  9095. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP1_RX_DMA_SPEC >> for R { # [inline (always)]
  9096. fn from (reader : crate :: R < R32_UEP1_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP1_RX_DMA` writer"]
  9097. pub struct W (crate :: W < R32_UEP1_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP1_RX_DMA_SPEC > ; # [inline (always)]
  9098. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9099. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP1_RX_DMA_SPEC >> for W { # [inline (always)]
  9100. fn from (writer : crate :: W < R32_UEP1_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_RX_DMA` reader - endpoint 1 DMA buffer address"]
  9101. pub struct UEP1_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP1_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP1_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9102. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_RX_DMA` writer - endpoint 1 DMA buffer address"]
  9103. pub struct UEP1_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9104. # [inline (always)]
  9105. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 1 DMA buffer address"]
  9106. # [inline (always)]
  9107. pub fn uep1_rx_dma (& self) -> UEP1_RX_DMA_R { UEP1_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 1 DMA buffer address"]
  9108. # [inline (always)]
  9109. pub fn uep1_rx_dma (& mut self) -> UEP1_RX_DMA_W { UEP1_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9110. # [inline (always)]
  9111. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep1_rx_dma](index.html) module"]
  9112. pub struct R32_UEP1_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP1_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep1_rx_dma::R](R) reader structure"]
  9113. impl crate :: Readable for R32_UEP1_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep1_rx_dma::W](W) writer structure"]
  9114. impl crate :: Writable for R32_UEP1_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP1_RX_DMA to value 0"]
  9115. impl crate :: Resettable for R32_UEP1_RX_DMA_SPEC { # [inline (always)]
  9116. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP2_RX_DMA_R32_UH_RX_DMA register accessor: an alias for `Reg<R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC>`"]
  9117. pub type R32_UEP2_RX_DMA_R32_UH_RX_DMA = crate :: Reg < r32_uep2_rx_dma_r32_uh_rx_dma :: R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [doc = "endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  9118. pub mod r32_uep2_rx_dma_r32_uh_rx_dma { # [doc = "Register `R32_UEP2_RX_DMA_R32_UH_RX_DMA` reader"]
  9119. pub struct R (crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [inline (always)]
  9120. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >> for R { # [inline (always)]
  9121. fn from (reader : crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP2_RX_DMA_R32_UH_RX_DMA` writer"]
  9122. pub struct W (crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [inline (always)]
  9123. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9124. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >> for W { # [inline (always)]
  9125. fn from (writer : crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_RX_DMA_UH_RX_DMA` reader - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  9126. pub struct UEP2_RX_DMA_UH_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP2_RX_DMA_UH_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP2_RX_DMA_UH_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_RX_DMA_UH_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9127. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_RX_DMA_UH_RX_DMA` writer - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  9128. pub struct UEP2_RX_DMA_UH_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_RX_DMA_UH_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9129. # [inline (always)]
  9130. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  9131. # [inline (always)]
  9132. pub fn uep2_rx_dma_uh_rx_dma (& self) -> UEP2_RX_DMA_UH_RX_DMA_R { UEP2_RX_DMA_UH_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
  9133. # [inline (always)]
  9134. pub fn uep2_rx_dma_uh_rx_dma (& mut self) -> UEP2_RX_DMA_UH_RX_DMA_W { UEP2_RX_DMA_UH_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9135. # [inline (always)]
  9136. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 DMA buffer address _ host rx endpoint buffer start address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep2_rx_dma_r32_uh_rx_dma](index.html) module"]
  9137. pub struct R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep2_rx_dma_r32_uh_rx_dma::R](R) reader structure"]
  9138. impl crate :: Readable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep2_rx_dma_r32_uh_rx_dma::W](W) writer structure"]
  9139. impl crate :: Writable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP2_RX_DMA_R32_UH_RX_DMA to value 0"]
  9140. impl crate :: Resettable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { # [inline (always)]
  9141. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP3_RX_DMA register accessor: an alias for `Reg<R32_UEP3_RX_DMA_SPEC>`"]
  9142. pub type R32_UEP3_RX_DMA = crate :: Reg < r32_uep3_rx_dma :: R32_UEP3_RX_DMA_SPEC > ; # [doc = "endpoint 3 DMA buffer address;host tx endpoint buffer high address"]
  9143. pub mod r32_uep3_rx_dma { # [doc = "Register `R32_UEP3_RX_DMA` reader"]
  9144. pub struct R (crate :: R < R32_UEP3_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP3_RX_DMA_SPEC > ; # [inline (always)]
  9145. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP3_RX_DMA_SPEC >> for R { # [inline (always)]
  9146. fn from (reader : crate :: R < R32_UEP3_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP3_RX_DMA` writer"]
  9147. pub struct W (crate :: W < R32_UEP3_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP3_RX_DMA_SPEC > ; # [inline (always)]
  9148. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9149. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP3_RX_DMA_SPEC >> for W { # [inline (always)]
  9150. fn from (writer : crate :: W < R32_UEP3_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_RX_DMA` reader - endpoint 3 DMA buffer address"]
  9151. pub struct UEP3_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP3_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP3_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9152. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_RX_DMA` writer - endpoint 3 DMA buffer address"]
  9153. pub struct UEP3_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9154. # [inline (always)]
  9155. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 3 DMA buffer address"]
  9156. # [inline (always)]
  9157. pub fn uep3_rx_dma (& self) -> UEP3_RX_DMA_R { UEP3_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 3 DMA buffer address"]
  9158. # [inline (always)]
  9159. pub fn uep3_rx_dma (& mut self) -> UEP3_RX_DMA_W { UEP3_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9160. # [inline (always)]
  9161. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 DMA buffer address;host tx endpoint buffer high address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep3_rx_dma](index.html) module"]
  9162. pub struct R32_UEP3_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP3_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep3_rx_dma::R](R) reader structure"]
  9163. impl crate :: Readable for R32_UEP3_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep3_rx_dma::W](W) writer structure"]
  9164. impl crate :: Writable for R32_UEP3_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP3_RX_DMA to value 0"]
  9165. impl crate :: Resettable for R32_UEP3_RX_DMA_SPEC { # [inline (always)]
  9166. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP4_RX_DMA register accessor: an alias for `Reg<R32_UEP4_RX_DMA_SPEC>`"]
  9167. pub type R32_UEP4_RX_DMA = crate :: Reg < r32_uep4_rx_dma :: R32_UEP4_RX_DMA_SPEC > ; # [doc = "endpoint 4 DMA buffer address"]
  9168. pub mod r32_uep4_rx_dma { # [doc = "Register `R32_UEP4_RX_DMA` reader"]
  9169. pub struct R (crate :: R < R32_UEP4_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP4_RX_DMA_SPEC > ; # [inline (always)]
  9170. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP4_RX_DMA_SPEC >> for R { # [inline (always)]
  9171. fn from (reader : crate :: R < R32_UEP4_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP4_RX_DMA` writer"]
  9172. pub struct W (crate :: W < R32_UEP4_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP4_RX_DMA_SPEC > ; # [inline (always)]
  9173. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9174. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP4_RX_DMA_SPEC >> for W { # [inline (always)]
  9175. fn from (writer : crate :: W < R32_UEP4_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_RX_DMA` reader - endpoint 4 DMA buffer address"]
  9176. pub struct UEP4_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP4_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP4_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9177. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_RX_DMA` writer - endpoint 4 DMA buffer address"]
  9178. pub struct UEP4_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9179. # [inline (always)]
  9180. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 4 DMA buffer address"]
  9181. # [inline (always)]
  9182. pub fn uep4_rx_dma (& self) -> UEP4_RX_DMA_R { UEP4_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 4 DMA buffer address"]
  9183. # [inline (always)]
  9184. pub fn uep4_rx_dma (& mut self) -> UEP4_RX_DMA_W { UEP4_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9185. # [inline (always)]
  9186. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep4_rx_dma](index.html) module"]
  9187. pub struct R32_UEP4_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP4_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep4_rx_dma::R](R) reader structure"]
  9188. impl crate :: Readable for R32_UEP4_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep4_rx_dma::W](W) writer structure"]
  9189. impl crate :: Writable for R32_UEP4_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP4_RX_DMA to value 0"]
  9190. impl crate :: Resettable for R32_UEP4_RX_DMA_SPEC { # [inline (always)]
  9191. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP5_RX_DMA register accessor: an alias for `Reg<R32_UEP5_RX_DMA_SPEC>`"]
  9192. pub type R32_UEP5_RX_DMA = crate :: Reg < r32_uep5_rx_dma :: R32_UEP5_RX_DMA_SPEC > ; # [doc = "endpoint 5 DMA buffer address"]
  9193. pub mod r32_uep5_rx_dma { # [doc = "Register `R32_UEP5_RX_DMA` reader"]
  9194. pub struct R (crate :: R < R32_UEP5_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP5_RX_DMA_SPEC > ; # [inline (always)]
  9195. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP5_RX_DMA_SPEC >> for R { # [inline (always)]
  9196. fn from (reader : crate :: R < R32_UEP5_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP5_RX_DMA` writer"]
  9197. pub struct W (crate :: W < R32_UEP5_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP5_RX_DMA_SPEC > ; # [inline (always)]
  9198. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9199. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP5_RX_DMA_SPEC >> for W { # [inline (always)]
  9200. fn from (writer : crate :: W < R32_UEP5_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_RX_DMA` reader - endpoint 5 DMA buffer address"]
  9201. pub struct UEP5_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP5_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP5_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9202. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_RX_DMA` writer - endpoint 5 DMA buffer address"]
  9203. pub struct UEP5_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9204. # [inline (always)]
  9205. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 5 DMA buffer address"]
  9206. # [inline (always)]
  9207. pub fn uep5_rx_dma (& self) -> UEP5_RX_DMA_R { UEP5_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 5 DMA buffer address"]
  9208. # [inline (always)]
  9209. pub fn uep5_rx_dma (& mut self) -> UEP5_RX_DMA_W { UEP5_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9210. # [inline (always)]
  9211. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep5_rx_dma](index.html) module"]
  9212. pub struct R32_UEP5_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP5_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep5_rx_dma::R](R) reader structure"]
  9213. impl crate :: Readable for R32_UEP5_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep5_rx_dma::W](W) writer structure"]
  9214. impl crate :: Writable for R32_UEP5_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP5_RX_DMA to value 0"]
  9215. impl crate :: Resettable for R32_UEP5_RX_DMA_SPEC { # [inline (always)]
  9216. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP6_RX_DMA register accessor: an alias for `Reg<R32_UEP6_RX_DMA_SPEC>`"]
  9217. pub type R32_UEP6_RX_DMA = crate :: Reg < r32_uep6_rx_dma :: R32_UEP6_RX_DMA_SPEC > ; # [doc = "endpoint 6 DMA buffer address"]
  9218. pub mod r32_uep6_rx_dma { # [doc = "Register `R32_UEP6_RX_DMA` reader"]
  9219. pub struct R (crate :: R < R32_UEP6_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP6_RX_DMA_SPEC > ; # [inline (always)]
  9220. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP6_RX_DMA_SPEC >> for R { # [inline (always)]
  9221. fn from (reader : crate :: R < R32_UEP6_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP6_RX_DMA` writer"]
  9222. pub struct W (crate :: W < R32_UEP6_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP6_RX_DMA_SPEC > ; # [inline (always)]
  9223. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9224. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP6_RX_DMA_SPEC >> for W { # [inline (always)]
  9225. fn from (writer : crate :: W < R32_UEP6_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_RX_DMA` reader - endpoint 6 DMA buffer address"]
  9226. pub struct UEP6_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP6_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP6_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9227. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_RX_DMA` writer - endpoint 6 DMA buffer address"]
  9228. pub struct UEP6_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9229. # [inline (always)]
  9230. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 6 DMA buffer address"]
  9231. # [inline (always)]
  9232. pub fn uep6_rx_dma (& self) -> UEP6_RX_DMA_R { UEP6_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 6 DMA buffer address"]
  9233. # [inline (always)]
  9234. pub fn uep6_rx_dma (& mut self) -> UEP6_RX_DMA_W { UEP6_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9235. # [inline (always)]
  9236. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep6_rx_dma](index.html) module"]
  9237. pub struct R32_UEP6_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP6_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep6_rx_dma::R](R) reader structure"]
  9238. impl crate :: Readable for R32_UEP6_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep6_rx_dma::W](W) writer structure"]
  9239. impl crate :: Writable for R32_UEP6_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP6_RX_DMA to value 0"]
  9240. impl crate :: Resettable for R32_UEP6_RX_DMA_SPEC { # [inline (always)]
  9241. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP7_RX_DMA register accessor: an alias for `Reg<R32_UEP7_RX_DMA_SPEC>`"]
  9242. pub type R32_UEP7_RX_DMA = crate :: Reg < r32_uep7_rx_dma :: R32_UEP7_RX_DMA_SPEC > ; # [doc = "endpoint 7 DMA buffer address"]
  9243. pub mod r32_uep7_rx_dma { # [doc = "Register `R32_UEP7_RX_DMA` reader"]
  9244. pub struct R (crate :: R < R32_UEP7_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP7_RX_DMA_SPEC > ; # [inline (always)]
  9245. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP7_RX_DMA_SPEC >> for R { # [inline (always)]
  9246. fn from (reader : crate :: R < R32_UEP7_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP7_RX_DMA` writer"]
  9247. pub struct W (crate :: W < R32_UEP7_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP7_RX_DMA_SPEC > ; # [inline (always)]
  9248. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9249. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP7_RX_DMA_SPEC >> for W { # [inline (always)]
  9250. fn from (writer : crate :: W < R32_UEP7_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_RX_DMA` reader - endpoint 7 DMA buffer address"]
  9251. pub struct UEP7_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP7_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP7_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9252. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_RX_DMA` writer - endpoint 7 DMA buffer address"]
  9253. pub struct UEP7_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9254. # [inline (always)]
  9255. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 7 DMA buffer address"]
  9256. # [inline (always)]
  9257. pub fn uep7_rx_dma (& self) -> UEP7_RX_DMA_R { UEP7_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 7 DMA buffer address"]
  9258. # [inline (always)]
  9259. pub fn uep7_rx_dma (& mut self) -> UEP7_RX_DMA_W { UEP7_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9260. # [inline (always)]
  9261. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep7_rx_dma](index.html) module"]
  9262. pub struct R32_UEP7_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP7_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep7_rx_dma::R](R) reader structure"]
  9263. impl crate :: Readable for R32_UEP7_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep7_rx_dma::W](W) writer structure"]
  9264. impl crate :: Writable for R32_UEP7_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP7_RX_DMA to value 0"]
  9265. impl crate :: Resettable for R32_UEP7_RX_DMA_SPEC { # [inline (always)]
  9266. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP1_TX_DMA register accessor: an alias for `Reg<R32_UEP1_TX_DMA_SPEC>`"]
  9267. pub type R32_UEP1_TX_DMA = crate :: Reg < r32_uep1_tx_dma :: R32_UEP1_TX_DMA_SPEC > ; # [doc = "endpoint 1 DMA TX buffer address"]
  9268. pub mod r32_uep1_tx_dma { # [doc = "Register `R32_UEP1_TX_DMA` reader"]
  9269. pub struct R (crate :: R < R32_UEP1_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP1_TX_DMA_SPEC > ; # [inline (always)]
  9270. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP1_TX_DMA_SPEC >> for R { # [inline (always)]
  9271. fn from (reader : crate :: R < R32_UEP1_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP1_TX_DMA` writer"]
  9272. pub struct W (crate :: W < R32_UEP1_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP1_TX_DMA_SPEC > ; # [inline (always)]
  9273. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9274. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP1_TX_DMA_SPEC >> for W { # [inline (always)]
  9275. fn from (writer : crate :: W < R32_UEP1_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_TX_DMA` reader - endpoint 1 DMA TX buffer address"]
  9276. pub struct UEP1_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP1_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP1_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9277. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_TX_DMA` writer - endpoint 1 DMA TX buffer address"]
  9278. pub struct UEP1_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9279. # [inline (always)]
  9280. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 1 DMA TX buffer address"]
  9281. # [inline (always)]
  9282. pub fn uep1_tx_dma (& self) -> UEP1_TX_DMA_R { UEP1_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 1 DMA TX buffer address"]
  9283. # [inline (always)]
  9284. pub fn uep1_tx_dma (& mut self) -> UEP1_TX_DMA_W { UEP1_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9285. # [inline (always)]
  9286. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep1_tx_dma](index.html) module"]
  9287. pub struct R32_UEP1_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP1_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep1_tx_dma::R](R) reader structure"]
  9288. impl crate :: Readable for R32_UEP1_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep1_tx_dma::W](W) writer structure"]
  9289. impl crate :: Writable for R32_UEP1_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP1_TX_DMA to value 0"]
  9290. impl crate :: Resettable for R32_UEP1_TX_DMA_SPEC { # [inline (always)]
  9291. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP2_TX_DMA register accessor: an alias for `Reg<R32_UEP2_TX_DMA_SPEC>`"]
  9292. pub type R32_UEP2_TX_DMA = crate :: Reg < r32_uep2_tx_dma :: R32_UEP2_TX_DMA_SPEC > ; # [doc = "endpoint 2 DMA TX buffer address"]
  9293. pub mod r32_uep2_tx_dma { # [doc = "Register `R32_UEP2_TX_DMA` reader"]
  9294. pub struct R (crate :: R < R32_UEP2_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP2_TX_DMA_SPEC > ; # [inline (always)]
  9295. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP2_TX_DMA_SPEC >> for R { # [inline (always)]
  9296. fn from (reader : crate :: R < R32_UEP2_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP2_TX_DMA` writer"]
  9297. pub struct W (crate :: W < R32_UEP2_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP2_TX_DMA_SPEC > ; # [inline (always)]
  9298. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9299. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP2_TX_DMA_SPEC >> for W { # [inline (always)]
  9300. fn from (writer : crate :: W < R32_UEP2_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_TX_DMA` reader - endpoint 2 DMA TX buffer address"]
  9301. pub struct UEP2_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP2_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP2_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9302. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_TX_DMA` writer - endpoint 2 DMA TX buffer address"]
  9303. pub struct UEP2_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9304. # [inline (always)]
  9305. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 2 DMA TX buffer address"]
  9306. # [inline (always)]
  9307. pub fn uep2_tx_dma (& self) -> UEP2_TX_DMA_R { UEP2_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 2 DMA TX buffer address"]
  9308. # [inline (always)]
  9309. pub fn uep2_tx_dma (& mut self) -> UEP2_TX_DMA_W { UEP2_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9310. # [inline (always)]
  9311. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep2_tx_dma](index.html) module"]
  9312. pub struct R32_UEP2_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP2_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep2_tx_dma::R](R) reader structure"]
  9313. impl crate :: Readable for R32_UEP2_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep2_tx_dma::W](W) writer structure"]
  9314. impl crate :: Writable for R32_UEP2_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP2_TX_DMA to value 0"]
  9315. impl crate :: Resettable for R32_UEP2_TX_DMA_SPEC { # [inline (always)]
  9316. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP3_TX_DMA_R32_UH_TX_DMA register accessor: an alias for `Reg<R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC>`"]
  9317. pub type R32_UEP3_TX_DMA_R32_UH_TX_DMA = crate :: Reg < r32_uep3_tx_dma_r32_uh_tx_dma :: R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [doc = "endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  9318. pub mod r32_uep3_tx_dma_r32_uh_tx_dma { # [doc = "Register `R32_UEP3_TX_DMA_R32_UH_TX_DMA` reader"]
  9319. pub struct R (crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [inline (always)]
  9320. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >> for R { # [inline (always)]
  9321. fn from (reader : crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP3_TX_DMA_R32_UH_TX_DMA` writer"]
  9322. pub struct W (crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [inline (always)]
  9323. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9324. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >> for W { # [inline (always)]
  9325. fn from (writer : crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_TX_DMA_UH_TX_DMA` reader - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  9326. pub struct UEP3_TX_DMA_UH_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP3_TX_DMA_UH_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP3_TX_DMA_UH_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_TX_DMA_UH_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9327. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_TX_DMA_UH_TX_DMA` writer - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  9328. pub struct UEP3_TX_DMA_UH_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_TX_DMA_UH_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9329. # [inline (always)]
  9330. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  9331. # [inline (always)]
  9332. pub fn uep3_tx_dma_uh_tx_dma (& self) -> UEP3_TX_DMA_UH_TX_DMA_R { UEP3_TX_DMA_UH_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
  9333. # [inline (always)]
  9334. pub fn uep3_tx_dma_uh_tx_dma (& mut self) -> UEP3_TX_DMA_UH_TX_DMA_W { UEP3_TX_DMA_UH_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9335. # [inline (always)]
  9336. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 DMA TX buffer address and host tx endpoint buffer start address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep3_tx_dma_r32_uh_tx_dma](index.html) module"]
  9337. pub struct R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep3_tx_dma_r32_uh_tx_dma::R](R) reader structure"]
  9338. impl crate :: Readable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep3_tx_dma_r32_uh_tx_dma::W](W) writer structure"]
  9339. impl crate :: Writable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP3_TX_DMA_R32_UH_TX_DMA to value 0"]
  9340. impl crate :: Resettable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { # [inline (always)]
  9341. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP4_TX_DMA register accessor: an alias for `Reg<R32_UEP4_TX_DMA_SPEC>`"]
  9342. pub type R32_UEP4_TX_DMA = crate :: Reg < r32_uep4_tx_dma :: R32_UEP4_TX_DMA_SPEC > ; # [doc = "endpoint 4 DMA TX buffer address"]
  9343. pub mod r32_uep4_tx_dma { # [doc = "Register `R32_UEP4_TX_DMA` reader"]
  9344. pub struct R (crate :: R < R32_UEP4_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP4_TX_DMA_SPEC > ; # [inline (always)]
  9345. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP4_TX_DMA_SPEC >> for R { # [inline (always)]
  9346. fn from (reader : crate :: R < R32_UEP4_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP4_TX_DMA` writer"]
  9347. pub struct W (crate :: W < R32_UEP4_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP4_TX_DMA_SPEC > ; # [inline (always)]
  9348. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9349. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP4_TX_DMA_SPEC >> for W { # [inline (always)]
  9350. fn from (writer : crate :: W < R32_UEP4_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_TX_DMA` reader - endpoint 4 DMA TX buffer address"]
  9351. pub struct UEP4_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP4_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP4_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9352. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_TX_DMA` writer - endpoint 4 DMA TX buffer address"]
  9353. pub struct UEP4_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9354. # [inline (always)]
  9355. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 4 DMA TX buffer address"]
  9356. # [inline (always)]
  9357. pub fn uep4_tx_dma (& self) -> UEP4_TX_DMA_R { UEP4_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 4 DMA TX buffer address"]
  9358. # [inline (always)]
  9359. pub fn uep4_tx_dma (& mut self) -> UEP4_TX_DMA_W { UEP4_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9360. # [inline (always)]
  9361. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep4_tx_dma](index.html) module"]
  9362. pub struct R32_UEP4_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP4_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep4_tx_dma::R](R) reader structure"]
  9363. impl crate :: Readable for R32_UEP4_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep4_tx_dma::W](W) writer structure"]
  9364. impl crate :: Writable for R32_UEP4_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP4_TX_DMA to value 0"]
  9365. impl crate :: Resettable for R32_UEP4_TX_DMA_SPEC { # [inline (always)]
  9366. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP5_TX_DMA register accessor: an alias for `Reg<R32_UEP5_TX_DMA_SPEC>`"]
  9367. pub type R32_UEP5_TX_DMA = crate :: Reg < r32_uep5_tx_dma :: R32_UEP5_TX_DMA_SPEC > ; # [doc = "endpoint 5 DMA TX buffer address"]
  9368. pub mod r32_uep5_tx_dma { # [doc = "Register `R32_UEP5_TX_DMA` reader"]
  9369. pub struct R (crate :: R < R32_UEP5_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP5_TX_DMA_SPEC > ; # [inline (always)]
  9370. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP5_TX_DMA_SPEC >> for R { # [inline (always)]
  9371. fn from (reader : crate :: R < R32_UEP5_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP5_TX_DMA` writer"]
  9372. pub struct W (crate :: W < R32_UEP5_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP5_TX_DMA_SPEC > ; # [inline (always)]
  9373. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9374. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP5_TX_DMA_SPEC >> for W { # [inline (always)]
  9375. fn from (writer : crate :: W < R32_UEP5_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_TX_DMA` reader - endpoint 5 DMA TX buffer address"]
  9376. pub struct UEP5_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP5_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP5_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9377. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_TX_DMA` writer - endpoint 5 DMA TX buffer address"]
  9378. pub struct UEP5_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9379. # [inline (always)]
  9380. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 5 DMA TX buffer address"]
  9381. # [inline (always)]
  9382. pub fn uep5_tx_dma (& self) -> UEP5_TX_DMA_R { UEP5_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 5 DMA TX buffer address"]
  9383. # [inline (always)]
  9384. pub fn uep5_tx_dma (& mut self) -> UEP5_TX_DMA_W { UEP5_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9385. # [inline (always)]
  9386. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep5_tx_dma](index.html) module"]
  9387. pub struct R32_UEP5_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP5_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep5_tx_dma::R](R) reader structure"]
  9388. impl crate :: Readable for R32_UEP5_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep5_tx_dma::W](W) writer structure"]
  9389. impl crate :: Writable for R32_UEP5_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP5_TX_DMA to value 0"]
  9390. impl crate :: Resettable for R32_UEP5_TX_DMA_SPEC { # [inline (always)]
  9391. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP6_TX_DMA register accessor: an alias for `Reg<R32_UEP6_TX_DMA_SPEC>`"]
  9392. pub type R32_UEP6_TX_DMA = crate :: Reg < r32_uep6_tx_dma :: R32_UEP6_TX_DMA_SPEC > ; # [doc = "endpoint 4 DMA TX buffer address"]
  9393. pub mod r32_uep6_tx_dma { # [doc = "Register `R32_UEP6_TX_DMA` reader"]
  9394. pub struct R (crate :: R < R32_UEP6_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP6_TX_DMA_SPEC > ; # [inline (always)]
  9395. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP6_TX_DMA_SPEC >> for R { # [inline (always)]
  9396. fn from (reader : crate :: R < R32_UEP6_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP6_TX_DMA` writer"]
  9397. pub struct W (crate :: W < R32_UEP6_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP6_TX_DMA_SPEC > ; # [inline (always)]
  9398. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9399. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP6_TX_DMA_SPEC >> for W { # [inline (always)]
  9400. fn from (writer : crate :: W < R32_UEP6_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_TX_DMA` reader - endpoint 6 DMA TX buffer address"]
  9401. pub struct UEP6_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP6_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP6_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9402. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_TX_DMA` writer - endpoint 6 DMA TX buffer address"]
  9403. pub struct UEP6_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9404. # [inline (always)]
  9405. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 6 DMA TX buffer address"]
  9406. # [inline (always)]
  9407. pub fn uep6_tx_dma (& self) -> UEP6_TX_DMA_R { UEP6_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 6 DMA TX buffer address"]
  9408. # [inline (always)]
  9409. pub fn uep6_tx_dma (& mut self) -> UEP6_TX_DMA_W { UEP6_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9410. # [inline (always)]
  9411. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep6_tx_dma](index.html) module"]
  9412. pub struct R32_UEP6_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP6_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep6_tx_dma::R](R) reader structure"]
  9413. impl crate :: Readable for R32_UEP6_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep6_tx_dma::W](W) writer structure"]
  9414. impl crate :: Writable for R32_UEP6_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP6_TX_DMA to value 0"]
  9415. impl crate :: Resettable for R32_UEP6_TX_DMA_SPEC { # [inline (always)]
  9416. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP7_TX_DMA register accessor: an alias for `Reg<R32_UEP7_TX_DMA_SPEC>`"]
  9417. pub type R32_UEP7_TX_DMA = crate :: Reg < r32_uep7_tx_dma :: R32_UEP7_TX_DMA_SPEC > ; # [doc = "endpoint 7 DMA TX buffer address"]
  9418. pub mod r32_uep7_tx_dma { # [doc = "Register `R32_UEP7_TX_DMA` reader"]
  9419. pub struct R (crate :: R < R32_UEP7_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP7_TX_DMA_SPEC > ; # [inline (always)]
  9420. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP7_TX_DMA_SPEC >> for R { # [inline (always)]
  9421. fn from (reader : crate :: R < R32_UEP7_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP7_TX_DMA` writer"]
  9422. pub struct W (crate :: W < R32_UEP7_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP7_TX_DMA_SPEC > ; # [inline (always)]
  9423. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9424. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP7_TX_DMA_SPEC >> for W { # [inline (always)]
  9425. fn from (writer : crate :: W < R32_UEP7_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_TX_DMA` reader - endpoint 7 DMA TX buffer address"]
  9426. pub struct UEP7_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP7_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP7_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  9427. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_TX_DMA` writer - endpoint 7 DMA TX buffer address"]
  9428. pub struct UEP7_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9429. # [inline (always)]
  9430. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 7 DMA TX buffer address"]
  9431. # [inline (always)]
  9432. pub fn uep7_tx_dma (& self) -> UEP7_TX_DMA_R { UEP7_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 7 DMA TX buffer address"]
  9433. # [inline (always)]
  9434. pub fn uep7_tx_dma (& mut self) -> UEP7_TX_DMA_W { UEP7_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
  9435. # [inline (always)]
  9436. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep7_tx_dma](index.html) module"]
  9437. pub struct R32_UEP7_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP7_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep7_tx_dma::R](R) reader structure"]
  9438. impl crate :: Readable for R32_UEP7_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep7_tx_dma::W](W) writer structure"]
  9439. impl crate :: Writable for R32_UEP7_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP7_TX_DMA to value 0"]
  9440. impl crate :: Resettable for R32_UEP7_TX_DMA_SPEC { # [inline (always)]
  9441. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP0_MAX_LEN register accessor: an alias for `Reg<R16_UEP0_MAX_LEN_SPEC>`"]
  9442. pub type R16_UEP0_MAX_LEN = crate :: Reg < r16_uep0_max_len :: R16_UEP0_MAX_LEN_SPEC > ; # [doc = "endpoint 0 receive max length"]
  9443. pub mod r16_uep0_max_len { # [doc = "Register `R16_UEP0_MAX_LEN` reader"]
  9444. pub struct R (crate :: R < R16_UEP0_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP0_MAX_LEN_SPEC > ; # [inline (always)]
  9445. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP0_MAX_LEN_SPEC >> for R { # [inline (always)]
  9446. fn from (reader : crate :: R < R16_UEP0_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP0_MAX_LEN` writer"]
  9447. pub struct W (crate :: W < R16_UEP0_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP0_MAX_LEN_SPEC > ; # [inline (always)]
  9448. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9449. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP0_MAX_LEN_SPEC >> for W { # [inline (always)]
  9450. fn from (writer : crate :: W < R16_UEP0_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_MAX_LEN` reader - endpoint 0 receive max length"]
  9451. pub struct UEP0_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP0_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP0_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9452. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_MAX_LEN` writer - endpoint 0 receive max length"]
  9453. pub struct UEP0_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9454. # [inline (always)]
  9455. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 0 receive max length"]
  9456. # [inline (always)]
  9457. pub fn uep0_max_len (& self) -> UEP0_MAX_LEN_R { UEP0_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 0 receive max length"]
  9458. # [inline (always)]
  9459. pub fn uep0_max_len (& mut self) -> UEP0_MAX_LEN_W { UEP0_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9460. # [inline (always)]
  9461. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep0_max_len](index.html) module"]
  9462. pub struct R16_UEP0_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP0_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep0_max_len::R](R) reader structure"]
  9463. impl crate :: Readable for R16_UEP0_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep0_max_len::W](W) writer structure"]
  9464. impl crate :: Writable for R16_UEP0_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP0_MAX_LEN to value 0"]
  9465. impl crate :: Resettable for R16_UEP0_MAX_LEN_SPEC { # [inline (always)]
  9466. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP1_MAX_LEN register accessor: an alias for `Reg<R16_UEP1_MAX_LEN_SPEC>`"]
  9467. pub type R16_UEP1_MAX_LEN = crate :: Reg < r16_uep1_max_len :: R16_UEP1_MAX_LEN_SPEC > ; # [doc = "endpoint 1 receive max length"]
  9468. pub mod r16_uep1_max_len { # [doc = "Register `R16_UEP1_MAX_LEN` reader"]
  9469. pub struct R (crate :: R < R16_UEP1_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP1_MAX_LEN_SPEC > ; # [inline (always)]
  9470. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP1_MAX_LEN_SPEC >> for R { # [inline (always)]
  9471. fn from (reader : crate :: R < R16_UEP1_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP1_MAX_LEN` writer"]
  9472. pub struct W (crate :: W < R16_UEP1_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP1_MAX_LEN_SPEC > ; # [inline (always)]
  9473. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9474. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP1_MAX_LEN_SPEC >> for W { # [inline (always)]
  9475. fn from (writer : crate :: W < R16_UEP1_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_MAX_LEN` reader - endpoint 1 receive max length"]
  9476. pub struct UEP1_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP1_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP1_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9477. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_MAX_LEN` writer - endpoint 1 receive max length"]
  9478. pub struct UEP1_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9479. # [inline (always)]
  9480. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 1 receive max length"]
  9481. # [inline (always)]
  9482. pub fn uep1_max_len (& self) -> UEP1_MAX_LEN_R { UEP1_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 1 receive max length"]
  9483. # [inline (always)]
  9484. pub fn uep1_max_len (& mut self) -> UEP1_MAX_LEN_W { UEP1_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9485. # [inline (always)]
  9486. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep1_max_len](index.html) module"]
  9487. pub struct R16_UEP1_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP1_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep1_max_len::R](R) reader structure"]
  9488. impl crate :: Readable for R16_UEP1_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep1_max_len::W](W) writer structure"]
  9489. impl crate :: Writable for R16_UEP1_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP1_MAX_LEN to value 0"]
  9490. impl crate :: Resettable for R16_UEP1_MAX_LEN_SPEC { # [inline (always)]
  9491. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP2_MAX_LEN_R16_UH_MAX_LEN register accessor: an alias for `Reg<R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC>`"]
  9492. pub type R16_UEP2_MAX_LEN_R16_UH_MAX_LEN = crate :: Reg < r16_uep2_max_len_r16_uh_max_len :: R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [doc = "endpoint 2 receive max length and USB host receive max packet length register"]
  9493. pub mod r16_uep2_max_len_r16_uh_max_len { # [doc = "Register `R16_UEP2_MAX_LEN_R16_UH_MAX_LEN` reader"]
  9494. pub struct R (crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [inline (always)]
  9495. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >> for R { # [inline (always)]
  9496. fn from (reader : crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP2_MAX_LEN_R16_UH_MAX_LEN` writer"]
  9497. pub struct W (crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [inline (always)]
  9498. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9499. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >> for W { # [inline (always)]
  9500. fn from (writer : crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_MAX_LEN_UH_MAX_LEN` reader - endpoint 2 receive max length and USB host receive max packet length register"]
  9501. pub struct UEP2_MAX_LEN_UH_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP2_MAX_LEN_UH_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP2_MAX_LEN_UH_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_MAX_LEN_UH_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9502. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_MAX_LEN_UH_MAX_LEN` writer - endpoint 2 receive max length and USB host receive max packet length register"]
  9503. pub struct UEP2_MAX_LEN_UH_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_MAX_LEN_UH_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9504. # [inline (always)]
  9505. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 2 receive max length and USB host receive max packet length register"]
  9506. # [inline (always)]
  9507. pub fn uep2_max_len_uh_max_len (& self) -> UEP2_MAX_LEN_UH_MAX_LEN_R { UEP2_MAX_LEN_UH_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 2 receive max length and USB host receive max packet length register"]
  9508. # [inline (always)]
  9509. pub fn uep2_max_len_uh_max_len (& mut self) -> UEP2_MAX_LEN_UH_MAX_LEN_W { UEP2_MAX_LEN_UH_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9510. # [inline (always)]
  9511. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 receive max length and USB host receive max packet length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep2_max_len_r16_uh_max_len](index.html) module"]
  9512. pub struct R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep2_max_len_r16_uh_max_len::R](R) reader structure"]
  9513. impl crate :: Readable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep2_max_len_r16_uh_max_len::W](W) writer structure"]
  9514. impl crate :: Writable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP2_MAX_LEN_R16_UH_MAX_LEN to value 0"]
  9515. impl crate :: Resettable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { # [inline (always)]
  9516. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP3_MAX_LEN register accessor: an alias for `Reg<R16_UEP3_MAX_LEN_SPEC>`"]
  9517. pub type R16_UEP3_MAX_LEN = crate :: Reg < r16_uep3_max_len :: R16_UEP3_MAX_LEN_SPEC > ; # [doc = "endpoint 3 receive max length"]
  9518. pub mod r16_uep3_max_len { # [doc = "Register `R16_UEP3_MAX_LEN` reader"]
  9519. pub struct R (crate :: R < R16_UEP3_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP3_MAX_LEN_SPEC > ; # [inline (always)]
  9520. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP3_MAX_LEN_SPEC >> for R { # [inline (always)]
  9521. fn from (reader : crate :: R < R16_UEP3_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP3_MAX_LEN` writer"]
  9522. pub struct W (crate :: W < R16_UEP3_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP3_MAX_LEN_SPEC > ; # [inline (always)]
  9523. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9524. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP3_MAX_LEN_SPEC >> for W { # [inline (always)]
  9525. fn from (writer : crate :: W < R16_UEP3_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_MAX_LEN` reader - endpoint 3 receive max length"]
  9526. pub struct UEP3_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP3_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP3_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9527. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_MAX_LEN` writer - endpoint 3 receive max length"]
  9528. pub struct UEP3_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9529. # [inline (always)]
  9530. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 3 receive max length"]
  9531. # [inline (always)]
  9532. pub fn uep3_max_len (& self) -> UEP3_MAX_LEN_R { UEP3_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 3 receive max length"]
  9533. # [inline (always)]
  9534. pub fn uep3_max_len (& mut self) -> UEP3_MAX_LEN_W { UEP3_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9535. # [inline (always)]
  9536. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep3_max_len](index.html) module"]
  9537. pub struct R16_UEP3_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP3_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep3_max_len::R](R) reader structure"]
  9538. impl crate :: Readable for R16_UEP3_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep3_max_len::W](W) writer structure"]
  9539. impl crate :: Writable for R16_UEP3_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP3_MAX_LEN to value 0"]
  9540. impl crate :: Resettable for R16_UEP3_MAX_LEN_SPEC { # [inline (always)]
  9541. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP4_MAX_LEN register accessor: an alias for `Reg<R16_UEP4_MAX_LEN_SPEC>`"]
  9542. pub type R16_UEP4_MAX_LEN = crate :: Reg < r16_uep4_max_len :: R16_UEP4_MAX_LEN_SPEC > ; # [doc = "endpoint 4 receive max length"]
  9543. pub mod r16_uep4_max_len { # [doc = "Register `R16_UEP4_MAX_LEN` reader"]
  9544. pub struct R (crate :: R < R16_UEP4_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP4_MAX_LEN_SPEC > ; # [inline (always)]
  9545. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP4_MAX_LEN_SPEC >> for R { # [inline (always)]
  9546. fn from (reader : crate :: R < R16_UEP4_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP4_MAX_LEN` writer"]
  9547. pub struct W (crate :: W < R16_UEP4_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP4_MAX_LEN_SPEC > ; # [inline (always)]
  9548. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9549. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP4_MAX_LEN_SPEC >> for W { # [inline (always)]
  9550. fn from (writer : crate :: W < R16_UEP4_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_MAX_LEN` reader - endpoint 4 receive max length"]
  9551. pub struct UEP4_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP4_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP4_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9552. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_MAX_LEN` writer - endpoint 4 receive max length"]
  9553. pub struct UEP4_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9554. # [inline (always)]
  9555. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 4 receive max length"]
  9556. # [inline (always)]
  9557. pub fn uep4_max_len (& self) -> UEP4_MAX_LEN_R { UEP4_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 4 receive max length"]
  9558. # [inline (always)]
  9559. pub fn uep4_max_len (& mut self) -> UEP4_MAX_LEN_W { UEP4_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9560. # [inline (always)]
  9561. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep4_max_len](index.html) module"]
  9562. pub struct R16_UEP4_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP4_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep4_max_len::R](R) reader structure"]
  9563. impl crate :: Readable for R16_UEP4_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep4_max_len::W](W) writer structure"]
  9564. impl crate :: Writable for R16_UEP4_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP4_MAX_LEN to value 0"]
  9565. impl crate :: Resettable for R16_UEP4_MAX_LEN_SPEC { # [inline (always)]
  9566. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP5_MAX_LEN register accessor: an alias for `Reg<R16_UEP5_MAX_LEN_SPEC>`"]
  9567. pub type R16_UEP5_MAX_LEN = crate :: Reg < r16_uep5_max_len :: R16_UEP5_MAX_LEN_SPEC > ; # [doc = "endpoint 5 receive max length"]
  9568. pub mod r16_uep5_max_len { # [doc = "Register `R16_UEP5_MAX_LEN` reader"]
  9569. pub struct R (crate :: R < R16_UEP5_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP5_MAX_LEN_SPEC > ; # [inline (always)]
  9570. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP5_MAX_LEN_SPEC >> for R { # [inline (always)]
  9571. fn from (reader : crate :: R < R16_UEP5_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP5_MAX_LEN` writer"]
  9572. pub struct W (crate :: W < R16_UEP5_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP5_MAX_LEN_SPEC > ; # [inline (always)]
  9573. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9574. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP5_MAX_LEN_SPEC >> for W { # [inline (always)]
  9575. fn from (writer : crate :: W < R16_UEP5_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_MAX_LEN` reader - endpoint 5 receive max length"]
  9576. pub struct UEP5_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP5_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP5_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9577. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_MAX_LEN` writer - endpoint 5 receive max length"]
  9578. pub struct UEP5_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9579. # [inline (always)]
  9580. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 5 receive max length"]
  9581. # [inline (always)]
  9582. pub fn uep5_max_len (& self) -> UEP5_MAX_LEN_R { UEP5_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 5 receive max length"]
  9583. # [inline (always)]
  9584. pub fn uep5_max_len (& mut self) -> UEP5_MAX_LEN_W { UEP5_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9585. # [inline (always)]
  9586. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep5_max_len](index.html) module"]
  9587. pub struct R16_UEP5_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP5_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep5_max_len::R](R) reader structure"]
  9588. impl crate :: Readable for R16_UEP5_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep5_max_len::W](W) writer structure"]
  9589. impl crate :: Writable for R16_UEP5_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP5_MAX_LEN to value 0"]
  9590. impl crate :: Resettable for R16_UEP5_MAX_LEN_SPEC { # [inline (always)]
  9591. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP6_MAX_LEN register accessor: an alias for `Reg<R16_UEP6_MAX_LEN_SPEC>`"]
  9592. pub type R16_UEP6_MAX_LEN = crate :: Reg < r16_uep6_max_len :: R16_UEP6_MAX_LEN_SPEC > ; # [doc = "endpoint 6 receive max length"]
  9593. pub mod r16_uep6_max_len { # [doc = "Register `R16_UEP6_MAX_LEN` reader"]
  9594. pub struct R (crate :: R < R16_UEP6_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP6_MAX_LEN_SPEC > ; # [inline (always)]
  9595. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP6_MAX_LEN_SPEC >> for R { # [inline (always)]
  9596. fn from (reader : crate :: R < R16_UEP6_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP6_MAX_LEN` writer"]
  9597. pub struct W (crate :: W < R16_UEP6_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP6_MAX_LEN_SPEC > ; # [inline (always)]
  9598. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9599. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP6_MAX_LEN_SPEC >> for W { # [inline (always)]
  9600. fn from (writer : crate :: W < R16_UEP6_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_MAX_LEN` reader - endpoint 6 receive max length"]
  9601. pub struct UEP6_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP6_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP6_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9602. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_MAX_LEN` writer - endpoint 6 receive max length"]
  9603. pub struct UEP6_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9604. # [inline (always)]
  9605. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 6 receive max length"]
  9606. # [inline (always)]
  9607. pub fn uep6_max_len (& self) -> UEP6_MAX_LEN_R { UEP6_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 6 receive max length"]
  9608. # [inline (always)]
  9609. pub fn uep6_max_len (& mut self) -> UEP6_MAX_LEN_W { UEP6_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9610. # [inline (always)]
  9611. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep6_max_len](index.html) module"]
  9612. pub struct R16_UEP6_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP6_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep6_max_len::R](R) reader structure"]
  9613. impl crate :: Readable for R16_UEP6_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep6_max_len::W](W) writer structure"]
  9614. impl crate :: Writable for R16_UEP6_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP6_MAX_LEN to value 0"]
  9615. impl crate :: Resettable for R16_UEP6_MAX_LEN_SPEC { # [inline (always)]
  9616. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP7_MAX_LEN register accessor: an alias for `Reg<R16_UEP7_MAX_LEN_SPEC>`"]
  9617. pub type R16_UEP7_MAX_LEN = crate :: Reg < r16_uep7_max_len :: R16_UEP7_MAX_LEN_SPEC > ; # [doc = "endpoint 7 receive max length"]
  9618. pub mod r16_uep7_max_len { # [doc = "Register `R16_UEP7_MAX_LEN` reader"]
  9619. pub struct R (crate :: R < R16_UEP7_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP7_MAX_LEN_SPEC > ; # [inline (always)]
  9620. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP7_MAX_LEN_SPEC >> for R { # [inline (always)]
  9621. fn from (reader : crate :: R < R16_UEP7_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP7_MAX_LEN` writer"]
  9622. pub struct W (crate :: W < R16_UEP7_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP7_MAX_LEN_SPEC > ; # [inline (always)]
  9623. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9624. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP7_MAX_LEN_SPEC >> for W { # [inline (always)]
  9625. fn from (writer : crate :: W < R16_UEP7_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_MAX_LEN` reader - endpoint 7 receive max length"]
  9626. pub struct UEP7_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP7_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP7_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9627. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_MAX_LEN` writer - endpoint 7 receive max length"]
  9628. pub struct UEP7_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9629. # [inline (always)]
  9630. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 7 receive max length"]
  9631. # [inline (always)]
  9632. pub fn uep7_max_len (& self) -> UEP7_MAX_LEN_R { UEP7_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 7 receive max length"]
  9633. # [inline (always)]
  9634. pub fn uep7_max_len (& mut self) -> UEP7_MAX_LEN_W { UEP7_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9635. # [inline (always)]
  9636. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep7_max_len](index.html) module"]
  9637. pub struct R16_UEP7_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP7_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep7_max_len::R](R) reader structure"]
  9638. impl crate :: Readable for R16_UEP7_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep7_max_len::W](W) writer structure"]
  9639. impl crate :: Writable for R16_UEP7_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP7_MAX_LEN to value 0"]
  9640. impl crate :: Resettable for R16_UEP7_MAX_LEN_SPEC { # [inline (always)]
  9641. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP0_T_LEN register accessor: an alias for `Reg<R16_UEP0_T_LEN_SPEC>`"]
  9642. pub type R16_UEP0_T_LEN = crate :: Reg < r16_uep0_t_len :: R16_UEP0_T_LEN_SPEC > ; # [doc = "endpoint 0 transmittal length"]
  9643. pub mod r16_uep0_t_len { # [doc = "Register `R16_UEP0_T_LEN` reader"]
  9644. pub struct R (crate :: R < R16_UEP0_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP0_T_LEN_SPEC > ; # [inline (always)]
  9645. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP0_T_LEN_SPEC >> for R { # [inline (always)]
  9646. fn from (reader : crate :: R < R16_UEP0_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP0_T_LEN` writer"]
  9647. pub struct W (crate :: W < R16_UEP0_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP0_T_LEN_SPEC > ; # [inline (always)]
  9648. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9649. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP0_T_LEN_SPEC >> for W { # [inline (always)]
  9650. fn from (writer : crate :: W < R16_UEP0_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_T_LEN` reader - endpoint 0 transmittal length"]
  9651. pub struct UEP0_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP0_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP0_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9652. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_T_LEN` writer - endpoint 0 transmittal length"]
  9653. pub struct UEP0_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9654. # [inline (always)]
  9655. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 0 transmittal length"]
  9656. # [inline (always)]
  9657. pub fn uep0_t_len (& self) -> UEP0_T_LEN_R { UEP0_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 0 transmittal length"]
  9658. # [inline (always)]
  9659. pub fn uep0_t_len (& mut self) -> UEP0_T_LEN_W { UEP0_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9660. # [inline (always)]
  9661. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep0_t_len](index.html) module"]
  9662. pub struct R16_UEP0_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP0_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep0_t_len::R](R) reader structure"]
  9663. impl crate :: Readable for R16_UEP0_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep0_t_len::W](W) writer structure"]
  9664. impl crate :: Writable for R16_UEP0_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP0_T_LEN to value 0"]
  9665. impl crate :: Resettable for R16_UEP0_T_LEN_SPEC { # [inline (always)]
  9666. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP0_TX_CTRL register accessor: an alias for `Reg<R8_UEP0_TX_CTRL_SPEC>`"]
  9667. pub type R8_UEP0_TX_CTRL = crate :: Reg < r8_uep0_tx_ctrl :: R8_UEP0_TX_CTRL_SPEC > ; # [doc = "endpoint 0 tx control"]
  9668. pub mod r8_uep0_tx_ctrl { # [doc = "Register `R8_UEP0_TX_CTRL` reader"]
  9669. pub struct R (crate :: R < R8_UEP0_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP0_TX_CTRL_SPEC > ; # [inline (always)]
  9670. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP0_TX_CTRL_SPEC >> for R { # [inline (always)]
  9671. fn from (reader : crate :: R < R8_UEP0_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP0_TX_CTRL` writer"]
  9672. pub struct W (crate :: W < R8_UEP0_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP0_TX_CTRL_SPEC > ; # [inline (always)]
  9673. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9674. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP0_TX_CTRL_SPEC >> for W { # [inline (always)]
  9675. fn from (writer : crate :: W < R8_UEP0_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9676. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9677. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9678. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9679. # [inline (always)]
  9680. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  9681. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9682. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  9683. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  9684. # [inline (always)]
  9685. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9686. # [inline (always)]
  9687. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9688. # [inline (always)]
  9689. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  9690. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9691. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  9692. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9693. # [inline (always)]
  9694. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  9695. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9696. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  9697. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  9698. # [inline (always)]
  9699. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9700. # [inline (always)]
  9701. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9702. # [inline (always)]
  9703. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9704. # [inline (always)]
  9705. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  9706. # [inline (always)]
  9707. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  9708. # [inline (always)]
  9709. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  9710. # [inline (always)]
  9711. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9712. # [inline (always)]
  9713. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  9714. # [inline (always)]
  9715. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  9716. # [inline (always)]
  9717. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  9718. # [inline (always)]
  9719. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  9720. # [inline (always)]
  9721. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep0_tx_ctrl](index.html) module"]
  9722. pub struct R8_UEP0_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP0_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep0_tx_ctrl::R](R) reader structure"]
  9723. impl crate :: Readable for R8_UEP0_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep0_tx_ctrl::W](W) writer structure"]
  9724. impl crate :: Writable for R8_UEP0_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP0_TX_CTRL to value 0"]
  9725. impl crate :: Resettable for R8_UEP0_TX_CTRL_SPEC { # [inline (always)]
  9726. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP0_RX_CTRL register accessor: an alias for `Reg<R8_UEP0_RX_CTRL_SPEC>`"]
  9727. pub type R8_UEP0_RX_CTRL = crate :: Reg < r8_uep0_rx_ctrl :: R8_UEP0_RX_CTRL_SPEC > ; # [doc = "endpoint 0 rx control"]
  9728. pub mod r8_uep0_rx_ctrl { # [doc = "Register `R8_UEP0_RX_CTRL` reader"]
  9729. pub struct R (crate :: R < R8_UEP0_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP0_RX_CTRL_SPEC > ; # [inline (always)]
  9730. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP0_RX_CTRL_SPEC >> for R { # [inline (always)]
  9731. fn from (reader : crate :: R < R8_UEP0_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP0_RX_CTRL` writer"]
  9732. pub struct W (crate :: W < R8_UEP0_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP0_RX_CTRL_SPEC > ; # [inline (always)]
  9733. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9734. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP0_RX_CTRL_SPEC >> for W { # [inline (always)]
  9735. fn from (writer : crate :: W < R8_UEP0_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9736. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9737. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9738. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9739. # [inline (always)]
  9740. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  9741. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9742. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  9743. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  9744. # [inline (always)]
  9745. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9746. # [inline (always)]
  9747. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9748. # [inline (always)]
  9749. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  9750. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9751. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  9752. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9753. # [inline (always)]
  9754. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  9755. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9756. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  9757. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  9758. # [inline (always)]
  9759. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9760. # [inline (always)]
  9761. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9762. # [inline (always)]
  9763. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9764. # [inline (always)]
  9765. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  9766. # [inline (always)]
  9767. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  9768. # [inline (always)]
  9769. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  9770. # [inline (always)]
  9771. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9772. # [inline (always)]
  9773. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  9774. # [inline (always)]
  9775. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  9776. # [inline (always)]
  9777. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  9778. # [inline (always)]
  9779. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  9780. # [inline (always)]
  9781. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep0_rx_ctrl](index.html) module"]
  9782. pub struct R8_UEP0_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP0_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep0_rx_ctrl::R](R) reader structure"]
  9783. impl crate :: Readable for R8_UEP0_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep0_rx_ctrl::W](W) writer structure"]
  9784. impl crate :: Writable for R8_UEP0_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP0_RX_CTRL to value 0"]
  9785. impl crate :: Resettable for R8_UEP0_RX_CTRL_SPEC { # [inline (always)]
  9786. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP1_T_LEN register accessor: an alias for `Reg<R16_UEP1_T_LEN_SPEC>`"]
  9787. pub type R16_UEP1_T_LEN = crate :: Reg < r16_uep1_t_len :: R16_UEP1_T_LEN_SPEC > ; # [doc = "endpoint 1 transmittal length"]
  9788. pub mod r16_uep1_t_len { # [doc = "Register `R16_UEP1_T_LEN` reader"]
  9789. pub struct R (crate :: R < R16_UEP1_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP1_T_LEN_SPEC > ; # [inline (always)]
  9790. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP1_T_LEN_SPEC >> for R { # [inline (always)]
  9791. fn from (reader : crate :: R < R16_UEP1_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP1_T_LEN` writer"]
  9792. pub struct W (crate :: W < R16_UEP1_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP1_T_LEN_SPEC > ; # [inline (always)]
  9793. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9794. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP1_T_LEN_SPEC >> for W { # [inline (always)]
  9795. fn from (writer : crate :: W < R16_UEP1_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_T_LEN` reader - endpoint 1 transmittal length"]
  9796. pub struct UEP1_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP1_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP1_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9797. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_T_LEN` writer - endpoint 1 transmittal length"]
  9798. pub struct UEP1_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9799. # [inline (always)]
  9800. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 1 transmittal length"]
  9801. # [inline (always)]
  9802. pub fn uep1_t_len (& self) -> UEP1_T_LEN_R { UEP1_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 1 transmittal length"]
  9803. # [inline (always)]
  9804. pub fn uep1_t_len (& mut self) -> UEP1_T_LEN_W { UEP1_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9805. # [inline (always)]
  9806. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep1_t_len](index.html) module"]
  9807. pub struct R16_UEP1_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP1_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep1_t_len::R](R) reader structure"]
  9808. impl crate :: Readable for R16_UEP1_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep1_t_len::W](W) writer structure"]
  9809. impl crate :: Writable for R16_UEP1_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP1_T_LEN to value 0"]
  9810. impl crate :: Resettable for R16_UEP1_T_LEN_SPEC { # [inline (always)]
  9811. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP1_TX_CTRL register accessor: an alias for `Reg<R8_UEP1_TX_CTRL_SPEC>`"]
  9812. pub type R8_UEP1_TX_CTRL = crate :: Reg < r8_uep1_tx_ctrl :: R8_UEP1_TX_CTRL_SPEC > ; # [doc = "endpoint 1 tx control"]
  9813. pub mod r8_uep1_tx_ctrl { # [doc = "Register `R8_UEP1_TX_CTRL` reader"]
  9814. pub struct R (crate :: R < R8_UEP1_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP1_TX_CTRL_SPEC > ; # [inline (always)]
  9815. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP1_TX_CTRL_SPEC >> for R { # [inline (always)]
  9816. fn from (reader : crate :: R < R8_UEP1_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP1_TX_CTRL` writer"]
  9817. pub struct W (crate :: W < R8_UEP1_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP1_TX_CTRL_SPEC > ; # [inline (always)]
  9818. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9819. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP1_TX_CTRL_SPEC >> for W { # [inline (always)]
  9820. fn from (writer : crate :: W < R8_UEP1_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9821. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9822. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9823. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9824. # [inline (always)]
  9825. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  9826. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9827. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  9828. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  9829. # [inline (always)]
  9830. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9831. # [inline (always)]
  9832. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9833. # [inline (always)]
  9834. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  9835. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9836. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  9837. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9838. # [inline (always)]
  9839. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  9840. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9841. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  9842. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  9843. # [inline (always)]
  9844. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9845. # [inline (always)]
  9846. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9847. # [inline (always)]
  9848. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9849. # [inline (always)]
  9850. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  9851. # [inline (always)]
  9852. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  9853. # [inline (always)]
  9854. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  9855. # [inline (always)]
  9856. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9857. # [inline (always)]
  9858. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  9859. # [inline (always)]
  9860. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  9861. # [inline (always)]
  9862. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  9863. # [inline (always)]
  9864. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  9865. # [inline (always)]
  9866. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep1_tx_ctrl](index.html) module"]
  9867. pub struct R8_UEP1_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP1_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep1_tx_ctrl::R](R) reader structure"]
  9868. impl crate :: Readable for R8_UEP1_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep1_tx_ctrl::W](W) writer structure"]
  9869. impl crate :: Writable for R8_UEP1_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP1_TX_CTRL to value 0"]
  9870. impl crate :: Resettable for R8_UEP1_TX_CTRL_SPEC { # [inline (always)]
  9871. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP1_RX_CTRL register accessor: an alias for `Reg<R8_UEP1_RX_CTRL_SPEC>`"]
  9872. pub type R8_UEP1_RX_CTRL = crate :: Reg < r8_uep1_rx_ctrl :: R8_UEP1_RX_CTRL_SPEC > ; # [doc = "endpoint 1 rx control"]
  9873. pub mod r8_uep1_rx_ctrl { # [doc = "Register `R8_UEP1_RX_CTRL` reader"]
  9874. pub struct R (crate :: R < R8_UEP1_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP1_RX_CTRL_SPEC > ; # [inline (always)]
  9875. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP1_RX_CTRL_SPEC >> for R { # [inline (always)]
  9876. fn from (reader : crate :: R < R8_UEP1_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP1_RX_CTRL` writer"]
  9877. pub struct W (crate :: W < R8_UEP1_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP1_RX_CTRL_SPEC > ; # [inline (always)]
  9878. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9879. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP1_RX_CTRL_SPEC >> for W { # [inline (always)]
  9880. fn from (writer : crate :: W < R8_UEP1_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9881. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9882. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9883. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9884. # [inline (always)]
  9885. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  9886. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9887. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  9888. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  9889. # [inline (always)]
  9890. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9891. # [inline (always)]
  9892. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9893. # [inline (always)]
  9894. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  9895. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9896. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  9897. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9898. # [inline (always)]
  9899. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  9900. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9901. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  9902. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  9903. # [inline (always)]
  9904. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9905. # [inline (always)]
  9906. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9907. # [inline (always)]
  9908. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9909. # [inline (always)]
  9910. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  9911. # [inline (always)]
  9912. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  9913. # [inline (always)]
  9914. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  9915. # [inline (always)]
  9916. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  9917. # [inline (always)]
  9918. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  9919. # [inline (always)]
  9920. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  9921. # [inline (always)]
  9922. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  9923. # [inline (always)]
  9924. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  9925. # [inline (always)]
  9926. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep1_rx_ctrl](index.html) module"]
  9927. pub struct R8_UEP1_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP1_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep1_rx_ctrl::R](R) reader structure"]
  9928. impl crate :: Readable for R8_UEP1_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep1_rx_ctrl::W](W) writer structure"]
  9929. impl crate :: Writable for R8_UEP1_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP1_RX_CTRL to value 0"]
  9930. impl crate :: Resettable for R8_UEP1_RX_CTRL_SPEC { # [inline (always)]
  9931. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP2_T_LEN_R16_UH_EP_PID register accessor: an alias for `Reg<R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC>`"]
  9932. pub type R16_UEP2_T_LEN_R16_UH_EP_PID = crate :: Reg < r16_uep2_t_len_r16_uh_ep_pid :: R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [doc = "endpoint 2 transmittal length and Set usb host token register"]
  9933. pub mod r16_uep2_t_len_r16_uh_ep_pid { # [doc = "Register `R16_UEP2_T_LEN_R16_UH_EP_PID` reader"]
  9934. pub struct R (crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [inline (always)]
  9935. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >> for R { # [inline (always)]
  9936. fn from (reader : crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP2_T_LEN_R16_UH_EP_PID` writer"]
  9937. pub struct W (crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [inline (always)]
  9938. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9939. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >> for W { # [inline (always)]
  9940. fn from (writer : crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UH_EPNUM_MASK` reader - The endpoint number of the target of this operation"]
  9941. pub struct RB_UH_EPNUM_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UH_EPNUM_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UH_EPNUM_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_EPNUM_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9942. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_EPNUM_MASK` writer - The endpoint number of the target of this operation"]
  9943. pub struct RB_UH_EPNUM_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_EPNUM_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9944. # [inline (always)]
  9945. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u16 & 0x0f) ; self . w } } # [doc = "Field `RB_UH_TOKEN_MASK` reader - The token PID packet identification of this USB transfer transaction"]
  9946. pub struct RB_UH_TOKEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UH_TOKEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UH_TOKEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_TOKEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9947. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_TOKEN_MASK` writer - The token PID packet identification of this USB transfer transaction"]
  9948. pub struct RB_UH_TOKEN_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_TOKEN_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9949. # [inline (always)]
  9950. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0f << 4)) | ((value as u16 & 0x0f) << 4) ; self . w } } # [doc = "Field `UEP2_T_LEN` reader - endpoint 2 transmittal length"]
  9951. pub struct UEP2_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP2_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP2_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  9952. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_T_LEN` writer - endpoint 2 transmittal length"]
  9953. pub struct UEP2_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9954. # [inline (always)]
  9955. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:3 - The endpoint number of the target of this operation"]
  9956. # [inline (always)]
  9957. pub fn rb_uh_epnum_mask (& self) -> RB_UH_EPNUM_MASK_R { RB_UH_EPNUM_MASK_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bits 4:7 - The token PID packet identification of this USB transfer transaction"]
  9958. # [inline (always)]
  9959. pub fn rb_uh_token_mask (& self) -> RB_UH_TOKEN_MASK_R { RB_UH_TOKEN_MASK_R :: new (((self . bits >> 4) & 0x0f) as u8) } # [doc = "Bits 0:15 - endpoint 2 transmittal length"]
  9960. # [inline (always)]
  9961. pub fn uep2_t_len (& self) -> UEP2_T_LEN_R { UEP2_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:3 - The endpoint number of the target of this operation"]
  9962. # [inline (always)]
  9963. pub fn rb_uh_epnum_mask (& mut self) -> RB_UH_EPNUM_MASK_W { RB_UH_EPNUM_MASK_W { w : self } } # [doc = "Bits 4:7 - The token PID packet identification of this USB transfer transaction"]
  9964. # [inline (always)]
  9965. pub fn rb_uh_token_mask (& mut self) -> RB_UH_TOKEN_MASK_W { RB_UH_TOKEN_MASK_W { w : self } } # [doc = "Bits 0:15 - endpoint 2 transmittal length"]
  9966. # [inline (always)]
  9967. pub fn uep2_t_len (& mut self) -> UEP2_T_LEN_W { UEP2_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  9968. # [inline (always)]
  9969. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 transmittal length and Set usb host token register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep2_t_len_r16_uh_ep_pid](index.html) module"]
  9970. pub struct R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC ; impl crate :: RegisterSpec for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep2_t_len_r16_uh_ep_pid::R](R) reader structure"]
  9971. impl crate :: Readable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep2_t_len_r16_uh_ep_pid::W](W) writer structure"]
  9972. impl crate :: Writable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP2_T_LEN_R16_UH_EP_PID to value 0"]
  9973. impl crate :: Resettable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { # [inline (always)]
  9974. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_TX_CTRL register accessor: an alias for `Reg<R8_UEP2_TX_CTRL_SPEC>`"]
  9975. pub type R8_UEP2_TX_CTRL = crate :: Reg < r8_uep2_tx_ctrl :: R8_UEP2_TX_CTRL_SPEC > ; # [doc = "endpoint 2 tx control"]
  9976. pub mod r8_uep2_tx_ctrl { # [doc = "Register `R8_UEP2_TX_CTRL` reader"]
  9977. pub struct R (crate :: R < R8_UEP2_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_TX_CTRL_SPEC > ; # [inline (always)]
  9978. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_TX_CTRL_SPEC >> for R { # [inline (always)]
  9979. fn from (reader : crate :: R < R8_UEP2_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_TX_CTRL` writer"]
  9980. pub struct W (crate :: W < R8_UEP2_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_TX_CTRL_SPEC > ; # [inline (always)]
  9981. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  9982. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_TX_CTRL_SPEC >> for W { # [inline (always)]
  9983. fn from (writer : crate :: W < R8_UEP2_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9984. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9985. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  9986. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  9987. # [inline (always)]
  9988. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  9989. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  9990. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  9991. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  9992. # [inline (always)]
  9993. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  9994. # [inline (always)]
  9995. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  9996. # [inline (always)]
  9997. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  9998. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  9999. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  10000. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10001. # [inline (always)]
  10002. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  10003. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10004. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  10005. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10006. # [inline (always)]
  10007. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10008. # [inline (always)]
  10009. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10010. # [inline (always)]
  10011. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10012. # [inline (always)]
  10013. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  10014. # [inline (always)]
  10015. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10016. # [inline (always)]
  10017. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10018. # [inline (always)]
  10019. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10020. # [inline (always)]
  10021. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  10022. # [inline (always)]
  10023. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10024. # [inline (always)]
  10025. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10026. # [inline (always)]
  10027. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10028. # [inline (always)]
  10029. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_tx_ctrl](index.html) module"]
  10030. pub struct R8_UEP2_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP2_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_tx_ctrl::R](R) reader structure"]
  10031. impl crate :: Readable for R8_UEP2_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_tx_ctrl::W](W) writer structure"]
  10032. impl crate :: Writable for R8_UEP2_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_TX_CTRL to value 0"]
  10033. impl crate :: Resettable for R8_UEP2_TX_CTRL_SPEC { # [inline (always)]
  10034. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_RX_CTRL_R8_UH_RX_CTRL register accessor: an alias for `Reg<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>`"]
  10035. pub type R8_UEP2_RX_CTRL_R8_UH_RX_CTRL = crate :: Reg < r8_uep2_rx_ctrl_r8_uh_rx_ctrl :: R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [doc = "endpoint 2 rx control and USb host receive endpoint control register"]
  10036. pub mod r8_uep2_rx_ctrl_r8_uh_rx_ctrl { # [doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` reader"]
  10037. pub struct R (crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [inline (always)]
  10038. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >> for R { # [inline (always)]
  10039. fn from (reader : crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` writer"]
  10040. pub struct W (crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [inline (always)]
  10041. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10042. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >> for W { # [inline (always)]
  10043. fn from (writer : crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
  10044. pub struct RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10045. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
  10046. pub struct RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10047. # [inline (always)]
  10048. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` reader - Prepared no response and Response control bit of host receiver"]
  10049. pub struct RB_UEP_RRES_NO_RB_UH_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_RB_UH_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_RB_UH_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_RB_UH_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10050. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` writer - Prepared no response and Response control bit of host receiver"]
  10051. pub struct RB_UEP_RRES_NO_RB_UH_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_RB_UH_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10052. # [inline (always)]
  10053. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10054. # [inline (always)]
  10055. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10056. # [inline (always)]
  10057. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
  10058. pub struct RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10059. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
  10060. pub struct RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10061. # [inline (always)]
  10062. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
  10063. pub struct RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10064. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
  10065. pub struct RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10066. # [inline (always)]
  10067. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10068. # [inline (always)]
  10069. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10070. # [inline (always)]
  10071. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_UH_RDATA_NO` reader - expect no data packet, for high speed hub in host mode"]
  10072. pub struct RB_UH_RDATA_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_RDATA_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_RDATA_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_RDATA_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10073. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_RDATA_NO` writer - expect no data packet, for high speed hub in host mode"]
  10074. pub struct RB_UH_RDATA_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_RDATA_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10075. # [inline (always)]
  10076. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10077. # [inline (always)]
  10078. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10079. # [inline (always)]
  10080. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
  10081. # [inline (always)]
  10082. pub fn rb_uep_rres_mask_rb_uh_rres_mask (& self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
  10083. # [inline (always)]
  10084. pub fn rb_uep_rres_no_rb_uh_rres_no (& self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_R { RB_UEP_RRES_NO_RB_UH_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
  10085. # [inline (always)]
  10086. pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
  10087. # [inline (always)]
  10088. pub fn rb_uep_r_autotog_rb_uh_r_autotog (& self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
  10089. # [inline (always)]
  10090. pub fn rb_uh_rdata_no (& self) -> RB_UH_RDATA_NO_R { RB_UH_RDATA_NO_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
  10091. # [inline (always)]
  10092. pub fn rb_uep_rres_mask_rb_uh_rres_mask (& mut self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W { w : self } } # [doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
  10093. # [inline (always)]
  10094. pub fn rb_uep_rres_no_rb_uh_rres_no (& mut self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_W { RB_UEP_RRES_NO_RB_UH_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
  10095. # [inline (always)]
  10096. pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
  10097. # [inline (always)]
  10098. pub fn rb_uep_r_autotog_rb_uh_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W { w : self } } # [doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
  10099. # [inline (always)]
  10100. pub fn rb_uh_rdata_no (& mut self) -> RB_UH_RDATA_NO_W { RB_UH_RDATA_NO_W { w : self } } # [doc = "Writes raw bits to the register."]
  10101. # [inline (always)]
  10102. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 rx control and USb host receive endpoint control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_rx_ctrl_r8_uh_rx_ctrl](index.html) module"]
  10103. pub struct R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::R](R) reader structure"]
  10104. impl crate :: Readable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::W](W) writer structure"]
  10105. impl crate :: Writable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_RX_CTRL_R8_UH_RX_CTRL to value 0"]
  10106. impl crate :: Resettable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { # [inline (always)]
  10107. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP3_T_LEN_R16_UH_TX_LEN register accessor: an alias for `Reg<R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC>`"]
  10108. pub type R16_UEP3_T_LEN_R16_UH_TX_LEN = crate :: Reg < r16_uep3_t_len_r16_uh_tx_len :: R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [doc = "endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  10109. pub mod r16_uep3_t_len_r16_uh_tx_len { # [doc = "Register `R16_UEP3_T_LEN_R16_UH_TX_LEN` reader"]
  10110. pub struct R (crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [inline (always)]
  10111. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >> for R { # [inline (always)]
  10112. fn from (reader : crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP3_T_LEN_R16_UH_TX_LEN` writer"]
  10113. pub struct W (crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [inline (always)]
  10114. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10115. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >> for W { # [inline (always)]
  10116. fn from (writer : crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_T_LEN_UH_TX_LEN` reader - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  10117. pub struct UEP3_T_LEN_UH_TX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP3_T_LEN_UH_TX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP3_T_LEN_UH_TX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_T_LEN_UH_TX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  10118. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_T_LEN_UH_TX_LEN` writer - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  10119. pub struct UEP3_T_LEN_UH_TX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_T_LEN_UH_TX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10120. # [inline (always)]
  10121. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  10122. # [inline (always)]
  10123. pub fn uep3_t_len_uh_tx_len (& self) -> UEP3_T_LEN_UH_TX_LEN_R { UEP3_T_LEN_UH_TX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
  10124. # [inline (always)]
  10125. pub fn uep3_t_len_uh_tx_len (& mut self) -> UEP3_T_LEN_UH_TX_LEN_W { UEP3_T_LEN_UH_TX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  10126. # [inline (always)]
  10127. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 transmittal length and host transmittal endpoint transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep3_t_len_r16_uh_tx_len](index.html) module"]
  10128. pub struct R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep3_t_len_r16_uh_tx_len::R](R) reader structure"]
  10129. impl crate :: Readable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep3_t_len_r16_uh_tx_len::W](W) writer structure"]
  10130. impl crate :: Writable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP3_T_LEN_R16_UH_TX_LEN to value 0"]
  10131. impl crate :: Resettable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { # [inline (always)]
  10132. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP3_TX_CTRL_R8_UH_TX_CTRL register accessor: an alias for `Reg<R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC>`"]
  10133. pub type R8_UEP3_TX_CTRL_R8_UH_TX_CTRL = crate :: Reg < r8_uep3_tx_ctrl_r8_uh_tx_ctrl :: R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [doc = "endpoint 3 tx control and host transmittal endpoint control"]
  10134. pub mod r8_uep3_tx_ctrl_r8_uh_tx_ctrl { # [doc = "Register `R8_UEP3_TX_CTRL_R8_UH_TX_CTRL` reader"]
  10135. pub struct R (crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [inline (always)]
  10136. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >> for R { # [inline (always)]
  10137. fn from (reader : crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP3_TX_CTRL_R8_UH_TX_CTRL` writer"]
  10138. pub struct W (crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [inline (always)]
  10139. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10140. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >> for W { # [inline (always)]
  10141. fn from (writer : crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK_RB_UH_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
  10142. pub struct RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10143. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK_RB_UH_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
  10144. pub struct RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10145. # [inline (always)]
  10146. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO_RB_UH_TRES_NO` reader - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
  10147. pub struct RB_UEP_TRES_NO_RB_UH_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_RB_UH_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_RB_UH_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_RB_UH_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10148. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO_RB_UH_TRES_NO` writer - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
  10149. pub struct RB_UEP_TRES_NO_RB_UH_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_RB_UH_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10150. # [inline (always)]
  10151. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10152. # [inline (always)]
  10153. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10154. # [inline (always)]
  10155. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
  10156. pub struct RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10157. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
  10158. pub struct RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10159. # [inline (always)]
  10160. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
  10161. pub struct RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10162. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
  10163. pub struct RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10164. # [inline (always)]
  10165. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10166. # [inline (always)]
  10167. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10168. # [inline (always)]
  10169. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_UH_TDATA_NO` reader - prepared no data packet, for high speed hub in host mode"]
  10170. pub struct RB_UH_TDATA_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_TDATA_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_TDATA_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_TDATA_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10171. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_TDATA_NO` writer - prepared no data packet, for high speed hub in host mode"]
  10172. pub struct RB_UH_TDATA_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_TDATA_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10173. # [inline (always)]
  10174. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10175. # [inline (always)]
  10176. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10177. # [inline (always)]
  10178. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
  10179. # [inline (always)]
  10180. pub fn rb_uep_tres_mask_rb_uh_tres_mask (& self) -> RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
  10181. # [inline (always)]
  10182. pub fn rb_uep_tres_no_rb_uh_tres_no (& self) -> RB_UEP_TRES_NO_RB_UH_TRES_NO_R { RB_UEP_TRES_NO_RB_UH_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
  10183. # [inline (always)]
  10184. pub fn rb_uep_t_tog_mask_rb_uh_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
  10185. # [inline (always)]
  10186. pub fn rb_uep_t_autotog_rb_uh_t_autotog (& self) -> RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - prepared no data packet, for high speed hub in host mode"]
  10187. # [inline (always)]
  10188. pub fn rb_uh_tdata_no (& self) -> RB_UH_TDATA_NO_R { RB_UH_TDATA_NO_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
  10189. # [inline (always)]
  10190. pub fn rb_uep_tres_mask_rb_uh_tres_mask (& mut self) -> RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
  10191. # [inline (always)]
  10192. pub fn rb_uep_tres_no_rb_uh_tres_no (& mut self) -> RB_UEP_TRES_NO_RB_UH_TRES_NO_W { RB_UEP_TRES_NO_RB_UH_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
  10193. # [inline (always)]
  10194. pub fn rb_uep_t_tog_mask_rb_uh_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
  10195. # [inline (always)]
  10196. pub fn rb_uep_t_autotog_rb_uh_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W { w : self } } # [doc = "Bit 6 - prepared no data packet, for high speed hub in host mode"]
  10197. # [inline (always)]
  10198. pub fn rb_uh_tdata_no (& mut self) -> RB_UH_TDATA_NO_W { RB_UH_TDATA_NO_W { w : self } } # [doc = "Writes raw bits to the register."]
  10199. # [inline (always)]
  10200. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 tx control and host transmittal endpoint control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep3_tx_ctrl_r8_uh_tx_ctrl](index.html) module"]
  10201. pub struct R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep3_tx_ctrl_r8_uh_tx_ctrl::R](R) reader structure"]
  10202. impl crate :: Readable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep3_tx_ctrl_r8_uh_tx_ctrl::W](W) writer structure"]
  10203. impl crate :: Writable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP3_TX_CTRL_R8_UH_TX_CTRL to value 0"]
  10204. impl crate :: Resettable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { # [inline (always)]
  10205. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP3_RX_CTRL register accessor: an alias for `Reg<R8_UEP3_RX_CTRL_SPEC>`"]
  10206. pub type R8_UEP3_RX_CTRL = crate :: Reg < r8_uep3_rx_ctrl :: R8_UEP3_RX_CTRL_SPEC > ; # [doc = "endpoint 3 rx control"]
  10207. pub mod r8_uep3_rx_ctrl { # [doc = "Register `R8_UEP3_RX_CTRL` reader"]
  10208. pub struct R (crate :: R < R8_UEP3_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP3_RX_CTRL_SPEC > ; # [inline (always)]
  10209. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP3_RX_CTRL_SPEC >> for R { # [inline (always)]
  10210. fn from (reader : crate :: R < R8_UEP3_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP3_RX_CTRL` writer"]
  10211. pub struct W (crate :: W < R8_UEP3_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP3_RX_CTRL_SPEC > ; # [inline (always)]
  10212. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10213. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP3_RX_CTRL_SPEC >> for W { # [inline (always)]
  10214. fn from (writer : crate :: W < R8_UEP3_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10215. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10216. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10217. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10218. # [inline (always)]
  10219. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  10220. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10221. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  10222. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10223. # [inline (always)]
  10224. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10225. # [inline (always)]
  10226. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10227. # [inline (always)]
  10228. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  10229. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10230. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  10231. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10232. # [inline (always)]
  10233. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  10234. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10235. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  10236. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10237. # [inline (always)]
  10238. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10239. # [inline (always)]
  10240. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10241. # [inline (always)]
  10242. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10243. # [inline (always)]
  10244. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  10245. # [inline (always)]
  10246. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10247. # [inline (always)]
  10248. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10249. # [inline (always)]
  10250. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10251. # [inline (always)]
  10252. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  10253. # [inline (always)]
  10254. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10255. # [inline (always)]
  10256. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10257. # [inline (always)]
  10258. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10259. # [inline (always)]
  10260. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep3_rx_ctrl](index.html) module"]
  10261. pub struct R8_UEP3_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP3_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep3_rx_ctrl::R](R) reader structure"]
  10262. impl crate :: Readable for R8_UEP3_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep3_rx_ctrl::W](W) writer structure"]
  10263. impl crate :: Writable for R8_UEP3_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP3_RX_CTRL to value 0"]
  10264. impl crate :: Resettable for R8_UEP3_RX_CTRL_SPEC { # [inline (always)]
  10265. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP4_T_LEN_R16_UH_SPLIT_DATA register accessor: an alias for `Reg<R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC>`"]
  10266. pub type R16_UEP4_T_LEN_R16_UH_SPLIT_DATA = crate :: Reg < r16_uep4_t_len_r16_uh_split_data :: R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [doc = "endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  10267. pub mod r16_uep4_t_len_r16_uh_split_data { # [doc = "Register `R16_UEP4_T_LEN_R16_UH_SPLIT_DATA` reader"]
  10268. pub struct R (crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [inline (always)]
  10269. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >> for R { # [inline (always)]
  10270. fn from (reader : crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP4_T_LEN_R16_UH_SPLIT_DATA` writer"]
  10271. pub struct W (crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [inline (always)]
  10272. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10273. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >> for W { # [inline (always)]
  10274. fn from (writer : crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_T_LEN_UH_SPLIT_DATA` reader - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  10275. pub struct UEP4_T_LEN_UH_SPLIT_DATA_R (crate :: FieldReader < u16 , u16 >) ; impl UEP4_T_LEN_UH_SPLIT_DATA_R { pub (crate) fn new (bits : u16) -> Self { UEP4_T_LEN_UH_SPLIT_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_T_LEN_UH_SPLIT_DATA_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  10276. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_T_LEN_UH_SPLIT_DATA` writer - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  10277. pub struct UEP4_T_LEN_UH_SPLIT_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_T_LEN_UH_SPLIT_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10278. # [inline (always)]
  10279. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  10280. # [inline (always)]
  10281. pub fn uep4_t_len_uh_split_data (& self) -> UEP4_T_LEN_UH_SPLIT_DATA_R { UEP4_T_LEN_UH_SPLIT_DATA_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
  10282. # [inline (always)]
  10283. pub fn uep4_t_len_uh_split_data (& mut self) -> UEP4_T_LEN_UH_SPLIT_DATA_W { UEP4_T_LEN_UH_SPLIT_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
  10284. # [inline (always)]
  10285. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 transmittal length and USB host Tx SPLIT packet data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep4_t_len_r16_uh_split_data](index.html) module"]
  10286. pub struct R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC ; impl crate :: RegisterSpec for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep4_t_len_r16_uh_split_data::R](R) reader structure"]
  10287. impl crate :: Readable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep4_t_len_r16_uh_split_data::W](W) writer structure"]
  10288. impl crate :: Writable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP4_T_LEN_R16_UH_SPLIT_DATA to value 0"]
  10289. impl crate :: Resettable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { # [inline (always)]
  10290. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_TX_CTRL register accessor: an alias for `Reg<R8_UEP4_TX_CTRL_SPEC>`"]
  10291. pub type R8_UEP4_TX_CTRL = crate :: Reg < r8_uep4_tx_ctrl :: R8_UEP4_TX_CTRL_SPEC > ; # [doc = "endpoint 4 tx control"]
  10292. pub mod r8_uep4_tx_ctrl { # [doc = "Register `R8_UEP4_TX_CTRL` reader"]
  10293. pub struct R (crate :: R < R8_UEP4_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_TX_CTRL_SPEC > ; # [inline (always)]
  10294. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_TX_CTRL_SPEC >> for R { # [inline (always)]
  10295. fn from (reader : crate :: R < R8_UEP4_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_TX_CTRL` writer"]
  10296. pub struct W (crate :: W < R8_UEP4_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_TX_CTRL_SPEC > ; # [inline (always)]
  10297. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10298. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_TX_CTRL_SPEC >> for W { # [inline (always)]
  10299. fn from (writer : crate :: W < R8_UEP4_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10300. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10301. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10302. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10303. # [inline (always)]
  10304. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  10305. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10306. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  10307. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10308. # [inline (always)]
  10309. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10310. # [inline (always)]
  10311. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10312. # [inline (always)]
  10313. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  10314. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10315. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  10316. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10317. # [inline (always)]
  10318. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  10319. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10320. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  10321. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10322. # [inline (always)]
  10323. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10324. # [inline (always)]
  10325. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10326. # [inline (always)]
  10327. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10328. # [inline (always)]
  10329. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  10330. # [inline (always)]
  10331. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10332. # [inline (always)]
  10333. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10334. # [inline (always)]
  10335. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10336. # [inline (always)]
  10337. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  10338. # [inline (always)]
  10339. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10340. # [inline (always)]
  10341. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10342. # [inline (always)]
  10343. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10344. # [inline (always)]
  10345. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_tx_ctrl](index.html) module"]
  10346. pub struct R8_UEP4_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP4_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_tx_ctrl::R](R) reader structure"]
  10347. impl crate :: Readable for R8_UEP4_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_tx_ctrl::W](W) writer structure"]
  10348. impl crate :: Writable for R8_UEP4_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_TX_CTRL to value 0"]
  10349. impl crate :: Resettable for R8_UEP4_TX_CTRL_SPEC { # [inline (always)]
  10350. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_RX_CTRL register accessor: an alias for `Reg<R8_UEP4_RX_CTRL_SPEC>`"]
  10351. pub type R8_UEP4_RX_CTRL = crate :: Reg < r8_uep4_rx_ctrl :: R8_UEP4_RX_CTRL_SPEC > ; # [doc = "endpoint 4 rx control"]
  10352. pub mod r8_uep4_rx_ctrl { # [doc = "Register `R8_UEP4_RX_CTRL` reader"]
  10353. pub struct R (crate :: R < R8_UEP4_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_RX_CTRL_SPEC > ; # [inline (always)]
  10354. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_RX_CTRL_SPEC >> for R { # [inline (always)]
  10355. fn from (reader : crate :: R < R8_UEP4_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_RX_CTRL` writer"]
  10356. pub struct W (crate :: W < R8_UEP4_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_RX_CTRL_SPEC > ; # [inline (always)]
  10357. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10358. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_RX_CTRL_SPEC >> for W { # [inline (always)]
  10359. fn from (writer : crate :: W < R8_UEP4_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10360. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10361. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10362. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10363. # [inline (always)]
  10364. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  10365. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10366. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  10367. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10368. # [inline (always)]
  10369. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10370. # [inline (always)]
  10371. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10372. # [inline (always)]
  10373. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  10374. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10375. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  10376. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10377. # [inline (always)]
  10378. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  10379. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10380. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  10381. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10382. # [inline (always)]
  10383. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10384. # [inline (always)]
  10385. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10386. # [inline (always)]
  10387. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10388. # [inline (always)]
  10389. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  10390. # [inline (always)]
  10391. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10392. # [inline (always)]
  10393. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10394. # [inline (always)]
  10395. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10396. # [inline (always)]
  10397. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  10398. # [inline (always)]
  10399. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10400. # [inline (always)]
  10401. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10402. # [inline (always)]
  10403. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10404. # [inline (always)]
  10405. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_rx_ctrl](index.html) module"]
  10406. pub struct R8_UEP4_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP4_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_rx_ctrl::R](R) reader structure"]
  10407. impl crate :: Readable for R8_UEP4_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_rx_ctrl::W](W) writer structure"]
  10408. impl crate :: Writable for R8_UEP4_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_RX_CTRL to value 0"]
  10409. impl crate :: Resettable for R8_UEP4_RX_CTRL_SPEC { # [inline (always)]
  10410. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP5_T_LEN register accessor: an alias for `Reg<R16_UEP5_T_LEN_SPEC>`"]
  10411. pub type R16_UEP5_T_LEN = crate :: Reg < r16_uep5_t_len :: R16_UEP5_T_LEN_SPEC > ; # [doc = "endpoint 5 transmittal length"]
  10412. pub mod r16_uep5_t_len { # [doc = "Register `R16_UEP5_T_LEN` reader"]
  10413. pub struct R (crate :: R < R16_UEP5_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP5_T_LEN_SPEC > ; # [inline (always)]
  10414. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP5_T_LEN_SPEC >> for R { # [inline (always)]
  10415. fn from (reader : crate :: R < R16_UEP5_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP5_T_LEN` writer"]
  10416. pub struct W (crate :: W < R16_UEP5_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP5_T_LEN_SPEC > ; # [inline (always)]
  10417. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10418. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP5_T_LEN_SPEC >> for W { # [inline (always)]
  10419. fn from (writer : crate :: W < R16_UEP5_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_T_LEN` reader - endpoint 5 transmittal length"]
  10420. pub struct UEP5_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP5_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP5_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  10421. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_T_LEN` writer - endpoint 5 transmittal length"]
  10422. pub struct UEP5_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10423. # [inline (always)]
  10424. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 5 transmittal length"]
  10425. # [inline (always)]
  10426. pub fn uep5_t_len (& self) -> UEP5_T_LEN_R { UEP5_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 5 transmittal length"]
  10427. # [inline (always)]
  10428. pub fn uep5_t_len (& mut self) -> UEP5_T_LEN_W { UEP5_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  10429. # [inline (always)]
  10430. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep5_t_len](index.html) module"]
  10431. pub struct R16_UEP5_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP5_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep5_t_len::R](R) reader structure"]
  10432. impl crate :: Readable for R16_UEP5_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep5_t_len::W](W) writer structure"]
  10433. impl crate :: Writable for R16_UEP5_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP5_T_LEN to value 0"]
  10434. impl crate :: Resettable for R16_UEP5_T_LEN_SPEC { # [inline (always)]
  10435. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_TX_CTRL register accessor: an alias for `Reg<R8_UEP5_TX_CTRL_SPEC>`"]
  10436. pub type R8_UEP5_TX_CTRL = crate :: Reg < r8_uep5_tx_ctrl :: R8_UEP5_TX_CTRL_SPEC > ; # [doc = "endpoint 5 tx control"]
  10437. pub mod r8_uep5_tx_ctrl { # [doc = "Register `R8_UEP5_TX_CTRL` reader"]
  10438. pub struct R (crate :: R < R8_UEP5_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_TX_CTRL_SPEC > ; # [inline (always)]
  10439. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_TX_CTRL_SPEC >> for R { # [inline (always)]
  10440. fn from (reader : crate :: R < R8_UEP5_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_TX_CTRL` writer"]
  10441. pub struct W (crate :: W < R8_UEP5_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_TX_CTRL_SPEC > ; # [inline (always)]
  10442. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10443. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_TX_CTRL_SPEC >> for W { # [inline (always)]
  10444. fn from (writer : crate :: W < R8_UEP5_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10445. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10446. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10447. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10448. # [inline (always)]
  10449. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  10450. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10451. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  10452. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10453. # [inline (always)]
  10454. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10455. # [inline (always)]
  10456. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10457. # [inline (always)]
  10458. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  10459. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10460. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  10461. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10462. # [inline (always)]
  10463. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  10464. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10465. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  10466. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10467. # [inline (always)]
  10468. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10469. # [inline (always)]
  10470. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10471. # [inline (always)]
  10472. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10473. # [inline (always)]
  10474. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  10475. # [inline (always)]
  10476. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10477. # [inline (always)]
  10478. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10479. # [inline (always)]
  10480. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10481. # [inline (always)]
  10482. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  10483. # [inline (always)]
  10484. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10485. # [inline (always)]
  10486. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10487. # [inline (always)]
  10488. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10489. # [inline (always)]
  10490. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_tx_ctrl](index.html) module"]
  10491. pub struct R8_UEP5_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP5_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_tx_ctrl::R](R) reader structure"]
  10492. impl crate :: Readable for R8_UEP5_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_tx_ctrl::W](W) writer structure"]
  10493. impl crate :: Writable for R8_UEP5_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_TX_CTRL to value 0"]
  10494. impl crate :: Resettable for R8_UEP5_TX_CTRL_SPEC { # [inline (always)]
  10495. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_RX_CTRL register accessor: an alias for `Reg<R8_UEP5_RX_CTRL_SPEC>`"]
  10496. pub type R8_UEP5_RX_CTRL = crate :: Reg < r8_uep5_rx_ctrl :: R8_UEP5_RX_CTRL_SPEC > ; # [doc = "endpoint 5 rx control"]
  10497. pub mod r8_uep5_rx_ctrl { # [doc = "Register `R8_UEP5_RX_CTRL` reader"]
  10498. pub struct R (crate :: R < R8_UEP5_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_RX_CTRL_SPEC > ; # [inline (always)]
  10499. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_RX_CTRL_SPEC >> for R { # [inline (always)]
  10500. fn from (reader : crate :: R < R8_UEP5_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_RX_CTRL` writer"]
  10501. pub struct W (crate :: W < R8_UEP5_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_RX_CTRL_SPEC > ; # [inline (always)]
  10502. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10503. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_RX_CTRL_SPEC >> for W { # [inline (always)]
  10504. fn from (writer : crate :: W < R8_UEP5_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10505. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10506. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10507. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10508. # [inline (always)]
  10509. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  10510. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10511. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  10512. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10513. # [inline (always)]
  10514. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10515. # [inline (always)]
  10516. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10517. # [inline (always)]
  10518. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  10519. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10520. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  10521. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10522. # [inline (always)]
  10523. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  10524. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10525. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  10526. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10527. # [inline (always)]
  10528. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10529. # [inline (always)]
  10530. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10531. # [inline (always)]
  10532. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10533. # [inline (always)]
  10534. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  10535. # [inline (always)]
  10536. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10537. # [inline (always)]
  10538. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10539. # [inline (always)]
  10540. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10541. # [inline (always)]
  10542. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  10543. # [inline (always)]
  10544. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10545. # [inline (always)]
  10546. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10547. # [inline (always)]
  10548. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10549. # [inline (always)]
  10550. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_rx_ctrl](index.html) module"]
  10551. pub struct R8_UEP5_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP5_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_rx_ctrl::R](R) reader structure"]
  10552. impl crate :: Readable for R8_UEP5_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_rx_ctrl::W](W) writer structure"]
  10553. impl crate :: Writable for R8_UEP5_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_RX_CTRL to value 0"]
  10554. impl crate :: Resettable for R8_UEP5_RX_CTRL_SPEC { # [inline (always)]
  10555. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP6_T_LEN register accessor: an alias for `Reg<R16_UEP6_T_LEN_SPEC>`"]
  10556. pub type R16_UEP6_T_LEN = crate :: Reg < r16_uep6_t_len :: R16_UEP6_T_LEN_SPEC > ; # [doc = "endpoint 6 transmittal length"]
  10557. pub mod r16_uep6_t_len { # [doc = "Register `R16_UEP6_T_LEN` reader"]
  10558. pub struct R (crate :: R < R16_UEP6_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP6_T_LEN_SPEC > ; # [inline (always)]
  10559. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP6_T_LEN_SPEC >> for R { # [inline (always)]
  10560. fn from (reader : crate :: R < R16_UEP6_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP6_T_LEN` writer"]
  10561. pub struct W (crate :: W < R16_UEP6_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP6_T_LEN_SPEC > ; # [inline (always)]
  10562. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10563. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP6_T_LEN_SPEC >> for W { # [inline (always)]
  10564. fn from (writer : crate :: W < R16_UEP6_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_T_LEN` reader - endpoint 6 transmittal length"]
  10565. pub struct UEP6_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP6_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP6_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  10566. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_T_LEN` writer - endpoint 6 transmittal length"]
  10567. pub struct UEP6_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10568. # [inline (always)]
  10569. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 6 transmittal length"]
  10570. # [inline (always)]
  10571. pub fn uep6_t_len (& self) -> UEP6_T_LEN_R { UEP6_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 6 transmittal length"]
  10572. # [inline (always)]
  10573. pub fn uep6_t_len (& mut self) -> UEP6_T_LEN_W { UEP6_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  10574. # [inline (always)]
  10575. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep6_t_len](index.html) module"]
  10576. pub struct R16_UEP6_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP6_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep6_t_len::R](R) reader structure"]
  10577. impl crate :: Readable for R16_UEP6_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep6_t_len::W](W) writer structure"]
  10578. impl crate :: Writable for R16_UEP6_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP6_T_LEN to value 0"]
  10579. impl crate :: Resettable for R16_UEP6_T_LEN_SPEC { # [inline (always)]
  10580. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP6_TX_CTRL register accessor: an alias for `Reg<R8_UEP6_TX_CTRL_SPEC>`"]
  10581. pub type R8_UEP6_TX_CTRL = crate :: Reg < r8_uep6_tx_ctrl :: R8_UEP6_TX_CTRL_SPEC > ; # [doc = "endpoint 6 tx control"]
  10582. pub mod r8_uep6_tx_ctrl { # [doc = "Register `R8_UEP6_TX_CTRL` reader"]
  10583. pub struct R (crate :: R < R8_UEP6_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP6_TX_CTRL_SPEC > ; # [inline (always)]
  10584. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP6_TX_CTRL_SPEC >> for R { # [inline (always)]
  10585. fn from (reader : crate :: R < R8_UEP6_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP6_TX_CTRL` writer"]
  10586. pub struct W (crate :: W < R8_UEP6_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP6_TX_CTRL_SPEC > ; # [inline (always)]
  10587. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10588. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP6_TX_CTRL_SPEC >> for W { # [inline (always)]
  10589. fn from (writer : crate :: W < R8_UEP6_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10590. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10591. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10592. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10593. # [inline (always)]
  10594. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  10595. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10596. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  10597. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10598. # [inline (always)]
  10599. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10600. # [inline (always)]
  10601. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10602. # [inline (always)]
  10603. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  10604. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10605. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  10606. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10607. # [inline (always)]
  10608. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  10609. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10610. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  10611. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10612. # [inline (always)]
  10613. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10614. # [inline (always)]
  10615. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10616. # [inline (always)]
  10617. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10618. # [inline (always)]
  10619. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  10620. # [inline (always)]
  10621. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10622. # [inline (always)]
  10623. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10624. # [inline (always)]
  10625. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10626. # [inline (always)]
  10627. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  10628. # [inline (always)]
  10629. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10630. # [inline (always)]
  10631. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10632. # [inline (always)]
  10633. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10634. # [inline (always)]
  10635. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep6_tx_ctrl](index.html) module"]
  10636. pub struct R8_UEP6_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP6_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep6_tx_ctrl::R](R) reader structure"]
  10637. impl crate :: Readable for R8_UEP6_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep6_tx_ctrl::W](W) writer structure"]
  10638. impl crate :: Writable for R8_UEP6_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP6_TX_CTRL to value 0"]
  10639. impl crate :: Resettable for R8_UEP6_TX_CTRL_SPEC { # [inline (always)]
  10640. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP6_RX_CTRL register accessor: an alias for `Reg<R8_UEP6_RX_CTRL_SPEC>`"]
  10641. pub type R8_UEP6_RX_CTRL = crate :: Reg < r8_uep6_rx_ctrl :: R8_UEP6_RX_CTRL_SPEC > ; # [doc = "endpoint 6 rx control"]
  10642. pub mod r8_uep6_rx_ctrl { # [doc = "Register `R8_UEP6_RX_CTRL` reader"]
  10643. pub struct R (crate :: R < R8_UEP6_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP6_RX_CTRL_SPEC > ; # [inline (always)]
  10644. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP6_RX_CTRL_SPEC >> for R { # [inline (always)]
  10645. fn from (reader : crate :: R < R8_UEP6_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP6_RX_CTRL` writer"]
  10646. pub struct W (crate :: W < R8_UEP6_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP6_RX_CTRL_SPEC > ; # [inline (always)]
  10647. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10648. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP6_RX_CTRL_SPEC >> for W { # [inline (always)]
  10649. fn from (writer : crate :: W < R8_UEP6_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10650. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10651. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10652. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10653. # [inline (always)]
  10654. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  10655. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10656. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  10657. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10658. # [inline (always)]
  10659. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10660. # [inline (always)]
  10661. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10662. # [inline (always)]
  10663. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  10664. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10665. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  10666. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10667. # [inline (always)]
  10668. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  10669. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10670. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  10671. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10672. # [inline (always)]
  10673. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10674. # [inline (always)]
  10675. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10676. # [inline (always)]
  10677. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10678. # [inline (always)]
  10679. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  10680. # [inline (always)]
  10681. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10682. # [inline (always)]
  10683. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10684. # [inline (always)]
  10685. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10686. # [inline (always)]
  10687. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  10688. # [inline (always)]
  10689. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10690. # [inline (always)]
  10691. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10692. # [inline (always)]
  10693. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10694. # [inline (always)]
  10695. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep6_rx_ctrl](index.html) module"]
  10696. pub struct R8_UEP6_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP6_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep6_rx_ctrl::R](R) reader structure"]
  10697. impl crate :: Readable for R8_UEP6_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep6_rx_ctrl::W](W) writer structure"]
  10698. impl crate :: Writable for R8_UEP6_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP6_RX_CTRL to value 0"]
  10699. impl crate :: Resettable for R8_UEP6_RX_CTRL_SPEC { # [inline (always)]
  10700. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP7_T_LEN register accessor: an alias for `Reg<R16_UEP7_T_LEN_SPEC>`"]
  10701. pub type R16_UEP7_T_LEN = crate :: Reg < r16_uep7_t_len :: R16_UEP7_T_LEN_SPEC > ; # [doc = "endpoint 7 transmittal length"]
  10702. pub mod r16_uep7_t_len { # [doc = "Register `R16_UEP7_T_LEN` reader"]
  10703. pub struct R (crate :: R < R16_UEP7_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP7_T_LEN_SPEC > ; # [inline (always)]
  10704. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP7_T_LEN_SPEC >> for R { # [inline (always)]
  10705. fn from (reader : crate :: R < R16_UEP7_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP7_T_LEN` writer"]
  10706. pub struct W (crate :: W < R16_UEP7_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP7_T_LEN_SPEC > ; # [inline (always)]
  10707. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10708. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP7_T_LEN_SPEC >> for W { # [inline (always)]
  10709. fn from (writer : crate :: W < R16_UEP7_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_T_LEN` reader - endpoint 7 transmittal length"]
  10710. pub struct UEP7_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP7_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP7_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  10711. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_T_LEN` writer - endpoint 7 transmittal length"]
  10712. pub struct UEP7_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10713. # [inline (always)]
  10714. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 7 transmittal length"]
  10715. # [inline (always)]
  10716. pub fn uep7_t_len (& self) -> UEP7_T_LEN_R { UEP7_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 7 transmittal length"]
  10717. # [inline (always)]
  10718. pub fn uep7_t_len (& mut self) -> UEP7_T_LEN_W { UEP7_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  10719. # [inline (always)]
  10720. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep7_t_len](index.html) module"]
  10721. pub struct R16_UEP7_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP7_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep7_t_len::R](R) reader structure"]
  10722. impl crate :: Readable for R16_UEP7_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep7_t_len::W](W) writer structure"]
  10723. impl crate :: Writable for R16_UEP7_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP7_T_LEN to value 0"]
  10724. impl crate :: Resettable for R16_UEP7_T_LEN_SPEC { # [inline (always)]
  10725. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_TX_CTRL register accessor: an alias for `Reg<R8_UEP7_TX_CTRL_SPEC>`"]
  10726. pub type R8_UEP7_TX_CTRL = crate :: Reg < r8_uep7_tx_ctrl :: R8_UEP7_TX_CTRL_SPEC > ; # [doc = "endpoint 7 tx control"]
  10727. pub mod r8_uep7_tx_ctrl { # [doc = "Register `R8_UEP7_TX_CTRL` reader"]
  10728. pub struct R (crate :: R < R8_UEP7_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_TX_CTRL_SPEC > ; # [inline (always)]
  10729. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_TX_CTRL_SPEC >> for R { # [inline (always)]
  10730. fn from (reader : crate :: R < R8_UEP7_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_TX_CTRL` writer"]
  10731. pub struct W (crate :: W < R8_UEP7_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_TX_CTRL_SPEC > ; # [inline (always)]
  10732. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10733. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_TX_CTRL_SPEC >> for W { # [inline (always)]
  10734. fn from (writer : crate :: W < R8_UEP7_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10735. pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10736. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10737. pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10738. # [inline (always)]
  10739. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
  10740. pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10741. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
  10742. pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10743. # [inline (always)]
  10744. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10745. # [inline (always)]
  10746. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10747. # [inline (always)]
  10748. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
  10749. pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10750. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
  10751. pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10752. # [inline (always)]
  10753. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
  10754. pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10755. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
  10756. pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10757. # [inline (always)]
  10758. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10759. # [inline (always)]
  10760. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10761. # [inline (always)]
  10762. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10763. # [inline (always)]
  10764. pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
  10765. # [inline (always)]
  10766. pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10767. # [inline (always)]
  10768. pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10769. # [inline (always)]
  10770. pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
  10771. # [inline (always)]
  10772. pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
  10773. # [inline (always)]
  10774. pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
  10775. # [inline (always)]
  10776. pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
  10777. # [inline (always)]
  10778. pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10779. # [inline (always)]
  10780. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_tx_ctrl](index.html) module"]
  10781. pub struct R8_UEP7_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP7_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_tx_ctrl::R](R) reader structure"]
  10782. impl crate :: Readable for R8_UEP7_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_tx_ctrl::W](W) writer structure"]
  10783. impl crate :: Writable for R8_UEP7_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_TX_CTRL to value 0"]
  10784. impl crate :: Resettable for R8_UEP7_TX_CTRL_SPEC { # [inline (always)]
  10785. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_RX_CTRL register accessor: an alias for `Reg<R8_UEP7_RX_CTRL_SPEC>`"]
  10786. pub type R8_UEP7_RX_CTRL = crate :: Reg < r8_uep7_rx_ctrl :: R8_UEP7_RX_CTRL_SPEC > ; # [doc = "endpoint 7 rx control"]
  10787. pub mod r8_uep7_rx_ctrl { # [doc = "Register `R8_UEP7_RX_CTRL` reader"]
  10788. pub struct R (crate :: R < R8_UEP7_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_RX_CTRL_SPEC > ; # [inline (always)]
  10789. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_RX_CTRL_SPEC >> for R { # [inline (always)]
  10790. fn from (reader : crate :: R < R8_UEP7_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_RX_CTRL` writer"]
  10791. pub struct W (crate :: W < R8_UEP7_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_RX_CTRL_SPEC > ; # [inline (always)]
  10792. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10793. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_RX_CTRL_SPEC >> for W { # [inline (always)]
  10794. fn from (writer : crate :: W < R8_UEP7_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10795. pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10796. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10797. pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10798. # [inline (always)]
  10799. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
  10800. pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10801. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
  10802. pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
  10803. # [inline (always)]
  10804. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10805. # [inline (always)]
  10806. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10807. # [inline (always)]
  10808. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
  10809. pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  10810. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
  10811. pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10812. # [inline (always)]
  10813. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
  10814. pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  10815. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
  10816. pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
  10817. # [inline (always)]
  10818. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  10819. # [inline (always)]
  10820. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  10821. # [inline (always)]
  10822. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10823. # [inline (always)]
  10824. pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
  10825. # [inline (always)]
  10826. pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10827. # [inline (always)]
  10828. pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10829. # [inline (always)]
  10830. pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
  10831. # [inline (always)]
  10832. pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
  10833. # [inline (always)]
  10834. pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
  10835. # [inline (always)]
  10836. pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
  10837. # [inline (always)]
  10838. pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  10839. # [inline (always)]
  10840. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_rx_ctrl](index.html) module"]
  10841. pub struct R8_UEP7_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP7_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_rx_ctrl::R](R) reader structure"]
  10842. impl crate :: Readable for R8_UEP7_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_rx_ctrl::W](W) writer structure"]
  10843. impl crate :: Writable for R8_UEP7_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_RX_CTRL to value 0"]
  10844. impl crate :: Resettable for R8_UEP7_RX_CTRL_SPEC { # [inline (always)]
  10845. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "ETH register (Please refer to subprogram library)"]
  10846. pub struct ETH { _marker : PhantomData < * const () > } unsafe impl Send for ETH { } impl ETH { # [doc = r"Pointer to the register block"]
  10847. pub const PTR : * const eth :: RegisterBlock = 0x4000_c000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  10848. # [inline (always)]
  10849. pub const fn ptr () -> * const eth :: RegisterBlock { Self :: PTR } } impl Deref for ETH { type Target = eth :: RegisterBlock ; # [inline (always)]
  10850. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for ETH { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("ETH") . finish () } } # [doc = "ETH register (Please refer to subprogram library)"]
  10851. pub mod eth { # [doc = r"Register block"]
  10852. # [repr (C)]
  10853. pub struct RegisterBlock { # [doc = "0x00 - MAC Frame Configure Register"]
  10854. pub r32_eth_maccr : crate :: Reg < r32_eth_maccr :: R32_ETH_MACCR_SPEC > , # [doc = "0x04 - MAC Frame Filter Configure Register"]
  10855. pub r32_eth_macffr : crate :: Reg < r32_eth_macffr :: R32_ETH_MACFFR_SPEC > , # [doc = "0x08 - MAC Hash Table High Register"]
  10856. pub r32_eth_machthr : crate :: Reg < r32_eth_machthr :: R32_ETH_MACHTHR_SPEC > , # [doc = "0x0c - MAC Hash Table Low Register"]
  10857. pub r32_eth_machtlr : crate :: Reg < r32_eth_machtlr :: R32_ETH_MACHTLR_SPEC > , # [doc = "0x10 - MAC MII Address Register"]
  10858. pub r32_eth_macmiiar : crate :: Reg < r32_eth_macmiiar :: R32_ETH_MACMIIAR_SPEC > , # [doc = "0x14 - MAC MII Data Register"]
  10859. pub r32_eth_macmiidr : crate :: Reg < r32_eth_macmiidr :: R32_ETH_MACMIIDR_SPEC > , # [doc = "0x18 - MAC Flow-Control Register"]
  10860. pub r32_eth_macfcr : crate :: Reg < r32_eth_macfcr :: R32_ETH_MACFCR_SPEC > , # [doc = "0x1c - MAC VLAN Tag Register"]
  10861. pub r32_eth_macvlantr : crate :: Reg < r32_eth_macvlantr :: R32_ETH_MACVLANTR_SPEC > , _reserved8 : [u8 ; 0x08]
  10862. , # [doc = "0x28 - MAC Remote Wake-Up Frame Filter Register"]
  10863. pub r32_eth_macrwuffr : crate :: Reg < r32_eth_macrwuffr :: R32_ETH_MACRWUFFR_SPEC > , # [doc = "0x2c - MAC PMT Control and Reset Register"]
  10864. pub r32_eth_macpmtcsr : crate :: Reg < r32_eth_macpmtcsr :: R32_ETH_MACPMTCSR_SPEC > , _reserved10 : [u8 ; 0x08]
  10865. , # [doc = "0x38 - MAC Interrupt Status Register"]
  10866. pub r32_eth_macsr : crate :: Reg < r32_eth_macsr :: R32_ETH_MACSR_SPEC > , # [doc = "0x3c - MAC Interrupt Mask Register"]
  10867. pub r32_eth_macimr : crate :: Reg < r32_eth_macimr :: R32_ETH_MACIMR_SPEC > , # [doc = "0x40 - MAC Address 0 High Register"]
  10868. pub r32_eth_maca0hr : crate :: Reg < r32_eth_maca0hr :: R32_ETH_MACA0HR_SPEC > , # [doc = "0x44 - MAC Address 0 Low Register"]
  10869. pub r32_eth_maca0lr : crate :: Reg < r32_eth_maca0lr :: R32_ETH_MACA0LR_SPEC > , # [doc = "0x48 - MAC Address 1 High Register"]
  10870. pub r32_eth_maca1hr : crate :: Reg < r32_eth_maca1hr :: R32_ETH_MACA1HR_SPEC > , # [doc = "0x4c - MAC Address 1 Low Register"]
  10871. pub r32_eth_maca1lr : crate :: Reg < r32_eth_maca1lr :: R32_ETH_MACA1LR_SPEC > , # [doc = "0x50 - MAC Address 2 High Register"]
  10872. pub r32_eth_maca2hr : crate :: Reg < r32_eth_maca2hr :: R32_ETH_MACA2HR_SPEC > , # [doc = "0x54 - MAC Address 2 Low Register"]
  10873. pub r32_eth_maca2lr : crate :: Reg < r32_eth_maca2lr :: R32_ETH_MACA2LR_SPEC > , # [doc = "0x58 - MAC Address 3 High Register"]
  10874. pub r32_eth_maca3hr : crate :: Reg < r32_eth_maca3hr :: R32_ETH_MACA3HR_SPEC > , # [doc = "0x5c - MAC Address 3 Low Register"]
  10875. pub r32_eth_maca3lr : crate :: Reg < r32_eth_maca3lr :: R32_ETH_MACA3LR_SPEC > , _reserved20 : [u8 ; 0xa0]
  10876. , # [doc = "0x100 - MMC Control Register"]
  10877. pub r32_eth_mmccr : crate :: Reg < r32_eth_mmccr :: R32_ETH_MMCCR_SPEC > , # [doc = "0x104 - MMC RX Interrupt Register"]
  10878. pub r32_eth_mmcrir : crate :: Reg < r32_eth_mmcrir :: R32_ETH_MMCRIR_SPEC > , # [doc = "0x108 - MMC TX Interrupt Register"]
  10879. pub r32_eth_mmctir : crate :: Reg < r32_eth_mmctir :: R32_ETH_MMCTIR_SPEC > , # [doc = "0x10c - MMC RX Interrupt Mask Register"]
  10880. pub r32_eth_mmcrimr : crate :: Reg < r32_eth_mmcrimr :: R32_ETH_MMCRIMR_SPEC > , _reserved24 : [u8 ; 0x34]
  10881. , # [doc = "0x144 - MMC TX Interrupt Mask Register"]
  10882. pub r32_eth_mmctimr : crate :: Reg < r32_eth_mmctimr :: R32_ETH_MMCTIMR_SPEC > , _reserved25 : [u8 ; 0x04]
  10883. , # [doc = "0x14c - MMC Transmit Good Frame After Single Conflict Counter Register"]
  10884. pub r32_eth_mmctgfsccr : crate :: Reg < r32_eth_mmctgfsccr :: R32_ETH_MMCTGFSCCR_SPEC > , # [doc = "0x150 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  10885. pub r32_eth_mmctgfmsccr : crate :: Reg < r32_eth_mmctgfmsccr :: R32_ETH_MMCTGFMSCCR_SPEC > , _reserved27 : [u8 ; 0x14]
  10886. , # [doc = "0x168 - MMC Transmit Good Frame Counter Register"]
  10887. pub r32_eth_mmctgfcr : crate :: Reg < r32_eth_mmctgfcr :: R32_ETH_MMCTGFCR_SPEC > , _reserved28 : [u8 ; 0x28]
  10888. , # [doc = "0x194 - MMC RX Frame CRC Error Counter Register"]
  10889. pub r32_eth_mmcrfcecr : crate :: Reg < r32_eth_mmcrfcecr :: R32_ETH_MMCRFCECR_SPEC > , # [doc = "0x198 - MMC RX Frame Alignment Error Counter Register"]
  10890. pub r32_eth_mmcrfaecr : crate :: Reg < r32_eth_mmcrfaecr :: R32_ETH_MMCRFAECR_SPEC > , _reserved30 : [u8 ; 0x28]
  10891. , # [doc = "0x1c4 - MMC RX Good Unicast Frame Counter Register"]
  10892. pub r32_eth_mmcrgufcr : crate :: Reg < r32_eth_mmcrgufcr :: R32_ETH_MMCRGUFCR_SPEC > , _reserved31 : [u8 ; 0x0538]
  10893. , # [doc = "0x700 - PTP Time Stamp Control Register"]
  10894. pub r32_eth_ptptscr : crate :: Reg < r32_eth_ptptscr :: R32_ETH_PTPTSCR_SPEC > , # [doc = "0x704 - PTP Sub Second Increment Register"]
  10895. pub r32_eth_ptpssir : crate :: Reg < r32_eth_ptpssir :: R32_ETH_PTPSSIR_SPEC > , # [doc = "0x708 - PTP Time Stamp High Register"]
  10896. pub r32_eth_ptptshr : crate :: Reg < r32_eth_ptptshr :: R32_ETH_PTPTSHR_SPEC > , # [doc = "0x70c - PTP Time Stamp Low Register"]
  10897. pub r32_eth_ptptslr : crate :: Reg < r32_eth_ptptslr :: R32_ETH_PTPTSLR_SPEC > , # [doc = "0x710 - PTP Time Stamp High Update Register"]
  10898. pub r32_eth_ptptshur : crate :: Reg < r32_eth_ptptshur :: R32_ETH_PTPTSHUR_SPEC > , # [doc = "0x714 - PTP Time Stamp Low Update Register"]
  10899. pub r32_eth_ptptslur : crate :: Reg < r32_eth_ptptslur :: R32_ETH_PTPTSLUR_SPEC > , # [doc = "0x718 - PTP Time Stamp Accumulating Register"]
  10900. pub r32_eth_ptptsar : crate :: Reg < r32_eth_ptptsar :: R32_ETH_PTPTSAR_SPEC > , # [doc = "0x71c - PTP Target Time High Register"]
  10901. pub r32_eth_ptptthr : crate :: Reg < r32_eth_ptptthr :: R32_ETH_PTPTTHR_SPEC > , # [doc = "0x720 - PTP Target Time Low Register"]
  10902. pub r32_eth_ptpttlr : crate :: Reg < r32_eth_ptpttlr :: R32_ETH_PTPTTLR_SPEC > , # [doc = "0x724 - PTP Time Stamp Status Register"]
  10903. pub r32_eth_ptptssr : crate :: Reg < r32_eth_ptptssr :: R32_ETH_PTPTSSR_SPEC > , _reserved41 : [u8 ; 0x08d8]
  10904. , # [doc = "0x1000 - DMA Bus Mode Register"]
  10905. pub r32_eth_dmabmr : crate :: Reg < r32_eth_dmabmr :: R32_ETH_DMABMR_SPEC > , # [doc = "0x1004 - DMA TX Poll Demand Register"]
  10906. pub r32_eth_dmatpdr : crate :: Reg < r32_eth_dmatpdr :: R32_ETH_DMATPDR_SPEC > , # [doc = "0x1008 - DMA RX Poll Demand Register"]
  10907. pub r32_eth_dmarpdr : crate :: Reg < r32_eth_dmarpdr :: R32_ETH_DMARPDR_SPEC > , # [doc = "0x100c - DMA RX Description List Address Register"]
  10908. pub r32_eth_dmardlar : crate :: Reg < r32_eth_dmardlar :: R32_ETH_DMARDLAR_SPEC > , # [doc = "0x1010 - DMA TX Description List Address Register"]
  10909. pub r32_eth_dmatdlar : crate :: Reg < r32_eth_dmatdlar :: R32_ETH_DMATDLAR_SPEC > , # [doc = "0x1014 - DMA Status Register"]
  10910. pub r32_eth_dmasr : crate :: Reg < r32_eth_dmasr :: R32_ETH_DMASR_SPEC > , # [doc = "0x1018 - DMA Operate Mode Register"]
  10911. pub r32_eth_dmaomr : crate :: Reg < r32_eth_dmaomr :: R32_ETH_DMAOMR_SPEC > , # [doc = "0x101c - DMA Interrupt Enable Register"]
  10912. pub r32_eth_dmaier : crate :: Reg < r32_eth_dmaier :: R32_ETH_DMAIER_SPEC > , # [doc = "0x1020 - DMA Missing Frame and Buffer Overflow Counter Register"]
  10913. pub r32_eth_dmamfbocr : crate :: Reg < r32_eth_dmamfbocr :: R32_ETH_DMAMFBOCR_SPEC > , # [doc = "0x1024 - DMA RX Status Watchdog Timer Register"]
  10914. pub r32_eth_dmarswtr : crate :: Reg < r32_eth_dmarswtr :: R32_ETH_DMARSWTR_SPEC > , _reserved51 : [u8 ; 0x20]
  10915. , # [doc = "0x1048 - DMA Current Host TX Description Register"]
  10916. pub r32_eth_dmachtdr : crate :: Reg < r32_eth_dmachtdr :: R32_ETH_DMACHTDR_SPEC > , # [doc = "0x104c - DMA Current Host RX Description Register"]
  10917. pub r32_eth_dmachrdr : crate :: Reg < r32_eth_dmachrdr :: R32_ETH_DMACHRDR_SPEC > , # [doc = "0x1050 - DMA Current Host TX Buffer Address Register"]
  10918. pub r32_eth_dmachtbar : crate :: Reg < r32_eth_dmachtbar :: R32_ETH_DMACHTBAR_SPEC > , # [doc = "0x1054 - DMA Current Host RX Buffer Address Register"]
  10919. pub r32_eth_dmachrbar : crate :: Reg < r32_eth_dmachrbar :: R32_ETH_DMACHRBAR_SPEC > , } # [doc = "R32_ETH_MACCR register accessor: an alias for `Reg<R32_ETH_MACCR_SPEC>`"]
  10920. pub type R32_ETH_MACCR = crate :: Reg < r32_eth_maccr :: R32_ETH_MACCR_SPEC > ; # [doc = "MAC Frame Configure Register"]
  10921. pub mod r32_eth_maccr { # [doc = "Register `R32_ETH_MACCR` reader"]
  10922. pub struct R (crate :: R < R32_ETH_MACCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACCR_SPEC > ; # [inline (always)]
  10923. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACCR_SPEC >> for R { # [inline (always)]
  10924. fn from (reader : crate :: R < R32_ETH_MACCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACCR` writer"]
  10925. pub struct W (crate :: W < R32_ETH_MACCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACCR_SPEC > ; # [inline (always)]
  10926. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10927. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACCR_SPEC >> for W { # [inline (always)]
  10928. fn from (writer : crate :: W < R32_ETH_MACCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACCR` reader - MAC Frame Configure Register"]
  10929. pub struct R32_ETH_MACCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  10930. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACCR` writer - MAC Frame Configure Register"]
  10931. pub struct R32_ETH_MACCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10932. # [inline (always)]
  10933. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Frame Configure Register"]
  10934. # [inline (always)]
  10935. pub fn r32_eth_maccr (& self) -> R32_ETH_MACCR_R { R32_ETH_MACCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Frame Configure Register"]
  10936. # [inline (always)]
  10937. pub fn r32_eth_maccr (& mut self) -> R32_ETH_MACCR_W { R32_ETH_MACCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  10938. # [inline (always)]
  10939. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Frame Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maccr](index.html) module"]
  10940. pub struct R32_ETH_MACCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maccr::R](R) reader structure"]
  10941. impl crate :: Readable for R32_ETH_MACCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maccr::W](W) writer structure"]
  10942. impl crate :: Writable for R32_ETH_MACCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACCR to value 0"]
  10943. impl crate :: Resettable for R32_ETH_MACCR_SPEC { # [inline (always)]
  10944. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACFFR register accessor: an alias for `Reg<R32_ETH_MACFFR_SPEC>`"]
  10945. pub type R32_ETH_MACFFR = crate :: Reg < r32_eth_macffr :: R32_ETH_MACFFR_SPEC > ; # [doc = "MAC Frame Filter Configure Register"]
  10946. pub mod r32_eth_macffr { # [doc = "Register `R32_ETH_MACFFR` reader"]
  10947. pub struct R (crate :: R < R32_ETH_MACFFR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACFFR_SPEC > ; # [inline (always)]
  10948. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACFFR_SPEC >> for R { # [inline (always)]
  10949. fn from (reader : crate :: R < R32_ETH_MACFFR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACFFR` writer"]
  10950. pub struct W (crate :: W < R32_ETH_MACFFR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACFFR_SPEC > ; # [inline (always)]
  10951. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10952. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACFFR_SPEC >> for W { # [inline (always)]
  10953. fn from (writer : crate :: W < R32_ETH_MACFFR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACFFR` reader - MAC Frame Filter Configure Register"]
  10954. pub struct R32_ETH_MACFFR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACFFR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACFFR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACFFR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  10955. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACFFR` writer - MAC Frame Filter Configure Register"]
  10956. pub struct R32_ETH_MACFFR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACFFR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10957. # [inline (always)]
  10958. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Frame Filter Configure Register"]
  10959. # [inline (always)]
  10960. pub fn r32_eth_macffr (& self) -> R32_ETH_MACFFR_R { R32_ETH_MACFFR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Frame Filter Configure Register"]
  10961. # [inline (always)]
  10962. pub fn r32_eth_macffr (& mut self) -> R32_ETH_MACFFR_W { R32_ETH_MACFFR_W { w : self } } # [doc = "Writes raw bits to the register."]
  10963. # [inline (always)]
  10964. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Frame Filter Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macffr](index.html) module"]
  10965. pub struct R32_ETH_MACFFR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACFFR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macffr::R](R) reader structure"]
  10966. impl crate :: Readable for R32_ETH_MACFFR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macffr::W](W) writer structure"]
  10967. impl crate :: Writable for R32_ETH_MACFFR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACFFR to value 0"]
  10968. impl crate :: Resettable for R32_ETH_MACFFR_SPEC { # [inline (always)]
  10969. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACHTHR register accessor: an alias for `Reg<R32_ETH_MACHTHR_SPEC>`"]
  10970. pub type R32_ETH_MACHTHR = crate :: Reg < r32_eth_machthr :: R32_ETH_MACHTHR_SPEC > ; # [doc = "MAC Hash Table High Register"]
  10971. pub mod r32_eth_machthr { # [doc = "Register `R32_ETH_MACHTHR` reader"]
  10972. pub struct R (crate :: R < R32_ETH_MACHTHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACHTHR_SPEC > ; # [inline (always)]
  10973. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACHTHR_SPEC >> for R { # [inline (always)]
  10974. fn from (reader : crate :: R < R32_ETH_MACHTHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACHTHR` writer"]
  10975. pub struct W (crate :: W < R32_ETH_MACHTHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACHTHR_SPEC > ; # [inline (always)]
  10976. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  10977. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACHTHR_SPEC >> for W { # [inline (always)]
  10978. fn from (writer : crate :: W < R32_ETH_MACHTHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACHTHR` reader - MAC Hash Table High Register"]
  10979. pub struct R32_ETH_MACHTHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACHTHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACHTHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACHTHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  10980. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACHTHR` writer - MAC Hash Table High Register"]
  10981. pub struct R32_ETH_MACHTHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACHTHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  10982. # [inline (always)]
  10983. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Hash Table High Register"]
  10984. # [inline (always)]
  10985. pub fn r32_eth_machthr (& self) -> R32_ETH_MACHTHR_R { R32_ETH_MACHTHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Hash Table High Register"]
  10986. # [inline (always)]
  10987. pub fn r32_eth_machthr (& mut self) -> R32_ETH_MACHTHR_W { R32_ETH_MACHTHR_W { w : self } } # [doc = "Writes raw bits to the register."]
  10988. # [inline (always)]
  10989. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Hash Table High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_machthr](index.html) module"]
  10990. pub struct R32_ETH_MACHTHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACHTHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_machthr::R](R) reader structure"]
  10991. impl crate :: Readable for R32_ETH_MACHTHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_machthr::W](W) writer structure"]
  10992. impl crate :: Writable for R32_ETH_MACHTHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACHTHR to value 0"]
  10993. impl crate :: Resettable for R32_ETH_MACHTHR_SPEC { # [inline (always)]
  10994. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACHTLR register accessor: an alias for `Reg<R32_ETH_MACHTLR_SPEC>`"]
  10995. pub type R32_ETH_MACHTLR = crate :: Reg < r32_eth_machtlr :: R32_ETH_MACHTLR_SPEC > ; # [doc = "MAC Hash Table Low Register"]
  10996. pub mod r32_eth_machtlr { # [doc = "Register `R32_ETH_MACHTLR` reader"]
  10997. pub struct R (crate :: R < R32_ETH_MACHTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACHTLR_SPEC > ; # [inline (always)]
  10998. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACHTLR_SPEC >> for R { # [inline (always)]
  10999. fn from (reader : crate :: R < R32_ETH_MACHTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACHTLR` writer"]
  11000. pub struct W (crate :: W < R32_ETH_MACHTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACHTLR_SPEC > ; # [inline (always)]
  11001. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11002. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACHTLR_SPEC >> for W { # [inline (always)]
  11003. fn from (writer : crate :: W < R32_ETH_MACHTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACHTLR` reader - MAC Hash Table Low Register"]
  11004. pub struct R32_ETH_MACHTLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACHTLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACHTLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACHTLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11005. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACHTLR` writer - MAC Hash Table Low Register"]
  11006. pub struct R32_ETH_MACHTLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACHTLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11007. # [inline (always)]
  11008. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Hash Table Low Register"]
  11009. # [inline (always)]
  11010. pub fn r32_eth_machtlr (& self) -> R32_ETH_MACHTLR_R { R32_ETH_MACHTLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Hash Table Low Register"]
  11011. # [inline (always)]
  11012. pub fn r32_eth_machtlr (& mut self) -> R32_ETH_MACHTLR_W { R32_ETH_MACHTLR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11013. # [inline (always)]
  11014. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Hash Table Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_machtlr](index.html) module"]
  11015. pub struct R32_ETH_MACHTLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACHTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_machtlr::R](R) reader structure"]
  11016. impl crate :: Readable for R32_ETH_MACHTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_machtlr::W](W) writer structure"]
  11017. impl crate :: Writable for R32_ETH_MACHTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACHTLR to value 0"]
  11018. impl crate :: Resettable for R32_ETH_MACHTLR_SPEC { # [inline (always)]
  11019. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACMIIAR register accessor: an alias for `Reg<R32_ETH_MACMIIAR_SPEC>`"]
  11020. pub type R32_ETH_MACMIIAR = crate :: Reg < r32_eth_macmiiar :: R32_ETH_MACMIIAR_SPEC > ; # [doc = "MAC MII Address Register"]
  11021. pub mod r32_eth_macmiiar { # [doc = "Register `R32_ETH_MACMIIAR` reader"]
  11022. pub struct R (crate :: R < R32_ETH_MACMIIAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACMIIAR_SPEC > ; # [inline (always)]
  11023. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACMIIAR_SPEC >> for R { # [inline (always)]
  11024. fn from (reader : crate :: R < R32_ETH_MACMIIAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACMIIAR` writer"]
  11025. pub struct W (crate :: W < R32_ETH_MACMIIAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACMIIAR_SPEC > ; # [inline (always)]
  11026. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11027. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACMIIAR_SPEC >> for W { # [inline (always)]
  11028. fn from (writer : crate :: W < R32_ETH_MACMIIAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACMIIAR` reader - MAC MII Address Register"]
  11029. pub struct R32_ETH_MACMIIAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACMIIAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACMIIAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACMIIAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11030. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACMIIAR` writer - MAC MII Address Register"]
  11031. pub struct R32_ETH_MACMIIAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACMIIAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11032. # [inline (always)]
  11033. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC MII Address Register"]
  11034. # [inline (always)]
  11035. pub fn r32_eth_macmiiar (& self) -> R32_ETH_MACMIIAR_R { R32_ETH_MACMIIAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC MII Address Register"]
  11036. # [inline (always)]
  11037. pub fn r32_eth_macmiiar (& mut self) -> R32_ETH_MACMIIAR_W { R32_ETH_MACMIIAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11038. # [inline (always)]
  11039. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC MII Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macmiiar](index.html) module"]
  11040. pub struct R32_ETH_MACMIIAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACMIIAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macmiiar::R](R) reader structure"]
  11041. impl crate :: Readable for R32_ETH_MACMIIAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macmiiar::W](W) writer structure"]
  11042. impl crate :: Writable for R32_ETH_MACMIIAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACMIIAR to value 0"]
  11043. impl crate :: Resettable for R32_ETH_MACMIIAR_SPEC { # [inline (always)]
  11044. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACMIIDR register accessor: an alias for `Reg<R32_ETH_MACMIIDR_SPEC>`"]
  11045. pub type R32_ETH_MACMIIDR = crate :: Reg < r32_eth_macmiidr :: R32_ETH_MACMIIDR_SPEC > ; # [doc = "MAC MII Data Register"]
  11046. pub mod r32_eth_macmiidr { # [doc = "Register `R32_ETH_MACMIIDR` reader"]
  11047. pub struct R (crate :: R < R32_ETH_MACMIIDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACMIIDR_SPEC > ; # [inline (always)]
  11048. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACMIIDR_SPEC >> for R { # [inline (always)]
  11049. fn from (reader : crate :: R < R32_ETH_MACMIIDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACMIIDR` writer"]
  11050. pub struct W (crate :: W < R32_ETH_MACMIIDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACMIIDR_SPEC > ; # [inline (always)]
  11051. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11052. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACMIIDR_SPEC >> for W { # [inline (always)]
  11053. fn from (writer : crate :: W < R32_ETH_MACMIIDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACMIIDR` reader - MAC MII Data Register"]
  11054. pub struct R32_ETH_MACMIIDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACMIIDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACMIIDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACMIIDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11055. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACMIIDR` writer - MAC MII Data Register"]
  11056. pub struct R32_ETH_MACMIIDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACMIIDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11057. # [inline (always)]
  11058. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC MII Data Register"]
  11059. # [inline (always)]
  11060. pub fn r32_eth_macmiidr (& self) -> R32_ETH_MACMIIDR_R { R32_ETH_MACMIIDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC MII Data Register"]
  11061. # [inline (always)]
  11062. pub fn r32_eth_macmiidr (& mut self) -> R32_ETH_MACMIIDR_W { R32_ETH_MACMIIDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11063. # [inline (always)]
  11064. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC MII Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macmiidr](index.html) module"]
  11065. pub struct R32_ETH_MACMIIDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACMIIDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macmiidr::R](R) reader structure"]
  11066. impl crate :: Readable for R32_ETH_MACMIIDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macmiidr::W](W) writer structure"]
  11067. impl crate :: Writable for R32_ETH_MACMIIDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACMIIDR to value 0"]
  11068. impl crate :: Resettable for R32_ETH_MACMIIDR_SPEC { # [inline (always)]
  11069. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACFCR register accessor: an alias for `Reg<R32_ETH_MACFCR_SPEC>`"]
  11070. pub type R32_ETH_MACFCR = crate :: Reg < r32_eth_macfcr :: R32_ETH_MACFCR_SPEC > ; # [doc = "MAC Flow-Control Register"]
  11071. pub mod r32_eth_macfcr { # [doc = "Register `R32_ETH_MACFCR` reader"]
  11072. pub struct R (crate :: R < R32_ETH_MACFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACFCR_SPEC > ; # [inline (always)]
  11073. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACFCR_SPEC >> for R { # [inline (always)]
  11074. fn from (reader : crate :: R < R32_ETH_MACFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACFCR` writer"]
  11075. pub struct W (crate :: W < R32_ETH_MACFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACFCR_SPEC > ; # [inline (always)]
  11076. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11077. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACFCR_SPEC >> for W { # [inline (always)]
  11078. fn from (writer : crate :: W < R32_ETH_MACFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACFCR` reader - MAC Flow-Control Register"]
  11079. pub struct R32_ETH_MACFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11080. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACFCR` writer - MAC Flow-Control Register"]
  11081. pub struct R32_ETH_MACFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11082. # [inline (always)]
  11083. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Flow-Control Register"]
  11084. # [inline (always)]
  11085. pub fn r32_eth_macfcr (& self) -> R32_ETH_MACFCR_R { R32_ETH_MACFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Flow-Control Register"]
  11086. # [inline (always)]
  11087. pub fn r32_eth_macfcr (& mut self) -> R32_ETH_MACFCR_W { R32_ETH_MACFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11088. # [inline (always)]
  11089. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Flow-Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macfcr](index.html) module"]
  11090. pub struct R32_ETH_MACFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macfcr::R](R) reader structure"]
  11091. impl crate :: Readable for R32_ETH_MACFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macfcr::W](W) writer structure"]
  11092. impl crate :: Writable for R32_ETH_MACFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACFCR to value 0"]
  11093. impl crate :: Resettable for R32_ETH_MACFCR_SPEC { # [inline (always)]
  11094. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACVLANTR register accessor: an alias for `Reg<R32_ETH_MACVLANTR_SPEC>`"]
  11095. pub type R32_ETH_MACVLANTR = crate :: Reg < r32_eth_macvlantr :: R32_ETH_MACVLANTR_SPEC > ; # [doc = "MAC VLAN Tag Register"]
  11096. pub mod r32_eth_macvlantr { # [doc = "Register `R32_ETH_MACVLANTR` reader"]
  11097. pub struct R (crate :: R < R32_ETH_MACVLANTR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACVLANTR_SPEC > ; # [inline (always)]
  11098. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACVLANTR_SPEC >> for R { # [inline (always)]
  11099. fn from (reader : crate :: R < R32_ETH_MACVLANTR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACVLANTR` writer"]
  11100. pub struct W (crate :: W < R32_ETH_MACVLANTR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACVLANTR_SPEC > ; # [inline (always)]
  11101. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11102. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACVLANTR_SPEC >> for W { # [inline (always)]
  11103. fn from (writer : crate :: W < R32_ETH_MACVLANTR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACVLANTR` reader - MAC VLAN Tag Register"]
  11104. pub struct R32_ETH_MACVLANTR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACVLANTR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACVLANTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACVLANTR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11105. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACVLANTR` writer - MAC VLAN Tag Register"]
  11106. pub struct R32_ETH_MACVLANTR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACVLANTR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11107. # [inline (always)]
  11108. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC VLAN Tag Register"]
  11109. # [inline (always)]
  11110. pub fn r32_eth_macvlantr (& self) -> R32_ETH_MACVLANTR_R { R32_ETH_MACVLANTR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC VLAN Tag Register"]
  11111. # [inline (always)]
  11112. pub fn r32_eth_macvlantr (& mut self) -> R32_ETH_MACVLANTR_W { R32_ETH_MACVLANTR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11113. # [inline (always)]
  11114. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC VLAN Tag Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macvlantr](index.html) module"]
  11115. pub struct R32_ETH_MACVLANTR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACVLANTR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macvlantr::R](R) reader structure"]
  11116. impl crate :: Readable for R32_ETH_MACVLANTR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macvlantr::W](W) writer structure"]
  11117. impl crate :: Writable for R32_ETH_MACVLANTR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACVLANTR to value 0"]
  11118. impl crate :: Resettable for R32_ETH_MACVLANTR_SPEC { # [inline (always)]
  11119. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACRWUFFR register accessor: an alias for `Reg<R32_ETH_MACRWUFFR_SPEC>`"]
  11120. pub type R32_ETH_MACRWUFFR = crate :: Reg < r32_eth_macrwuffr :: R32_ETH_MACRWUFFR_SPEC > ; # [doc = "MAC Remote Wake-Up Frame Filter Register"]
  11121. pub mod r32_eth_macrwuffr { # [doc = "Register `R32_ETH_MACRWUFFR` reader"]
  11122. pub struct R (crate :: R < R32_ETH_MACRWUFFR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACRWUFFR_SPEC > ; # [inline (always)]
  11123. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACRWUFFR_SPEC >> for R { # [inline (always)]
  11124. fn from (reader : crate :: R < R32_ETH_MACRWUFFR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACRWUFFR` writer"]
  11125. pub struct W (crate :: W < R32_ETH_MACRWUFFR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACRWUFFR_SPEC > ; # [inline (always)]
  11126. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11127. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACRWUFFR_SPEC >> for W { # [inline (always)]
  11128. fn from (writer : crate :: W < R32_ETH_MACRWUFFR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACRWUFFR` reader - MAC Remote Wake-Up Frame Filter Register"]
  11129. pub struct R32_ETH_MACRWUFFR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACRWUFFR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACRWUFFR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACRWUFFR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11130. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACRWUFFR` writer - MAC Remote Wake-Up Frame Filter Register"]
  11131. pub struct R32_ETH_MACRWUFFR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACRWUFFR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11132. # [inline (always)]
  11133. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Remote Wake-Up Frame Filter Register"]
  11134. # [inline (always)]
  11135. pub fn r32_eth_macrwuffr (& self) -> R32_ETH_MACRWUFFR_R { R32_ETH_MACRWUFFR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Remote Wake-Up Frame Filter Register"]
  11136. # [inline (always)]
  11137. pub fn r32_eth_macrwuffr (& mut self) -> R32_ETH_MACRWUFFR_W { R32_ETH_MACRWUFFR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11138. # [inline (always)]
  11139. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Remote Wake-Up Frame Filter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macrwuffr](index.html) module"]
  11140. pub struct R32_ETH_MACRWUFFR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACRWUFFR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macrwuffr::R](R) reader structure"]
  11141. impl crate :: Readable for R32_ETH_MACRWUFFR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macrwuffr::W](W) writer structure"]
  11142. impl crate :: Writable for R32_ETH_MACRWUFFR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACRWUFFR to value 0"]
  11143. impl crate :: Resettable for R32_ETH_MACRWUFFR_SPEC { # [inline (always)]
  11144. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACPMTCSR register accessor: an alias for `Reg<R32_ETH_MACPMTCSR_SPEC>`"]
  11145. pub type R32_ETH_MACPMTCSR = crate :: Reg < r32_eth_macpmtcsr :: R32_ETH_MACPMTCSR_SPEC > ; # [doc = "MAC PMT Control and Reset Register"]
  11146. pub mod r32_eth_macpmtcsr { # [doc = "Register `R32_ETH_MACPMTCSR` reader"]
  11147. pub struct R (crate :: R < R32_ETH_MACPMTCSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACPMTCSR_SPEC > ; # [inline (always)]
  11148. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACPMTCSR_SPEC >> for R { # [inline (always)]
  11149. fn from (reader : crate :: R < R32_ETH_MACPMTCSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACPMTCSR` writer"]
  11150. pub struct W (crate :: W < R32_ETH_MACPMTCSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACPMTCSR_SPEC > ; # [inline (always)]
  11151. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11152. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACPMTCSR_SPEC >> for W { # [inline (always)]
  11153. fn from (writer : crate :: W < R32_ETH_MACPMTCSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACPMTCSR` reader - MAC PMT Control and Reset Register"]
  11154. pub struct R32_ETH_MACPMTCSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACPMTCSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACPMTCSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACPMTCSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11155. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACPMTCSR` writer - MAC PMT Control and Reset Register"]
  11156. pub struct R32_ETH_MACPMTCSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACPMTCSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11157. # [inline (always)]
  11158. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC PMT Control and Reset Register"]
  11159. # [inline (always)]
  11160. pub fn r32_eth_macpmtcsr (& self) -> R32_ETH_MACPMTCSR_R { R32_ETH_MACPMTCSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC PMT Control and Reset Register"]
  11161. # [inline (always)]
  11162. pub fn r32_eth_macpmtcsr (& mut self) -> R32_ETH_MACPMTCSR_W { R32_ETH_MACPMTCSR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11163. # [inline (always)]
  11164. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC PMT Control and Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macpmtcsr](index.html) module"]
  11165. pub struct R32_ETH_MACPMTCSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACPMTCSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macpmtcsr::R](R) reader structure"]
  11166. impl crate :: Readable for R32_ETH_MACPMTCSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macpmtcsr::W](W) writer structure"]
  11167. impl crate :: Writable for R32_ETH_MACPMTCSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACPMTCSR to value 0"]
  11168. impl crate :: Resettable for R32_ETH_MACPMTCSR_SPEC { # [inline (always)]
  11169. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACSR register accessor: an alias for `Reg<R32_ETH_MACSR_SPEC>`"]
  11170. pub type R32_ETH_MACSR = crate :: Reg < r32_eth_macsr :: R32_ETH_MACSR_SPEC > ; # [doc = "MAC Interrupt Status Register"]
  11171. pub mod r32_eth_macsr { # [doc = "Register `R32_ETH_MACSR` reader"]
  11172. pub struct R (crate :: R < R32_ETH_MACSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACSR_SPEC > ; # [inline (always)]
  11173. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACSR_SPEC >> for R { # [inline (always)]
  11174. fn from (reader : crate :: R < R32_ETH_MACSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACSR` writer"]
  11175. pub struct W (crate :: W < R32_ETH_MACSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACSR_SPEC > ; # [inline (always)]
  11176. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11177. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACSR_SPEC >> for W { # [inline (always)]
  11178. fn from (writer : crate :: W < R32_ETH_MACSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACSR` reader - MAC Interrupt Status Register"]
  11179. pub struct R32_ETH_MACSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11180. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACSR` writer - MAC Interrupt Status Register"]
  11181. pub struct R32_ETH_MACSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11182. # [inline (always)]
  11183. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Interrupt Status Register"]
  11184. # [inline (always)]
  11185. pub fn r32_eth_macsr (& self) -> R32_ETH_MACSR_R { R32_ETH_MACSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Interrupt Status Register"]
  11186. # [inline (always)]
  11187. pub fn r32_eth_macsr (& mut self) -> R32_ETH_MACSR_W { R32_ETH_MACSR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11188. # [inline (always)]
  11189. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macsr](index.html) module"]
  11190. pub struct R32_ETH_MACSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macsr::R](R) reader structure"]
  11191. impl crate :: Readable for R32_ETH_MACSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macsr::W](W) writer structure"]
  11192. impl crate :: Writable for R32_ETH_MACSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACSR to value 0"]
  11193. impl crate :: Resettable for R32_ETH_MACSR_SPEC { # [inline (always)]
  11194. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACIMR register accessor: an alias for `Reg<R32_ETH_MACIMR_SPEC>`"]
  11195. pub type R32_ETH_MACIMR = crate :: Reg < r32_eth_macimr :: R32_ETH_MACIMR_SPEC > ; # [doc = "MAC Interrupt Mask Register"]
  11196. pub mod r32_eth_macimr { # [doc = "Register `R32_ETH_MACIMR` reader"]
  11197. pub struct R (crate :: R < R32_ETH_MACIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACIMR_SPEC > ; # [inline (always)]
  11198. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACIMR_SPEC >> for R { # [inline (always)]
  11199. fn from (reader : crate :: R < R32_ETH_MACIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACIMR` writer"]
  11200. pub struct W (crate :: W < R32_ETH_MACIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACIMR_SPEC > ; # [inline (always)]
  11201. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11202. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACIMR_SPEC >> for W { # [inline (always)]
  11203. fn from (writer : crate :: W < R32_ETH_MACIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACIMR` reader - MAC Interrupt Mask Register"]
  11204. pub struct R32_ETH_MACIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11205. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACIMR` writer - MAC Interrupt Mask Register"]
  11206. pub struct R32_ETH_MACIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11207. # [inline (always)]
  11208. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Interrupt Mask Register"]
  11209. # [inline (always)]
  11210. pub fn r32_eth_macimr (& self) -> R32_ETH_MACIMR_R { R32_ETH_MACIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Interrupt Mask Register"]
  11211. # [inline (always)]
  11212. pub fn r32_eth_macimr (& mut self) -> R32_ETH_MACIMR_W { R32_ETH_MACIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11213. # [inline (always)]
  11214. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macimr](index.html) module"]
  11215. pub struct R32_ETH_MACIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macimr::R](R) reader structure"]
  11216. impl crate :: Readable for R32_ETH_MACIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macimr::W](W) writer structure"]
  11217. impl crate :: Writable for R32_ETH_MACIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACIMR to value 0"]
  11218. impl crate :: Resettable for R32_ETH_MACIMR_SPEC { # [inline (always)]
  11219. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA0HR register accessor: an alias for `Reg<R32_ETH_MACA0HR_SPEC>`"]
  11220. pub type R32_ETH_MACA0HR = crate :: Reg < r32_eth_maca0hr :: R32_ETH_MACA0HR_SPEC > ; # [doc = "MAC Address 0 High Register"]
  11221. pub mod r32_eth_maca0hr { # [doc = "Register `R32_ETH_MACA0HR` reader"]
  11222. pub struct R (crate :: R < R32_ETH_MACA0HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA0HR_SPEC > ; # [inline (always)]
  11223. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA0HR_SPEC >> for R { # [inline (always)]
  11224. fn from (reader : crate :: R < R32_ETH_MACA0HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA0HR` writer"]
  11225. pub struct W (crate :: W < R32_ETH_MACA0HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA0HR_SPEC > ; # [inline (always)]
  11226. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11227. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA0HR_SPEC >> for W { # [inline (always)]
  11228. fn from (writer : crate :: W < R32_ETH_MACA0HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA0HR` reader - MAC Address 0 High Register"]
  11229. pub struct R32_ETH_MACA0HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA0HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA0HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA0HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11230. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA0HR` writer - MAC Address 0 High Register"]
  11231. pub struct R32_ETH_MACA0HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA0HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11232. # [inline (always)]
  11233. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 0 High Register"]
  11234. # [inline (always)]
  11235. pub fn r32_eth_maca0hr (& self) -> R32_ETH_MACA0HR_R { R32_ETH_MACA0HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 0 High Register"]
  11236. # [inline (always)]
  11237. pub fn r32_eth_maca0hr (& mut self) -> R32_ETH_MACA0HR_W { R32_ETH_MACA0HR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11238. # [inline (always)]
  11239. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 0 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca0hr](index.html) module"]
  11240. pub struct R32_ETH_MACA0HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA0HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca0hr::R](R) reader structure"]
  11241. impl crate :: Readable for R32_ETH_MACA0HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca0hr::W](W) writer structure"]
  11242. impl crate :: Writable for R32_ETH_MACA0HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA0HR to value 0"]
  11243. impl crate :: Resettable for R32_ETH_MACA0HR_SPEC { # [inline (always)]
  11244. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA0LR register accessor: an alias for `Reg<R32_ETH_MACA0LR_SPEC>`"]
  11245. pub type R32_ETH_MACA0LR = crate :: Reg < r32_eth_maca0lr :: R32_ETH_MACA0LR_SPEC > ; # [doc = "MAC Address 0 Low Register"]
  11246. pub mod r32_eth_maca0lr { # [doc = "Register `R32_ETH_MACA0LR` reader"]
  11247. pub struct R (crate :: R < R32_ETH_MACA0LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA0LR_SPEC > ; # [inline (always)]
  11248. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA0LR_SPEC >> for R { # [inline (always)]
  11249. fn from (reader : crate :: R < R32_ETH_MACA0LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA0LR` writer"]
  11250. pub struct W (crate :: W < R32_ETH_MACA0LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA0LR_SPEC > ; # [inline (always)]
  11251. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11252. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA0LR_SPEC >> for W { # [inline (always)]
  11253. fn from (writer : crate :: W < R32_ETH_MACA0LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA0LR` reader - MAC Address 0 Low Register"]
  11254. pub struct R32_ETH_MACA0LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA0LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA0LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA0LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11255. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA0LR` writer - MAC Address 0 Low Register"]
  11256. pub struct R32_ETH_MACA0LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA0LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11257. # [inline (always)]
  11258. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 0 Low Register"]
  11259. # [inline (always)]
  11260. pub fn r32_eth_maca0lr (& self) -> R32_ETH_MACA0LR_R { R32_ETH_MACA0LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 0 Low Register"]
  11261. # [inline (always)]
  11262. pub fn r32_eth_maca0lr (& mut self) -> R32_ETH_MACA0LR_W { R32_ETH_MACA0LR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11263. # [inline (always)]
  11264. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 0 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca0lr](index.html) module"]
  11265. pub struct R32_ETH_MACA0LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA0LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca0lr::R](R) reader structure"]
  11266. impl crate :: Readable for R32_ETH_MACA0LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca0lr::W](W) writer structure"]
  11267. impl crate :: Writable for R32_ETH_MACA0LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA0LR to value 0"]
  11268. impl crate :: Resettable for R32_ETH_MACA0LR_SPEC { # [inline (always)]
  11269. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA1HR register accessor: an alias for `Reg<R32_ETH_MACA1HR_SPEC>`"]
  11270. pub type R32_ETH_MACA1HR = crate :: Reg < r32_eth_maca1hr :: R32_ETH_MACA1HR_SPEC > ; # [doc = "MAC Address 1 High Register"]
  11271. pub mod r32_eth_maca1hr { # [doc = "Register `R32_ETH_MACA1HR` reader"]
  11272. pub struct R (crate :: R < R32_ETH_MACA1HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA1HR_SPEC > ; # [inline (always)]
  11273. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA1HR_SPEC >> for R { # [inline (always)]
  11274. fn from (reader : crate :: R < R32_ETH_MACA1HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA1HR` writer"]
  11275. pub struct W (crate :: W < R32_ETH_MACA1HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA1HR_SPEC > ; # [inline (always)]
  11276. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11277. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA1HR_SPEC >> for W { # [inline (always)]
  11278. fn from (writer : crate :: W < R32_ETH_MACA1HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA1HR` reader - MAC Address 1 High Register"]
  11279. pub struct R32_ETH_MACA1HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA1HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA1HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA1HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11280. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA1HR` writer - MAC Address 1 High Register"]
  11281. pub struct R32_ETH_MACA1HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA1HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11282. # [inline (always)]
  11283. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 1 High Register"]
  11284. # [inline (always)]
  11285. pub fn r32_eth_maca1hr (& self) -> R32_ETH_MACA1HR_R { R32_ETH_MACA1HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 1 High Register"]
  11286. # [inline (always)]
  11287. pub fn r32_eth_maca1hr (& mut self) -> R32_ETH_MACA1HR_W { R32_ETH_MACA1HR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11288. # [inline (always)]
  11289. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 1 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca1hr](index.html) module"]
  11290. pub struct R32_ETH_MACA1HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA1HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca1hr::R](R) reader structure"]
  11291. impl crate :: Readable for R32_ETH_MACA1HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca1hr::W](W) writer structure"]
  11292. impl crate :: Writable for R32_ETH_MACA1HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA1HR to value 0"]
  11293. impl crate :: Resettable for R32_ETH_MACA1HR_SPEC { # [inline (always)]
  11294. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA1LR register accessor: an alias for `Reg<R32_ETH_MACA1LR_SPEC>`"]
  11295. pub type R32_ETH_MACA1LR = crate :: Reg < r32_eth_maca1lr :: R32_ETH_MACA1LR_SPEC > ; # [doc = "MAC Address 1 Low Register"]
  11296. pub mod r32_eth_maca1lr { # [doc = "Register `R32_ETH_MACA1LR` reader"]
  11297. pub struct R (crate :: R < R32_ETH_MACA1LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA1LR_SPEC > ; # [inline (always)]
  11298. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA1LR_SPEC >> for R { # [inline (always)]
  11299. fn from (reader : crate :: R < R32_ETH_MACA1LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA1LR` writer"]
  11300. pub struct W (crate :: W < R32_ETH_MACA1LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA1LR_SPEC > ; # [inline (always)]
  11301. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11302. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA1LR_SPEC >> for W { # [inline (always)]
  11303. fn from (writer : crate :: W < R32_ETH_MACA1LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA1LR` reader - MAC Address 1 Low Register"]
  11304. pub struct R32_ETH_MACA1LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA1LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA1LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA1LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11305. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA1LR` writer - MAC Address 1 Low Register"]
  11306. pub struct R32_ETH_MACA1LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA1LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11307. # [inline (always)]
  11308. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 1 Low Register"]
  11309. # [inline (always)]
  11310. pub fn r32_eth_maca1lr (& self) -> R32_ETH_MACA1LR_R { R32_ETH_MACA1LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 1 Low Register"]
  11311. # [inline (always)]
  11312. pub fn r32_eth_maca1lr (& mut self) -> R32_ETH_MACA1LR_W { R32_ETH_MACA1LR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11313. # [inline (always)]
  11314. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 1 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca1lr](index.html) module"]
  11315. pub struct R32_ETH_MACA1LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA1LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca1lr::R](R) reader structure"]
  11316. impl crate :: Readable for R32_ETH_MACA1LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca1lr::W](W) writer structure"]
  11317. impl crate :: Writable for R32_ETH_MACA1LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA1LR to value 0"]
  11318. impl crate :: Resettable for R32_ETH_MACA1LR_SPEC { # [inline (always)]
  11319. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA2HR register accessor: an alias for `Reg<R32_ETH_MACA2HR_SPEC>`"]
  11320. pub type R32_ETH_MACA2HR = crate :: Reg < r32_eth_maca2hr :: R32_ETH_MACA2HR_SPEC > ; # [doc = "MAC Address 2 High Register"]
  11321. pub mod r32_eth_maca2hr { # [doc = "Register `R32_ETH_MACA2HR` reader"]
  11322. pub struct R (crate :: R < R32_ETH_MACA2HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA2HR_SPEC > ; # [inline (always)]
  11323. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA2HR_SPEC >> for R { # [inline (always)]
  11324. fn from (reader : crate :: R < R32_ETH_MACA2HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA2HR` writer"]
  11325. pub struct W (crate :: W < R32_ETH_MACA2HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA2HR_SPEC > ; # [inline (always)]
  11326. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11327. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA2HR_SPEC >> for W { # [inline (always)]
  11328. fn from (writer : crate :: W < R32_ETH_MACA2HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA2HR` reader - MAC Address 2 High Register"]
  11329. pub struct R32_ETH_MACA2HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA2HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA2HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA2HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11330. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA2HR` writer - MAC Address 2 High Register"]
  11331. pub struct R32_ETH_MACA2HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA2HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11332. # [inline (always)]
  11333. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 2 High Register"]
  11334. # [inline (always)]
  11335. pub fn r32_eth_maca2hr (& self) -> R32_ETH_MACA2HR_R { R32_ETH_MACA2HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 2 High Register"]
  11336. # [inline (always)]
  11337. pub fn r32_eth_maca2hr (& mut self) -> R32_ETH_MACA2HR_W { R32_ETH_MACA2HR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11338. # [inline (always)]
  11339. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 2 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca2hr](index.html) module"]
  11340. pub struct R32_ETH_MACA2HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA2HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca2hr::R](R) reader structure"]
  11341. impl crate :: Readable for R32_ETH_MACA2HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca2hr::W](W) writer structure"]
  11342. impl crate :: Writable for R32_ETH_MACA2HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA2HR to value 0"]
  11343. impl crate :: Resettable for R32_ETH_MACA2HR_SPEC { # [inline (always)]
  11344. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA2LR register accessor: an alias for `Reg<R32_ETH_MACA2LR_SPEC>`"]
  11345. pub type R32_ETH_MACA2LR = crate :: Reg < r32_eth_maca2lr :: R32_ETH_MACA2LR_SPEC > ; # [doc = "MAC Address 2 Low Register"]
  11346. pub mod r32_eth_maca2lr { # [doc = "Register `R32_ETH_MACA2LR` reader"]
  11347. pub struct R (crate :: R < R32_ETH_MACA2LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA2LR_SPEC > ; # [inline (always)]
  11348. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA2LR_SPEC >> for R { # [inline (always)]
  11349. fn from (reader : crate :: R < R32_ETH_MACA2LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA2LR` writer"]
  11350. pub struct W (crate :: W < R32_ETH_MACA2LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA2LR_SPEC > ; # [inline (always)]
  11351. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11352. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA2LR_SPEC >> for W { # [inline (always)]
  11353. fn from (writer : crate :: W < R32_ETH_MACA2LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA2LR` reader - MAC Address 2 Low Register"]
  11354. pub struct R32_ETH_MACA2LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA2LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA2LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA2LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11355. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA2LR` writer - MAC Address 2 Low Register"]
  11356. pub struct R32_ETH_MACA2LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA2LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11357. # [inline (always)]
  11358. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 2 Low Register"]
  11359. # [inline (always)]
  11360. pub fn r32_eth_maca2lr (& self) -> R32_ETH_MACA2LR_R { R32_ETH_MACA2LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 2 Low Register"]
  11361. # [inline (always)]
  11362. pub fn r32_eth_maca2lr (& mut self) -> R32_ETH_MACA2LR_W { R32_ETH_MACA2LR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11363. # [inline (always)]
  11364. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 2 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca2lr](index.html) module"]
  11365. pub struct R32_ETH_MACA2LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA2LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca2lr::R](R) reader structure"]
  11366. impl crate :: Readable for R32_ETH_MACA2LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca2lr::W](W) writer structure"]
  11367. impl crate :: Writable for R32_ETH_MACA2LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA2LR to value 0"]
  11368. impl crate :: Resettable for R32_ETH_MACA2LR_SPEC { # [inline (always)]
  11369. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA3HR register accessor: an alias for `Reg<R32_ETH_MACA3HR_SPEC>`"]
  11370. pub type R32_ETH_MACA3HR = crate :: Reg < r32_eth_maca3hr :: R32_ETH_MACA3HR_SPEC > ; # [doc = "MAC Address 3 High Register"]
  11371. pub mod r32_eth_maca3hr { # [doc = "Register `R32_ETH_MACA3HR` reader"]
  11372. pub struct R (crate :: R < R32_ETH_MACA3HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA3HR_SPEC > ; # [inline (always)]
  11373. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA3HR_SPEC >> for R { # [inline (always)]
  11374. fn from (reader : crate :: R < R32_ETH_MACA3HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA3HR` writer"]
  11375. pub struct W (crate :: W < R32_ETH_MACA3HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA3HR_SPEC > ; # [inline (always)]
  11376. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11377. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA3HR_SPEC >> for W { # [inline (always)]
  11378. fn from (writer : crate :: W < R32_ETH_MACA3HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA3HR` reader - MAC Address 3 High Register"]
  11379. pub struct R32_ETH_MACA3HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA3HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA3HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA3HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11380. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA3HR` writer - MAC Address 3 High Register"]
  11381. pub struct R32_ETH_MACA3HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA3HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11382. # [inline (always)]
  11383. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 3 High Register"]
  11384. # [inline (always)]
  11385. pub fn r32_eth_maca3hr (& self) -> R32_ETH_MACA3HR_R { R32_ETH_MACA3HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 3 High Register"]
  11386. # [inline (always)]
  11387. pub fn r32_eth_maca3hr (& mut self) -> R32_ETH_MACA3HR_W { R32_ETH_MACA3HR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11388. # [inline (always)]
  11389. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 3 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca3hr](index.html) module"]
  11390. pub struct R32_ETH_MACA3HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA3HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca3hr::R](R) reader structure"]
  11391. impl crate :: Readable for R32_ETH_MACA3HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca3hr::W](W) writer structure"]
  11392. impl crate :: Writable for R32_ETH_MACA3HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA3HR to value 0"]
  11393. impl crate :: Resettable for R32_ETH_MACA3HR_SPEC { # [inline (always)]
  11394. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA3LR register accessor: an alias for `Reg<R32_ETH_MACA3LR_SPEC>`"]
  11395. pub type R32_ETH_MACA3LR = crate :: Reg < r32_eth_maca3lr :: R32_ETH_MACA3LR_SPEC > ; # [doc = "MAC Address 3 Low Register"]
  11396. pub mod r32_eth_maca3lr { # [doc = "Register `R32_ETH_MACA3LR` reader"]
  11397. pub struct R (crate :: R < R32_ETH_MACA3LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA3LR_SPEC > ; # [inline (always)]
  11398. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA3LR_SPEC >> for R { # [inline (always)]
  11399. fn from (reader : crate :: R < R32_ETH_MACA3LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA3LR` writer"]
  11400. pub struct W (crate :: W < R32_ETH_MACA3LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA3LR_SPEC > ; # [inline (always)]
  11401. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11402. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA3LR_SPEC >> for W { # [inline (always)]
  11403. fn from (writer : crate :: W < R32_ETH_MACA3LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA3LR` reader - MAC Address 3 Low Register"]
  11404. pub struct R32_ETH_MACA3LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA3LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA3LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA3LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11405. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA3LR` writer - MAC Address 3 Low Register"]
  11406. pub struct R32_ETH_MACA3LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA3LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11407. # [inline (always)]
  11408. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 3 Low Register"]
  11409. # [inline (always)]
  11410. pub fn r32_eth_maca3lr (& self) -> R32_ETH_MACA3LR_R { R32_ETH_MACA3LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 3 Low Register"]
  11411. # [inline (always)]
  11412. pub fn r32_eth_maca3lr (& mut self) -> R32_ETH_MACA3LR_W { R32_ETH_MACA3LR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11413. # [inline (always)]
  11414. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 3 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca3lr](index.html) module"]
  11415. pub struct R32_ETH_MACA3LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA3LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca3lr::R](R) reader structure"]
  11416. impl crate :: Readable for R32_ETH_MACA3LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca3lr::W](W) writer structure"]
  11417. impl crate :: Writable for R32_ETH_MACA3LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA3LR to value 0"]
  11418. impl crate :: Resettable for R32_ETH_MACA3LR_SPEC { # [inline (always)]
  11419. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCCR register accessor: an alias for `Reg<R32_ETH_MMCCR_SPEC>`"]
  11420. pub type R32_ETH_MMCCR = crate :: Reg < r32_eth_mmccr :: R32_ETH_MMCCR_SPEC > ; # [doc = "MMC Control Register"]
  11421. pub mod r32_eth_mmccr { # [doc = "Register `R32_ETH_MMCCR` reader"]
  11422. pub struct R (crate :: R < R32_ETH_MMCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCCR_SPEC > ; # [inline (always)]
  11423. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCCR_SPEC >> for R { # [inline (always)]
  11424. fn from (reader : crate :: R < R32_ETH_MMCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCCR` writer"]
  11425. pub struct W (crate :: W < R32_ETH_MMCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCCR_SPEC > ; # [inline (always)]
  11426. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11427. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCCR_SPEC >> for W { # [inline (always)]
  11428. fn from (writer : crate :: W < R32_ETH_MMCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCCR` reader - MMC Control Register"]
  11429. pub struct R32_ETH_MMCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11430. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCCR` writer - MMC Control Register"]
  11431. pub struct R32_ETH_MMCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11432. # [inline (always)]
  11433. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Control Register"]
  11434. # [inline (always)]
  11435. pub fn r32_eth_mmccr (& self) -> R32_ETH_MMCCR_R { R32_ETH_MMCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Control Register"]
  11436. # [inline (always)]
  11437. pub fn r32_eth_mmccr (& mut self) -> R32_ETH_MMCCR_W { R32_ETH_MMCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11438. # [inline (always)]
  11439. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmccr](index.html) module"]
  11440. pub struct R32_ETH_MMCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmccr::R](R) reader structure"]
  11441. impl crate :: Readable for R32_ETH_MMCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmccr::W](W) writer structure"]
  11442. impl crate :: Writable for R32_ETH_MMCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCCR to value 0"]
  11443. impl crate :: Resettable for R32_ETH_MMCCR_SPEC { # [inline (always)]
  11444. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRIR register accessor: an alias for `Reg<R32_ETH_MMCRIR_SPEC>`"]
  11445. pub type R32_ETH_MMCRIR = crate :: Reg < r32_eth_mmcrir :: R32_ETH_MMCRIR_SPEC > ; # [doc = "MMC RX Interrupt Register"]
  11446. pub mod r32_eth_mmcrir { # [doc = "Register `R32_ETH_MMCRIR` reader"]
  11447. pub struct R (crate :: R < R32_ETH_MMCRIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRIR_SPEC > ; # [inline (always)]
  11448. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRIR_SPEC >> for R { # [inline (always)]
  11449. fn from (reader : crate :: R < R32_ETH_MMCRIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRIR` writer"]
  11450. pub struct W (crate :: W < R32_ETH_MMCRIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRIR_SPEC > ; # [inline (always)]
  11451. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11452. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRIR_SPEC >> for W { # [inline (always)]
  11453. fn from (writer : crate :: W < R32_ETH_MMCRIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRIR` reader - MMC RX Interrupt Register"]
  11454. pub struct R32_ETH_MMCRIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11455. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRIR` writer - MMC RX Interrupt Register"]
  11456. pub struct R32_ETH_MMCRIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11457. # [inline (always)]
  11458. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Interrupt Register"]
  11459. # [inline (always)]
  11460. pub fn r32_eth_mmcrir (& self) -> R32_ETH_MMCRIR_R { R32_ETH_MMCRIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Interrupt Register"]
  11461. # [inline (always)]
  11462. pub fn r32_eth_mmcrir (& mut self) -> R32_ETH_MMCRIR_W { R32_ETH_MMCRIR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11463. # [inline (always)]
  11464. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrir](index.html) module"]
  11465. pub struct R32_ETH_MMCRIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrir::R](R) reader structure"]
  11466. impl crate :: Readable for R32_ETH_MMCRIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrir::W](W) writer structure"]
  11467. impl crate :: Writable for R32_ETH_MMCRIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRIR to value 0"]
  11468. impl crate :: Resettable for R32_ETH_MMCRIR_SPEC { # [inline (always)]
  11469. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTIR register accessor: an alias for `Reg<R32_ETH_MMCTIR_SPEC>`"]
  11470. pub type R32_ETH_MMCTIR = crate :: Reg < r32_eth_mmctir :: R32_ETH_MMCTIR_SPEC > ; # [doc = "MMC TX Interrupt Register"]
  11471. pub mod r32_eth_mmctir { # [doc = "Register `R32_ETH_MMCTIR` reader"]
  11472. pub struct R (crate :: R < R32_ETH_MMCTIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTIR_SPEC > ; # [inline (always)]
  11473. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTIR_SPEC >> for R { # [inline (always)]
  11474. fn from (reader : crate :: R < R32_ETH_MMCTIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTIR` writer"]
  11475. pub struct W (crate :: W < R32_ETH_MMCTIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTIR_SPEC > ; # [inline (always)]
  11476. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11477. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTIR_SPEC >> for W { # [inline (always)]
  11478. fn from (writer : crate :: W < R32_ETH_MMCTIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTIR` reader - MMC TX Interrupt Register"]
  11479. pub struct R32_ETH_MMCTIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11480. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTIR` writer - MMC TX Interrupt Register"]
  11481. pub struct R32_ETH_MMCTIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11482. # [inline (always)]
  11483. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC TX Interrupt Register"]
  11484. # [inline (always)]
  11485. pub fn r32_eth_mmctir (& self) -> R32_ETH_MMCTIR_R { R32_ETH_MMCTIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC TX Interrupt Register"]
  11486. # [inline (always)]
  11487. pub fn r32_eth_mmctir (& mut self) -> R32_ETH_MMCTIR_W { R32_ETH_MMCTIR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11488. # [inline (always)]
  11489. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC TX Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctir](index.html) module"]
  11490. pub struct R32_ETH_MMCTIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctir::R](R) reader structure"]
  11491. impl crate :: Readable for R32_ETH_MMCTIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctir::W](W) writer structure"]
  11492. impl crate :: Writable for R32_ETH_MMCTIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTIR to value 0"]
  11493. impl crate :: Resettable for R32_ETH_MMCTIR_SPEC { # [inline (always)]
  11494. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRIMR register accessor: an alias for `Reg<R32_ETH_MMCRIMR_SPEC>`"]
  11495. pub type R32_ETH_MMCRIMR = crate :: Reg < r32_eth_mmcrimr :: R32_ETH_MMCRIMR_SPEC > ; # [doc = "MMC RX Interrupt Mask Register"]
  11496. pub mod r32_eth_mmcrimr { # [doc = "Register `R32_ETH_MMCRIMR` reader"]
  11497. pub struct R (crate :: R < R32_ETH_MMCRIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRIMR_SPEC > ; # [inline (always)]
  11498. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRIMR_SPEC >> for R { # [inline (always)]
  11499. fn from (reader : crate :: R < R32_ETH_MMCRIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRIMR` writer"]
  11500. pub struct W (crate :: W < R32_ETH_MMCRIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRIMR_SPEC > ; # [inline (always)]
  11501. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11502. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRIMR_SPEC >> for W { # [inline (always)]
  11503. fn from (writer : crate :: W < R32_ETH_MMCRIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRIMR` reader - MMC RX Interrupt Mask Register"]
  11504. pub struct R32_ETH_MMCRIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11505. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRIMR` writer - MMC RX Interrupt Mask Register"]
  11506. pub struct R32_ETH_MMCRIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11507. # [inline (always)]
  11508. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Interrupt Mask Register"]
  11509. # [inline (always)]
  11510. pub fn r32_eth_mmcrimr (& self) -> R32_ETH_MMCRIMR_R { R32_ETH_MMCRIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Interrupt Mask Register"]
  11511. # [inline (always)]
  11512. pub fn r32_eth_mmcrimr (& mut self) -> R32_ETH_MMCRIMR_W { R32_ETH_MMCRIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11513. # [inline (always)]
  11514. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrimr](index.html) module"]
  11515. pub struct R32_ETH_MMCRIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrimr::R](R) reader structure"]
  11516. impl crate :: Readable for R32_ETH_MMCRIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrimr::W](W) writer structure"]
  11517. impl crate :: Writable for R32_ETH_MMCRIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRIMR to value 0"]
  11518. impl crate :: Resettable for R32_ETH_MMCRIMR_SPEC { # [inline (always)]
  11519. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTIMR register accessor: an alias for `Reg<R32_ETH_MMCTIMR_SPEC>`"]
  11520. pub type R32_ETH_MMCTIMR = crate :: Reg < r32_eth_mmctimr :: R32_ETH_MMCTIMR_SPEC > ; # [doc = "MMC TX Interrupt Mask Register"]
  11521. pub mod r32_eth_mmctimr { # [doc = "Register `R32_ETH_MMCTIMR` reader"]
  11522. pub struct R (crate :: R < R32_ETH_MMCTIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTIMR_SPEC > ; # [inline (always)]
  11523. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTIMR_SPEC >> for R { # [inline (always)]
  11524. fn from (reader : crate :: R < R32_ETH_MMCTIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTIMR` writer"]
  11525. pub struct W (crate :: W < R32_ETH_MMCTIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTIMR_SPEC > ; # [inline (always)]
  11526. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11527. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTIMR_SPEC >> for W { # [inline (always)]
  11528. fn from (writer : crate :: W < R32_ETH_MMCTIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTIMR` reader - MMC TX Interrupt Mask Register"]
  11529. pub struct R32_ETH_MMCTIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11530. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTIMR` writer - MMC TX Interrupt Mask Register"]
  11531. pub struct R32_ETH_MMCTIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11532. # [inline (always)]
  11533. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC TX Interrupt Mask Register"]
  11534. # [inline (always)]
  11535. pub fn r32_eth_mmctimr (& self) -> R32_ETH_MMCTIMR_R { R32_ETH_MMCTIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC TX Interrupt Mask Register"]
  11536. # [inline (always)]
  11537. pub fn r32_eth_mmctimr (& mut self) -> R32_ETH_MMCTIMR_W { R32_ETH_MMCTIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11538. # [inline (always)]
  11539. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC TX Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctimr](index.html) module"]
  11540. pub struct R32_ETH_MMCTIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctimr::R](R) reader structure"]
  11541. impl crate :: Readable for R32_ETH_MMCTIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctimr::W](W) writer structure"]
  11542. impl crate :: Writable for R32_ETH_MMCTIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTIMR to value 0"]
  11543. impl crate :: Resettable for R32_ETH_MMCTIMR_SPEC { # [inline (always)]
  11544. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFSCCR register accessor: an alias for `Reg<R32_ETH_MMCTGFSCCR_SPEC>`"]
  11545. pub type R32_ETH_MMCTGFSCCR = crate :: Reg < r32_eth_mmctgfsccr :: R32_ETH_MMCTGFSCCR_SPEC > ; # [doc = "MMC Transmit Good Frame After Single Conflict Counter Register"]
  11546. pub mod r32_eth_mmctgfsccr { # [doc = "Register `R32_ETH_MMCTGFSCCR` reader"]
  11547. pub struct R (crate :: R < R32_ETH_MMCTGFSCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFSCCR_SPEC > ; # [inline (always)]
  11548. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFSCCR_SPEC >> for R { # [inline (always)]
  11549. fn from (reader : crate :: R < R32_ETH_MMCTGFSCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFSCCR` writer"]
  11550. pub struct W (crate :: W < R32_ETH_MMCTGFSCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFSCCR_SPEC > ; # [inline (always)]
  11551. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11552. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFSCCR_SPEC >> for W { # [inline (always)]
  11553. fn from (writer : crate :: W < R32_ETH_MMCTGFSCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFSCCR` reader - MMC Transmit Good Frame After Single Conflict Counter Register"]
  11554. pub struct R32_ETH_MMCTGFSCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFSCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFSCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFSCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11555. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFSCCR` writer - MMC Transmit Good Frame After Single Conflict Counter Register"]
  11556. pub struct R32_ETH_MMCTGFSCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFSCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11557. # [inline (always)]
  11558. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Single Conflict Counter Register"]
  11559. # [inline (always)]
  11560. pub fn r32_eth_mmctgfsccr (& self) -> R32_ETH_MMCTGFSCCR_R { R32_ETH_MMCTGFSCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Single Conflict Counter Register"]
  11561. # [inline (always)]
  11562. pub fn r32_eth_mmctgfsccr (& mut self) -> R32_ETH_MMCTGFSCCR_W { R32_ETH_MMCTGFSCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11563. # [inline (always)]
  11564. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame After Single Conflict Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfsccr](index.html) module"]
  11565. pub struct R32_ETH_MMCTGFSCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFSCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfsccr::R](R) reader structure"]
  11566. impl crate :: Readable for R32_ETH_MMCTGFSCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfsccr::W](W) writer structure"]
  11567. impl crate :: Writable for R32_ETH_MMCTGFSCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFSCCR to value 0"]
  11568. impl crate :: Resettable for R32_ETH_MMCTGFSCCR_SPEC { # [inline (always)]
  11569. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFMSCCR register accessor: an alias for `Reg<R32_ETH_MMCTGFMSCCR_SPEC>`"]
  11570. pub type R32_ETH_MMCTGFMSCCR = crate :: Reg < r32_eth_mmctgfmsccr :: R32_ETH_MMCTGFMSCCR_SPEC > ; # [doc = "MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  11571. pub mod r32_eth_mmctgfmsccr { # [doc = "Register `R32_ETH_MMCTGFMSCCR` reader"]
  11572. pub struct R (crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFMSCCR_SPEC > ; # [inline (always)]
  11573. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >> for R { # [inline (always)]
  11574. fn from (reader : crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFMSCCR` writer"]
  11575. pub struct W (crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFMSCCR_SPEC > ; # [inline (always)]
  11576. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11577. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >> for W { # [inline (always)]
  11578. fn from (writer : crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFMSCCR` reader - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  11579. pub struct R32_ETH_MMCTGFMSCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFMSCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFMSCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFMSCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11580. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFMSCCR` writer - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  11581. pub struct R32_ETH_MMCTGFMSCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFMSCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11582. # [inline (always)]
  11583. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  11584. # [inline (always)]
  11585. pub fn r32_eth_mmctgfmsccr (& self) -> R32_ETH_MMCTGFMSCCR_R { R32_ETH_MMCTGFMSCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
  11586. # [inline (always)]
  11587. pub fn r32_eth_mmctgfmsccr (& mut self) -> R32_ETH_MMCTGFMSCCR_W { R32_ETH_MMCTGFMSCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11588. # [inline (always)]
  11589. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame After Multiple Conflicts Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfmsccr](index.html) module"]
  11590. pub struct R32_ETH_MMCTGFMSCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFMSCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfmsccr::R](R) reader structure"]
  11591. impl crate :: Readable for R32_ETH_MMCTGFMSCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfmsccr::W](W) writer structure"]
  11592. impl crate :: Writable for R32_ETH_MMCTGFMSCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFMSCCR to value 0"]
  11593. impl crate :: Resettable for R32_ETH_MMCTGFMSCCR_SPEC { # [inline (always)]
  11594. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFCR register accessor: an alias for `Reg<R32_ETH_MMCTGFCR_SPEC>`"]
  11595. pub type R32_ETH_MMCTGFCR = crate :: Reg < r32_eth_mmctgfcr :: R32_ETH_MMCTGFCR_SPEC > ; # [doc = "MMC Transmit Good Frame Counter Register"]
  11596. pub mod r32_eth_mmctgfcr { # [doc = "Register `R32_ETH_MMCTGFCR` reader"]
  11597. pub struct R (crate :: R < R32_ETH_MMCTGFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFCR_SPEC > ; # [inline (always)]
  11598. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFCR_SPEC >> for R { # [inline (always)]
  11599. fn from (reader : crate :: R < R32_ETH_MMCTGFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFCR` writer"]
  11600. pub struct W (crate :: W < R32_ETH_MMCTGFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFCR_SPEC > ; # [inline (always)]
  11601. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11602. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFCR_SPEC >> for W { # [inline (always)]
  11603. fn from (writer : crate :: W < R32_ETH_MMCTGFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFCR` reader - MMC Transmit Good Frame Counter Register"]
  11604. pub struct R32_ETH_MMCTGFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11605. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFCR` writer - MMC Transmit Good Frame Counter Register"]
  11606. pub struct R32_ETH_MMCTGFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11607. # [inline (always)]
  11608. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame Counter Register"]
  11609. # [inline (always)]
  11610. pub fn r32_eth_mmctgfcr (& self) -> R32_ETH_MMCTGFCR_R { R32_ETH_MMCTGFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame Counter Register"]
  11611. # [inline (always)]
  11612. pub fn r32_eth_mmctgfcr (& mut self) -> R32_ETH_MMCTGFCR_W { R32_ETH_MMCTGFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11613. # [inline (always)]
  11614. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfcr](index.html) module"]
  11615. pub struct R32_ETH_MMCTGFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfcr::R](R) reader structure"]
  11616. impl crate :: Readable for R32_ETH_MMCTGFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfcr::W](W) writer structure"]
  11617. impl crate :: Writable for R32_ETH_MMCTGFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFCR to value 0"]
  11618. impl crate :: Resettable for R32_ETH_MMCTGFCR_SPEC { # [inline (always)]
  11619. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRFCECR register accessor: an alias for `Reg<R32_ETH_MMCRFCECR_SPEC>`"]
  11620. pub type R32_ETH_MMCRFCECR = crate :: Reg < r32_eth_mmcrfcecr :: R32_ETH_MMCRFCECR_SPEC > ; # [doc = "MMC RX Frame CRC Error Counter Register"]
  11621. pub mod r32_eth_mmcrfcecr { # [doc = "Register `R32_ETH_MMCRFCECR` reader"]
  11622. pub struct R (crate :: R < R32_ETH_MMCRFCECR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRFCECR_SPEC > ; # [inline (always)]
  11623. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRFCECR_SPEC >> for R { # [inline (always)]
  11624. fn from (reader : crate :: R < R32_ETH_MMCRFCECR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRFCECR` writer"]
  11625. pub struct W (crate :: W < R32_ETH_MMCRFCECR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRFCECR_SPEC > ; # [inline (always)]
  11626. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11627. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRFCECR_SPEC >> for W { # [inline (always)]
  11628. fn from (writer : crate :: W < R32_ETH_MMCRFCECR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRFCECR` reader - MMC RX Frame CRC Error Counter Register"]
  11629. pub struct R32_ETH_MMCRFCECR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRFCECR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRFCECR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRFCECR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11630. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRFCECR` writer - MMC RX Frame CRC Error Counter Register"]
  11631. pub struct R32_ETH_MMCRFCECR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRFCECR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11632. # [inline (always)]
  11633. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Frame CRC Error Counter Register"]
  11634. # [inline (always)]
  11635. pub fn r32_eth_mmcrfcecr (& self) -> R32_ETH_MMCRFCECR_R { R32_ETH_MMCRFCECR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Frame CRC Error Counter Register"]
  11636. # [inline (always)]
  11637. pub fn r32_eth_mmcrfcecr (& mut self) -> R32_ETH_MMCRFCECR_W { R32_ETH_MMCRFCECR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11638. # [inline (always)]
  11639. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Frame CRC Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrfcecr](index.html) module"]
  11640. pub struct R32_ETH_MMCRFCECR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRFCECR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrfcecr::R](R) reader structure"]
  11641. impl crate :: Readable for R32_ETH_MMCRFCECR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrfcecr::W](W) writer structure"]
  11642. impl crate :: Writable for R32_ETH_MMCRFCECR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRFCECR to value 0"]
  11643. impl crate :: Resettable for R32_ETH_MMCRFCECR_SPEC { # [inline (always)]
  11644. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRFAECR register accessor: an alias for `Reg<R32_ETH_MMCRFAECR_SPEC>`"]
  11645. pub type R32_ETH_MMCRFAECR = crate :: Reg < r32_eth_mmcrfaecr :: R32_ETH_MMCRFAECR_SPEC > ; # [doc = "MMC RX Frame Alignment Error Counter Register"]
  11646. pub mod r32_eth_mmcrfaecr { # [doc = "Register `R32_ETH_MMCRFAECR` reader"]
  11647. pub struct R (crate :: R < R32_ETH_MMCRFAECR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRFAECR_SPEC > ; # [inline (always)]
  11648. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRFAECR_SPEC >> for R { # [inline (always)]
  11649. fn from (reader : crate :: R < R32_ETH_MMCRFAECR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRFAECR` writer"]
  11650. pub struct W (crate :: W < R32_ETH_MMCRFAECR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRFAECR_SPEC > ; # [inline (always)]
  11651. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11652. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRFAECR_SPEC >> for W { # [inline (always)]
  11653. fn from (writer : crate :: W < R32_ETH_MMCRFAECR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRFAECR` reader - MMC RX Frame Alignment Error Counter Register"]
  11654. pub struct R32_ETH_MMCRFAECR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRFAECR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRFAECR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRFAECR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11655. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRFAECR` writer - MMC RX Frame Alignment Error Counter Register"]
  11656. pub struct R32_ETH_MMCRFAECR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRFAECR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11657. # [inline (always)]
  11658. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Frame Alignment Error Counter Register"]
  11659. # [inline (always)]
  11660. pub fn r32_eth_mmcrfaecr (& self) -> R32_ETH_MMCRFAECR_R { R32_ETH_MMCRFAECR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Frame Alignment Error Counter Register"]
  11661. # [inline (always)]
  11662. pub fn r32_eth_mmcrfaecr (& mut self) -> R32_ETH_MMCRFAECR_W { R32_ETH_MMCRFAECR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11663. # [inline (always)]
  11664. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Frame Alignment Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrfaecr](index.html) module"]
  11665. pub struct R32_ETH_MMCRFAECR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRFAECR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrfaecr::R](R) reader structure"]
  11666. impl crate :: Readable for R32_ETH_MMCRFAECR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrfaecr::W](W) writer structure"]
  11667. impl crate :: Writable for R32_ETH_MMCRFAECR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRFAECR to value 0"]
  11668. impl crate :: Resettable for R32_ETH_MMCRFAECR_SPEC { # [inline (always)]
  11669. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRGUFCR register accessor: an alias for `Reg<R32_ETH_MMCRGUFCR_SPEC>`"]
  11670. pub type R32_ETH_MMCRGUFCR = crate :: Reg < r32_eth_mmcrgufcr :: R32_ETH_MMCRGUFCR_SPEC > ; # [doc = "MMC RX Good Unicast Frame Counter Register"]
  11671. pub mod r32_eth_mmcrgufcr { # [doc = "Register `R32_ETH_MMCRGUFCR` reader"]
  11672. pub struct R (crate :: R < R32_ETH_MMCRGUFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRGUFCR_SPEC > ; # [inline (always)]
  11673. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRGUFCR_SPEC >> for R { # [inline (always)]
  11674. fn from (reader : crate :: R < R32_ETH_MMCRGUFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRGUFCR` writer"]
  11675. pub struct W (crate :: W < R32_ETH_MMCRGUFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRGUFCR_SPEC > ; # [inline (always)]
  11676. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11677. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRGUFCR_SPEC >> for W { # [inline (always)]
  11678. fn from (writer : crate :: W < R32_ETH_MMCRGUFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRGUFCR` reader - MMC RX Good Unicast Frame Counter Register"]
  11679. pub struct R32_ETH_MMCRGUFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRGUFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRGUFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRGUFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11680. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRGUFCR` writer - MMC RX Good Unicast Frame Counter Register"]
  11681. pub struct R32_ETH_MMCRGUFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRGUFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11682. # [inline (always)]
  11683. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Good Unicast Frame Counter Register"]
  11684. # [inline (always)]
  11685. pub fn r32_eth_mmcrgufcr (& self) -> R32_ETH_MMCRGUFCR_R { R32_ETH_MMCRGUFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Good Unicast Frame Counter Register"]
  11686. # [inline (always)]
  11687. pub fn r32_eth_mmcrgufcr (& mut self) -> R32_ETH_MMCRGUFCR_W { R32_ETH_MMCRGUFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11688. # [inline (always)]
  11689. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Good Unicast Frame Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrgufcr](index.html) module"]
  11690. pub struct R32_ETH_MMCRGUFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRGUFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrgufcr::R](R) reader structure"]
  11691. impl crate :: Readable for R32_ETH_MMCRGUFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrgufcr::W](W) writer structure"]
  11692. impl crate :: Writable for R32_ETH_MMCRGUFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRGUFCR to value 0"]
  11693. impl crate :: Resettable for R32_ETH_MMCRGUFCR_SPEC { # [inline (always)]
  11694. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSCR register accessor: an alias for `Reg<R32_ETH_PTPTSCR_SPEC>`"]
  11695. pub type R32_ETH_PTPTSCR = crate :: Reg < r32_eth_ptptscr :: R32_ETH_PTPTSCR_SPEC > ; # [doc = "PTP Time Stamp Control Register"]
  11696. pub mod r32_eth_ptptscr { # [doc = "Register `R32_ETH_PTPTSCR` reader"]
  11697. pub struct R (crate :: R < R32_ETH_PTPTSCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSCR_SPEC > ; # [inline (always)]
  11698. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSCR_SPEC >> for R { # [inline (always)]
  11699. fn from (reader : crate :: R < R32_ETH_PTPTSCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSCR` writer"]
  11700. pub struct W (crate :: W < R32_ETH_PTPTSCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSCR_SPEC > ; # [inline (always)]
  11701. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11702. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSCR_SPEC >> for W { # [inline (always)]
  11703. fn from (writer : crate :: W < R32_ETH_PTPTSCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSCR` reader - PTP Time Stamp Control Register"]
  11704. pub struct R32_ETH_PTPTSCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11705. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSCR` writer - PTP Time Stamp Control Register"]
  11706. pub struct R32_ETH_PTPTSCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11707. # [inline (always)]
  11708. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Control Register"]
  11709. # [inline (always)]
  11710. pub fn r32_eth_ptptscr (& self) -> R32_ETH_PTPTSCR_R { R32_ETH_PTPTSCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Control Register"]
  11711. # [inline (always)]
  11712. pub fn r32_eth_ptptscr (& mut self) -> R32_ETH_PTPTSCR_W { R32_ETH_PTPTSCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11713. # [inline (always)]
  11714. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptscr](index.html) module"]
  11715. pub struct R32_ETH_PTPTSCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptscr::R](R) reader structure"]
  11716. impl crate :: Readable for R32_ETH_PTPTSCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptscr::W](W) writer structure"]
  11717. impl crate :: Writable for R32_ETH_PTPTSCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSCR to value 0"]
  11718. impl crate :: Resettable for R32_ETH_PTPTSCR_SPEC { # [inline (always)]
  11719. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPSSIR register accessor: an alias for `Reg<R32_ETH_PTPSSIR_SPEC>`"]
  11720. pub type R32_ETH_PTPSSIR = crate :: Reg < r32_eth_ptpssir :: R32_ETH_PTPSSIR_SPEC > ; # [doc = "PTP Sub Second Increment Register"]
  11721. pub mod r32_eth_ptpssir { # [doc = "Register `R32_ETH_PTPSSIR` reader"]
  11722. pub struct R (crate :: R < R32_ETH_PTPSSIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPSSIR_SPEC > ; # [inline (always)]
  11723. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPSSIR_SPEC >> for R { # [inline (always)]
  11724. fn from (reader : crate :: R < R32_ETH_PTPSSIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPSSIR` writer"]
  11725. pub struct W (crate :: W < R32_ETH_PTPSSIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPSSIR_SPEC > ; # [inline (always)]
  11726. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11727. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPSSIR_SPEC >> for W { # [inline (always)]
  11728. fn from (writer : crate :: W < R32_ETH_PTPSSIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPSSIR` reader - PTP Sub Second Increment Register"]
  11729. pub struct R32_ETH_PTPSSIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPSSIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPSSIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPSSIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11730. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPSSIR` writer - PTP Sub Second Increment Register"]
  11731. pub struct R32_ETH_PTPSSIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPSSIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11732. # [inline (always)]
  11733. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Sub Second Increment Register"]
  11734. # [inline (always)]
  11735. pub fn r32_eth_ptpssir (& self) -> R32_ETH_PTPSSIR_R { R32_ETH_PTPSSIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Sub Second Increment Register"]
  11736. # [inline (always)]
  11737. pub fn r32_eth_ptpssir (& mut self) -> R32_ETH_PTPSSIR_W { R32_ETH_PTPSSIR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11738. # [inline (always)]
  11739. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Sub Second Increment Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptpssir](index.html) module"]
  11740. pub struct R32_ETH_PTPSSIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPSSIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptpssir::R](R) reader structure"]
  11741. impl crate :: Readable for R32_ETH_PTPSSIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptpssir::W](W) writer structure"]
  11742. impl crate :: Writable for R32_ETH_PTPSSIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPSSIR to value 0"]
  11743. impl crate :: Resettable for R32_ETH_PTPSSIR_SPEC { # [inline (always)]
  11744. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSHR register accessor: an alias for `Reg<R32_ETH_PTPTSHR_SPEC>`"]
  11745. pub type R32_ETH_PTPTSHR = crate :: Reg < r32_eth_ptptshr :: R32_ETH_PTPTSHR_SPEC > ; # [doc = "PTP Time Stamp High Register"]
  11746. pub mod r32_eth_ptptshr { # [doc = "Register `R32_ETH_PTPTSHR` reader"]
  11747. pub struct R (crate :: R < R32_ETH_PTPTSHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSHR_SPEC > ; # [inline (always)]
  11748. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSHR_SPEC >> for R { # [inline (always)]
  11749. fn from (reader : crate :: R < R32_ETH_PTPTSHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSHR` writer"]
  11750. pub struct W (crate :: W < R32_ETH_PTPTSHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSHR_SPEC > ; # [inline (always)]
  11751. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11752. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSHR_SPEC >> for W { # [inline (always)]
  11753. fn from (writer : crate :: W < R32_ETH_PTPTSHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSHR` reader - PTP Time Stamp High Register"]
  11754. pub struct R32_ETH_PTPTSHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11755. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSHR` writer - PTP Time Stamp High Register"]
  11756. pub struct R32_ETH_PTPTSHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11757. # [inline (always)]
  11758. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp High Register"]
  11759. # [inline (always)]
  11760. pub fn r32_eth_ptptshr (& self) -> R32_ETH_PTPTSHR_R { R32_ETH_PTPTSHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp High Register"]
  11761. # [inline (always)]
  11762. pub fn r32_eth_ptptshr (& mut self) -> R32_ETH_PTPTSHR_W { R32_ETH_PTPTSHR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11763. # [inline (always)]
  11764. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptshr](index.html) module"]
  11765. pub struct R32_ETH_PTPTSHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptshr::R](R) reader structure"]
  11766. impl crate :: Readable for R32_ETH_PTPTSHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptshr::W](W) writer structure"]
  11767. impl crate :: Writable for R32_ETH_PTPTSHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSHR to value 0"]
  11768. impl crate :: Resettable for R32_ETH_PTPTSHR_SPEC { # [inline (always)]
  11769. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSLR register accessor: an alias for `Reg<R32_ETH_PTPTSLR_SPEC>`"]
  11770. pub type R32_ETH_PTPTSLR = crate :: Reg < r32_eth_ptptslr :: R32_ETH_PTPTSLR_SPEC > ; # [doc = "PTP Time Stamp Low Register"]
  11771. pub mod r32_eth_ptptslr { # [doc = "Register `R32_ETH_PTPTSLR` reader"]
  11772. pub struct R (crate :: R < R32_ETH_PTPTSLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSLR_SPEC > ; # [inline (always)]
  11773. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSLR_SPEC >> for R { # [inline (always)]
  11774. fn from (reader : crate :: R < R32_ETH_PTPTSLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSLR` writer"]
  11775. pub struct W (crate :: W < R32_ETH_PTPTSLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSLR_SPEC > ; # [inline (always)]
  11776. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11777. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSLR_SPEC >> for W { # [inline (always)]
  11778. fn from (writer : crate :: W < R32_ETH_PTPTSLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSLR` reader - PTP Time Stamp Low Register"]
  11779. pub struct R32_ETH_PTPTSLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11780. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSLR` writer - PTP Time Stamp Low Register"]
  11781. pub struct R32_ETH_PTPTSLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11782. # [inline (always)]
  11783. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Low Register"]
  11784. # [inline (always)]
  11785. pub fn r32_eth_ptptslr (& self) -> R32_ETH_PTPTSLR_R { R32_ETH_PTPTSLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Low Register"]
  11786. # [inline (always)]
  11787. pub fn r32_eth_ptptslr (& mut self) -> R32_ETH_PTPTSLR_W { R32_ETH_PTPTSLR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11788. # [inline (always)]
  11789. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptslr](index.html) module"]
  11790. pub struct R32_ETH_PTPTSLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptslr::R](R) reader structure"]
  11791. impl crate :: Readable for R32_ETH_PTPTSLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptslr::W](W) writer structure"]
  11792. impl crate :: Writable for R32_ETH_PTPTSLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSLR to value 0"]
  11793. impl crate :: Resettable for R32_ETH_PTPTSLR_SPEC { # [inline (always)]
  11794. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSHUR register accessor: an alias for `Reg<R32_ETH_PTPTSHUR_SPEC>`"]
  11795. pub type R32_ETH_PTPTSHUR = crate :: Reg < r32_eth_ptptshur :: R32_ETH_PTPTSHUR_SPEC > ; # [doc = "PTP Time Stamp High Update Register"]
  11796. pub mod r32_eth_ptptshur { # [doc = "Register `R32_ETH_PTPTSHUR` reader"]
  11797. pub struct R (crate :: R < R32_ETH_PTPTSHUR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSHUR_SPEC > ; # [inline (always)]
  11798. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSHUR_SPEC >> for R { # [inline (always)]
  11799. fn from (reader : crate :: R < R32_ETH_PTPTSHUR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSHUR` writer"]
  11800. pub struct W (crate :: W < R32_ETH_PTPTSHUR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSHUR_SPEC > ; # [inline (always)]
  11801. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11802. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSHUR_SPEC >> for W { # [inline (always)]
  11803. fn from (writer : crate :: W < R32_ETH_PTPTSHUR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSHUR` reader - PTP Time Stamp High Update Register"]
  11804. pub struct R32_ETH_PTPTSHUR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSHUR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSHUR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSHUR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11805. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSHUR` writer - PTP Time Stamp High Update Register"]
  11806. pub struct R32_ETH_PTPTSHUR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSHUR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11807. # [inline (always)]
  11808. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp High Update Register"]
  11809. # [inline (always)]
  11810. pub fn r32_eth_ptptshur (& self) -> R32_ETH_PTPTSHUR_R { R32_ETH_PTPTSHUR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp High Update Register"]
  11811. # [inline (always)]
  11812. pub fn r32_eth_ptptshur (& mut self) -> R32_ETH_PTPTSHUR_W { R32_ETH_PTPTSHUR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11813. # [inline (always)]
  11814. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp High Update Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptshur](index.html) module"]
  11815. pub struct R32_ETH_PTPTSHUR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSHUR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptshur::R](R) reader structure"]
  11816. impl crate :: Readable for R32_ETH_PTPTSHUR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptshur::W](W) writer structure"]
  11817. impl crate :: Writable for R32_ETH_PTPTSHUR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSHUR to value 0"]
  11818. impl crate :: Resettable for R32_ETH_PTPTSHUR_SPEC { # [inline (always)]
  11819. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSLUR register accessor: an alias for `Reg<R32_ETH_PTPTSLUR_SPEC>`"]
  11820. pub type R32_ETH_PTPTSLUR = crate :: Reg < r32_eth_ptptslur :: R32_ETH_PTPTSLUR_SPEC > ; # [doc = "PTP Time Stamp Low Update Register"]
  11821. pub mod r32_eth_ptptslur { # [doc = "Register `R32_ETH_PTPTSLUR` reader"]
  11822. pub struct R (crate :: R < R32_ETH_PTPTSLUR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSLUR_SPEC > ; # [inline (always)]
  11823. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSLUR_SPEC >> for R { # [inline (always)]
  11824. fn from (reader : crate :: R < R32_ETH_PTPTSLUR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSLUR` writer"]
  11825. pub struct W (crate :: W < R32_ETH_PTPTSLUR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSLUR_SPEC > ; # [inline (always)]
  11826. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11827. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSLUR_SPEC >> for W { # [inline (always)]
  11828. fn from (writer : crate :: W < R32_ETH_PTPTSLUR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSLUR` reader - PTP Time Stamp Low Update Register"]
  11829. pub struct R32_ETH_PTPTSLUR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSLUR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSLUR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSLUR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11830. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSLUR` writer - PTP Time Stamp Low Update Register"]
  11831. pub struct R32_ETH_PTPTSLUR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSLUR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11832. # [inline (always)]
  11833. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Low Update Register"]
  11834. # [inline (always)]
  11835. pub fn r32_eth_ptptslur (& self) -> R32_ETH_PTPTSLUR_R { R32_ETH_PTPTSLUR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Low Update Register"]
  11836. # [inline (always)]
  11837. pub fn r32_eth_ptptslur (& mut self) -> R32_ETH_PTPTSLUR_W { R32_ETH_PTPTSLUR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11838. # [inline (always)]
  11839. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Low Update Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptslur](index.html) module"]
  11840. pub struct R32_ETH_PTPTSLUR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSLUR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptslur::R](R) reader structure"]
  11841. impl crate :: Readable for R32_ETH_PTPTSLUR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptslur::W](W) writer structure"]
  11842. impl crate :: Writable for R32_ETH_PTPTSLUR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSLUR to value 0"]
  11843. impl crate :: Resettable for R32_ETH_PTPTSLUR_SPEC { # [inline (always)]
  11844. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSAR register accessor: an alias for `Reg<R32_ETH_PTPTSAR_SPEC>`"]
  11845. pub type R32_ETH_PTPTSAR = crate :: Reg < r32_eth_ptptsar :: R32_ETH_PTPTSAR_SPEC > ; # [doc = "PTP Time Stamp Accumulating Register"]
  11846. pub mod r32_eth_ptptsar { # [doc = "Register `R32_ETH_PTPTSAR` reader"]
  11847. pub struct R (crate :: R < R32_ETH_PTPTSAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSAR_SPEC > ; # [inline (always)]
  11848. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSAR_SPEC >> for R { # [inline (always)]
  11849. fn from (reader : crate :: R < R32_ETH_PTPTSAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSAR` writer"]
  11850. pub struct W (crate :: W < R32_ETH_PTPTSAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSAR_SPEC > ; # [inline (always)]
  11851. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11852. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSAR_SPEC >> for W { # [inline (always)]
  11853. fn from (writer : crate :: W < R32_ETH_PTPTSAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSAR` reader - PTP Time Stamp Accumulating Register"]
  11854. pub struct R32_ETH_PTPTSAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11855. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSAR` writer - PTP Time Stamp Accumulating Register"]
  11856. pub struct R32_ETH_PTPTSAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11857. # [inline (always)]
  11858. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Accumulating Register"]
  11859. # [inline (always)]
  11860. pub fn r32_eth_ptptsar (& self) -> R32_ETH_PTPTSAR_R { R32_ETH_PTPTSAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Accumulating Register"]
  11861. # [inline (always)]
  11862. pub fn r32_eth_ptptsar (& mut self) -> R32_ETH_PTPTSAR_W { R32_ETH_PTPTSAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11863. # [inline (always)]
  11864. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Accumulating Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptsar](index.html) module"]
  11865. pub struct R32_ETH_PTPTSAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptsar::R](R) reader structure"]
  11866. impl crate :: Readable for R32_ETH_PTPTSAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptsar::W](W) writer structure"]
  11867. impl crate :: Writable for R32_ETH_PTPTSAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSAR to value 0"]
  11868. impl crate :: Resettable for R32_ETH_PTPTSAR_SPEC { # [inline (always)]
  11869. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTTHR register accessor: an alias for `Reg<R32_ETH_PTPTTHR_SPEC>`"]
  11870. pub type R32_ETH_PTPTTHR = crate :: Reg < r32_eth_ptptthr :: R32_ETH_PTPTTHR_SPEC > ; # [doc = "PTP Target Time High Register"]
  11871. pub mod r32_eth_ptptthr { # [doc = "Register `R32_ETH_PTPTTHR` reader"]
  11872. pub struct R (crate :: R < R32_ETH_PTPTTHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTTHR_SPEC > ; # [inline (always)]
  11873. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTTHR_SPEC >> for R { # [inline (always)]
  11874. fn from (reader : crate :: R < R32_ETH_PTPTTHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTTHR` writer"]
  11875. pub struct W (crate :: W < R32_ETH_PTPTTHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTTHR_SPEC > ; # [inline (always)]
  11876. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11877. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTTHR_SPEC >> for W { # [inline (always)]
  11878. fn from (writer : crate :: W < R32_ETH_PTPTTHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTTHR` reader - PTP Target Time High Register"]
  11879. pub struct R32_ETH_PTPTTHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTTHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTTHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTTHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11880. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTTHR` writer - PTP Target Time High Register"]
  11881. pub struct R32_ETH_PTPTTHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTTHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11882. # [inline (always)]
  11883. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Target Time High Register"]
  11884. # [inline (always)]
  11885. pub fn r32_eth_ptptthr (& self) -> R32_ETH_PTPTTHR_R { R32_ETH_PTPTTHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Target Time High Register"]
  11886. # [inline (always)]
  11887. pub fn r32_eth_ptptthr (& mut self) -> R32_ETH_PTPTTHR_W { R32_ETH_PTPTTHR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11888. # [inline (always)]
  11889. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Target Time High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptthr](index.html) module"]
  11890. pub struct R32_ETH_PTPTTHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTTHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptthr::R](R) reader structure"]
  11891. impl crate :: Readable for R32_ETH_PTPTTHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptthr::W](W) writer structure"]
  11892. impl crate :: Writable for R32_ETH_PTPTTHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTTHR to value 0"]
  11893. impl crate :: Resettable for R32_ETH_PTPTTHR_SPEC { # [inline (always)]
  11894. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTTLR register accessor: an alias for `Reg<R32_ETH_PTPTTLR_SPEC>`"]
  11895. pub type R32_ETH_PTPTTLR = crate :: Reg < r32_eth_ptpttlr :: R32_ETH_PTPTTLR_SPEC > ; # [doc = "PTP Target Time Low Register"]
  11896. pub mod r32_eth_ptpttlr { # [doc = "Register `R32_ETH_PTPTTLR` reader"]
  11897. pub struct R (crate :: R < R32_ETH_PTPTTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTTLR_SPEC > ; # [inline (always)]
  11898. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTTLR_SPEC >> for R { # [inline (always)]
  11899. fn from (reader : crate :: R < R32_ETH_PTPTTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTTLR` writer"]
  11900. pub struct W (crate :: W < R32_ETH_PTPTTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTTLR_SPEC > ; # [inline (always)]
  11901. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11902. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTTLR_SPEC >> for W { # [inline (always)]
  11903. fn from (writer : crate :: W < R32_ETH_PTPTTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTTLR` reader - PTP Target Time Low Register"]
  11904. pub struct R32_ETH_PTPTTLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTTLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTTLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTTLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11905. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTTLR` writer - PTP Target Time Low Register"]
  11906. pub struct R32_ETH_PTPTTLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTTLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11907. # [inline (always)]
  11908. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Target Time Low Register"]
  11909. # [inline (always)]
  11910. pub fn r32_eth_ptpttlr (& self) -> R32_ETH_PTPTTLR_R { R32_ETH_PTPTTLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Target Time Low Register"]
  11911. # [inline (always)]
  11912. pub fn r32_eth_ptpttlr (& mut self) -> R32_ETH_PTPTTLR_W { R32_ETH_PTPTTLR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11913. # [inline (always)]
  11914. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Target Time Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptpttlr](index.html) module"]
  11915. pub struct R32_ETH_PTPTTLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptpttlr::R](R) reader structure"]
  11916. impl crate :: Readable for R32_ETH_PTPTTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptpttlr::W](W) writer structure"]
  11917. impl crate :: Writable for R32_ETH_PTPTTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTTLR to value 0"]
  11918. impl crate :: Resettable for R32_ETH_PTPTTLR_SPEC { # [inline (always)]
  11919. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSSR register accessor: an alias for `Reg<R32_ETH_PTPTSSR_SPEC>`"]
  11920. pub type R32_ETH_PTPTSSR = crate :: Reg < r32_eth_ptptssr :: R32_ETH_PTPTSSR_SPEC > ; # [doc = "PTP Time Stamp Status Register"]
  11921. pub mod r32_eth_ptptssr { # [doc = "Register `R32_ETH_PTPTSSR` reader"]
  11922. pub struct R (crate :: R < R32_ETH_PTPTSSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSSR_SPEC > ; # [inline (always)]
  11923. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSSR_SPEC >> for R { # [inline (always)]
  11924. fn from (reader : crate :: R < R32_ETH_PTPTSSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSSR` writer"]
  11925. pub struct W (crate :: W < R32_ETH_PTPTSSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSSR_SPEC > ; # [inline (always)]
  11926. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11927. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSSR_SPEC >> for W { # [inline (always)]
  11928. fn from (writer : crate :: W < R32_ETH_PTPTSSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSSR` reader - PTP Time Stamp Status Register"]
  11929. pub struct R32_ETH_PTPTSSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11930. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSSR` writer - PTP Time Stamp Status Register"]
  11931. pub struct R32_ETH_PTPTSSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11932. # [inline (always)]
  11933. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Status Register"]
  11934. # [inline (always)]
  11935. pub fn r32_eth_ptptssr (& self) -> R32_ETH_PTPTSSR_R { R32_ETH_PTPTSSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Status Register"]
  11936. # [inline (always)]
  11937. pub fn r32_eth_ptptssr (& mut self) -> R32_ETH_PTPTSSR_W { R32_ETH_PTPTSSR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11938. # [inline (always)]
  11939. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptssr](index.html) module"]
  11940. pub struct R32_ETH_PTPTSSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptssr::R](R) reader structure"]
  11941. impl crate :: Readable for R32_ETH_PTPTSSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptssr::W](W) writer structure"]
  11942. impl crate :: Writable for R32_ETH_PTPTSSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSSR to value 0"]
  11943. impl crate :: Resettable for R32_ETH_PTPTSSR_SPEC { # [inline (always)]
  11944. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMABMR register accessor: an alias for `Reg<R32_ETH_DMABMR_SPEC>`"]
  11945. pub type R32_ETH_DMABMR = crate :: Reg < r32_eth_dmabmr :: R32_ETH_DMABMR_SPEC > ; # [doc = "DMA Bus Mode Register"]
  11946. pub mod r32_eth_dmabmr { # [doc = "Register `R32_ETH_DMABMR` reader"]
  11947. pub struct R (crate :: R < R32_ETH_DMABMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMABMR_SPEC > ; # [inline (always)]
  11948. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMABMR_SPEC >> for R { # [inline (always)]
  11949. fn from (reader : crate :: R < R32_ETH_DMABMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMABMR` writer"]
  11950. pub struct W (crate :: W < R32_ETH_DMABMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMABMR_SPEC > ; # [inline (always)]
  11951. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11952. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMABMR_SPEC >> for W { # [inline (always)]
  11953. fn from (writer : crate :: W < R32_ETH_DMABMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMABMR` reader - DMA Bus Mode Register"]
  11954. pub struct R32_ETH_DMABMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMABMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMABMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMABMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11955. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMABMR` writer - DMA Bus Mode Register"]
  11956. pub struct R32_ETH_DMABMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMABMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11957. # [inline (always)]
  11958. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Bus Mode Register"]
  11959. # [inline (always)]
  11960. pub fn r32_eth_dmabmr (& self) -> R32_ETH_DMABMR_R { R32_ETH_DMABMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Bus Mode Register"]
  11961. # [inline (always)]
  11962. pub fn r32_eth_dmabmr (& mut self) -> R32_ETH_DMABMR_W { R32_ETH_DMABMR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11963. # [inline (always)]
  11964. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Bus Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmabmr](index.html) module"]
  11965. pub struct R32_ETH_DMABMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMABMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmabmr::R](R) reader structure"]
  11966. impl crate :: Readable for R32_ETH_DMABMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmabmr::W](W) writer structure"]
  11967. impl crate :: Writable for R32_ETH_DMABMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMABMR to value 0"]
  11968. impl crate :: Resettable for R32_ETH_DMABMR_SPEC { # [inline (always)]
  11969. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMATPDR register accessor: an alias for `Reg<R32_ETH_DMATPDR_SPEC>`"]
  11970. pub type R32_ETH_DMATPDR = crate :: Reg < r32_eth_dmatpdr :: R32_ETH_DMATPDR_SPEC > ; # [doc = "DMA TX Poll Demand Register"]
  11971. pub mod r32_eth_dmatpdr { # [doc = "Register `R32_ETH_DMATPDR` reader"]
  11972. pub struct R (crate :: R < R32_ETH_DMATPDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMATPDR_SPEC > ; # [inline (always)]
  11973. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMATPDR_SPEC >> for R { # [inline (always)]
  11974. fn from (reader : crate :: R < R32_ETH_DMATPDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMATPDR` writer"]
  11975. pub struct W (crate :: W < R32_ETH_DMATPDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMATPDR_SPEC > ; # [inline (always)]
  11976. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  11977. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMATPDR_SPEC >> for W { # [inline (always)]
  11978. fn from (writer : crate :: W < R32_ETH_DMATPDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMATPDR` reader - DMA TX Poll Demand Register"]
  11979. pub struct R32_ETH_DMATPDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMATPDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMATPDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMATPDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  11980. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMATPDR` writer - DMA TX Poll Demand Register"]
  11981. pub struct R32_ETH_DMATPDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMATPDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  11982. # [inline (always)]
  11983. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA TX Poll Demand Register"]
  11984. # [inline (always)]
  11985. pub fn r32_eth_dmatpdr (& self) -> R32_ETH_DMATPDR_R { R32_ETH_DMATPDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA TX Poll Demand Register"]
  11986. # [inline (always)]
  11987. pub fn r32_eth_dmatpdr (& mut self) -> R32_ETH_DMATPDR_W { R32_ETH_DMATPDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  11988. # [inline (always)]
  11989. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA TX Poll Demand Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmatpdr](index.html) module"]
  11990. pub struct R32_ETH_DMATPDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMATPDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmatpdr::R](R) reader structure"]
  11991. impl crate :: Readable for R32_ETH_DMATPDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmatpdr::W](W) writer structure"]
  11992. impl crate :: Writable for R32_ETH_DMATPDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMATPDR to value 0"]
  11993. impl crate :: Resettable for R32_ETH_DMATPDR_SPEC { # [inline (always)]
  11994. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARPDR register accessor: an alias for `Reg<R32_ETH_DMARPDR_SPEC>`"]
  11995. pub type R32_ETH_DMARPDR = crate :: Reg < r32_eth_dmarpdr :: R32_ETH_DMARPDR_SPEC > ; # [doc = "DMA RX Poll Demand Register"]
  11996. pub mod r32_eth_dmarpdr { # [doc = "Register `R32_ETH_DMARPDR` reader"]
  11997. pub struct R (crate :: R < R32_ETH_DMARPDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARPDR_SPEC > ; # [inline (always)]
  11998. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARPDR_SPEC >> for R { # [inline (always)]
  11999. fn from (reader : crate :: R < R32_ETH_DMARPDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARPDR` writer"]
  12000. pub struct W (crate :: W < R32_ETH_DMARPDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARPDR_SPEC > ; # [inline (always)]
  12001. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12002. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARPDR_SPEC >> for W { # [inline (always)]
  12003. fn from (writer : crate :: W < R32_ETH_DMARPDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARPDR` reader - DMA RX Poll Demand Register"]
  12004. pub struct R32_ETH_DMARPDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARPDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARPDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARPDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12005. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARPDR` writer - DMA RX Poll Demand Register"]
  12006. pub struct R32_ETH_DMARPDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARPDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12007. # [inline (always)]
  12008. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Poll Demand Register"]
  12009. # [inline (always)]
  12010. pub fn r32_eth_dmarpdr (& self) -> R32_ETH_DMARPDR_R { R32_ETH_DMARPDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Poll Demand Register"]
  12011. # [inline (always)]
  12012. pub fn r32_eth_dmarpdr (& mut self) -> R32_ETH_DMARPDR_W { R32_ETH_DMARPDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12013. # [inline (always)]
  12014. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Poll Demand Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmarpdr](index.html) module"]
  12015. pub struct R32_ETH_DMARPDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARPDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmarpdr::R](R) reader structure"]
  12016. impl crate :: Readable for R32_ETH_DMARPDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmarpdr::W](W) writer structure"]
  12017. impl crate :: Writable for R32_ETH_DMARPDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARPDR to value 0"]
  12018. impl crate :: Resettable for R32_ETH_DMARPDR_SPEC { # [inline (always)]
  12019. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARDLAR register accessor: an alias for `Reg<R32_ETH_DMARDLAR_SPEC>`"]
  12020. pub type R32_ETH_DMARDLAR = crate :: Reg < r32_eth_dmardlar :: R32_ETH_DMARDLAR_SPEC > ; # [doc = "DMA RX Description List Address Register"]
  12021. pub mod r32_eth_dmardlar { # [doc = "Register `R32_ETH_DMARDLAR` reader"]
  12022. pub struct R (crate :: R < R32_ETH_DMARDLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARDLAR_SPEC > ; # [inline (always)]
  12023. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARDLAR_SPEC >> for R { # [inline (always)]
  12024. fn from (reader : crate :: R < R32_ETH_DMARDLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARDLAR` writer"]
  12025. pub struct W (crate :: W < R32_ETH_DMARDLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARDLAR_SPEC > ; # [inline (always)]
  12026. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12027. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARDLAR_SPEC >> for W { # [inline (always)]
  12028. fn from (writer : crate :: W < R32_ETH_DMARDLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARDLAR` reader - DMA RX Description List Address Register"]
  12029. pub struct R32_ETH_DMARDLAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARDLAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARDLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARDLAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12030. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARDLAR` writer - DMA RX Description List Address Register"]
  12031. pub struct R32_ETH_DMARDLAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARDLAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12032. # [inline (always)]
  12033. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Description List Address Register"]
  12034. # [inline (always)]
  12035. pub fn r32_eth_dmardlar (& self) -> R32_ETH_DMARDLAR_R { R32_ETH_DMARDLAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Description List Address Register"]
  12036. # [inline (always)]
  12037. pub fn r32_eth_dmardlar (& mut self) -> R32_ETH_DMARDLAR_W { R32_ETH_DMARDLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12038. # [inline (always)]
  12039. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Description List Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmardlar](index.html) module"]
  12040. pub struct R32_ETH_DMARDLAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARDLAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmardlar::R](R) reader structure"]
  12041. impl crate :: Readable for R32_ETH_DMARDLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmardlar::W](W) writer structure"]
  12042. impl crate :: Writable for R32_ETH_DMARDLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARDLAR to value 0"]
  12043. impl crate :: Resettable for R32_ETH_DMARDLAR_SPEC { # [inline (always)]
  12044. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMATDLAR register accessor: an alias for `Reg<R32_ETH_DMATDLAR_SPEC>`"]
  12045. pub type R32_ETH_DMATDLAR = crate :: Reg < r32_eth_dmatdlar :: R32_ETH_DMATDLAR_SPEC > ; # [doc = "DMA TX Description List Address Register"]
  12046. pub mod r32_eth_dmatdlar { # [doc = "Register `R32_ETH_DMATDLAR` reader"]
  12047. pub struct R (crate :: R < R32_ETH_DMATDLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMATDLAR_SPEC > ; # [inline (always)]
  12048. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMATDLAR_SPEC >> for R { # [inline (always)]
  12049. fn from (reader : crate :: R < R32_ETH_DMATDLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMATDLAR` writer"]
  12050. pub struct W (crate :: W < R32_ETH_DMATDLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMATDLAR_SPEC > ; # [inline (always)]
  12051. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12052. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMATDLAR_SPEC >> for W { # [inline (always)]
  12053. fn from (writer : crate :: W < R32_ETH_DMATDLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMATDLAR` reader - DMA TX Description List Address Register"]
  12054. pub struct R32_ETH_DMATDLAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMATDLAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMATDLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMATDLAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12055. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMATDLAR` writer - DMA TX Description List Address Register"]
  12056. pub struct R32_ETH_DMATDLAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMATDLAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12057. # [inline (always)]
  12058. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA TX Description List Address Register"]
  12059. # [inline (always)]
  12060. pub fn r32_eth_dmatdlar (& self) -> R32_ETH_DMATDLAR_R { R32_ETH_DMATDLAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA TX Description List Address Register"]
  12061. # [inline (always)]
  12062. pub fn r32_eth_dmatdlar (& mut self) -> R32_ETH_DMATDLAR_W { R32_ETH_DMATDLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12063. # [inline (always)]
  12064. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA TX Description List Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmatdlar](index.html) module"]
  12065. pub struct R32_ETH_DMATDLAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMATDLAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmatdlar::R](R) reader structure"]
  12066. impl crate :: Readable for R32_ETH_DMATDLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmatdlar::W](W) writer structure"]
  12067. impl crate :: Writable for R32_ETH_DMATDLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMATDLAR to value 0"]
  12068. impl crate :: Resettable for R32_ETH_DMATDLAR_SPEC { # [inline (always)]
  12069. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMASR register accessor: an alias for `Reg<R32_ETH_DMASR_SPEC>`"]
  12070. pub type R32_ETH_DMASR = crate :: Reg < r32_eth_dmasr :: R32_ETH_DMASR_SPEC > ; # [doc = "DMA Status Register"]
  12071. pub mod r32_eth_dmasr { # [doc = "Register `R32_ETH_DMASR` reader"]
  12072. pub struct R (crate :: R < R32_ETH_DMASR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMASR_SPEC > ; # [inline (always)]
  12073. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMASR_SPEC >> for R { # [inline (always)]
  12074. fn from (reader : crate :: R < R32_ETH_DMASR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMASR` writer"]
  12075. pub struct W (crate :: W < R32_ETH_DMASR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMASR_SPEC > ; # [inline (always)]
  12076. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12077. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMASR_SPEC >> for W { # [inline (always)]
  12078. fn from (writer : crate :: W < R32_ETH_DMASR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMASR` reader - DMA Status Register"]
  12079. pub struct R32_ETH_DMASR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMASR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMASR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMASR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12080. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMASR` writer - DMA Status Register"]
  12081. pub struct R32_ETH_DMASR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMASR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12082. # [inline (always)]
  12083. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Status Register"]
  12084. # [inline (always)]
  12085. pub fn r32_eth_dmasr (& self) -> R32_ETH_DMASR_R { R32_ETH_DMASR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Status Register"]
  12086. # [inline (always)]
  12087. pub fn r32_eth_dmasr (& mut self) -> R32_ETH_DMASR_W { R32_ETH_DMASR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12088. # [inline (always)]
  12089. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmasr](index.html) module"]
  12090. pub struct R32_ETH_DMASR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMASR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmasr::R](R) reader structure"]
  12091. impl crate :: Readable for R32_ETH_DMASR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmasr::W](W) writer structure"]
  12092. impl crate :: Writable for R32_ETH_DMASR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMASR to value 0"]
  12093. impl crate :: Resettable for R32_ETH_DMASR_SPEC { # [inline (always)]
  12094. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAOMR register accessor: an alias for `Reg<R32_ETH_DMAOMR_SPEC>`"]
  12095. pub type R32_ETH_DMAOMR = crate :: Reg < r32_eth_dmaomr :: R32_ETH_DMAOMR_SPEC > ; # [doc = "DMA Operate Mode Register"]
  12096. pub mod r32_eth_dmaomr { # [doc = "Register `R32_ETH_DMAOMR` reader"]
  12097. pub struct R (crate :: R < R32_ETH_DMAOMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAOMR_SPEC > ; # [inline (always)]
  12098. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAOMR_SPEC >> for R { # [inline (always)]
  12099. fn from (reader : crate :: R < R32_ETH_DMAOMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAOMR` writer"]
  12100. pub struct W (crate :: W < R32_ETH_DMAOMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAOMR_SPEC > ; # [inline (always)]
  12101. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12102. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAOMR_SPEC >> for W { # [inline (always)]
  12103. fn from (writer : crate :: W < R32_ETH_DMAOMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAOMR` reader - DMA Operate Mode Register"]
  12104. pub struct R32_ETH_DMAOMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAOMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAOMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAOMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12105. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAOMR` writer - DMA Operate Mode Register"]
  12106. pub struct R32_ETH_DMAOMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAOMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12107. # [inline (always)]
  12108. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Operate Mode Register"]
  12109. # [inline (always)]
  12110. pub fn r32_eth_dmaomr (& self) -> R32_ETH_DMAOMR_R { R32_ETH_DMAOMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Operate Mode Register"]
  12111. # [inline (always)]
  12112. pub fn r32_eth_dmaomr (& mut self) -> R32_ETH_DMAOMR_W { R32_ETH_DMAOMR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12113. # [inline (always)]
  12114. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Operate Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmaomr](index.html) module"]
  12115. pub struct R32_ETH_DMAOMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAOMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmaomr::R](R) reader structure"]
  12116. impl crate :: Readable for R32_ETH_DMAOMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmaomr::W](W) writer structure"]
  12117. impl crate :: Writable for R32_ETH_DMAOMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAOMR to value 0"]
  12118. impl crate :: Resettable for R32_ETH_DMAOMR_SPEC { # [inline (always)]
  12119. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAIER register accessor: an alias for `Reg<R32_ETH_DMAIER_SPEC>`"]
  12120. pub type R32_ETH_DMAIER = crate :: Reg < r32_eth_dmaier :: R32_ETH_DMAIER_SPEC > ; # [doc = "DMA Interrupt Enable Register"]
  12121. pub mod r32_eth_dmaier { # [doc = "Register `R32_ETH_DMAIER` reader"]
  12122. pub struct R (crate :: R < R32_ETH_DMAIER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAIER_SPEC > ; # [inline (always)]
  12123. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAIER_SPEC >> for R { # [inline (always)]
  12124. fn from (reader : crate :: R < R32_ETH_DMAIER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAIER` writer"]
  12125. pub struct W (crate :: W < R32_ETH_DMAIER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAIER_SPEC > ; # [inline (always)]
  12126. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12127. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAIER_SPEC >> for W { # [inline (always)]
  12128. fn from (writer : crate :: W < R32_ETH_DMAIER_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAIER` reader - DMA Interrupt Enable Register"]
  12129. pub struct R32_ETH_DMAIER_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAIER_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAIER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAIER_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12130. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAIER` writer - DMA Interrupt Enable Register"]
  12131. pub struct R32_ETH_DMAIER_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAIER_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12132. # [inline (always)]
  12133. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Interrupt Enable Register"]
  12134. # [inline (always)]
  12135. pub fn r32_eth_dmaier (& self) -> R32_ETH_DMAIER_R { R32_ETH_DMAIER_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Interrupt Enable Register"]
  12136. # [inline (always)]
  12137. pub fn r32_eth_dmaier (& mut self) -> R32_ETH_DMAIER_W { R32_ETH_DMAIER_W { w : self } } # [doc = "Writes raw bits to the register."]
  12138. # [inline (always)]
  12139. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmaier](index.html) module"]
  12140. pub struct R32_ETH_DMAIER_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAIER_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmaier::R](R) reader structure"]
  12141. impl crate :: Readable for R32_ETH_DMAIER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmaier::W](W) writer structure"]
  12142. impl crate :: Writable for R32_ETH_DMAIER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAIER to value 0"]
  12143. impl crate :: Resettable for R32_ETH_DMAIER_SPEC { # [inline (always)]
  12144. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAMFBOCR register accessor: an alias for `Reg<R32_ETH_DMAMFBOCR_SPEC>`"]
  12145. pub type R32_ETH_DMAMFBOCR = crate :: Reg < r32_eth_dmamfbocr :: R32_ETH_DMAMFBOCR_SPEC > ; # [doc = "DMA Missing Frame and Buffer Overflow Counter Register"]
  12146. pub mod r32_eth_dmamfbocr { # [doc = "Register `R32_ETH_DMAMFBOCR` reader"]
  12147. pub struct R (crate :: R < R32_ETH_DMAMFBOCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAMFBOCR_SPEC > ; # [inline (always)]
  12148. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAMFBOCR_SPEC >> for R { # [inline (always)]
  12149. fn from (reader : crate :: R < R32_ETH_DMAMFBOCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAMFBOCR` writer"]
  12150. pub struct W (crate :: W < R32_ETH_DMAMFBOCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAMFBOCR_SPEC > ; # [inline (always)]
  12151. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12152. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAMFBOCR_SPEC >> for W { # [inline (always)]
  12153. fn from (writer : crate :: W < R32_ETH_DMAMFBOCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAMFBOCR` reader - DMA Missing Frame and Buffer Overflow Counter Register"]
  12154. pub struct R32_ETH_DMAMFBOCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAMFBOCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAMFBOCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAMFBOCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12155. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAMFBOCR` writer - DMA Missing Frame and Buffer Overflow Counter Register"]
  12156. pub struct R32_ETH_DMAMFBOCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAMFBOCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12157. # [inline (always)]
  12158. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Missing Frame and Buffer Overflow Counter Register"]
  12159. # [inline (always)]
  12160. pub fn r32_eth_dmamfbocr (& self) -> R32_ETH_DMAMFBOCR_R { R32_ETH_DMAMFBOCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Missing Frame and Buffer Overflow Counter Register"]
  12161. # [inline (always)]
  12162. pub fn r32_eth_dmamfbocr (& mut self) -> R32_ETH_DMAMFBOCR_W { R32_ETH_DMAMFBOCR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12163. # [inline (always)]
  12164. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Missing Frame and Buffer Overflow Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmamfbocr](index.html) module"]
  12165. pub struct R32_ETH_DMAMFBOCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAMFBOCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmamfbocr::R](R) reader structure"]
  12166. impl crate :: Readable for R32_ETH_DMAMFBOCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmamfbocr::W](W) writer structure"]
  12167. impl crate :: Writable for R32_ETH_DMAMFBOCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAMFBOCR to value 0"]
  12168. impl crate :: Resettable for R32_ETH_DMAMFBOCR_SPEC { # [inline (always)]
  12169. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARSWTR register accessor: an alias for `Reg<R32_ETH_DMARSWTR_SPEC>`"]
  12170. pub type R32_ETH_DMARSWTR = crate :: Reg < r32_eth_dmarswtr :: R32_ETH_DMARSWTR_SPEC > ; # [doc = "DMA RX Status Watchdog Timer Register"]
  12171. pub mod r32_eth_dmarswtr { # [doc = "Register `R32_ETH_DMARSWTR` reader"]
  12172. pub struct R (crate :: R < R32_ETH_DMARSWTR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARSWTR_SPEC > ; # [inline (always)]
  12173. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARSWTR_SPEC >> for R { # [inline (always)]
  12174. fn from (reader : crate :: R < R32_ETH_DMARSWTR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARSWTR` writer"]
  12175. pub struct W (crate :: W < R32_ETH_DMARSWTR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARSWTR_SPEC > ; # [inline (always)]
  12176. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12177. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARSWTR_SPEC >> for W { # [inline (always)]
  12178. fn from (writer : crate :: W < R32_ETH_DMARSWTR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARSWTR` reader - DMA RX Status Watchdog Timer Register"]
  12179. pub struct R32_ETH_DMARSWTR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARSWTR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARSWTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARSWTR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12180. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARSWTR` writer - DMA RX Status Watchdog Timer Register"]
  12181. pub struct R32_ETH_DMARSWTR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARSWTR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12182. # [inline (always)]
  12183. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Status Watchdog Timer Register"]
  12184. # [inline (always)]
  12185. pub fn r32_eth_dmarswtr (& self) -> R32_ETH_DMARSWTR_R { R32_ETH_DMARSWTR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Status Watchdog Timer Register"]
  12186. # [inline (always)]
  12187. pub fn r32_eth_dmarswtr (& mut self) -> R32_ETH_DMARSWTR_W { R32_ETH_DMARSWTR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12188. # [inline (always)]
  12189. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Status Watchdog Timer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmarswtr](index.html) module"]
  12190. pub struct R32_ETH_DMARSWTR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARSWTR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmarswtr::R](R) reader structure"]
  12191. impl crate :: Readable for R32_ETH_DMARSWTR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmarswtr::W](W) writer structure"]
  12192. impl crate :: Writable for R32_ETH_DMARSWTR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARSWTR to value 0"]
  12193. impl crate :: Resettable for R32_ETH_DMARSWTR_SPEC { # [inline (always)]
  12194. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHTDR register accessor: an alias for `Reg<R32_ETH_DMACHTDR_SPEC>`"]
  12195. pub type R32_ETH_DMACHTDR = crate :: Reg < r32_eth_dmachtdr :: R32_ETH_DMACHTDR_SPEC > ; # [doc = "DMA Current Host TX Description Register"]
  12196. pub mod r32_eth_dmachtdr { # [doc = "Register `R32_ETH_DMACHTDR` reader"]
  12197. pub struct R (crate :: R < R32_ETH_DMACHTDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHTDR_SPEC > ; # [inline (always)]
  12198. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHTDR_SPEC >> for R { # [inline (always)]
  12199. fn from (reader : crate :: R < R32_ETH_DMACHTDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHTDR` writer"]
  12200. pub struct W (crate :: W < R32_ETH_DMACHTDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHTDR_SPEC > ; # [inline (always)]
  12201. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12202. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHTDR_SPEC >> for W { # [inline (always)]
  12203. fn from (writer : crate :: W < R32_ETH_DMACHTDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHTDR` reader - DMA Current Host TX Description Register"]
  12204. pub struct R32_ETH_DMACHTDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHTDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHTDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHTDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12205. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHTDR` writer - DMA Current Host TX Description Register"]
  12206. pub struct R32_ETH_DMACHTDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHTDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12207. # [inline (always)]
  12208. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host TX Description Register"]
  12209. # [inline (always)]
  12210. pub fn r32_eth_dmachtdr (& self) -> R32_ETH_DMACHTDR_R { R32_ETH_DMACHTDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host TX Description Register"]
  12211. # [inline (always)]
  12212. pub fn r32_eth_dmachtdr (& mut self) -> R32_ETH_DMACHTDR_W { R32_ETH_DMACHTDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12213. # [inline (always)]
  12214. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host TX Description Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachtdr](index.html) module"]
  12215. pub struct R32_ETH_DMACHTDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHTDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachtdr::R](R) reader structure"]
  12216. impl crate :: Readable for R32_ETH_DMACHTDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachtdr::W](W) writer structure"]
  12217. impl crate :: Writable for R32_ETH_DMACHTDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHTDR to value 0"]
  12218. impl crate :: Resettable for R32_ETH_DMACHTDR_SPEC { # [inline (always)]
  12219. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHRDR register accessor: an alias for `Reg<R32_ETH_DMACHRDR_SPEC>`"]
  12220. pub type R32_ETH_DMACHRDR = crate :: Reg < r32_eth_dmachrdr :: R32_ETH_DMACHRDR_SPEC > ; # [doc = "DMA Current Host RX Description Register"]
  12221. pub mod r32_eth_dmachrdr { # [doc = "Register `R32_ETH_DMACHRDR` reader"]
  12222. pub struct R (crate :: R < R32_ETH_DMACHRDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHRDR_SPEC > ; # [inline (always)]
  12223. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHRDR_SPEC >> for R { # [inline (always)]
  12224. fn from (reader : crate :: R < R32_ETH_DMACHRDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHRDR` writer"]
  12225. pub struct W (crate :: W < R32_ETH_DMACHRDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHRDR_SPEC > ; # [inline (always)]
  12226. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12227. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHRDR_SPEC >> for W { # [inline (always)]
  12228. fn from (writer : crate :: W < R32_ETH_DMACHRDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHRDR` reader - DMA Current Host RX Description Register"]
  12229. pub struct R32_ETH_DMACHRDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHRDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHRDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHRDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12230. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHRDR` writer - DMA Current Host RX Description Register"]
  12231. pub struct R32_ETH_DMACHRDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHRDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12232. # [inline (always)]
  12233. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host RX Description Register"]
  12234. # [inline (always)]
  12235. pub fn r32_eth_dmachrdr (& self) -> R32_ETH_DMACHRDR_R { R32_ETH_DMACHRDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host RX Description Register"]
  12236. # [inline (always)]
  12237. pub fn r32_eth_dmachrdr (& mut self) -> R32_ETH_DMACHRDR_W { R32_ETH_DMACHRDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12238. # [inline (always)]
  12239. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host RX Description Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachrdr](index.html) module"]
  12240. pub struct R32_ETH_DMACHRDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHRDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachrdr::R](R) reader structure"]
  12241. impl crate :: Readable for R32_ETH_DMACHRDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachrdr::W](W) writer structure"]
  12242. impl crate :: Writable for R32_ETH_DMACHRDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHRDR to value 0"]
  12243. impl crate :: Resettable for R32_ETH_DMACHRDR_SPEC { # [inline (always)]
  12244. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHTBAR register accessor: an alias for `Reg<R32_ETH_DMACHTBAR_SPEC>`"]
  12245. pub type R32_ETH_DMACHTBAR = crate :: Reg < r32_eth_dmachtbar :: R32_ETH_DMACHTBAR_SPEC > ; # [doc = "DMA Current Host TX Buffer Address Register"]
  12246. pub mod r32_eth_dmachtbar { # [doc = "Register `R32_ETH_DMACHTBAR` reader"]
  12247. pub struct R (crate :: R < R32_ETH_DMACHTBAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHTBAR_SPEC > ; # [inline (always)]
  12248. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHTBAR_SPEC >> for R { # [inline (always)]
  12249. fn from (reader : crate :: R < R32_ETH_DMACHTBAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHTBAR` writer"]
  12250. pub struct W (crate :: W < R32_ETH_DMACHTBAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHTBAR_SPEC > ; # [inline (always)]
  12251. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12252. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHTBAR_SPEC >> for W { # [inline (always)]
  12253. fn from (writer : crate :: W < R32_ETH_DMACHTBAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHTBAR` reader - DMA Current Host TX Buffer Address Register"]
  12254. pub struct R32_ETH_DMACHTBAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHTBAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHTBAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHTBAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12255. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHTBAR` writer - DMA Current Host TX Buffer Address Register"]
  12256. pub struct R32_ETH_DMACHTBAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHTBAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12257. # [inline (always)]
  12258. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host TX Buffer Address Register"]
  12259. # [inline (always)]
  12260. pub fn r32_eth_dmachtbar (& self) -> R32_ETH_DMACHTBAR_R { R32_ETH_DMACHTBAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host TX Buffer Address Register"]
  12261. # [inline (always)]
  12262. pub fn r32_eth_dmachtbar (& mut self) -> R32_ETH_DMACHTBAR_W { R32_ETH_DMACHTBAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12263. # [inline (always)]
  12264. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host TX Buffer Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachtbar](index.html) module"]
  12265. pub struct R32_ETH_DMACHTBAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHTBAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachtbar::R](R) reader structure"]
  12266. impl crate :: Readable for R32_ETH_DMACHTBAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachtbar::W](W) writer structure"]
  12267. impl crate :: Writable for R32_ETH_DMACHTBAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHTBAR to value 0"]
  12268. impl crate :: Resettable for R32_ETH_DMACHTBAR_SPEC { # [inline (always)]
  12269. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHRBAR register accessor: an alias for `Reg<R32_ETH_DMACHRBAR_SPEC>`"]
  12270. pub type R32_ETH_DMACHRBAR = crate :: Reg < r32_eth_dmachrbar :: R32_ETH_DMACHRBAR_SPEC > ; # [doc = "DMA Current Host RX Buffer Address Register"]
  12271. pub mod r32_eth_dmachrbar { # [doc = "Register `R32_ETH_DMACHRBAR` reader"]
  12272. pub struct R (crate :: R < R32_ETH_DMACHRBAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHRBAR_SPEC > ; # [inline (always)]
  12273. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHRBAR_SPEC >> for R { # [inline (always)]
  12274. fn from (reader : crate :: R < R32_ETH_DMACHRBAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHRBAR` writer"]
  12275. pub struct W (crate :: W < R32_ETH_DMACHRBAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHRBAR_SPEC > ; # [inline (always)]
  12276. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12277. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHRBAR_SPEC >> for W { # [inline (always)]
  12278. fn from (writer : crate :: W < R32_ETH_DMACHRBAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHRBAR` reader - DMA Current Host RX Buffer Address Register"]
  12279. pub struct R32_ETH_DMACHRBAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHRBAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHRBAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHRBAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12280. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHRBAR` writer - DMA Current Host RX Buffer Address Register"]
  12281. pub struct R32_ETH_DMACHRBAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHRBAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12282. # [inline (always)]
  12283. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host RX Buffer Address Register"]
  12284. # [inline (always)]
  12285. pub fn r32_eth_dmachrbar (& self) -> R32_ETH_DMACHRBAR_R { R32_ETH_DMACHRBAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host RX Buffer Address Register"]
  12286. # [inline (always)]
  12287. pub fn r32_eth_dmachrbar (& mut self) -> R32_ETH_DMACHRBAR_W { R32_ETH_DMACHRBAR_W { w : self } } # [doc = "Writes raw bits to the register."]
  12288. # [inline (always)]
  12289. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host RX Buffer Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachrbar](index.html) module"]
  12290. pub struct R32_ETH_DMACHRBAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHRBAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachrbar::R](R) reader structure"]
  12291. impl crate :: Readable for R32_ETH_DMACHRBAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachrbar::W](W) writer structure"]
  12292. impl crate :: Writable for R32_ETH_DMACHRBAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHRBAR to value 0"]
  12293. impl crate :: Resettable for R32_ETH_DMACHRBAR_SPEC { # [inline (always)]
  12294. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "DVP register"]
  12295. pub struct DVP { _marker : PhantomData < * const () > } unsafe impl Send for DVP { } impl DVP { # [doc = r"Pointer to the register block"]
  12296. pub const PTR : * const dvp :: RegisterBlock = 0x4000_e000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  12297. # [inline (always)]
  12298. pub const fn ptr () -> * const dvp :: RegisterBlock { Self :: PTR } } impl Deref for DVP { type Target = dvp :: RegisterBlock ; # [inline (always)]
  12299. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for DVP { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("DVP") . finish () } } # [doc = "DVP register"]
  12300. pub mod dvp { # [doc = r"Register block"]
  12301. # [repr (C)]
  12302. pub struct RegisterBlock { # [doc = "0x00 - DVP control register0"]
  12303. pub r8_dvp_cr0 : crate :: Reg < r8_dvp_cr0 :: R8_DVP_CR0_SPEC > , # [doc = "0x01 - DVP control register1"]
  12304. pub r8_dvp_cr1 : crate :: Reg < r8_dvp_cr1 :: R8_DVP_CR1_SPEC > , # [doc = "0x02 - DVP interrupt enable register"]
  12305. pub r8_dvp_int_en : crate :: Reg < r8_dvp_int_en :: R8_DVP_INT_EN_SPEC > , _reserved3 : [u8 ; 0x01]
  12306. , # [doc = "0x04 - DVP row number of a frame indicator register"]
  12307. pub r16_dvp_row_num : crate :: Reg < r16_dvp_row_num :: R16_DVP_ROW_NUM_SPEC > , # [doc = "0x06 - DVP row number of a frame indicator register"]
  12308. pub r16_dvp_col_num : crate :: Reg < r16_dvp_col_num :: R16_DVP_COL_NUM_SPEC > , # [doc = "0x08 - DVP dma buffer0 addr"]
  12309. pub r32_dvp_dma_buf0 : crate :: Reg < r32_dvp_dma_buf0 :: R32_DVP_DMA_BUF0_SPEC > , # [doc = "0x0c - DVP dma buffer1 addr"]
  12310. pub r32_dvp_dma_buf1 : crate :: Reg < r32_dvp_dma_buf1 :: R32_DVP_DMA_BUF1_SPEC > , _reserved_7_r8_dvp : [u8 ; 0x04]
  12311. , # [doc = "0x14 - DVP row count value"]
  12312. pub r16_dvp_row_cnt : crate :: Reg < r16_dvp_row_cnt :: R16_DVP_ROW_CNT_SPEC > , # [doc = "0x16 - DVP col count value"]
  12313. pub r16_dvp_col_cnt : crate :: Reg < r16_dvp_col_cnt :: R16_DVP_COL_CNT_SPEC > , } impl RegisterBlock { # [doc = "0x10 - DVP interrupt flag register"]
  12314. # [inline (always)]
  12315. pub fn r8_dvp_int_flag (& self) -> & crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (16usize) as * const crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC >) } } # [doc = "0x11 - DVP receive fifo status"]
  12316. # [inline (always)]
  12317. pub fn r8_dvp_fifo_st (& self) -> & crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (17usize) as * const crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC >) } } } # [doc = "R8_DVP_CR0 register accessor: an alias for `Reg<R8_DVP_CR0_SPEC>`"]
  12318. pub type R8_DVP_CR0 = crate :: Reg < r8_dvp_cr0 :: R8_DVP_CR0_SPEC > ; # [doc = "DVP control register0"]
  12319. pub mod r8_dvp_cr0 { # [doc = "Register `R8_DVP_CR0` reader"]
  12320. pub struct R (crate :: R < R8_DVP_CR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_CR0_SPEC > ; # [inline (always)]
  12321. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_CR0_SPEC >> for R { # [inline (always)]
  12322. fn from (reader : crate :: R < R8_DVP_CR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_CR0` writer"]
  12323. pub struct W (crate :: W < R8_DVP_CR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_CR0_SPEC > ; # [inline (always)]
  12324. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12325. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_CR0_SPEC >> for W { # [inline (always)]
  12326. fn from (writer : crate :: W < R8_DVP_CR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_ENABLE` reader - DVP enable"]
  12327. pub struct RB_DVP_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12328. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ENABLE` writer - DVP enable"]
  12329. pub struct RB_DVP_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  12330. # [inline (always)]
  12331. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12332. # [inline (always)]
  12333. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12334. # [inline (always)]
  12335. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_V_POLAR` reader - DVP VSYNC polarity control"]
  12336. pub struct RB_DVP_V_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_V_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_V_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_V_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12337. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_V_POLAR` writer - DVP VSYNC polarity control"]
  12338. pub struct RB_DVP_V_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_V_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  12339. # [inline (always)]
  12340. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12341. # [inline (always)]
  12342. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12343. # [inline (always)]
  12344. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_H_POLAR` reader - DVP HSYNC polarity control"]
  12345. pub struct RB_DVP_H_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_H_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_H_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_H_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12346. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_H_POLAR` writer - DVP HSYNC polarity control"]
  12347. pub struct RB_DVP_H_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_H_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  12348. # [inline (always)]
  12349. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12350. # [inline (always)]
  12351. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12352. # [inline (always)]
  12353. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_P_POLAR` reader - DVP PCLK polarity control"]
  12354. pub struct RB_DVP_P_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_P_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_P_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_P_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12355. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_P_POLAR` writer - DVP PCLK polarity control"]
  12356. pub struct RB_DVP_P_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_P_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
  12357. # [inline (always)]
  12358. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12359. # [inline (always)]
  12360. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12361. # [inline (always)]
  12362. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_MSK_DAT_MOD` reader - DVP data bit width confguration"]
  12363. pub struct RB_DVP_MSK_DAT_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DVP_MSK_DAT_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_DVP_MSK_DAT_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_MSK_DAT_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  12364. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_MSK_DAT_MOD` writer - DVP data bit width confguration"]
  12365. pub struct RB_DVP_MSK_DAT_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_MSK_DAT_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12366. # [inline (always)]
  12367. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_DVP_JPEG` reader - DVP JPEG mode"]
  12368. pub struct RB_DVP_JPEG_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_JPEG_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_JPEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_JPEG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12369. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_JPEG` writer - DVP JPEG mode"]
  12370. pub struct RB_DVP_JPEG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_JPEG_W < 'a > { # [doc = r"Sets the field bit"]
  12371. # [inline (always)]
  12372. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12373. # [inline (always)]
  12374. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12375. # [inline (always)]
  12376. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_DVP_RAW_CM` reader - DVP row count mode"]
  12377. pub struct RB_DVP_RAW_CM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_RAW_CM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_RAW_CM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_RAW_CM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12378. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_RAW_CM` writer - DVP row count mode"]
  12379. pub struct RB_DVP_RAW_CM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_RAW_CM_W < 'a > { # [doc = r"Sets the field bit"]
  12380. # [inline (always)]
  12381. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12382. # [inline (always)]
  12383. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12384. # [inline (always)]
  12385. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - DVP enable"]
  12386. # [inline (always)]
  12387. pub fn rb_dvp_enable (& self) -> RB_DVP_ENABLE_R { RB_DVP_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP VSYNC polarity control"]
  12388. # [inline (always)]
  12389. pub fn rb_dvp_v_polar (& self) -> RB_DVP_V_POLAR_R { RB_DVP_V_POLAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP HSYNC polarity control"]
  12390. # [inline (always)]
  12391. pub fn rb_dvp_h_polar (& self) -> RB_DVP_H_POLAR_R { RB_DVP_H_POLAR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP PCLK polarity control"]
  12392. # [inline (always)]
  12393. pub fn rb_dvp_p_polar (& self) -> RB_DVP_P_POLAR_R { RB_DVP_P_POLAR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - DVP data bit width confguration"]
  12394. # [inline (always)]
  12395. pub fn rb_dvp_msk_dat_mod (& self) -> RB_DVP_MSK_DAT_MOD_R { RB_DVP_MSK_DAT_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - DVP JPEG mode"]
  12396. # [inline (always)]
  12397. pub fn rb_dvp_jpeg (& self) -> RB_DVP_JPEG_R { RB_DVP_JPEG_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - DVP row count mode"]
  12398. # [inline (always)]
  12399. pub fn rb_dvp_raw_cm (& self) -> RB_DVP_RAW_CM_R { RB_DVP_RAW_CM_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP enable"]
  12400. # [inline (always)]
  12401. pub fn rb_dvp_enable (& mut self) -> RB_DVP_ENABLE_W { RB_DVP_ENABLE_W { w : self } } # [doc = "Bit 1 - DVP VSYNC polarity control"]
  12402. # [inline (always)]
  12403. pub fn rb_dvp_v_polar (& mut self) -> RB_DVP_V_POLAR_W { RB_DVP_V_POLAR_W { w : self } } # [doc = "Bit 2 - DVP HSYNC polarity control"]
  12404. # [inline (always)]
  12405. pub fn rb_dvp_h_polar (& mut self) -> RB_DVP_H_POLAR_W { RB_DVP_H_POLAR_W { w : self } } # [doc = "Bit 3 - DVP PCLK polarity control"]
  12406. # [inline (always)]
  12407. pub fn rb_dvp_p_polar (& mut self) -> RB_DVP_P_POLAR_W { RB_DVP_P_POLAR_W { w : self } } # [doc = "Bits 4:5 - DVP data bit width confguration"]
  12408. # [inline (always)]
  12409. pub fn rb_dvp_msk_dat_mod (& mut self) -> RB_DVP_MSK_DAT_MOD_W { RB_DVP_MSK_DAT_MOD_W { w : self } } # [doc = "Bit 6 - DVP JPEG mode"]
  12410. # [inline (always)]
  12411. pub fn rb_dvp_jpeg (& mut self) -> RB_DVP_JPEG_W { RB_DVP_JPEG_W { w : self } } # [doc = "Bit 7 - DVP row count mode"]
  12412. # [inline (always)]
  12413. pub fn rb_dvp_raw_cm (& mut self) -> RB_DVP_RAW_CM_W { RB_DVP_RAW_CM_W { w : self } } # [doc = "Writes raw bits to the register."]
  12414. # [inline (always)]
  12415. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP control register0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_cr0](index.html) module"]
  12416. pub struct R8_DVP_CR0_SPEC ; impl crate :: RegisterSpec for R8_DVP_CR0_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_cr0::R](R) reader structure"]
  12417. impl crate :: Readable for R8_DVP_CR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_cr0::W](W) writer structure"]
  12418. impl crate :: Writable for R8_DVP_CR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_CR0 to value 0"]
  12419. impl crate :: Resettable for R8_DVP_CR0_SPEC { # [inline (always)]
  12420. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_CR1 register accessor: an alias for `Reg<R8_DVP_CR1_SPEC>`"]
  12421. pub type R8_DVP_CR1 = crate :: Reg < r8_dvp_cr1 :: R8_DVP_CR1_SPEC > ; # [doc = "DVP control register1"]
  12422. pub mod r8_dvp_cr1 { # [doc = "Register `R8_DVP_CR1` reader"]
  12423. pub struct R (crate :: R < R8_DVP_CR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_CR1_SPEC > ; # [inline (always)]
  12424. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_CR1_SPEC >> for R { # [inline (always)]
  12425. fn from (reader : crate :: R < R8_DVP_CR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_CR1` writer"]
  12426. pub struct W (crate :: W < R8_DVP_CR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_CR1_SPEC > ; # [inline (always)]
  12427. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12428. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_CR1_SPEC >> for W { # [inline (always)]
  12429. fn from (writer : crate :: W < R8_DVP_CR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_ENABLE` reader - DVP dma enable"]
  12430. pub struct RB_DVP_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12431. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_ENABLE` writer - DVP dma enable"]
  12432. pub struct RB_DVP_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
  12433. # [inline (always)]
  12434. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12435. # [inline (always)]
  12436. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12437. # [inline (always)]
  12438. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_ALL_CLR` reader - DVP all clear, high action"]
  12439. pub struct RB_DVP_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12440. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ALL_CLR` writer - DVP all clear, high action"]
  12441. pub struct RB_DVP_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  12442. # [inline (always)]
  12443. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12444. # [inline (always)]
  12445. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12446. # [inline (always)]
  12447. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_RCV_CLR` reader - DVP receive logic clear, high action"]
  12448. pub struct RB_DVP_RCV_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_RCV_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_RCV_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_RCV_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12449. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_RCV_CLR` writer - DVP receive logic clear, high action"]
  12450. pub struct RB_DVP_RCV_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_RCV_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  12451. # [inline (always)]
  12452. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12453. # [inline (always)]
  12454. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12455. # [inline (always)]
  12456. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_BUF_TOG` reader - DVP bug toggle by software"]
  12457. pub struct RB_DVP_BUF_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_BUF_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_BUF_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_BUF_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12458. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_BUF_TOG` writer - DVP bug toggle by software"]
  12459. pub struct RB_DVP_BUF_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_BUF_TOG_W < 'a > { # [doc = r"Sets the field bit"]
  12460. # [inline (always)]
  12461. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12462. # [inline (always)]
  12463. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12464. # [inline (always)]
  12465. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - DVP dma enable"]
  12466. # [inline (always)]
  12467. pub fn rb_dvp_dma_enable (& self) -> RB_DVP_DMA_ENABLE_R { RB_DVP_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP all clear, high action"]
  12468. # [inline (always)]
  12469. pub fn rb_dvp_all_clr (& self) -> RB_DVP_ALL_CLR_R { RB_DVP_ALL_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP receive logic clear, high action"]
  12470. # [inline (always)]
  12471. pub fn rb_dvp_rcv_clr (& self) -> RB_DVP_RCV_CLR_R { RB_DVP_RCV_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP bug toggle by software"]
  12472. # [inline (always)]
  12473. pub fn rb_dvp_buf_tog (& self) -> RB_DVP_BUF_TOG_R { RB_DVP_BUF_TOG_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP dma enable"]
  12474. # [inline (always)]
  12475. pub fn rb_dvp_dma_enable (& mut self) -> RB_DVP_DMA_ENABLE_W { RB_DVP_DMA_ENABLE_W { w : self } } # [doc = "Bit 1 - DVP all clear, high action"]
  12476. # [inline (always)]
  12477. pub fn rb_dvp_all_clr (& mut self) -> RB_DVP_ALL_CLR_W { RB_DVP_ALL_CLR_W { w : self } } # [doc = "Bit 2 - DVP receive logic clear, high action"]
  12478. # [inline (always)]
  12479. pub fn rb_dvp_rcv_clr (& mut self) -> RB_DVP_RCV_CLR_W { RB_DVP_RCV_CLR_W { w : self } } # [doc = "Bit 3 - DVP bug toggle by software"]
  12480. # [inline (always)]
  12481. pub fn rb_dvp_buf_tog (& mut self) -> RB_DVP_BUF_TOG_W { RB_DVP_BUF_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
  12482. # [inline (always)]
  12483. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP control register1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_cr1](index.html) module"]
  12484. pub struct R8_DVP_CR1_SPEC ; impl crate :: RegisterSpec for R8_DVP_CR1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_cr1::R](R) reader structure"]
  12485. impl crate :: Readable for R8_DVP_CR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_cr1::W](W) writer structure"]
  12486. impl crate :: Writable for R8_DVP_CR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_CR1 to value 0x06"]
  12487. impl crate :: Resettable for R8_DVP_CR1_SPEC { # [inline (always)]
  12488. fn reset_value () -> Self :: Ux { 0x06 } } } # [doc = "R8_DVP_INT_EN register accessor: an alias for `Reg<R8_DVP_INT_EN_SPEC>`"]
  12489. pub type R8_DVP_INT_EN = crate :: Reg < r8_dvp_int_en :: R8_DVP_INT_EN_SPEC > ; # [doc = "DVP interrupt enable register"]
  12490. pub mod r8_dvp_int_en { # [doc = "Register `R8_DVP_INT_EN` reader"]
  12491. pub struct R (crate :: R < R8_DVP_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_INT_EN_SPEC > ; # [inline (always)]
  12492. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_INT_EN_SPEC >> for R { # [inline (always)]
  12493. fn from (reader : crate :: R < R8_DVP_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_INT_EN` writer"]
  12494. pub struct W (crate :: W < R8_DVP_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_INT_EN_SPEC > ; # [inline (always)]
  12495. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12496. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_INT_EN_SPEC >> for W { # [inline (always)]
  12497. fn from (writer : crate :: W < R8_DVP_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_IE_STR_FRM` reader - DVP frame start interrupt enable"]
  12498. pub struct RB_DVP_IE_STR_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_STR_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_STR_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_STR_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12499. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_STR_FRM` writer - DVP frame start interrupt enable"]
  12500. pub struct RB_DVP_IE_STR_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_STR_FRM_W < 'a > { # [doc = r"Sets the field bit"]
  12501. # [inline (always)]
  12502. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12503. # [inline (always)]
  12504. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12505. # [inline (always)]
  12506. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_IE_ROW_DONE` reader - DVP row received done interrupt enable"]
  12507. pub struct RB_DVP_IE_ROW_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_ROW_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_ROW_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_ROW_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12508. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_ROW_DONE` writer - DVP row received done interrupt enable"]
  12509. pub struct RB_DVP_IE_ROW_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_ROW_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  12510. # [inline (always)]
  12511. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12512. # [inline (always)]
  12513. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12514. # [inline (always)]
  12515. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_IE_FRM_DONE` reader - DVP frame received done interrupt enable"]
  12516. pub struct RB_DVP_IE_FRM_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_FRM_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_FRM_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_FRM_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12517. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_FRM_DONE` writer - DVP frame received done interrupt enable"]
  12518. pub struct RB_DVP_IE_FRM_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_FRM_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  12519. # [inline (always)]
  12520. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12521. # [inline (always)]
  12522. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12523. # [inline (always)]
  12524. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_IE_FIFO_OV` reader - DVP receive fifo overflow interrupt enable"]
  12525. pub struct RB_DVP_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12526. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_FIFO_OV` writer - DVP receive fifo overflow interrupt enable"]
  12527. pub struct RB_DVP_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  12528. # [inline (always)]
  12529. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12530. # [inline (always)]
  12531. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12532. # [inline (always)]
  12533. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_IE_STP_FRM` reader - DVP frame stop interrupt enable"]
  12534. pub struct RB_DVP_IE_STP_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_STP_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_STP_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_STP_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12535. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_STP_FRM` writer - DVP frame stop interrupt enable"]
  12536. pub struct RB_DVP_IE_STP_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_STP_FRM_W < 'a > { # [doc = r"Sets the field bit"]
  12537. # [inline (always)]
  12538. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12539. # [inline (always)]
  12540. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12541. # [inline (always)]
  12542. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - DVP frame start interrupt enable"]
  12543. # [inline (always)]
  12544. pub fn rb_dvp_ie_str_frm (& self) -> RB_DVP_IE_STR_FRM_R { RB_DVP_IE_STR_FRM_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP row received done interrupt enable"]
  12545. # [inline (always)]
  12546. pub fn rb_dvp_ie_row_done (& self) -> RB_DVP_IE_ROW_DONE_R { RB_DVP_IE_ROW_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP frame received done interrupt enable"]
  12547. # [inline (always)]
  12548. pub fn rb_dvp_ie_frm_done (& self) -> RB_DVP_IE_FRM_DONE_R { RB_DVP_IE_FRM_DONE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP receive fifo overflow interrupt enable"]
  12549. # [inline (always)]
  12550. pub fn rb_dvp_ie_fifo_ov (& self) -> RB_DVP_IE_FIFO_OV_R { RB_DVP_IE_FIFO_OV_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - DVP frame stop interrupt enable"]
  12551. # [inline (always)]
  12552. pub fn rb_dvp_ie_stp_frm (& self) -> RB_DVP_IE_STP_FRM_R { RB_DVP_IE_STP_FRM_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP frame start interrupt enable"]
  12553. # [inline (always)]
  12554. pub fn rb_dvp_ie_str_frm (& mut self) -> RB_DVP_IE_STR_FRM_W { RB_DVP_IE_STR_FRM_W { w : self } } # [doc = "Bit 1 - DVP row received done interrupt enable"]
  12555. # [inline (always)]
  12556. pub fn rb_dvp_ie_row_done (& mut self) -> RB_DVP_IE_ROW_DONE_W { RB_DVP_IE_ROW_DONE_W { w : self } } # [doc = "Bit 2 - DVP frame received done interrupt enable"]
  12557. # [inline (always)]
  12558. pub fn rb_dvp_ie_frm_done (& mut self) -> RB_DVP_IE_FRM_DONE_W { RB_DVP_IE_FRM_DONE_W { w : self } } # [doc = "Bit 3 - DVP receive fifo overflow interrupt enable"]
  12559. # [inline (always)]
  12560. pub fn rb_dvp_ie_fifo_ov (& mut self) -> RB_DVP_IE_FIFO_OV_W { RB_DVP_IE_FIFO_OV_W { w : self } } # [doc = "Bit 4 - DVP frame stop interrupt enable"]
  12561. # [inline (always)]
  12562. pub fn rb_dvp_ie_stp_frm (& mut self) -> RB_DVP_IE_STP_FRM_W { RB_DVP_IE_STP_FRM_W { w : self } } # [doc = "Writes raw bits to the register."]
  12563. # [inline (always)]
  12564. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_int_en](index.html) module"]
  12565. pub struct R8_DVP_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_DVP_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_int_en::R](R) reader structure"]
  12566. impl crate :: Readable for R8_DVP_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_int_en::W](W) writer structure"]
  12567. impl crate :: Writable for R8_DVP_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_INT_EN to value 0"]
  12568. impl crate :: Resettable for R8_DVP_INT_EN_SPEC { # [inline (always)]
  12569. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_ROW_NUM register accessor: an alias for `Reg<R16_DVP_ROW_NUM_SPEC>`"]
  12570. pub type R16_DVP_ROW_NUM = crate :: Reg < r16_dvp_row_num :: R16_DVP_ROW_NUM_SPEC > ; # [doc = "DVP row number of a frame indicator register"]
  12571. pub mod r16_dvp_row_num { # [doc = "Register `R16_DVP_ROW_NUM` reader"]
  12572. pub struct R (crate :: R < R16_DVP_ROW_NUM_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_ROW_NUM_SPEC > ; # [inline (always)]
  12573. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_ROW_NUM_SPEC >> for R { # [inline (always)]
  12574. fn from (reader : crate :: R < R16_DVP_ROW_NUM_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_DVP_ROW_NUM` writer"]
  12575. pub struct W (crate :: W < R16_DVP_ROW_NUM_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_DVP_ROW_NUM_SPEC > ; # [inline (always)]
  12576. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12577. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_DVP_ROW_NUM_SPEC >> for W { # [inline (always)]
  12578. fn from (writer : crate :: W < R16_DVP_ROW_NUM_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_ROW_NUM` reader - the number of rows contained in a frame of image data"]
  12579. pub struct RB_DVP_ROW_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_ROW_NUM_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_ROW_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ROW_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  12580. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ROW_NUM` writer - the number of rows contained in a frame of image data"]
  12581. pub struct RB_DVP_ROW_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ROW_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12582. # [inline (always)]
  12583. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of rows contained in a frame of image data"]
  12584. # [inline (always)]
  12585. pub fn rb_dvp_row_num (& self) -> RB_DVP_ROW_NUM_R { RB_DVP_ROW_NUM_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of rows contained in a frame of image data"]
  12586. # [inline (always)]
  12587. pub fn rb_dvp_row_num (& mut self) -> RB_DVP_ROW_NUM_W { RB_DVP_ROW_NUM_W { w : self } } # [doc = "Writes raw bits to the register."]
  12588. # [inline (always)]
  12589. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP row number of a frame indicator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_row_num](index.html) module"]
  12590. pub struct R16_DVP_ROW_NUM_SPEC ; impl crate :: RegisterSpec for R16_DVP_ROW_NUM_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_row_num::R](R) reader structure"]
  12591. impl crate :: Readable for R16_DVP_ROW_NUM_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_dvp_row_num::W](W) writer structure"]
  12592. impl crate :: Writable for R16_DVP_ROW_NUM_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_DVP_ROW_NUM to value 0"]
  12593. impl crate :: Resettable for R16_DVP_ROW_NUM_SPEC { # [inline (always)]
  12594. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_COL_NUM register accessor: an alias for `Reg<R16_DVP_COL_NUM_SPEC>`"]
  12595. pub type R16_DVP_COL_NUM = crate :: Reg < r16_dvp_col_num :: R16_DVP_COL_NUM_SPEC > ; # [doc = "DVP row number of a frame indicator register"]
  12596. pub mod r16_dvp_col_num { # [doc = "Register `R16_DVP_COL_NUM` reader"]
  12597. pub struct R (crate :: R < R16_DVP_COL_NUM_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_COL_NUM_SPEC > ; # [inline (always)]
  12598. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_COL_NUM_SPEC >> for R { # [inline (always)]
  12599. fn from (reader : crate :: R < R16_DVP_COL_NUM_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_DVP_COL_NUM` writer"]
  12600. pub struct W (crate :: W < R16_DVP_COL_NUM_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_DVP_COL_NUM_SPEC > ; # [inline (always)]
  12601. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12602. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_DVP_COL_NUM_SPEC >> for W { # [inline (always)]
  12603. fn from (writer : crate :: W < R16_DVP_COL_NUM_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_COL_NUM` reader - the number of PCLK cyccles contained in a row of data in RGB mode"]
  12604. pub struct RB_DVP_COL_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_COL_NUM_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_COL_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_COL_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  12605. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_COL_NUM` writer - the number of PCLK cyccles contained in a row of data in RGB mode"]
  12606. pub struct RB_DVP_COL_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_COL_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12607. # [inline (always)]
  12608. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of PCLK cyccles contained in a row of data in RGB mode"]
  12609. # [inline (always)]
  12610. pub fn rb_dvp_col_num (& self) -> RB_DVP_COL_NUM_R { RB_DVP_COL_NUM_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of PCLK cyccles contained in a row of data in RGB mode"]
  12611. # [inline (always)]
  12612. pub fn rb_dvp_col_num (& mut self) -> RB_DVP_COL_NUM_W { RB_DVP_COL_NUM_W { w : self } } # [doc = "Writes raw bits to the register."]
  12613. # [inline (always)]
  12614. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP row number of a frame indicator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_col_num](index.html) module"]
  12615. pub struct R16_DVP_COL_NUM_SPEC ; impl crate :: RegisterSpec for R16_DVP_COL_NUM_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_col_num::R](R) reader structure"]
  12616. impl crate :: Readable for R16_DVP_COL_NUM_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_dvp_col_num::W](W) writer structure"]
  12617. impl crate :: Writable for R16_DVP_COL_NUM_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_DVP_COL_NUM to value 0"]
  12618. impl crate :: Resettable for R16_DVP_COL_NUM_SPEC { # [inline (always)]
  12619. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_DVP_DMA_BUF0 register accessor: an alias for `Reg<R32_DVP_DMA_BUF0_SPEC>`"]
  12620. pub type R32_DVP_DMA_BUF0 = crate :: Reg < r32_dvp_dma_buf0 :: R32_DVP_DMA_BUF0_SPEC > ; # [doc = "DVP dma buffer0 addr"]
  12621. pub mod r32_dvp_dma_buf0 { # [doc = "Register `R32_DVP_DMA_BUF0` reader"]
  12622. pub struct R (crate :: R < R32_DVP_DMA_BUF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_DVP_DMA_BUF0_SPEC > ; # [inline (always)]
  12623. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_DVP_DMA_BUF0_SPEC >> for R { # [inline (always)]
  12624. fn from (reader : crate :: R < R32_DVP_DMA_BUF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_DVP_DMA_BUF0` writer"]
  12625. pub struct W (crate :: W < R32_DVP_DMA_BUF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_DVP_DMA_BUF0_SPEC > ; # [inline (always)]
  12626. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12627. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_DVP_DMA_BUF0_SPEC >> for W { # [inline (always)]
  12628. fn from (writer : crate :: W < R32_DVP_DMA_BUF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_BUF0` reader - the receiving address 0 of DMA"]
  12629. pub struct RB_DVP_DMA_BUF0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_DVP_DMA_BUF0_R { pub (crate) fn new (bits : u32) -> Self { RB_DVP_DMA_BUF0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_BUF0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12630. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_BUF0` writer - the receiving address 0 of DMA"]
  12631. pub struct RB_DVP_DMA_BUF0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_BUF0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12632. # [inline (always)]
  12633. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - the receiving address 0 of DMA"]
  12634. # [inline (always)]
  12635. pub fn rb_dvp_dma_buf0 (& self) -> RB_DVP_DMA_BUF0_R { RB_DVP_DMA_BUF0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - the receiving address 0 of DMA"]
  12636. # [inline (always)]
  12637. pub fn rb_dvp_dma_buf0 (& mut self) -> RB_DVP_DMA_BUF0_W { RB_DVP_DMA_BUF0_W { w : self } } # [doc = "Writes raw bits to the register."]
  12638. # [inline (always)]
  12639. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP dma buffer0 addr\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_dvp_dma_buf0](index.html) module"]
  12640. pub struct R32_DVP_DMA_BUF0_SPEC ; impl crate :: RegisterSpec for R32_DVP_DMA_BUF0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_dvp_dma_buf0::R](R) reader structure"]
  12641. impl crate :: Readable for R32_DVP_DMA_BUF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_dvp_dma_buf0::W](W) writer structure"]
  12642. impl crate :: Writable for R32_DVP_DMA_BUF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_DVP_DMA_BUF0 to value 0"]
  12643. impl crate :: Resettable for R32_DVP_DMA_BUF0_SPEC { # [inline (always)]
  12644. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_DVP_DMA_BUF1 register accessor: an alias for `Reg<R32_DVP_DMA_BUF1_SPEC>`"]
  12645. pub type R32_DVP_DMA_BUF1 = crate :: Reg < r32_dvp_dma_buf1 :: R32_DVP_DMA_BUF1_SPEC > ; # [doc = "DVP dma buffer1 addr"]
  12646. pub mod r32_dvp_dma_buf1 { # [doc = "Register `R32_DVP_DMA_BUF1` reader"]
  12647. pub struct R (crate :: R < R32_DVP_DMA_BUF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_DVP_DMA_BUF1_SPEC > ; # [inline (always)]
  12648. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_DVP_DMA_BUF1_SPEC >> for R { # [inline (always)]
  12649. fn from (reader : crate :: R < R32_DVP_DMA_BUF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_DVP_DMA_BUF1` writer"]
  12650. pub struct W (crate :: W < R32_DVP_DMA_BUF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_DVP_DMA_BUF1_SPEC > ; # [inline (always)]
  12651. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12652. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_DVP_DMA_BUF1_SPEC >> for W { # [inline (always)]
  12653. fn from (writer : crate :: W < R32_DVP_DMA_BUF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_BUF1` reader - the receiving address1 of DMA"]
  12654. pub struct RB_DVP_DMA_BUF1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_DVP_DMA_BUF1_R { pub (crate) fn new (bits : u32) -> Self { RB_DVP_DMA_BUF1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_BUF1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12655. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_BUF1` writer - the receiving address1 of DMA"]
  12656. pub struct RB_DVP_DMA_BUF1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_BUF1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  12657. # [inline (always)]
  12658. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - the receiving address1 of DMA"]
  12659. # [inline (always)]
  12660. pub fn rb_dvp_dma_buf1 (& self) -> RB_DVP_DMA_BUF1_R { RB_DVP_DMA_BUF1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - the receiving address1 of DMA"]
  12661. # [inline (always)]
  12662. pub fn rb_dvp_dma_buf1 (& mut self) -> RB_DVP_DMA_BUF1_W { RB_DVP_DMA_BUF1_W { w : self } } # [doc = "Writes raw bits to the register."]
  12663. # [inline (always)]
  12664. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP dma buffer1 addr\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_dvp_dma_buf1](index.html) module"]
  12665. pub struct R32_DVP_DMA_BUF1_SPEC ; impl crate :: RegisterSpec for R32_DVP_DMA_BUF1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_dvp_dma_buf1::R](R) reader structure"]
  12666. impl crate :: Readable for R32_DVP_DMA_BUF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_dvp_dma_buf1::W](W) writer structure"]
  12667. impl crate :: Writable for R32_DVP_DMA_BUF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_DVP_DMA_BUF1 to value 0"]
  12668. impl crate :: Resettable for R32_DVP_DMA_BUF1_SPEC { # [inline (always)]
  12669. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_INT_FLAG register accessor: an alias for `Reg<R8_DVP_INT_FLAG_SPEC>`"]
  12670. pub type R8_DVP_INT_FLAG = crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC > ; # [doc = "DVP interrupt flag register"]
  12671. pub mod r8_dvp_int_flag { # [doc = "Register `R8_DVP_INT_FLAG` reader"]
  12672. pub struct R (crate :: R < R8_DVP_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_INT_FLAG_SPEC > ; # [inline (always)]
  12673. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_INT_FLAG_SPEC >> for R { # [inline (always)]
  12674. fn from (reader : crate :: R < R8_DVP_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_INT_FLAG` writer"]
  12675. pub struct W (crate :: W < R8_DVP_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_INT_FLAG_SPEC > ; # [inline (always)]
  12676. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  12677. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_INT_FLAG_SPEC >> for W { # [inline (always)]
  12678. fn from (writer : crate :: W < R8_DVP_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_IF_STR_FRM` reader - interrupt flag for DVP frame start"]
  12679. pub struct RB_DVP_IF_STR_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_STR_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_STR_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_STR_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12680. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_STR_FRM` writer - interrupt flag for DVP frame start"]
  12681. pub struct RB_DVP_IF_STR_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_STR_FRM_W < 'a > { # [doc = r"Sets the field bit"]
  12682. # [inline (always)]
  12683. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12684. # [inline (always)]
  12685. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12686. # [inline (always)]
  12687. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_IF_ROW_DONE` reader - interrupt flag for DVP row receive done"]
  12688. pub struct RB_DVP_IF_ROW_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_ROW_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_ROW_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_ROW_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12689. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_ROW_DONE` writer - interrupt flag for DVP row receive done"]
  12690. pub struct RB_DVP_IF_ROW_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_ROW_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  12691. # [inline (always)]
  12692. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12693. # [inline (always)]
  12694. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12695. # [inline (always)]
  12696. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_IF_FRM_DONE` reader - interrupt flag for DVP frame receive done"]
  12697. pub struct RB_DVP_IF_FRM_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_FRM_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_FRM_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_FRM_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12698. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_FRM_DONE` writer - interrupt flag for DVP frame receive done"]
  12699. pub struct RB_DVP_IF_FRM_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_FRM_DONE_W < 'a > { # [doc = r"Sets the field bit"]
  12700. # [inline (always)]
  12701. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12702. # [inline (always)]
  12703. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12704. # [inline (always)]
  12705. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_IF_FIFO_OV` reader - interrupt flag for DVP receive fifo overflow"]
  12706. pub struct RB_DVP_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12707. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_FIFO_OV` writer - interrupt flag for DVP receive fifo overflow"]
  12708. pub struct RB_DVP_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  12709. # [inline (always)]
  12710. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12711. # [inline (always)]
  12712. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12713. # [inline (always)]
  12714. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_IF_STP_FRM` reader - interrupt flag for DVP frame stop"]
  12715. pub struct RB_DVP_IF_STP_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_STP_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_STP_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_STP_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12716. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_STP_FRM` writer - interrupt flag for DVP frame stop"]
  12717. pub struct RB_DVP_IF_STP_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_STP_FRM_W < 'a > { # [doc = r"Sets the field bit"]
  12718. # [inline (always)]
  12719. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  12720. # [inline (always)]
  12721. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  12722. # [inline (always)]
  12723. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for DVP frame start"]
  12724. # [inline (always)]
  12725. pub fn rb_dvp_if_str_frm (& self) -> RB_DVP_IF_STR_FRM_R { RB_DVP_IF_STR_FRM_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for DVP row receive done"]
  12726. # [inline (always)]
  12727. pub fn rb_dvp_if_row_done (& self) -> RB_DVP_IF_ROW_DONE_R { RB_DVP_IF_ROW_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for DVP frame receive done"]
  12728. # [inline (always)]
  12729. pub fn rb_dvp_if_frm_done (& self) -> RB_DVP_IF_FRM_DONE_R { RB_DVP_IF_FRM_DONE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for DVP receive fifo overflow"]
  12730. # [inline (always)]
  12731. pub fn rb_dvp_if_fifo_ov (& self) -> RB_DVP_IF_FIFO_OV_R { RB_DVP_IF_FIFO_OV_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for DVP frame stop"]
  12732. # [inline (always)]
  12733. pub fn rb_dvp_if_stp_frm (& self) -> RB_DVP_IF_STP_FRM_R { RB_DVP_IF_STP_FRM_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for DVP frame start"]
  12734. # [inline (always)]
  12735. pub fn rb_dvp_if_str_frm (& mut self) -> RB_DVP_IF_STR_FRM_W { RB_DVP_IF_STR_FRM_W { w : self } } # [doc = "Bit 1 - interrupt flag for DVP row receive done"]
  12736. # [inline (always)]
  12737. pub fn rb_dvp_if_row_done (& mut self) -> RB_DVP_IF_ROW_DONE_W { RB_DVP_IF_ROW_DONE_W { w : self } } # [doc = "Bit 2 - interrupt flag for DVP frame receive done"]
  12738. # [inline (always)]
  12739. pub fn rb_dvp_if_frm_done (& mut self) -> RB_DVP_IF_FRM_DONE_W { RB_DVP_IF_FRM_DONE_W { w : self } } # [doc = "Bit 3 - interrupt flag for DVP receive fifo overflow"]
  12740. # [inline (always)]
  12741. pub fn rb_dvp_if_fifo_ov (& mut self) -> RB_DVP_IF_FIFO_OV_W { RB_DVP_IF_FIFO_OV_W { w : self } } # [doc = "Bit 4 - interrupt flag for DVP frame stop"]
  12742. # [inline (always)]
  12743. pub fn rb_dvp_if_stp_frm (& mut self) -> RB_DVP_IF_STP_FRM_W { RB_DVP_IF_STP_FRM_W { w : self } } # [doc = "Writes raw bits to the register."]
  12744. # [inline (always)]
  12745. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_int_flag](index.html) module"]
  12746. pub struct R8_DVP_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_DVP_INT_FLAG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r8_dvp_int_flag::R](R) reader structure"]
  12747. impl crate :: Readable for R8_DVP_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_int_flag::W](W) writer structure"]
  12748. impl crate :: Writable for R8_DVP_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_INT_FLAG to value 0"]
  12749. impl crate :: Resettable for R8_DVP_INT_FLAG_SPEC { # [inline (always)]
  12750. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_FIFO_ST register accessor: an alias for `Reg<R8_DVP_FIFO_ST_SPEC>`"]
  12751. pub type R8_DVP_FIFO_ST = crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC > ; # [doc = "DVP receive fifo status"]
  12752. pub mod r8_dvp_fifo_st { # [doc = "Register `R8_DVP_FIFO_ST` reader"]
  12753. pub struct R (crate :: R < R8_DVP_FIFO_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_FIFO_ST_SPEC > ; # [inline (always)]
  12754. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_FIFO_ST_SPEC >> for R { # [inline (always)]
  12755. fn from (reader : crate :: R < R8_DVP_FIFO_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_FIFO_RDY` reader - DVP receive fifo ready"]
  12756. pub struct RB_DVP_FIFO_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12757. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_FIFO_FULL` reader - DVP receive fifo full"]
  12758. pub struct RB_DVP_FIFO_FULL_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_FULL_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_FULL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_FULL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12759. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_FIFO_OV` reader - DVP receive fifo overflow"]
  12760. pub struct RB_DVP_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  12761. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_MSK_FIFO_CNT` reader - DVP receive fifo count"]
  12762. pub struct RB_DVP_MSK_FIFO_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DVP_MSK_FIFO_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_DVP_MSK_FIFO_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_MSK_FIFO_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  12763. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - DVP receive fifo ready"]
  12764. # [inline (always)]
  12765. pub fn rb_dvp_fifo_rdy (& self) -> RB_DVP_FIFO_RDY_R { RB_DVP_FIFO_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP receive fifo full"]
  12766. # [inline (always)]
  12767. pub fn rb_dvp_fifo_full (& self) -> RB_DVP_FIFO_FULL_R { RB_DVP_FIFO_FULL_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP receive fifo overflow"]
  12768. # [inline (always)]
  12769. pub fn rb_dvp_fifo_ov (& self) -> RB_DVP_FIFO_OV_R { RB_DVP_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 4:6 - DVP receive fifo count"]
  12770. # [inline (always)]
  12771. pub fn rb_dvp_msk_fifo_cnt (& self) -> RB_DVP_MSK_FIFO_CNT_R { RB_DVP_MSK_FIFO_CNT_R :: new (((self . bits >> 4) & 0x07) as u8) } } # [doc = "DVP receive fifo status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_fifo_st](index.html) module"]
  12772. pub struct R8_DVP_FIFO_ST_SPEC ; impl crate :: RegisterSpec for R8_DVP_FIFO_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_fifo_st::R](R) reader structure"]
  12773. impl crate :: Readable for R8_DVP_FIFO_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_DVP_FIFO_ST to value 0"]
  12774. impl crate :: Resettable for R8_DVP_FIFO_ST_SPEC { # [inline (always)]
  12775. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_ROW_CNT register accessor: an alias for `Reg<R16_DVP_ROW_CNT_SPEC>`"]
  12776. pub type R16_DVP_ROW_CNT = crate :: Reg < r16_dvp_row_cnt :: R16_DVP_ROW_CNT_SPEC > ; # [doc = "DVP row count value"]
  12777. pub mod r16_dvp_row_cnt { # [doc = "Register `R16_DVP_ROW_CNT` reader"]
  12778. pub struct R (crate :: R < R16_DVP_ROW_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_ROW_CNT_SPEC > ; # [inline (always)]
  12779. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_ROW_CNT_SPEC >> for R { # [inline (always)]
  12780. fn from (reader : crate :: R < R16_DVP_ROW_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_ROW_CNT` reader - DVP receive fifo full"]
  12781. pub struct RB_DVP_ROW_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_ROW_CNT_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_ROW_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ROW_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  12782. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - DVP receive fifo full"]
  12783. # [inline (always)]
  12784. pub fn rb_dvp_row_cnt (& self) -> RB_DVP_ROW_CNT_R { RB_DVP_ROW_CNT_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "DVP row count value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_row_cnt](index.html) module"]
  12785. pub struct R16_DVP_ROW_CNT_SPEC ; impl crate :: RegisterSpec for R16_DVP_ROW_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_row_cnt::R](R) reader structure"]
  12786. impl crate :: Readable for R16_DVP_ROW_CNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_DVP_ROW_CNT to value 0"]
  12787. impl crate :: Resettable for R16_DVP_ROW_CNT_SPEC { # [inline (always)]
  12788. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_COL_CNT register accessor: an alias for `Reg<R16_DVP_COL_CNT_SPEC>`"]
  12789. pub type R16_DVP_COL_CNT = crate :: Reg < r16_dvp_col_cnt :: R16_DVP_COL_CNT_SPEC > ; # [doc = "DVP col count value"]
  12790. pub mod r16_dvp_col_cnt { # [doc = "Register `R16_DVP_COL_CNT` reader"]
  12791. pub struct R (crate :: R < R16_DVP_COL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_COL_CNT_SPEC > ; # [inline (always)]
  12792. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_COL_CNT_SPEC >> for R { # [inline (always)]
  12793. fn from (reader : crate :: R < R16_DVP_COL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_COL_CNT` reader - DVP receive fifo ready"]
  12794. pub struct RB_DVP_COL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_COL_CNT_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_COL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_COL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  12795. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - DVP receive fifo ready"]
  12796. # [inline (always)]
  12797. pub fn rb_dvp_col_cnt (& self) -> RB_DVP_COL_CNT_R { RB_DVP_COL_CNT_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "DVP col count value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_col_cnt](index.html) module"]
  12798. pub struct R16_DVP_COL_CNT_SPEC ; impl crate :: RegisterSpec for R16_DVP_COL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_col_cnt::R](R) reader structure"]
  12799. impl crate :: Readable for R16_DVP_COL_CNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_DVP_COL_CNT to value 0"]
  12800. impl crate :: Resettable for R16_DVP_COL_CNT_SPEC { # [inline (always)]
  12801. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "Program Fast Interrupt Controller"]
  12802. pub struct PFIC { _marker : PhantomData < * const () > } unsafe impl Send for PFIC { } impl PFIC { # [doc = r"Pointer to the register block"]
  12803. pub const PTR : * const pfic :: RegisterBlock = 0xe000_e000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  12804. # [inline (always)]
  12805. pub const fn ptr () -> * const pfic :: RegisterBlock { Self :: PTR } } impl Deref for PFIC { type Target = pfic :: RegisterBlock ; # [inline (always)]
  12806. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for PFIC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("PFIC") . finish () } } # [doc = "Program Fast Interrupt Controller"]
  12807. pub mod pfic { # [doc = r"Register block"]
  12808. # [repr (C)]
  12809. pub struct RegisterBlock { # [doc = "0x00 - Interrupt Status Register"]
  12810. pub r32_pfic_isr1 : crate :: Reg < r32_pfic_isr1 :: R32_PFIC_ISR1_SPEC > , # [doc = "0x04 - Interrupt Status Register"]
  12811. pub r32_pfic_isr2 : crate :: Reg < r32_pfic_isr2 :: R32_PFIC_ISR2_SPEC > , _reserved2 : [u8 ; 0x18]
  12812. , # [doc = "0x20 - Interrupt Pending Register"]
  12813. pub r32_pfic_ipr1 : crate :: Reg < r32_pfic_ipr1 :: R32_PFIC_IPR1_SPEC > , # [doc = "0x24 - Interrupt Pending Register"]
  12814. pub r32_pfic_ipr2 : crate :: Reg < r32_pfic_ipr2 :: R32_PFIC_IPR2_SPEC > , _reserved4 : [u8 ; 0x18]
  12815. , # [doc = "0x40 - Interrupt Priority Register"]
  12816. pub r32_pfic_ithresdr : crate :: Reg < r32_pfic_ithresdr :: R32_PFIC_ITHRESDR_SPEC > , # [doc = "0x44 - Interrupt Fast Address Register"]
  12817. pub r32_pfic_fibaddrr : crate :: Reg < r32_pfic_fibaddrr :: R32_PFIC_FIBADDRR_SPEC > , # [doc = "0x48 - Interrupt Config Register"]
  12818. pub r32_pfic_cfgr : crate :: Reg < r32_pfic_cfgr :: R32_PFIC_CFGR_SPEC > , # [doc = "0x4c - Interrupt Global Register"]
  12819. pub r32_pfic_gisr : crate :: Reg < r32_pfic_gisr :: R32_PFIC_GISR_SPEC > , _reserved8 : [u8 ; 0x10]
  12820. , # [doc = "0x60 - Interrupt 0 address Register"]
  12821. pub r32_pfic_fifoaddrr0 : crate :: Reg < r32_pfic_fifoaddrr0 :: R32_PFIC_FIFOADDRR0_SPEC > , # [doc = "0x64 - Interrupt 1 address Register"]
  12822. pub r32_pfic_fifoaddrr1 : crate :: Reg < r32_pfic_fifoaddrr1 :: R32_PFIC_FIFOADDRR1_SPEC > , # [doc = "0x68 - Interrupt 2 address Register"]
  12823. pub r32_pfic_fifoaddrr2 : crate :: Reg < r32_pfic_fifoaddrr2 :: R32_PFIC_FIFOADDRR2_SPEC > , # [doc = "0x6c - Interrupt 3 address Register"]
  12824. pub r32_pfic_fifoaddrr3 : crate :: Reg < r32_pfic_fifoaddrr3 :: R32_PFIC_FIFOADDRR3_SPEC > , _reserved12 : [u8 ; 0x90]
  12825. , # [doc = "0x100 - Interrupt Setting Register"]
  12826. pub r32_pfic_ienr1 : crate :: Reg < r32_pfic_ienr1 :: R32_PFIC_IENR1_SPEC > , # [doc = "0x104 - Interrupt Setting Register"]
  12827. pub r32_pfic_ienr2 : crate :: Reg < r32_pfic_ienr2 :: R32_PFIC_IENR2_SPEC > , _reserved14 : [u8 ; 0x78]
  12828. , # [doc = "0x180 - Interrupt Clear Register"]
  12829. pub r32_pfic_irer1 : crate :: Reg < r32_pfic_irer1 :: R32_PFIC_IRER1_SPEC > , # [doc = "0x184 - Interrupt Clear Register"]
  12830. pub r32_pfic_irer2 : crate :: Reg < r32_pfic_irer2 :: R32_PFIC_IRER2_SPEC > , _reserved16 : [u8 ; 0x78]
  12831. , # [doc = "0x200 - Interrupt Pending Register"]
  12832. pub r32_pfic_ipsr1 : crate :: Reg < r32_pfic_ipsr1 :: R32_PFIC_IPSR1_SPEC > , # [doc = "0x204 - Interrupt Pending Register"]
  12833. pub r32_pfic_ipsr2 : crate :: Reg < r32_pfic_ipsr2 :: R32_PFIC_IPSR2_SPEC > , _reserved18 : [u8 ; 0x78]
  12834. , # [doc = "0x280 - Interrupt Pending Clear Register"]
  12835. pub r32_pfic_iprr1 : crate :: Reg < r32_pfic_iprr1 :: R32_PFIC_IPRR1_SPEC > , # [doc = "0x284 - Interrupt Pending Clear Register"]
  12836. pub r32_pfic_iprr2 : crate :: Reg < r32_pfic_iprr2 :: R32_PFIC_IPRR2_SPEC > , _reserved20 : [u8 ; 0x78]
  12837. , # [doc = "0x300 - Interrupt ACTIVE Register"]
  12838. pub r32_pfic_iactr1 : crate :: Reg < r32_pfic_iactr1 :: R32_PFIC_IACTR1_SPEC > , # [doc = "0x304 - Interrupt ACTIVE Register"]
  12839. pub r32_pfic_iactr2 : crate :: Reg < r32_pfic_iactr2 :: R32_PFIC_IACTR2_SPEC > , _reserved22 : [u8 ; 0xf8]
  12840. , # [doc = "0x400 - Interrupt Priority configuration Register"]
  12841. pub r32_pfic_iprior0 : crate :: Reg < r32_pfic_iprior0 :: R32_PFIC_IPRIOR0_SPEC > , _reserved23 : [u8 ; 0x1c]
  12842. , # [doc = "0x420 - Interrupt Priority configuration Register"]
  12843. pub r32_pfic_iprior1 : crate :: Reg < r32_pfic_iprior1 :: R32_PFIC_IPRIOR1_SPEC > , _reserved24 : [u8 ; 0x1c]
  12844. , # [doc = "0x440 - Interrupt Priority configuration Register"]
  12845. pub r32_pfic_iprior2 : crate :: Reg < r32_pfic_iprior2 :: R32_PFIC_IPRIOR2_SPEC > , _reserved25 : [u8 ; 0x1c]
  12846. , # [doc = "0x460 - Interrupt Priority configuration Register"]
  12847. pub r32_pfic_iprior3 : crate :: Reg < r32_pfic_iprior3 :: R32_PFIC_IPRIOR3_SPEC > , _reserved26 : [u8 ; 0x1c]
  12848. , # [doc = "0x480 - Interrupt Priority configuration Register"]
  12849. pub r32_pfic_iprior4 : crate :: Reg < r32_pfic_iprior4 :: R32_PFIC_IPRIOR4_SPEC > , _reserved27 : [u8 ; 0x1c]
  12850. , # [doc = "0x4a0 - Interrupt Priority configuration Register"]
  12851. pub r32_pfic_iprior5 : crate :: Reg < r32_pfic_iprior5 :: R32_PFIC_IPRIOR5_SPEC > , _reserved28 : [u8 ; 0x1c]
  12852. , # [doc = "0x4c0 - Interrupt Priority configuration Register"]
  12853. pub r32_pfic_iprior6 : crate :: Reg < r32_pfic_iprior6 :: R32_PFIC_IPRIOR6_SPEC > , _reserved29 : [u8 ; 0x1c]
  12854. , # [doc = "0x4e0 - Interrupt Priority configuration Register"]
  12855. pub r32_pfic_iprior7 : crate :: Reg < r32_pfic_iprior7 :: R32_PFIC_IPRIOR7_SPEC > , _reserved30 : [u8 ; 0x1c]
  12856. , # [doc = "0x500 - Interrupt Priority configuration Register"]
  12857. pub r32_pfic_iprior8 : crate :: Reg < r32_pfic_iprior8 :: R32_PFIC_IPRIOR8_SPEC > , _reserved31 : [u8 ; 0x1c]
  12858. , # [doc = "0x520 - Interrupt Priority configuration Register"]
  12859. pub r32_pfic_iprior9 : crate :: Reg < r32_pfic_iprior9 :: R32_PFIC_IPRIOR9_SPEC > , _reserved32 : [u8 ; 0x1c]
  12860. , # [doc = "0x540 - Interrupt Priority configuration Register"]
  12861. pub r32_pfic_iprior10 : crate :: Reg < r32_pfic_iprior10 :: R32_PFIC_IPRIOR10_SPEC > , _reserved33 : [u8 ; 0x1c]
  12862. , # [doc = "0x560 - Interrupt Priority configuration Register"]
  12863. pub r32_pfic_iprior11 : crate :: Reg < r32_pfic_iprior11 :: R32_PFIC_IPRIOR11_SPEC > , _reserved34 : [u8 ; 0x1c]
  12864. , # [doc = "0x580 - Interrupt Priority configuration Register"]
  12865. pub r32_pfic_iprior12 : crate :: Reg < r32_pfic_iprior12 :: R32_PFIC_IPRIOR12_SPEC > , _reserved35 : [u8 ; 0x1c]
  12866. , # [doc = "0x5a0 - Interrupt Priority configuration Register"]
  12867. pub r32_pfic_iprior13 : crate :: Reg < r32_pfic_iprior13 :: R32_PFIC_IPRIOR13_SPEC > , _reserved36 : [u8 ; 0x1c]
  12868. , # [doc = "0x5c0 - Interrupt Priority configuration Register"]
  12869. pub r32_pfic_iprior14 : crate :: Reg < r32_pfic_iprior14 :: R32_PFIC_IPRIOR14_SPEC > , _reserved37 : [u8 ; 0x1c]
  12870. , # [doc = "0x5e0 - Interrupt Priority configuration Register"]
  12871. pub r32_pfic_iprior15 : crate :: Reg < r32_pfic_iprior15 :: R32_PFIC_IPRIOR15_SPEC > , _reserved38 : [u8 ; 0x1c]
  12872. , # [doc = "0x600 - Interrupt Priority configuration Register"]
  12873. pub r32_pfic_iprior16 : crate :: Reg < r32_pfic_iprior16 :: R32_PFIC_IPRIOR16_SPEC > , _reserved39 : [u8 ; 0x1c]
  12874. , # [doc = "0x620 - Interrupt Priority configuration Register"]
  12875. pub r32_pfic_iprior17 : crate :: Reg < r32_pfic_iprior17 :: R32_PFIC_IPRIOR17_SPEC > , _reserved40 : [u8 ; 0x1c]
  12876. , # [doc = "0x640 - Interrupt Priority configuration Register"]
  12877. pub r32_pfic_iprior18 : crate :: Reg < r32_pfic_iprior18 :: R32_PFIC_IPRIOR18_SPEC > , _reserved41 : [u8 ; 0x1c]
  12878. , # [doc = "0x660 - Interrupt Priority configuration Register"]
  12879. pub r32_pfic_iprior19 : crate :: Reg < r32_pfic_iprior19 :: R32_PFIC_IPRIOR19_SPEC > , _reserved42 : [u8 ; 0x1c]
  12880. , # [doc = "0x680 - Interrupt Priority configuration Register"]
  12881. pub r32_pfic_iprior20 : crate :: Reg < r32_pfic_iprior20 :: R32_PFIC_IPRIOR20_SPEC > , _reserved43 : [u8 ; 0x1c]
  12882. , # [doc = "0x6a0 - Interrupt Priority configuration Register"]
  12883. pub r32_pfic_iprior21 : crate :: Reg < r32_pfic_iprior21 :: R32_PFIC_IPRIOR21_SPEC > , _reserved44 : [u8 ; 0x1c]
  12884. , # [doc = "0x6c0 - Interrupt Priority configuration Register"]
  12885. pub r32_pfic_iprior22 : crate :: Reg < r32_pfic_iprior22 :: R32_PFIC_IPRIOR22_SPEC > , _reserved45 : [u8 ; 0x1c]
  12886. , # [doc = "0x6e0 - Interrupt Priority configuration Register"]
  12887. pub r32_pfic_iprior23 : crate :: Reg < r32_pfic_iprior23 :: R32_PFIC_IPRIOR23_SPEC > , _reserved46 : [u8 ; 0x1c]
  12888. , # [doc = "0x700 - Interrupt Priority configuration Register"]
  12889. pub r32_pfic_iprior24 : crate :: Reg < r32_pfic_iprior24 :: R32_PFIC_IPRIOR24_SPEC > , _reserved47 : [u8 ; 0x1c]
  12890. , # [doc = "0x720 - Interrupt Priority configuration Register"]
  12891. pub r32_pfic_iprior25 : crate :: Reg < r32_pfic_iprior25 :: R32_PFIC_IPRIOR25_SPEC > , _reserved48 : [u8 ; 0x1c]
  12892. , # [doc = "0x740 - Interrupt Priority configuration Register"]
  12893. pub r32_pfic_iprior26 : crate :: Reg < r32_pfic_iprior26 :: R32_PFIC_IPRIOR26_SPEC > , _reserved49 : [u8 ; 0x1c]
  12894. , # [doc = "0x760 - Interrupt Priority configuration Register"]
  12895. pub r32_pfic_iprior27 : crate :: Reg < r32_pfic_iprior27 :: R32_PFIC_IPRIOR27_SPEC > , _reserved50 : [u8 ; 0x1c]
  12896. , # [doc = "0x780 - Interrupt Priority configuration Register"]
  12897. pub r32_pfic_iprior28 : crate :: Reg < r32_pfic_iprior28 :: R32_PFIC_IPRIOR28_SPEC > , _reserved51 : [u8 ; 0x1c]
  12898. , # [doc = "0x7a0 - Interrupt Priority configuration Register"]
  12899. pub r32_pfic_iprior29 : crate :: Reg < r32_pfic_iprior29 :: R32_PFIC_IPRIOR29_SPEC > , _reserved52 : [u8 ; 0x1c]
  12900. , # [doc = "0x7c0 - Interrupt Priority configuration Register"]
  12901. pub r32_pfic_iprior30 : crate :: Reg < r32_pfic_iprior30 :: R32_PFIC_IPRIOR30_SPEC > , _reserved53 : [u8 ; 0x1c]
  12902. , # [doc = "0x7e0 - Interrupt Priority configuration Register"]
  12903. pub r32_pfic_iprior31 : crate :: Reg < r32_pfic_iprior31 :: R32_PFIC_IPRIOR31_SPEC > , _reserved54 : [u8 ; 0x1c]
  12904. , # [doc = "0x800 - Interrupt Priority configuration Register"]
  12905. pub r32_pfic_iprior32 : crate :: Reg < r32_pfic_iprior32 :: R32_PFIC_IPRIOR32_SPEC > , _reserved55 : [u8 ; 0x1c]
  12906. , # [doc = "0x820 - Interrupt Priority configuration Register"]
  12907. pub r32_pfic_iprior33 : crate :: Reg < r32_pfic_iprior33 :: R32_PFIC_IPRIOR33_SPEC > , _reserved56 : [u8 ; 0x1c]
  12908. , # [doc = "0x840 - Interrupt Priority configuration Register"]
  12909. pub r32_pfic_iprior34 : crate :: Reg < r32_pfic_iprior34 :: R32_PFIC_IPRIOR34_SPEC > , _reserved57 : [u8 ; 0x1c]
  12910. , # [doc = "0x860 - Interrupt Priority configuration Register"]
  12911. pub r32_pfic_iprior35 : crate :: Reg < r32_pfic_iprior35 :: R32_PFIC_IPRIOR35_SPEC > , _reserved58 : [u8 ; 0x1c]
  12912. , # [doc = "0x880 - Interrupt Priority configuration Register"]
  12913. pub r32_pfic_iprior36 : crate :: Reg < r32_pfic_iprior36 :: R32_PFIC_IPRIOR36_SPEC > , _reserved59 : [u8 ; 0x1c]
  12914. , # [doc = "0x8a0 - Interrupt Priority configuration Register"]
  12915. pub r32_pfic_iprior37 : crate :: Reg < r32_pfic_iprior37 :: R32_PFIC_IPRIOR37_SPEC > , _reserved60 : [u8 ; 0x1c]
  12916. , # [doc = "0x8c0 - Interrupt Priority configuration Register"]
  12917. pub r32_pfic_iprior38 : crate :: Reg < r32_pfic_iprior38 :: R32_PFIC_IPRIOR38_SPEC > , _reserved61 : [u8 ; 0x1c]
  12918. , # [doc = "0x8e0 - Interrupt Priority configuration Register"]
  12919. pub r32_pfic_iprior39 : crate :: Reg < r32_pfic_iprior39 :: R32_PFIC_IPRIOR39_SPEC > , _reserved62 : [u8 ; 0x1c]
  12920. , # [doc = "0x900 - Interrupt Priority configuration Register"]
  12921. pub r32_pfic_iprior40 : crate :: Reg < r32_pfic_iprior40 :: R32_PFIC_IPRIOR40_SPEC > , _reserved63 : [u8 ; 0x1c]
  12922. , # [doc = "0x920 - Interrupt Priority configuration Register"]
  12923. pub r32_pfic_iprior41 : crate :: Reg < r32_pfic_iprior41 :: R32_PFIC_IPRIOR41_SPEC > , _reserved64 : [u8 ; 0x1c]
  12924. , # [doc = "0x940 - Interrupt Priority configuration Register"]
  12925. pub r32_pfic_iprior42 : crate :: Reg < r32_pfic_iprior42 :: R32_PFIC_IPRIOR42_SPEC > , _reserved65 : [u8 ; 0x1c]
  12926. , # [doc = "0x960 - Interrupt Priority configuration Register"]
  12927. pub r32_pfic_iprior43 : crate :: Reg < r32_pfic_iprior43 :: R32_PFIC_IPRIOR43_SPEC > , _reserved66 : [u8 ; 0x1c]
  12928. , # [doc = "0x980 - Interrupt Priority configuration Register"]
  12929. pub r32_pfic_iprior44 : crate :: Reg < r32_pfic_iprior44 :: R32_PFIC_IPRIOR44_SPEC > , _reserved67 : [u8 ; 0x1c]
  12930. , # [doc = "0x9a0 - Interrupt Priority configuration Register"]
  12931. pub r32_pfic_iprior45 : crate :: Reg < r32_pfic_iprior45 :: R32_PFIC_IPRIOR45_SPEC > , _reserved68 : [u8 ; 0x1c]
  12932. , # [doc = "0x9c0 - Interrupt Priority configuration Register"]
  12933. pub r32_pfic_iprior46 : crate :: Reg < r32_pfic_iprior46 :: R32_PFIC_IPRIOR46_SPEC > , _reserved69 : [u8 ; 0x1c]
  12934. , # [doc = "0x9e0 - Interrupt Priority configuration Register"]
  12935. pub r32_pfic_iprior47 : crate :: Reg < r32_pfic_iprior47 :: R32_PFIC_IPRIOR47_SPEC > , _reserved70 : [u8 ; 0x1c]
  12936. , # [doc = "0xa00 - Interrupt Priority configuration Register"]
  12937. pub r32_pfic_iprior48 : crate :: Reg < r32_pfic_iprior48 :: R32_PFIC_IPRIOR48_SPEC > , _reserved71 : [u8 ; 0x1c]
  12938. , # [doc = "0xa20 - Interrupt Priority configuration Register"]
  12939. pub r32_pfic_iprior49 : crate :: Reg < r32_pfic_iprior49 :: R32_PFIC_IPRIOR49_SPEC > , _reserved72 : [u8 ; 0x1c]
  12940. , # [doc = "0xa40 - Interrupt Priority configuration Register"]
  12941. pub r32_pfic_iprior50 : crate :: Reg < r32_pfic_iprior50 :: R32_PFIC_IPRIOR50_SPEC > , _reserved73 : [u8 ; 0x1c]
  12942. , # [doc = "0xa60 - Interrupt Priority configuration Register"]
  12943. pub r32_pfic_iprior51 : crate :: Reg < r32_pfic_iprior51 :: R32_PFIC_IPRIOR51_SPEC > , _reserved74 : [u8 ; 0x1c]
  12944. , # [doc = "0xa80 - Interrupt Priority configuration Register"]
  12945. pub r32_pfic_iprior52 : crate :: Reg < r32_pfic_iprior52 :: R32_PFIC_IPRIOR52_SPEC > , _reserved75 : [u8 ; 0x1c]
  12946. , # [doc = "0xaa0 - Interrupt Priority configuration Register"]
  12947. pub r32_pfic_iprior53 : crate :: Reg < r32_pfic_iprior53 :: R32_PFIC_IPRIOR53_SPEC > , _reserved76 : [u8 ; 0x2c]
  12948. , # [doc = "0xad0 - Interrupt Priority configuration Register"]
  12949. pub r32_pfic_iprior54 : crate :: Reg < r32_pfic_iprior54 :: R32_PFIC_IPRIOR54_SPEC > , _reserved77 : [u8 ; 0x0c]
  12950. , # [doc = "0xae0 - Interrupt Priority configuration Register"]
  12951. pub r32_pfic_iprior55 : crate :: Reg < r32_pfic_iprior55 :: R32_PFIC_IPRIOR55_SPEC > , _reserved78 : [u8 ; 0x1c]
  12952. , # [doc = "0xb00 - Interrupt Priority configuration Register"]
  12953. pub r32_pfic_iprior56 : crate :: Reg < r32_pfic_iprior56 :: R32_PFIC_IPRIOR56_SPEC > , _reserved79 : [u8 ; 0x1c]
  12954. , # [doc = "0xb20 - Interrupt Priority configuration Register"]
  12955. pub r32_pfic_iprior57 : crate :: Reg < r32_pfic_iprior57 :: R32_PFIC_IPRIOR57_SPEC > , _reserved80 : [u8 ; 0x1c]
  12956. , # [doc = "0xb40 - Interrupt Priority configuration Register"]
  12957. pub r32_pfic_iprior58 : crate :: Reg < r32_pfic_iprior58 :: R32_PFIC_IPRIOR58_SPEC > , _reserved81 : [u8 ; 0x1c]
  12958. , # [doc = "0xb60 - Interrupt Priority configuration Register"]
  12959. pub r32_pfic_iprior59 : crate :: Reg < r32_pfic_iprior59 :: R32_PFIC_IPRIOR59_SPEC > , _reserved82 : [u8 ; 0x1c]
  12960. , # [doc = "0xb80 - Interrupt Priority configuration Register"]
  12961. pub r32_pfic_iprior60 : crate :: Reg < r32_pfic_iprior60 :: R32_PFIC_IPRIOR60_SPEC > , _reserved83 : [u8 ; 0x1c]
  12962. , # [doc = "0xba0 - Interrupt Priority configuration Register"]
  12963. pub r32_pfic_iprior61 : crate :: Reg < r32_pfic_iprior61 :: R32_PFIC_IPRIOR61_SPEC > , _reserved84 : [u8 ; 0x3c]
  12964. , # [doc = "0xbe0 - Interrupt Priority configuration Register"]
  12965. pub r32_pfic_iprior62 : crate :: Reg < r32_pfic_iprior62 :: R32_PFIC_IPRIOR62_SPEC > , _reserved85 : [u8 ; 0x1c]
  12966. , # [doc = "0xc00 - Interrupt Priority configuration Register"]
  12967. pub r32_pfic_iprior63 : crate :: Reg < r32_pfic_iprior63 :: R32_PFIC_IPRIOR63_SPEC > , _reserved86 : [u8 ; 0x010c]
  12968. , # [doc = "0xd10 - System Control Register"]
  12969. pub r32_pfic_sctlr : crate :: Reg < r32_pfic_sctlr :: R32_PFIC_SCTLR_SPEC > , } # [doc = "R32_PFIC_ISR1 register accessor: an alias for `Reg<R32_PFIC_ISR1_SPEC>`"]
  12970. pub type R32_PFIC_ISR1 = crate :: Reg < r32_pfic_isr1 :: R32_PFIC_ISR1_SPEC > ; # [doc = "Interrupt Status Register"]
  12971. pub mod r32_pfic_isr1 { # [doc = "Register `R32_PFIC_ISR1` reader"]
  12972. pub struct R (crate :: R < R32_PFIC_ISR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ISR1_SPEC > ; # [inline (always)]
  12973. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ISR1_SPEC >> for R { # [inline (always)]
  12974. fn from (reader : crate :: R < R32_PFIC_ISR1_SPEC >) -> Self { R (reader) } } # [doc = "Field `INTSTA` reader - Interrupt ID Status"]
  12975. pub struct INTSTA_R (crate :: FieldReader < u32 , u32 >) ; impl INTSTA_R { pub (crate) fn new (bits : u32) -> Self { INTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12976. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 12:31 - Interrupt ID Status"]
  12977. # [inline (always)]
  12978. pub fn intsta (& self) -> INTSTA_R { INTSTA_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } # [doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_isr1](index.html) module"]
  12979. pub struct R32_PFIC_ISR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ISR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_isr1::R](R) reader structure"]
  12980. impl crate :: Readable for R32_PFIC_ISR1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_ISR1 to value 0"]
  12981. impl crate :: Resettable for R32_PFIC_ISR1_SPEC { # [inline (always)]
  12982. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_ISR2 register accessor: an alias for `Reg<R32_PFIC_ISR2_SPEC>`"]
  12983. pub type R32_PFIC_ISR2 = crate :: Reg < r32_pfic_isr2 :: R32_PFIC_ISR2_SPEC > ; # [doc = "Interrupt Status Register"]
  12984. pub mod r32_pfic_isr2 { # [doc = "Register `R32_PFIC_ISR2` reader"]
  12985. pub struct R (crate :: R < R32_PFIC_ISR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ISR2_SPEC > ; # [inline (always)]
  12986. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ISR2_SPEC >> for R { # [inline (always)]
  12987. fn from (reader : crate :: R < R32_PFIC_ISR2_SPEC >) -> Self { R (reader) } } # [doc = "Field `INTENSTA` reader - Interrupt ID Status"]
  12988. pub struct INTENSTA_R (crate :: FieldReader < u32 , u32 >) ; impl INTENSTA_R { pub (crate) fn new (bits : u32) -> Self { INTENSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTENSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  12989. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:27 - Interrupt ID Status"]
  12990. # [inline (always)]
  12991. pub fn intensta (& self) -> INTENSTA_R { INTENSTA_R :: new ((self . bits & 0x0fff_ffff) as u32) } } # [doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_isr2](index.html) module"]
  12992. pub struct R32_PFIC_ISR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ISR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_isr2::R](R) reader structure"]
  12993. impl crate :: Readable for R32_PFIC_ISR2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_ISR2 to value 0"]
  12994. impl crate :: Resettable for R32_PFIC_ISR2_SPEC { # [inline (always)]
  12995. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPR1 register accessor: an alias for `Reg<R32_PFIC_IPR1_SPEC>`"]
  12996. pub type R32_PFIC_IPR1 = crate :: Reg < r32_pfic_ipr1 :: R32_PFIC_IPR1_SPEC > ; # [doc = "Interrupt Pending Register"]
  12997. pub mod r32_pfic_ipr1 { # [doc = "Register `R32_PFIC_IPR1` reader"]
  12998. pub struct R (crate :: R < R32_PFIC_IPR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPR1_SPEC > ; # [inline (always)]
  12999. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPR1_SPEC >> for R { # [inline (always)]
  13000. fn from (reader : crate :: R < R32_PFIC_IPR1_SPEC >) -> Self { R (reader) } } # [doc = "Field `PENDSTA` reader - PENDSTA"]
  13001. pub struct PENDSTA_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSTA_R { pub (crate) fn new (bits : u32) -> Self { PENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13002. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 12:31 - PENDSTA"]
  13003. # [inline (always)]
  13004. pub fn pendsta (& self) -> PENDSTA_R { PENDSTA_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipr1](index.html) module"]
  13005. pub struct R32_PFIC_IPR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipr1::R](R) reader structure"]
  13006. impl crate :: Readable for R32_PFIC_IPR1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_IPR1 to value 0"]
  13007. impl crate :: Resettable for R32_PFIC_IPR1_SPEC { # [inline (always)]
  13008. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPR2 register accessor: an alias for `Reg<R32_PFIC_IPR2_SPEC>`"]
  13009. pub type R32_PFIC_IPR2 = crate :: Reg < r32_pfic_ipr2 :: R32_PFIC_IPR2_SPEC > ; # [doc = "Interrupt Pending Register"]
  13010. pub mod r32_pfic_ipr2 { # [doc = "Register `R32_PFIC_IPR2` reader"]
  13011. pub struct R (crate :: R < R32_PFIC_IPR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPR2_SPEC > ; # [inline (always)]
  13012. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPR2_SPEC >> for R { # [inline (always)]
  13013. fn from (reader : crate :: R < R32_PFIC_IPR2_SPEC >) -> Self { R (reader) } } # [doc = "Field `PENDSTA` reader - PENDSTA"]
  13014. pub struct PENDSTA_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSTA_R { pub (crate) fn new (bits : u32) -> Self { PENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13015. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:27 - PENDSTA"]
  13016. # [inline (always)]
  13017. pub fn pendsta (& self) -> PENDSTA_R { PENDSTA_R :: new ((self . bits & 0x0fff_ffff) as u32) } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipr2](index.html) module"]
  13018. pub struct R32_PFIC_IPR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipr2::R](R) reader structure"]
  13019. impl crate :: Readable for R32_PFIC_IPR2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_IPR2 to value 0"]
  13020. impl crate :: Resettable for R32_PFIC_IPR2_SPEC { # [inline (always)]
  13021. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_ITHRESDR register accessor: an alias for `Reg<R32_PFIC_ITHRESDR_SPEC>`"]
  13022. pub type R32_PFIC_ITHRESDR = crate :: Reg < r32_pfic_ithresdr :: R32_PFIC_ITHRESDR_SPEC > ; # [doc = "Interrupt Priority Register"]
  13023. pub mod r32_pfic_ithresdr { # [doc = "Register `R32_PFIC_ITHRESDR` reader"]
  13024. pub struct R (crate :: R < R32_PFIC_ITHRESDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ITHRESDR_SPEC > ; # [inline (always)]
  13025. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ITHRESDR_SPEC >> for R { # [inline (always)]
  13026. fn from (reader : crate :: R < R32_PFIC_ITHRESDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_ITHRESDR` writer"]
  13027. pub struct W (crate :: W < R32_PFIC_ITHRESDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_ITHRESDR_SPEC > ; # [inline (always)]
  13028. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13029. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_ITHRESDR_SPEC >> for W { # [inline (always)]
  13030. fn from (writer : crate :: W < R32_PFIC_ITHRESDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `THRESHOLD` reader - THRESHOLD"]
  13031. pub struct THRESHOLD_R (crate :: FieldReader < u8 , u8 >) ; impl THRESHOLD_R { pub (crate) fn new (bits : u8) -> Self { THRESHOLD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for THRESHOLD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13032. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `THRESHOLD` writer - THRESHOLD"]
  13033. pub struct THRESHOLD_W < 'a > { w : & 'a mut W , } impl < 'a > THRESHOLD_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13034. # [inline (always)]
  13035. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u32 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - THRESHOLD"]
  13036. # [inline (always)]
  13037. pub fn threshold (& self) -> THRESHOLD_R { THRESHOLD_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - THRESHOLD"]
  13038. # [inline (always)]
  13039. pub fn threshold (& mut self) -> THRESHOLD_W { THRESHOLD_W { w : self } } # [doc = "Writes raw bits to the register."]
  13040. # [inline (always)]
  13041. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ithresdr](index.html) module"]
  13042. pub struct R32_PFIC_ITHRESDR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ITHRESDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ithresdr::R](R) reader structure"]
  13043. impl crate :: Readable for R32_PFIC_ITHRESDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ithresdr::W](W) writer structure"]
  13044. impl crate :: Writable for R32_PFIC_ITHRESDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_ITHRESDR to value 0"]
  13045. impl crate :: Resettable for R32_PFIC_ITHRESDR_SPEC { # [inline (always)]
  13046. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIBADDRR register accessor: an alias for `Reg<R32_PFIC_FIBADDRR_SPEC>`"]
  13047. pub type R32_PFIC_FIBADDRR = crate :: Reg < r32_pfic_fibaddrr :: R32_PFIC_FIBADDRR_SPEC > ; # [doc = "Interrupt Fast Address Register"]
  13048. pub mod r32_pfic_fibaddrr { # [doc = "Register `R32_PFIC_FIBADDRR` reader"]
  13049. pub struct R (crate :: R < R32_PFIC_FIBADDRR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIBADDRR_SPEC > ; # [inline (always)]
  13050. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIBADDRR_SPEC >> for R { # [inline (always)]
  13051. fn from (reader : crate :: R < R32_PFIC_FIBADDRR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIBADDRR` writer"]
  13052. pub struct W (crate :: W < R32_PFIC_FIBADDRR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIBADDRR_SPEC > ; # [inline (always)]
  13053. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13054. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIBADDRR_SPEC >> for W { # [inline (always)]
  13055. fn from (writer : crate :: W < R32_PFIC_FIBADDRR_SPEC >) -> Self { W (writer) } } # [doc = "Field `BASEADDR` reader - BASEADDR"]
  13056. pub struct BASEADDR_R (crate :: FieldReader < u8 , u8 >) ; impl BASEADDR_R { pub (crate) fn new (bits : u8) -> Self { BASEADDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for BASEADDR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13057. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `BASEADDR` writer - BASEADDR"]
  13058. pub struct BASEADDR_W < 'a > { w : & 'a mut W , } impl < 'a > BASEADDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13059. # [inline (always)]
  13060. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0f << 28)) | ((value as u32 & 0x0f) << 28) ; self . w } } impl R { # [doc = "Bits 28:31 - BASEADDR"]
  13061. # [inline (always)]
  13062. pub fn baseaddr (& self) -> BASEADDR_R { BASEADDR_R :: new (((self . bits >> 28) & 0x0f) as u8) } } impl W { # [doc = "Bits 28:31 - BASEADDR"]
  13063. # [inline (always)]
  13064. pub fn baseaddr (& mut self) -> BASEADDR_W { BASEADDR_W { w : self } } # [doc = "Writes raw bits to the register."]
  13065. # [inline (always)]
  13066. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Fast Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fibaddrr](index.html) module"]
  13067. pub struct R32_PFIC_FIBADDRR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIBADDRR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fibaddrr::R](R) reader structure"]
  13068. impl crate :: Readable for R32_PFIC_FIBADDRR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fibaddrr::W](W) writer structure"]
  13069. impl crate :: Writable for R32_PFIC_FIBADDRR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIBADDRR to value 0"]
  13070. impl crate :: Resettable for R32_PFIC_FIBADDRR_SPEC { # [inline (always)]
  13071. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_CFGR register accessor: an alias for `Reg<R32_PFIC_CFGR_SPEC>`"]
  13072. pub type R32_PFIC_CFGR = crate :: Reg < r32_pfic_cfgr :: R32_PFIC_CFGR_SPEC > ; # [doc = "Interrupt Config Register"]
  13073. pub mod r32_pfic_cfgr { # [doc = "Register `R32_PFIC_CFGR` reader"]
  13074. pub struct R (crate :: R < R32_PFIC_CFGR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_CFGR_SPEC > ; # [inline (always)]
  13075. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_CFGR_SPEC >> for R { # [inline (always)]
  13076. fn from (reader : crate :: R < R32_PFIC_CFGR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_CFGR` writer"]
  13077. pub struct W (crate :: W < R32_PFIC_CFGR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_CFGR_SPEC > ; # [inline (always)]
  13078. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13079. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_CFGR_SPEC >> for W { # [inline (always)]
  13080. fn from (writer : crate :: W < R32_PFIC_CFGR_SPEC >) -> Self { W (writer) } } # [doc = "Field `HWSTKCTRL` reader - HWSTKCTRL"]
  13081. pub struct HWSTKCTRL_R (crate :: FieldReader < bool , bool >) ; impl HWSTKCTRL_R { pub (crate) fn new (bits : bool) -> Self { HWSTKCTRL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for HWSTKCTRL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  13082. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `HWSTKCTRL` writer - HWSTKCTRL"]
  13083. pub struct HWSTKCTRL_W < 'a > { w : & 'a mut W , } impl < 'a > HWSTKCTRL_W < 'a > { # [doc = r"Sets the field bit"]
  13084. # [inline (always)]
  13085. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13086. # [inline (always)]
  13087. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13088. # [inline (always)]
  13089. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `NESTCTRL` reader - NESTCTRL"]
  13090. pub struct NESTCTRL_R (crate :: FieldReader < bool , bool >) ; impl NESTCTRL_R { pub (crate) fn new (bits : bool) -> Self { NESTCTRL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for NESTCTRL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  13091. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `NESTCTRL` writer - NESTCTRL"]
  13092. pub struct NESTCTRL_W < 'a > { w : & 'a mut W , } impl < 'a > NESTCTRL_W < 'a > { # [doc = r"Sets the field bit"]
  13093. # [inline (always)]
  13094. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13095. # [inline (always)]
  13096. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13097. # [inline (always)]
  13098. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `NMISET` writer - NMISET"]
  13099. pub struct NMISET_W < 'a > { w : & 'a mut W , } impl < 'a > NMISET_W < 'a > { # [doc = r"Sets the field bit"]
  13100. # [inline (always)]
  13101. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13102. # [inline (always)]
  13103. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13104. # [inline (always)]
  13105. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `NMIRESET` writer - NMIRESET"]
  13106. pub struct NMIRESET_W < 'a > { w : & 'a mut W , } impl < 'a > NMIRESET_W < 'a > { # [doc = r"Sets the field bit"]
  13107. # [inline (always)]
  13108. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13109. # [inline (always)]
  13110. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13111. # [inline (always)]
  13112. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `EXCSET` writer - EXCSET"]
  13113. pub struct EXCSET_W < 'a > { w : & 'a mut W , } impl < 'a > EXCSET_W < 'a > { # [doc = r"Sets the field bit"]
  13114. # [inline (always)]
  13115. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13116. # [inline (always)]
  13117. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13118. # [inline (always)]
  13119. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `EXCRESET` writer - EXCRESET"]
  13120. pub struct EXCRESET_W < 'a > { w : & 'a mut W , } impl < 'a > EXCRESET_W < 'a > { # [doc = r"Sets the field bit"]
  13121. # [inline (always)]
  13122. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13123. # [inline (always)]
  13124. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13125. # [inline (always)]
  13126. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u32 & 0x01) << 5) ; self . w } } # [doc = "Field `PFICRESET` writer - PFICRSET"]
  13127. pub struct PFICRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PFICRESET_W < 'a > { # [doc = r"Sets the field bit"]
  13128. # [inline (always)]
  13129. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13130. # [inline (always)]
  13131. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13132. # [inline (always)]
  13133. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u32 & 0x01) << 6) ; self . w } } # [doc = "Field `SYSRESET` writer - SYSRESET"]
  13134. pub struct SYSRESET_W < 'a > { w : & 'a mut W , } impl < 'a > SYSRESET_W < 'a > { # [doc = r"Sets the field bit"]
  13135. # [inline (always)]
  13136. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  13137. # [inline (always)]
  13138. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  13139. # [inline (always)]
  13140. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u32 & 0x01) << 7) ; self . w } } # [doc = "Field `KEYCODE` writer - KEYCODE"]
  13141. pub struct KEYCODE_W < 'a > { w : & 'a mut W , } impl < 'a > KEYCODE_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13142. # [inline (always)]
  13143. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xffff << 16)) | ((value as u32 & 0xffff) << 16) ; self . w } } impl R { # [doc = "Bit 0 - HWSTKCTRL"]
  13144. # [inline (always)]
  13145. pub fn hwstkctrl (& self) -> HWSTKCTRL_R { HWSTKCTRL_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - NESTCTRL"]
  13146. # [inline (always)]
  13147. pub fn nestctrl (& self) -> NESTCTRL_R { NESTCTRL_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - HWSTKCTRL"]
  13148. # [inline (always)]
  13149. pub fn hwstkctrl (& mut self) -> HWSTKCTRL_W { HWSTKCTRL_W { w : self } } # [doc = "Bit 1 - NESTCTRL"]
  13150. # [inline (always)]
  13151. pub fn nestctrl (& mut self) -> NESTCTRL_W { NESTCTRL_W { w : self } } # [doc = "Bit 2 - NMISET"]
  13152. # [inline (always)]
  13153. pub fn nmiset (& mut self) -> NMISET_W { NMISET_W { w : self } } # [doc = "Bit 3 - NMIRESET"]
  13154. # [inline (always)]
  13155. pub fn nmireset (& mut self) -> NMIRESET_W { NMIRESET_W { w : self } } # [doc = "Bit 4 - EXCSET"]
  13156. # [inline (always)]
  13157. pub fn excset (& mut self) -> EXCSET_W { EXCSET_W { w : self } } # [doc = "Bit 5 - EXCRESET"]
  13158. # [inline (always)]
  13159. pub fn excreset (& mut self) -> EXCRESET_W { EXCRESET_W { w : self } } # [doc = "Bit 6 - PFICRSET"]
  13160. # [inline (always)]
  13161. pub fn pficreset (& mut self) -> PFICRESET_W { PFICRESET_W { w : self } } # [doc = "Bit 7 - SYSRESET"]
  13162. # [inline (always)]
  13163. pub fn sysreset (& mut self) -> SYSRESET_W { SYSRESET_W { w : self } } # [doc = "Bits 16:31 - KEYCODE"]
  13164. # [inline (always)]
  13165. pub fn keycode (& mut self) -> KEYCODE_W { KEYCODE_W { w : self } } # [doc = "Writes raw bits to the register."]
  13166. # [inline (always)]
  13167. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_cfgr](index.html) module"]
  13168. pub struct R32_PFIC_CFGR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_CFGR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_cfgr::R](R) reader structure"]
  13169. impl crate :: Readable for R32_PFIC_CFGR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_cfgr::W](W) writer structure"]
  13170. impl crate :: Writable for R32_PFIC_CFGR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_CFGR to value 0"]
  13171. impl crate :: Resettable for R32_PFIC_CFGR_SPEC { # [inline (always)]
  13172. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_GISR register accessor: an alias for `Reg<R32_PFIC_GISR_SPEC>`"]
  13173. pub type R32_PFIC_GISR = crate :: Reg < r32_pfic_gisr :: R32_PFIC_GISR_SPEC > ; # [doc = "Interrupt Global Register"]
  13174. pub mod r32_pfic_gisr { # [doc = "Register `R32_PFIC_GISR` reader"]
  13175. pub struct R (crate :: R < R32_PFIC_GISR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_GISR_SPEC > ; # [inline (always)]
  13176. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_GISR_SPEC >> for R { # [inline (always)]
  13177. fn from (reader : crate :: R < R32_PFIC_GISR_SPEC >) -> Self { R (reader) } } # [doc = "Field `NESTSTA` reader - NESTSTA"]
  13178. pub struct NESTSTA_R (crate :: FieldReader < u8 , u8 >) ; impl NESTSTA_R { pub (crate) fn new (bits : u8) -> Self { NESTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for NESTSTA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13179. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `GACTSTA` reader - GACTSTA"]
  13180. pub struct GACTSTA_R (crate :: FieldReader < bool , bool >) ; impl GACTSTA_R { pub (crate) fn new (bits : bool) -> Self { GACTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for GACTSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  13181. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `GPENDSTA` reader - GPENDSTA"]
  13182. pub struct GPENDSTA_R (crate :: FieldReader < bool , bool >) ; impl GPENDSTA_R { pub (crate) fn new (bits : bool) -> Self { GPENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for GPENDSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  13183. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - NESTSTA"]
  13184. # [inline (always)]
  13185. pub fn neststa (& self) -> NESTSTA_R { NESTSTA_R :: new ((self . bits & 0xff) as u8) } # [doc = "Bit 8 - GACTSTA"]
  13186. # [inline (always)]
  13187. pub fn gactsta (& self) -> GACTSTA_R { GACTSTA_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - GPENDSTA"]
  13188. # [inline (always)]
  13189. pub fn gpendsta (& self) -> GPENDSTA_R { GPENDSTA_R :: new (((self . bits >> 9) & 0x01) != 0) } } # [doc = "Interrupt Global Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_gisr](index.html) module"]
  13190. pub struct R32_PFIC_GISR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_GISR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_gisr::R](R) reader structure"]
  13191. impl crate :: Readable for R32_PFIC_GISR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_GISR to value 0"]
  13192. impl crate :: Resettable for R32_PFIC_GISR_SPEC { # [inline (always)]
  13193. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR0 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR0_SPEC>`"]
  13194. pub type R32_PFIC_FIFOADDRR0 = crate :: Reg < r32_pfic_fifoaddrr0 :: R32_PFIC_FIFOADDRR0_SPEC > ; # [doc = "Interrupt 0 address Register"]
  13195. pub mod r32_pfic_fifoaddrr0 { # [doc = "Register `R32_PFIC_FIFOADDRR0` reader"]
  13196. pub struct R (crate :: R < R32_PFIC_FIFOADDRR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR0_SPEC > ; # [inline (always)]
  13197. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR0_SPEC >> for R { # [inline (always)]
  13198. fn from (reader : crate :: R < R32_PFIC_FIFOADDRR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR0` writer"]
  13199. pub struct W (crate :: W < R32_PFIC_FIFOADDRR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR0_SPEC > ; # [inline (always)]
  13200. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13201. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR0_SPEC >> for W { # [inline (always)]
  13202. fn from (writer : crate :: W < R32_PFIC_FIFOADDRR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR0` reader - OFFADDR0"]
  13203. pub struct OFFADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR0_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13204. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR0` writer - OFFADDR0"]
  13205. pub struct OFFADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13206. # [inline (always)]
  13207. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID0` reader - IRQID0"]
  13208. pub struct IRQID0_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID0_R { pub (crate) fn new (bits : u8) -> Self { IRQID0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID0_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13209. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID0` writer - IRQID0"]
  13210. pub struct IRQID0_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13211. # [inline (always)]
  13212. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR0"]
  13213. # [inline (always)]
  13214. pub fn offaddr0 (& self) -> OFFADDR0_R { OFFADDR0_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID0"]
  13215. # [inline (always)]
  13216. pub fn irqid0 (& self) -> IRQID0_R { IRQID0_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR0"]
  13217. # [inline (always)]
  13218. pub fn offaddr0 (& mut self) -> OFFADDR0_W { OFFADDR0_W { w : self } } # [doc = "Bits 24:31 - IRQID0"]
  13219. # [inline (always)]
  13220. pub fn irqid0 (& mut self) -> IRQID0_W { IRQID0_W { w : self } } # [doc = "Writes raw bits to the register."]
  13221. # [inline (always)]
  13222. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 0 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr0](index.html) module"]
  13223. pub struct R32_PFIC_FIFOADDRR0_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr0::R](R) reader structure"]
  13224. impl crate :: Readable for R32_PFIC_FIFOADDRR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr0::W](W) writer structure"]
  13225. impl crate :: Writable for R32_PFIC_FIFOADDRR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR0 to value 0"]
  13226. impl crate :: Resettable for R32_PFIC_FIFOADDRR0_SPEC { # [inline (always)]
  13227. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR1 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR1_SPEC>`"]
  13228. pub type R32_PFIC_FIFOADDRR1 = crate :: Reg < r32_pfic_fifoaddrr1 :: R32_PFIC_FIFOADDRR1_SPEC > ; # [doc = "Interrupt 1 address Register"]
  13229. pub mod r32_pfic_fifoaddrr1 { # [doc = "Register `R32_PFIC_FIFOADDRR1` reader"]
  13230. pub struct R (crate :: R < R32_PFIC_FIFOADDRR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR1_SPEC > ; # [inline (always)]
  13231. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR1_SPEC >> for R { # [inline (always)]
  13232. fn from (reader : crate :: R < R32_PFIC_FIFOADDRR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR1` writer"]
  13233. pub struct W (crate :: W < R32_PFIC_FIFOADDRR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR1_SPEC > ; # [inline (always)]
  13234. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13235. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR1_SPEC >> for W { # [inline (always)]
  13236. fn from (writer : crate :: W < R32_PFIC_FIFOADDRR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR1` reader - OFFADDR1"]
  13237. pub struct OFFADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR1_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13238. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR1` writer - OFFADDR1"]
  13239. pub struct OFFADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13240. # [inline (always)]
  13241. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID1` reader - IRQID1"]
  13242. pub struct IRQID1_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID1_R { pub (crate) fn new (bits : u8) -> Self { IRQID1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13243. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID1` writer - IRQID1"]
  13244. pub struct IRQID1_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13245. # [inline (always)]
  13246. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR1"]
  13247. # [inline (always)]
  13248. pub fn offaddr1 (& self) -> OFFADDR1_R { OFFADDR1_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID1"]
  13249. # [inline (always)]
  13250. pub fn irqid1 (& self) -> IRQID1_R { IRQID1_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR1"]
  13251. # [inline (always)]
  13252. pub fn offaddr1 (& mut self) -> OFFADDR1_W { OFFADDR1_W { w : self } } # [doc = "Bits 24:31 - IRQID1"]
  13253. # [inline (always)]
  13254. pub fn irqid1 (& mut self) -> IRQID1_W { IRQID1_W { w : self } } # [doc = "Writes raw bits to the register."]
  13255. # [inline (always)]
  13256. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 1 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr1](index.html) module"]
  13257. pub struct R32_PFIC_FIFOADDRR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr1::R](R) reader structure"]
  13258. impl crate :: Readable for R32_PFIC_FIFOADDRR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr1::W](W) writer structure"]
  13259. impl crate :: Writable for R32_PFIC_FIFOADDRR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR1 to value 0"]
  13260. impl crate :: Resettable for R32_PFIC_FIFOADDRR1_SPEC { # [inline (always)]
  13261. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR2 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR2_SPEC>`"]
  13262. pub type R32_PFIC_FIFOADDRR2 = crate :: Reg < r32_pfic_fifoaddrr2 :: R32_PFIC_FIFOADDRR2_SPEC > ; # [doc = "Interrupt 2 address Register"]
  13263. pub mod r32_pfic_fifoaddrr2 { # [doc = "Register `R32_PFIC_FIFOADDRR2` reader"]
  13264. pub struct R (crate :: R < R32_PFIC_FIFOADDRR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR2_SPEC > ; # [inline (always)]
  13265. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR2_SPEC >> for R { # [inline (always)]
  13266. fn from (reader : crate :: R < R32_PFIC_FIFOADDRR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR2` writer"]
  13267. pub struct W (crate :: W < R32_PFIC_FIFOADDRR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR2_SPEC > ; # [inline (always)]
  13268. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13269. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR2_SPEC >> for W { # [inline (always)]
  13270. fn from (writer : crate :: W < R32_PFIC_FIFOADDRR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR2` reader - OFFADDR2"]
  13271. pub struct OFFADDR2_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR2_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13272. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR2` writer - OFFADDR2"]
  13273. pub struct OFFADDR2_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR2_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13274. # [inline (always)]
  13275. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID2` reader - IRQID2"]
  13276. pub struct IRQID2_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID2_R { pub (crate) fn new (bits : u8) -> Self { IRQID2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID2_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13277. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID2` writer - IRQID2"]
  13278. pub struct IRQID2_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID2_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13279. # [inline (always)]
  13280. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR2"]
  13281. # [inline (always)]
  13282. pub fn offaddr2 (& self) -> OFFADDR2_R { OFFADDR2_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID2"]
  13283. # [inline (always)]
  13284. pub fn irqid2 (& self) -> IRQID2_R { IRQID2_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR2"]
  13285. # [inline (always)]
  13286. pub fn offaddr2 (& mut self) -> OFFADDR2_W { OFFADDR2_W { w : self } } # [doc = "Bits 24:31 - IRQID2"]
  13287. # [inline (always)]
  13288. pub fn irqid2 (& mut self) -> IRQID2_W { IRQID2_W { w : self } } # [doc = "Writes raw bits to the register."]
  13289. # [inline (always)]
  13290. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 2 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr2](index.html) module"]
  13291. pub struct R32_PFIC_FIFOADDRR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr2::R](R) reader structure"]
  13292. impl crate :: Readable for R32_PFIC_FIFOADDRR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr2::W](W) writer structure"]
  13293. impl crate :: Writable for R32_PFIC_FIFOADDRR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR2 to value 0"]
  13294. impl crate :: Resettable for R32_PFIC_FIFOADDRR2_SPEC { # [inline (always)]
  13295. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR3 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR3_SPEC>`"]
  13296. pub type R32_PFIC_FIFOADDRR3 = crate :: Reg < r32_pfic_fifoaddrr3 :: R32_PFIC_FIFOADDRR3_SPEC > ; # [doc = "Interrupt 3 address Register"]
  13297. pub mod r32_pfic_fifoaddrr3 { # [doc = "Register `R32_PFIC_FIFOADDRR3` reader"]
  13298. pub struct R (crate :: R < R32_PFIC_FIFOADDRR3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR3_SPEC > ; # [inline (always)]
  13299. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR3_SPEC >> for R { # [inline (always)]
  13300. fn from (reader : crate :: R < R32_PFIC_FIFOADDRR3_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR3` writer"]
  13301. pub struct W (crate :: W < R32_PFIC_FIFOADDRR3_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR3_SPEC > ; # [inline (always)]
  13302. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13303. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR3_SPEC >> for W { # [inline (always)]
  13304. fn from (writer : crate :: W < R32_PFIC_FIFOADDRR3_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR3` reader - OFFADDR3"]
  13305. pub struct OFFADDR3_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR3_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13306. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR3` writer - OFFADDR3"]
  13307. pub struct OFFADDR3_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR3_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13308. # [inline (always)]
  13309. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID3` reader - IRQID3"]
  13310. pub struct IRQID3_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID3_R { pub (crate) fn new (bits : u8) -> Self { IRQID3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID3_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  13311. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID3` writer - IRQID3"]
  13312. pub struct IRQID3_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID3_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13313. # [inline (always)]
  13314. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR3"]
  13315. # [inline (always)]
  13316. pub fn offaddr3 (& self) -> OFFADDR3_R { OFFADDR3_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID3"]
  13317. # [inline (always)]
  13318. pub fn irqid3 (& self) -> IRQID3_R { IRQID3_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR3"]
  13319. # [inline (always)]
  13320. pub fn offaddr3 (& mut self) -> OFFADDR3_W { OFFADDR3_W { w : self } } # [doc = "Bits 24:31 - IRQID3"]
  13321. # [inline (always)]
  13322. pub fn irqid3 (& mut self) -> IRQID3_W { IRQID3_W { w : self } } # [doc = "Writes raw bits to the register."]
  13323. # [inline (always)]
  13324. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 3 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr3](index.html) module"]
  13325. pub struct R32_PFIC_FIFOADDRR3_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr3::R](R) reader structure"]
  13326. impl crate :: Readable for R32_PFIC_FIFOADDRR3_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr3::W](W) writer structure"]
  13327. impl crate :: Writable for R32_PFIC_FIFOADDRR3_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR3 to value 0"]
  13328. impl crate :: Resettable for R32_PFIC_FIFOADDRR3_SPEC { # [inline (always)]
  13329. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IENR1 register accessor: an alias for `Reg<R32_PFIC_IENR1_SPEC>`"]
  13330. pub type R32_PFIC_IENR1 = crate :: Reg < r32_pfic_ienr1 :: R32_PFIC_IENR1_SPEC > ; # [doc = "Interrupt Setting Register"]
  13331. pub mod r32_pfic_ienr1 { # [doc = "Register `R32_PFIC_IENR1` reader"]
  13332. pub struct R (crate :: R < R32_PFIC_IENR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IENR1_SPEC > ; # [inline (always)]
  13333. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IENR1_SPEC >> for R { # [inline (always)]
  13334. fn from (reader : crate :: R < R32_PFIC_IENR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IENR1` writer"]
  13335. pub struct W (crate :: W < R32_PFIC_IENR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IENR1_SPEC > ; # [inline (always)]
  13336. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13337. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IENR1_SPEC >> for W { # [inline (always)]
  13338. fn from (writer : crate :: W < R32_PFIC_IENR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTEN` reader - INTEN"]
  13339. pub struct INTEN_R (crate :: FieldReader < u32 , u32 >) ; impl INTEN_R { pub (crate) fn new (bits : u32) -> Self { INTEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13340. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTEN` writer - INTEN"]
  13341. pub struct INTEN_W < 'a > { w : & 'a mut W , } impl < 'a > INTEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13342. # [inline (always)]
  13343. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - INTEN"]
  13344. # [inline (always)]
  13345. pub fn inten (& self) -> INTEN_R { INTEN_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - INTEN"]
  13346. # [inline (always)]
  13347. pub fn inten (& mut self) -> INTEN_W { INTEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  13348. # [inline (always)]
  13349. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Setting Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ienr1](index.html) module"]
  13350. pub struct R32_PFIC_IENR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IENR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ienr1::R](R) reader structure"]
  13351. impl crate :: Readable for R32_PFIC_IENR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ienr1::W](W) writer structure"]
  13352. impl crate :: Writable for R32_PFIC_IENR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IENR1 to value 0"]
  13353. impl crate :: Resettable for R32_PFIC_IENR1_SPEC { # [inline (always)]
  13354. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IENR2 register accessor: an alias for `Reg<R32_PFIC_IENR2_SPEC>`"]
  13355. pub type R32_PFIC_IENR2 = crate :: Reg < r32_pfic_ienr2 :: R32_PFIC_IENR2_SPEC > ; # [doc = "Interrupt Setting Register"]
  13356. pub mod r32_pfic_ienr2 { # [doc = "Register `R32_PFIC_IENR2` reader"]
  13357. pub struct R (crate :: R < R32_PFIC_IENR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IENR2_SPEC > ; # [inline (always)]
  13358. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IENR2_SPEC >> for R { # [inline (always)]
  13359. fn from (reader : crate :: R < R32_PFIC_IENR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IENR2` writer"]
  13360. pub struct W (crate :: W < R32_PFIC_IENR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IENR2_SPEC > ; # [inline (always)]
  13361. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13362. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IENR2_SPEC >> for W { # [inline (always)]
  13363. fn from (writer : crate :: W < R32_PFIC_IENR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTEN` reader - INTEN"]
  13364. pub struct INTEN_R (crate :: FieldReader < u32 , u32 >) ; impl INTEN_R { pub (crate) fn new (bits : u32) -> Self { INTEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13365. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTEN` writer - INTEN"]
  13366. pub struct INTEN_W < 'a > { w : & 'a mut W , } impl < 'a > INTEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13367. # [inline (always)]
  13368. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - INTEN"]
  13369. # [inline (always)]
  13370. pub fn inten (& self) -> INTEN_R { INTEN_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - INTEN"]
  13371. # [inline (always)]
  13372. pub fn inten (& mut self) -> INTEN_W { INTEN_W { w : self } } # [doc = "Writes raw bits to the register."]
  13373. # [inline (always)]
  13374. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Setting Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ienr2](index.html) module"]
  13375. pub struct R32_PFIC_IENR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IENR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ienr2::R](R) reader structure"]
  13376. impl crate :: Readable for R32_PFIC_IENR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ienr2::W](W) writer structure"]
  13377. impl crate :: Writable for R32_PFIC_IENR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IENR2 to value 0"]
  13378. impl crate :: Resettable for R32_PFIC_IENR2_SPEC { # [inline (always)]
  13379. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IRER1 register accessor: an alias for `Reg<R32_PFIC_IRER1_SPEC>`"]
  13380. pub type R32_PFIC_IRER1 = crate :: Reg < r32_pfic_irer1 :: R32_PFIC_IRER1_SPEC > ; # [doc = "Interrupt Clear Register"]
  13381. pub mod r32_pfic_irer1 { # [doc = "Register `R32_PFIC_IRER1` reader"]
  13382. pub struct R (crate :: R < R32_PFIC_IRER1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IRER1_SPEC > ; # [inline (always)]
  13383. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IRER1_SPEC >> for R { # [inline (always)]
  13384. fn from (reader : crate :: R < R32_PFIC_IRER1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IRER1` writer"]
  13385. pub struct W (crate :: W < R32_PFIC_IRER1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IRER1_SPEC > ; # [inline (always)]
  13386. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13387. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IRER1_SPEC >> for W { # [inline (always)]
  13388. fn from (writer : crate :: W < R32_PFIC_IRER1_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTRESET` reader - INTRESET"]
  13389. pub struct INTRESET_R (crate :: FieldReader < u32 , u32 >) ; impl INTRESET_R { pub (crate) fn new (bits : u32) -> Self { INTRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13390. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTRESET` writer - INTRESET"]
  13391. pub struct INTRESET_W < 'a > { w : & 'a mut W , } impl < 'a > INTRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13392. # [inline (always)]
  13393. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - INTRESET"]
  13394. # [inline (always)]
  13395. pub fn intreset (& self) -> INTRESET_R { INTRESET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - INTRESET"]
  13396. # [inline (always)]
  13397. pub fn intreset (& mut self) -> INTRESET_W { INTRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13398. # [inline (always)]
  13399. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_irer1](index.html) module"]
  13400. pub struct R32_PFIC_IRER1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IRER1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_irer1::R](R) reader structure"]
  13401. impl crate :: Readable for R32_PFIC_IRER1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_irer1::W](W) writer structure"]
  13402. impl crate :: Writable for R32_PFIC_IRER1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IRER1 to value 0"]
  13403. impl crate :: Resettable for R32_PFIC_IRER1_SPEC { # [inline (always)]
  13404. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IRER2 register accessor: an alias for `Reg<R32_PFIC_IRER2_SPEC>`"]
  13405. pub type R32_PFIC_IRER2 = crate :: Reg < r32_pfic_irer2 :: R32_PFIC_IRER2_SPEC > ; # [doc = "Interrupt Clear Register"]
  13406. pub mod r32_pfic_irer2 { # [doc = "Register `R32_PFIC_IRER2` reader"]
  13407. pub struct R (crate :: R < R32_PFIC_IRER2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IRER2_SPEC > ; # [inline (always)]
  13408. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IRER2_SPEC >> for R { # [inline (always)]
  13409. fn from (reader : crate :: R < R32_PFIC_IRER2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IRER2` writer"]
  13410. pub struct W (crate :: W < R32_PFIC_IRER2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IRER2_SPEC > ; # [inline (always)]
  13411. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13412. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IRER2_SPEC >> for W { # [inline (always)]
  13413. fn from (writer : crate :: W < R32_PFIC_IRER2_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTRESET` reader - INTRESET"]
  13414. pub struct INTRESET_R (crate :: FieldReader < u32 , u32 >) ; impl INTRESET_R { pub (crate) fn new (bits : u32) -> Self { INTRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13415. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTRESET` writer - INTRESET"]
  13416. pub struct INTRESET_W < 'a > { w : & 'a mut W , } impl < 'a > INTRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13417. # [inline (always)]
  13418. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - INTRESET"]
  13419. # [inline (always)]
  13420. pub fn intreset (& self) -> INTRESET_R { INTRESET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - INTRESET"]
  13421. # [inline (always)]
  13422. pub fn intreset (& mut self) -> INTRESET_W { INTRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13423. # [inline (always)]
  13424. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_irer2](index.html) module"]
  13425. pub struct R32_PFIC_IRER2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IRER2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_irer2::R](R) reader structure"]
  13426. impl crate :: Readable for R32_PFIC_IRER2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_irer2::W](W) writer structure"]
  13427. impl crate :: Writable for R32_PFIC_IRER2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IRER2 to value 0"]
  13428. impl crate :: Resettable for R32_PFIC_IRER2_SPEC { # [inline (always)]
  13429. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPSR1 register accessor: an alias for `Reg<R32_PFIC_IPSR1_SPEC>`"]
  13430. pub type R32_PFIC_IPSR1 = crate :: Reg < r32_pfic_ipsr1 :: R32_PFIC_IPSR1_SPEC > ; # [doc = "Interrupt Pending Register"]
  13431. pub mod r32_pfic_ipsr1 { # [doc = "Register `R32_PFIC_IPSR1` reader"]
  13432. pub struct R (crate :: R < R32_PFIC_IPSR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPSR1_SPEC > ; # [inline (always)]
  13433. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPSR1_SPEC >> for R { # [inline (always)]
  13434. fn from (reader : crate :: R < R32_PFIC_IPSR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPSR1` writer"]
  13435. pub struct W (crate :: W < R32_PFIC_IPSR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPSR1_SPEC > ; # [inline (always)]
  13436. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13437. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPSR1_SPEC >> for W { # [inline (always)]
  13438. fn from (writer : crate :: W < R32_PFIC_IPSR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDSET` reader - PENDSET"]
  13439. pub struct PENDSET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSET_R { pub (crate) fn new (bits : u32) -> Self { PENDSET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13440. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDSET` writer - PENDSET"]
  13441. pub struct PENDSET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDSET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13442. # [inline (always)]
  13443. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - PENDSET"]
  13444. # [inline (always)]
  13445. pub fn pendset (& self) -> PENDSET_R { PENDSET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - PENDSET"]
  13446. # [inline (always)]
  13447. pub fn pendset (& mut self) -> PENDSET_W { PENDSET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13448. # [inline (always)]
  13449. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipsr1](index.html) module"]
  13450. pub struct R32_PFIC_IPSR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPSR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipsr1::R](R) reader structure"]
  13451. impl crate :: Readable for R32_PFIC_IPSR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ipsr1::W](W) writer structure"]
  13452. impl crate :: Writable for R32_PFIC_IPSR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPSR1 to value 0"]
  13453. impl crate :: Resettable for R32_PFIC_IPSR1_SPEC { # [inline (always)]
  13454. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPSR2 register accessor: an alias for `Reg<R32_PFIC_IPSR2_SPEC>`"]
  13455. pub type R32_PFIC_IPSR2 = crate :: Reg < r32_pfic_ipsr2 :: R32_PFIC_IPSR2_SPEC > ; # [doc = "Interrupt Pending Register"]
  13456. pub mod r32_pfic_ipsr2 { # [doc = "Register `R32_PFIC_IPSR2` reader"]
  13457. pub struct R (crate :: R < R32_PFIC_IPSR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPSR2_SPEC > ; # [inline (always)]
  13458. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPSR2_SPEC >> for R { # [inline (always)]
  13459. fn from (reader : crate :: R < R32_PFIC_IPSR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPSR2` writer"]
  13460. pub struct W (crate :: W < R32_PFIC_IPSR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPSR2_SPEC > ; # [inline (always)]
  13461. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13462. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPSR2_SPEC >> for W { # [inline (always)]
  13463. fn from (writer : crate :: W < R32_PFIC_IPSR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDSET` reader - PENDSET"]
  13464. pub struct PENDSET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSET_R { pub (crate) fn new (bits : u32) -> Self { PENDSET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13465. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDSET` writer - PENDSET"]
  13466. pub struct PENDSET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDSET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13467. # [inline (always)]
  13468. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - PENDSET"]
  13469. # [inline (always)]
  13470. pub fn pendset (& self) -> PENDSET_R { PENDSET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - PENDSET"]
  13471. # [inline (always)]
  13472. pub fn pendset (& mut self) -> PENDSET_W { PENDSET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13473. # [inline (always)]
  13474. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipsr2](index.html) module"]
  13475. pub struct R32_PFIC_IPSR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPSR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipsr2::R](R) reader structure"]
  13476. impl crate :: Readable for R32_PFIC_IPSR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ipsr2::W](W) writer structure"]
  13477. impl crate :: Writable for R32_PFIC_IPSR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPSR2 to value 0"]
  13478. impl crate :: Resettable for R32_PFIC_IPSR2_SPEC { # [inline (always)]
  13479. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRR1 register accessor: an alias for `Reg<R32_PFIC_IPRR1_SPEC>`"]
  13480. pub type R32_PFIC_IPRR1 = crate :: Reg < r32_pfic_iprr1 :: R32_PFIC_IPRR1_SPEC > ; # [doc = "Interrupt Pending Clear Register"]
  13481. pub mod r32_pfic_iprr1 { # [doc = "Register `R32_PFIC_IPRR1` reader"]
  13482. pub struct R (crate :: R < R32_PFIC_IPRR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRR1_SPEC > ; # [inline (always)]
  13483. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRR1_SPEC >> for R { # [inline (always)]
  13484. fn from (reader : crate :: R < R32_PFIC_IPRR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRR1` writer"]
  13485. pub struct W (crate :: W < R32_PFIC_IPRR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRR1_SPEC > ; # [inline (always)]
  13486. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13487. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRR1_SPEC >> for W { # [inline (always)]
  13488. fn from (writer : crate :: W < R32_PFIC_IPRR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDRESET` reader - PENDRESET"]
  13489. pub struct PENDRESET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDRESET_R { pub (crate) fn new (bits : u32) -> Self { PENDRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13490. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDRESET` writer - PENDRESET"]
  13491. pub struct PENDRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13492. # [inline (always)]
  13493. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - PENDRESET"]
  13494. # [inline (always)]
  13495. pub fn pendreset (& self) -> PENDRESET_R { PENDRESET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - PENDRESET"]
  13496. # [inline (always)]
  13497. pub fn pendreset (& mut self) -> PENDRESET_W { PENDRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13498. # [inline (always)]
  13499. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprr1](index.html) module"]
  13500. pub struct R32_PFIC_IPRR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprr1::R](R) reader structure"]
  13501. impl crate :: Readable for R32_PFIC_IPRR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprr1::W](W) writer structure"]
  13502. impl crate :: Writable for R32_PFIC_IPRR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRR1 to value 0"]
  13503. impl crate :: Resettable for R32_PFIC_IPRR1_SPEC { # [inline (always)]
  13504. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRR2 register accessor: an alias for `Reg<R32_PFIC_IPRR2_SPEC>`"]
  13505. pub type R32_PFIC_IPRR2 = crate :: Reg < r32_pfic_iprr2 :: R32_PFIC_IPRR2_SPEC > ; # [doc = "Interrupt Pending Clear Register"]
  13506. pub mod r32_pfic_iprr2 { # [doc = "Register `R32_PFIC_IPRR2` reader"]
  13507. pub struct R (crate :: R < R32_PFIC_IPRR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRR2_SPEC > ; # [inline (always)]
  13508. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRR2_SPEC >> for R { # [inline (always)]
  13509. fn from (reader : crate :: R < R32_PFIC_IPRR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRR2` writer"]
  13510. pub struct W (crate :: W < R32_PFIC_IPRR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRR2_SPEC > ; # [inline (always)]
  13511. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13512. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRR2_SPEC >> for W { # [inline (always)]
  13513. fn from (writer : crate :: W < R32_PFIC_IPRR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDRESET` reader - PENDRESET"]
  13514. pub struct PENDRESET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDRESET_R { pub (crate) fn new (bits : u32) -> Self { PENDRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13515. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDRESET` writer - PENDRESET"]
  13516. pub struct PENDRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13517. # [inline (always)]
  13518. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - PENDRESET"]
  13519. # [inline (always)]
  13520. pub fn pendreset (& self) -> PENDRESET_R { PENDRESET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - PENDRESET"]
  13521. # [inline (always)]
  13522. pub fn pendreset (& mut self) -> PENDRESET_W { PENDRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
  13523. # [inline (always)]
  13524. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprr2](index.html) module"]
  13525. pub struct R32_PFIC_IPRR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprr2::R](R) reader structure"]
  13526. impl crate :: Readable for R32_PFIC_IPRR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprr2::W](W) writer structure"]
  13527. impl crate :: Writable for R32_PFIC_IPRR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRR2 to value 0"]
  13528. impl crate :: Resettable for R32_PFIC_IPRR2_SPEC { # [inline (always)]
  13529. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IACTR1 register accessor: an alias for `Reg<R32_PFIC_IACTR1_SPEC>`"]
  13530. pub type R32_PFIC_IACTR1 = crate :: Reg < r32_pfic_iactr1 :: R32_PFIC_IACTR1_SPEC > ; # [doc = "Interrupt ACTIVE Register"]
  13531. pub mod r32_pfic_iactr1 { # [doc = "Register `R32_PFIC_IACTR1` reader"]
  13532. pub struct R (crate :: R < R32_PFIC_IACTR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IACTR1_SPEC > ; # [inline (always)]
  13533. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IACTR1_SPEC >> for R { # [inline (always)]
  13534. fn from (reader : crate :: R < R32_PFIC_IACTR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IACTR1` writer"]
  13535. pub struct W (crate :: W < R32_PFIC_IACTR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IACTR1_SPEC > ; # [inline (always)]
  13536. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13537. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IACTR1_SPEC >> for W { # [inline (always)]
  13538. fn from (writer : crate :: W < R32_PFIC_IACTR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `IACTS` reader - IACTS"]
  13539. pub struct IACTS_R (crate :: FieldReader < u32 , u32 >) ; impl IACTS_R { pub (crate) fn new (bits : u32) -> Self { IACTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IACTS_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13540. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IACTS` writer - IACTS"]
  13541. pub struct IACTS_W < 'a > { w : & 'a mut W , } impl < 'a > IACTS_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13542. # [inline (always)]
  13543. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - IACTS"]
  13544. # [inline (always)]
  13545. pub fn iacts (& self) -> IACTS_R { IACTS_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - IACTS"]
  13546. # [inline (always)]
  13547. pub fn iacts (& mut self) -> IACTS_W { IACTS_W { w : self } } # [doc = "Writes raw bits to the register."]
  13548. # [inline (always)]
  13549. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt ACTIVE Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iactr1](index.html) module"]
  13550. pub struct R32_PFIC_IACTR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IACTR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iactr1::R](R) reader structure"]
  13551. impl crate :: Readable for R32_PFIC_IACTR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iactr1::W](W) writer structure"]
  13552. impl crate :: Writable for R32_PFIC_IACTR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IACTR1 to value 0"]
  13553. impl crate :: Resettable for R32_PFIC_IACTR1_SPEC { # [inline (always)]
  13554. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IACTR2 register accessor: an alias for `Reg<R32_PFIC_IACTR2_SPEC>`"]
  13555. pub type R32_PFIC_IACTR2 = crate :: Reg < r32_pfic_iactr2 :: R32_PFIC_IACTR2_SPEC > ; # [doc = "Interrupt ACTIVE Register"]
  13556. pub mod r32_pfic_iactr2 { # [doc = "Register `R32_PFIC_IACTR2` reader"]
  13557. pub struct R (crate :: R < R32_PFIC_IACTR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IACTR2_SPEC > ; # [inline (always)]
  13558. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IACTR2_SPEC >> for R { # [inline (always)]
  13559. fn from (reader : crate :: R < R32_PFIC_IACTR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IACTR2` writer"]
  13560. pub struct W (crate :: W < R32_PFIC_IACTR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IACTR2_SPEC > ; # [inline (always)]
  13561. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13562. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IACTR2_SPEC >> for W { # [inline (always)]
  13563. fn from (writer : crate :: W < R32_PFIC_IACTR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `IACTS` reader - IACTS"]
  13564. pub struct IACTS_R (crate :: FieldReader < u32 , u32 >) ; impl IACTS_R { pub (crate) fn new (bits : u32) -> Self { IACTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IACTS_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13565. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IACTS` writer - IACTS"]
  13566. pub struct IACTS_W < 'a > { w : & 'a mut W , } impl < 'a > IACTS_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13567. # [inline (always)]
  13568. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - IACTS"]
  13569. # [inline (always)]
  13570. pub fn iacts (& self) -> IACTS_R { IACTS_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - IACTS"]
  13571. # [inline (always)]
  13572. pub fn iacts (& mut self) -> IACTS_W { IACTS_W { w : self } } # [doc = "Writes raw bits to the register."]
  13573. # [inline (always)]
  13574. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt ACTIVE Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iactr2](index.html) module"]
  13575. pub struct R32_PFIC_IACTR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IACTR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iactr2::R](R) reader structure"]
  13576. impl crate :: Readable for R32_PFIC_IACTR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iactr2::W](W) writer structure"]
  13577. impl crate :: Writable for R32_PFIC_IACTR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IACTR2 to value 0"]
  13578. impl crate :: Resettable for R32_PFIC_IACTR2_SPEC { # [inline (always)]
  13579. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR0 register accessor: an alias for `Reg<R32_PFIC_IPRIOR0_SPEC>`"]
  13580. pub type R32_PFIC_IPRIOR0 = crate :: Reg < r32_pfic_iprior0 :: R32_PFIC_IPRIOR0_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13581. pub mod r32_pfic_iprior0 { # [doc = "Register `R32_PFIC_IPRIOR0` reader"]
  13582. pub struct R (crate :: R < R32_PFIC_IPRIOR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR0_SPEC > ; # [inline (always)]
  13583. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR0_SPEC >> for R { # [inline (always)]
  13584. fn from (reader : crate :: R < R32_PFIC_IPRIOR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR0` writer"]
  13585. pub struct W (crate :: W < R32_PFIC_IPRIOR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR0_SPEC > ; # [inline (always)]
  13586. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13587. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR0_SPEC >> for W { # [inline (always)]
  13588. fn from (writer : crate :: W < R32_PFIC_IPRIOR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR0` reader - IPRIOR0"]
  13589. pub struct IPRIOR0_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR0_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13590. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR0` writer - IPRIOR0"]
  13591. pub struct IPRIOR0_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13592. # [inline (always)]
  13593. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR0"]
  13594. # [inline (always)]
  13595. pub fn iprior0 (& self) -> IPRIOR0_R { IPRIOR0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR0"]
  13596. # [inline (always)]
  13597. pub fn iprior0 (& mut self) -> IPRIOR0_W { IPRIOR0_W { w : self } } # [doc = "Writes raw bits to the register."]
  13598. # [inline (always)]
  13599. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior0](index.html) module"]
  13600. pub struct R32_PFIC_IPRIOR0_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior0::R](R) reader structure"]
  13601. impl crate :: Readable for R32_PFIC_IPRIOR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior0::W](W) writer structure"]
  13602. impl crate :: Writable for R32_PFIC_IPRIOR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR0 to value 0"]
  13603. impl crate :: Resettable for R32_PFIC_IPRIOR0_SPEC { # [inline (always)]
  13604. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR1 register accessor: an alias for `Reg<R32_PFIC_IPRIOR1_SPEC>`"]
  13605. pub type R32_PFIC_IPRIOR1 = crate :: Reg < r32_pfic_iprior1 :: R32_PFIC_IPRIOR1_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13606. pub mod r32_pfic_iprior1 { # [doc = "Register `R32_PFIC_IPRIOR1` reader"]
  13607. pub struct R (crate :: R < R32_PFIC_IPRIOR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR1_SPEC > ; # [inline (always)]
  13608. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR1_SPEC >> for R { # [inline (always)]
  13609. fn from (reader : crate :: R < R32_PFIC_IPRIOR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR1` writer"]
  13610. pub struct W (crate :: W < R32_PFIC_IPRIOR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR1_SPEC > ; # [inline (always)]
  13611. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13612. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR1_SPEC >> for W { # [inline (always)]
  13613. fn from (writer : crate :: W < R32_PFIC_IPRIOR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR1` reader - IPRIOR1"]
  13614. pub struct IPRIOR1_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR1_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13615. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR1` writer - IPRIOR1"]
  13616. pub struct IPRIOR1_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13617. # [inline (always)]
  13618. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR1"]
  13619. # [inline (always)]
  13620. pub fn iprior1 (& self) -> IPRIOR1_R { IPRIOR1_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR1"]
  13621. # [inline (always)]
  13622. pub fn iprior1 (& mut self) -> IPRIOR1_W { IPRIOR1_W { w : self } } # [doc = "Writes raw bits to the register."]
  13623. # [inline (always)]
  13624. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior1](index.html) module"]
  13625. pub struct R32_PFIC_IPRIOR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior1::R](R) reader structure"]
  13626. impl crate :: Readable for R32_PFIC_IPRIOR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior1::W](W) writer structure"]
  13627. impl crate :: Writable for R32_PFIC_IPRIOR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR1 to value 0"]
  13628. impl crate :: Resettable for R32_PFIC_IPRIOR1_SPEC { # [inline (always)]
  13629. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR2 register accessor: an alias for `Reg<R32_PFIC_IPRIOR2_SPEC>`"]
  13630. pub type R32_PFIC_IPRIOR2 = crate :: Reg < r32_pfic_iprior2 :: R32_PFIC_IPRIOR2_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13631. pub mod r32_pfic_iprior2 { # [doc = "Register `R32_PFIC_IPRIOR2` reader"]
  13632. pub struct R (crate :: R < R32_PFIC_IPRIOR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR2_SPEC > ; # [inline (always)]
  13633. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR2_SPEC >> for R { # [inline (always)]
  13634. fn from (reader : crate :: R < R32_PFIC_IPRIOR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR2` writer"]
  13635. pub struct W (crate :: W < R32_PFIC_IPRIOR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR2_SPEC > ; # [inline (always)]
  13636. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13637. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR2_SPEC >> for W { # [inline (always)]
  13638. fn from (writer : crate :: W < R32_PFIC_IPRIOR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR2` reader - IPRIOR2"]
  13639. pub struct IPRIOR2_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR2_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13640. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR2` writer - IPRIOR2"]
  13641. pub struct IPRIOR2_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR2_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13642. # [inline (always)]
  13643. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR2"]
  13644. # [inline (always)]
  13645. pub fn iprior2 (& self) -> IPRIOR2_R { IPRIOR2_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR2"]
  13646. # [inline (always)]
  13647. pub fn iprior2 (& mut self) -> IPRIOR2_W { IPRIOR2_W { w : self } } # [doc = "Writes raw bits to the register."]
  13648. # [inline (always)]
  13649. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior2](index.html) module"]
  13650. pub struct R32_PFIC_IPRIOR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior2::R](R) reader structure"]
  13651. impl crate :: Readable for R32_PFIC_IPRIOR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior2::W](W) writer structure"]
  13652. impl crate :: Writable for R32_PFIC_IPRIOR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR2 to value 0"]
  13653. impl crate :: Resettable for R32_PFIC_IPRIOR2_SPEC { # [inline (always)]
  13654. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR3 register accessor: an alias for `Reg<R32_PFIC_IPRIOR3_SPEC>`"]
  13655. pub type R32_PFIC_IPRIOR3 = crate :: Reg < r32_pfic_iprior3 :: R32_PFIC_IPRIOR3_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13656. pub mod r32_pfic_iprior3 { # [doc = "Register `R32_PFIC_IPRIOR3` reader"]
  13657. pub struct R (crate :: R < R32_PFIC_IPRIOR3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR3_SPEC > ; # [inline (always)]
  13658. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR3_SPEC >> for R { # [inline (always)]
  13659. fn from (reader : crate :: R < R32_PFIC_IPRIOR3_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR3` writer"]
  13660. pub struct W (crate :: W < R32_PFIC_IPRIOR3_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR3_SPEC > ; # [inline (always)]
  13661. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13662. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR3_SPEC >> for W { # [inline (always)]
  13663. fn from (writer : crate :: W < R32_PFIC_IPRIOR3_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR3` reader - IPRIOR3"]
  13664. pub struct IPRIOR3_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR3_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13665. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR3` writer - IPRIOR3"]
  13666. pub struct IPRIOR3_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR3_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13667. # [inline (always)]
  13668. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR3"]
  13669. # [inline (always)]
  13670. pub fn iprior3 (& self) -> IPRIOR3_R { IPRIOR3_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR3"]
  13671. # [inline (always)]
  13672. pub fn iprior3 (& mut self) -> IPRIOR3_W { IPRIOR3_W { w : self } } # [doc = "Writes raw bits to the register."]
  13673. # [inline (always)]
  13674. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior3](index.html) module"]
  13675. pub struct R32_PFIC_IPRIOR3_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior3::R](R) reader structure"]
  13676. impl crate :: Readable for R32_PFIC_IPRIOR3_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior3::W](W) writer structure"]
  13677. impl crate :: Writable for R32_PFIC_IPRIOR3_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR3 to value 0"]
  13678. impl crate :: Resettable for R32_PFIC_IPRIOR3_SPEC { # [inline (always)]
  13679. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR4 register accessor: an alias for `Reg<R32_PFIC_IPRIOR4_SPEC>`"]
  13680. pub type R32_PFIC_IPRIOR4 = crate :: Reg < r32_pfic_iprior4 :: R32_PFIC_IPRIOR4_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13681. pub mod r32_pfic_iprior4 { # [doc = "Register `R32_PFIC_IPRIOR4` reader"]
  13682. pub struct R (crate :: R < R32_PFIC_IPRIOR4_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR4_SPEC > ; # [inline (always)]
  13683. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR4_SPEC >> for R { # [inline (always)]
  13684. fn from (reader : crate :: R < R32_PFIC_IPRIOR4_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR4` writer"]
  13685. pub struct W (crate :: W < R32_PFIC_IPRIOR4_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR4_SPEC > ; # [inline (always)]
  13686. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13687. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR4_SPEC >> for W { # [inline (always)]
  13688. fn from (writer : crate :: W < R32_PFIC_IPRIOR4_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR4` reader - IPRIOR4"]
  13689. pub struct IPRIOR4_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR4_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR4_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR4_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13690. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR4` writer - IPRIOR4"]
  13691. pub struct IPRIOR4_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR4_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13692. # [inline (always)]
  13693. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR4"]
  13694. # [inline (always)]
  13695. pub fn iprior4 (& self) -> IPRIOR4_R { IPRIOR4_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR4"]
  13696. # [inline (always)]
  13697. pub fn iprior4 (& mut self) -> IPRIOR4_W { IPRIOR4_W { w : self } } # [doc = "Writes raw bits to the register."]
  13698. # [inline (always)]
  13699. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior4](index.html) module"]
  13700. pub struct R32_PFIC_IPRIOR4_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR4_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior4::R](R) reader structure"]
  13701. impl crate :: Readable for R32_PFIC_IPRIOR4_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior4::W](W) writer structure"]
  13702. impl crate :: Writable for R32_PFIC_IPRIOR4_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR4 to value 0"]
  13703. impl crate :: Resettable for R32_PFIC_IPRIOR4_SPEC { # [inline (always)]
  13704. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR5 register accessor: an alias for `Reg<R32_PFIC_IPRIOR5_SPEC>`"]
  13705. pub type R32_PFIC_IPRIOR5 = crate :: Reg < r32_pfic_iprior5 :: R32_PFIC_IPRIOR5_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13706. pub mod r32_pfic_iprior5 { # [doc = "Register `R32_PFIC_IPRIOR5` reader"]
  13707. pub struct R (crate :: R < R32_PFIC_IPRIOR5_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR5_SPEC > ; # [inline (always)]
  13708. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR5_SPEC >> for R { # [inline (always)]
  13709. fn from (reader : crate :: R < R32_PFIC_IPRIOR5_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR5` writer"]
  13710. pub struct W (crate :: W < R32_PFIC_IPRIOR5_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR5_SPEC > ; # [inline (always)]
  13711. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13712. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR5_SPEC >> for W { # [inline (always)]
  13713. fn from (writer : crate :: W < R32_PFIC_IPRIOR5_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR5` reader - IPRIOR5"]
  13714. pub struct IPRIOR5_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR5_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR5_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR5_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13715. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR5` writer - IPRIOR5"]
  13716. pub struct IPRIOR5_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR5_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13717. # [inline (always)]
  13718. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR5"]
  13719. # [inline (always)]
  13720. pub fn iprior5 (& self) -> IPRIOR5_R { IPRIOR5_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR5"]
  13721. # [inline (always)]
  13722. pub fn iprior5 (& mut self) -> IPRIOR5_W { IPRIOR5_W { w : self } } # [doc = "Writes raw bits to the register."]
  13723. # [inline (always)]
  13724. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior5](index.html) module"]
  13725. pub struct R32_PFIC_IPRIOR5_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR5_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior5::R](R) reader structure"]
  13726. impl crate :: Readable for R32_PFIC_IPRIOR5_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior5::W](W) writer structure"]
  13727. impl crate :: Writable for R32_PFIC_IPRIOR5_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR5 to value 0"]
  13728. impl crate :: Resettable for R32_PFIC_IPRIOR5_SPEC { # [inline (always)]
  13729. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR6 register accessor: an alias for `Reg<R32_PFIC_IPRIOR6_SPEC>`"]
  13730. pub type R32_PFIC_IPRIOR6 = crate :: Reg < r32_pfic_iprior6 :: R32_PFIC_IPRIOR6_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13731. pub mod r32_pfic_iprior6 { # [doc = "Register `R32_PFIC_IPRIOR6` reader"]
  13732. pub struct R (crate :: R < R32_PFIC_IPRIOR6_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR6_SPEC > ; # [inline (always)]
  13733. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR6_SPEC >> for R { # [inline (always)]
  13734. fn from (reader : crate :: R < R32_PFIC_IPRIOR6_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR6` writer"]
  13735. pub struct W (crate :: W < R32_PFIC_IPRIOR6_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR6_SPEC > ; # [inline (always)]
  13736. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13737. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR6_SPEC >> for W { # [inline (always)]
  13738. fn from (writer : crate :: W < R32_PFIC_IPRIOR6_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR6` reader - IPRIOR6"]
  13739. pub struct IPRIOR6_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR6_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR6_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR6_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13740. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR6` writer - IPRIOR6"]
  13741. pub struct IPRIOR6_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR6_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13742. # [inline (always)]
  13743. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR6"]
  13744. # [inline (always)]
  13745. pub fn iprior6 (& self) -> IPRIOR6_R { IPRIOR6_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR6"]
  13746. # [inline (always)]
  13747. pub fn iprior6 (& mut self) -> IPRIOR6_W { IPRIOR6_W { w : self } } # [doc = "Writes raw bits to the register."]
  13748. # [inline (always)]
  13749. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior6](index.html) module"]
  13750. pub struct R32_PFIC_IPRIOR6_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR6_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior6::R](R) reader structure"]
  13751. impl crate :: Readable for R32_PFIC_IPRIOR6_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior6::W](W) writer structure"]
  13752. impl crate :: Writable for R32_PFIC_IPRIOR6_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR6 to value 0"]
  13753. impl crate :: Resettable for R32_PFIC_IPRIOR6_SPEC { # [inline (always)]
  13754. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR7 register accessor: an alias for `Reg<R32_PFIC_IPRIOR7_SPEC>`"]
  13755. pub type R32_PFIC_IPRIOR7 = crate :: Reg < r32_pfic_iprior7 :: R32_PFIC_IPRIOR7_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13756. pub mod r32_pfic_iprior7 { # [doc = "Register `R32_PFIC_IPRIOR7` reader"]
  13757. pub struct R (crate :: R < R32_PFIC_IPRIOR7_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR7_SPEC > ; # [inline (always)]
  13758. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR7_SPEC >> for R { # [inline (always)]
  13759. fn from (reader : crate :: R < R32_PFIC_IPRIOR7_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR7` writer"]
  13760. pub struct W (crate :: W < R32_PFIC_IPRIOR7_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR7_SPEC > ; # [inline (always)]
  13761. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13762. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR7_SPEC >> for W { # [inline (always)]
  13763. fn from (writer : crate :: W < R32_PFIC_IPRIOR7_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR7` reader - IPRIOR7"]
  13764. pub struct IPRIOR7_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR7_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR7_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR7_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13765. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR7` writer - IPRIOR7"]
  13766. pub struct IPRIOR7_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR7_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13767. # [inline (always)]
  13768. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR7"]
  13769. # [inline (always)]
  13770. pub fn iprior7 (& self) -> IPRIOR7_R { IPRIOR7_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR7"]
  13771. # [inline (always)]
  13772. pub fn iprior7 (& mut self) -> IPRIOR7_W { IPRIOR7_W { w : self } } # [doc = "Writes raw bits to the register."]
  13773. # [inline (always)]
  13774. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior7](index.html) module"]
  13775. pub struct R32_PFIC_IPRIOR7_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR7_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior7::R](R) reader structure"]
  13776. impl crate :: Readable for R32_PFIC_IPRIOR7_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior7::W](W) writer structure"]
  13777. impl crate :: Writable for R32_PFIC_IPRIOR7_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR7 to value 0"]
  13778. impl crate :: Resettable for R32_PFIC_IPRIOR7_SPEC { # [inline (always)]
  13779. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR8 register accessor: an alias for `Reg<R32_PFIC_IPRIOR8_SPEC>`"]
  13780. pub type R32_PFIC_IPRIOR8 = crate :: Reg < r32_pfic_iprior8 :: R32_PFIC_IPRIOR8_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13781. pub mod r32_pfic_iprior8 { # [doc = "Register `R32_PFIC_IPRIOR8` reader"]
  13782. pub struct R (crate :: R < R32_PFIC_IPRIOR8_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR8_SPEC > ; # [inline (always)]
  13783. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR8_SPEC >> for R { # [inline (always)]
  13784. fn from (reader : crate :: R < R32_PFIC_IPRIOR8_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR8` writer"]
  13785. pub struct W (crate :: W < R32_PFIC_IPRIOR8_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR8_SPEC > ; # [inline (always)]
  13786. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13787. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR8_SPEC >> for W { # [inline (always)]
  13788. fn from (writer : crate :: W < R32_PFIC_IPRIOR8_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR8` reader - IPRIOR8"]
  13789. pub struct IPRIOR8_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR8_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR8_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR8_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13790. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR8` writer - IPRIOR8"]
  13791. pub struct IPRIOR8_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR8_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13792. # [inline (always)]
  13793. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR8"]
  13794. # [inline (always)]
  13795. pub fn iprior8 (& self) -> IPRIOR8_R { IPRIOR8_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR8"]
  13796. # [inline (always)]
  13797. pub fn iprior8 (& mut self) -> IPRIOR8_W { IPRIOR8_W { w : self } } # [doc = "Writes raw bits to the register."]
  13798. # [inline (always)]
  13799. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior8](index.html) module"]
  13800. pub struct R32_PFIC_IPRIOR8_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR8_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior8::R](R) reader structure"]
  13801. impl crate :: Readable for R32_PFIC_IPRIOR8_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior8::W](W) writer structure"]
  13802. impl crate :: Writable for R32_PFIC_IPRIOR8_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR8 to value 0"]
  13803. impl crate :: Resettable for R32_PFIC_IPRIOR8_SPEC { # [inline (always)]
  13804. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR9 register accessor: an alias for `Reg<R32_PFIC_IPRIOR9_SPEC>`"]
  13805. pub type R32_PFIC_IPRIOR9 = crate :: Reg < r32_pfic_iprior9 :: R32_PFIC_IPRIOR9_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13806. pub mod r32_pfic_iprior9 { # [doc = "Register `R32_PFIC_IPRIOR9` reader"]
  13807. pub struct R (crate :: R < R32_PFIC_IPRIOR9_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR9_SPEC > ; # [inline (always)]
  13808. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR9_SPEC >> for R { # [inline (always)]
  13809. fn from (reader : crate :: R < R32_PFIC_IPRIOR9_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR9` writer"]
  13810. pub struct W (crate :: W < R32_PFIC_IPRIOR9_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR9_SPEC > ; # [inline (always)]
  13811. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13812. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR9_SPEC >> for W { # [inline (always)]
  13813. fn from (writer : crate :: W < R32_PFIC_IPRIOR9_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR9` reader - IPRIOR9"]
  13814. pub struct IPRIOR9_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR9_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR9_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR9_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13815. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR9` writer - IPRIOR9"]
  13816. pub struct IPRIOR9_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR9_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13817. # [inline (always)]
  13818. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR9"]
  13819. # [inline (always)]
  13820. pub fn iprior9 (& self) -> IPRIOR9_R { IPRIOR9_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR9"]
  13821. # [inline (always)]
  13822. pub fn iprior9 (& mut self) -> IPRIOR9_W { IPRIOR9_W { w : self } } # [doc = "Writes raw bits to the register."]
  13823. # [inline (always)]
  13824. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior9](index.html) module"]
  13825. pub struct R32_PFIC_IPRIOR9_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR9_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior9::R](R) reader structure"]
  13826. impl crate :: Readable for R32_PFIC_IPRIOR9_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior9::W](W) writer structure"]
  13827. impl crate :: Writable for R32_PFIC_IPRIOR9_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR9 to value 0"]
  13828. impl crate :: Resettable for R32_PFIC_IPRIOR9_SPEC { # [inline (always)]
  13829. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR10 register accessor: an alias for `Reg<R32_PFIC_IPRIOR10_SPEC>`"]
  13830. pub type R32_PFIC_IPRIOR10 = crate :: Reg < r32_pfic_iprior10 :: R32_PFIC_IPRIOR10_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13831. pub mod r32_pfic_iprior10 { # [doc = "Register `R32_PFIC_IPRIOR10` reader"]
  13832. pub struct R (crate :: R < R32_PFIC_IPRIOR10_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR10_SPEC > ; # [inline (always)]
  13833. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR10_SPEC >> for R { # [inline (always)]
  13834. fn from (reader : crate :: R < R32_PFIC_IPRIOR10_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR10` writer"]
  13835. pub struct W (crate :: W < R32_PFIC_IPRIOR10_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR10_SPEC > ; # [inline (always)]
  13836. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13837. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR10_SPEC >> for W { # [inline (always)]
  13838. fn from (writer : crate :: W < R32_PFIC_IPRIOR10_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR10` reader - IPRIOR10"]
  13839. pub struct IPRIOR10_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR10_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR10_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR10_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13840. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR10` writer - IPRIOR10"]
  13841. pub struct IPRIOR10_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR10_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13842. # [inline (always)]
  13843. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR10"]
  13844. # [inline (always)]
  13845. pub fn iprior10 (& self) -> IPRIOR10_R { IPRIOR10_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR10"]
  13846. # [inline (always)]
  13847. pub fn iprior10 (& mut self) -> IPRIOR10_W { IPRIOR10_W { w : self } } # [doc = "Writes raw bits to the register."]
  13848. # [inline (always)]
  13849. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior10](index.html) module"]
  13850. pub struct R32_PFIC_IPRIOR10_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR10_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior10::R](R) reader structure"]
  13851. impl crate :: Readable for R32_PFIC_IPRIOR10_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior10::W](W) writer structure"]
  13852. impl crate :: Writable for R32_PFIC_IPRIOR10_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR10 to value 0"]
  13853. impl crate :: Resettable for R32_PFIC_IPRIOR10_SPEC { # [inline (always)]
  13854. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR11 register accessor: an alias for `Reg<R32_PFIC_IPRIOR11_SPEC>`"]
  13855. pub type R32_PFIC_IPRIOR11 = crate :: Reg < r32_pfic_iprior11 :: R32_PFIC_IPRIOR11_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13856. pub mod r32_pfic_iprior11 { # [doc = "Register `R32_PFIC_IPRIOR11` reader"]
  13857. pub struct R (crate :: R < R32_PFIC_IPRIOR11_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR11_SPEC > ; # [inline (always)]
  13858. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR11_SPEC >> for R { # [inline (always)]
  13859. fn from (reader : crate :: R < R32_PFIC_IPRIOR11_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR11` writer"]
  13860. pub struct W (crate :: W < R32_PFIC_IPRIOR11_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR11_SPEC > ; # [inline (always)]
  13861. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13862. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR11_SPEC >> for W { # [inline (always)]
  13863. fn from (writer : crate :: W < R32_PFIC_IPRIOR11_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR11` reader - IPRIOR11"]
  13864. pub struct IPRIOR11_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR11_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR11_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR11_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13865. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR11` writer - IPRIOR11"]
  13866. pub struct IPRIOR11_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR11_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13867. # [inline (always)]
  13868. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR11"]
  13869. # [inline (always)]
  13870. pub fn iprior11 (& self) -> IPRIOR11_R { IPRIOR11_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR11"]
  13871. # [inline (always)]
  13872. pub fn iprior11 (& mut self) -> IPRIOR11_W { IPRIOR11_W { w : self } } # [doc = "Writes raw bits to the register."]
  13873. # [inline (always)]
  13874. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior11](index.html) module"]
  13875. pub struct R32_PFIC_IPRIOR11_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR11_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior11::R](R) reader structure"]
  13876. impl crate :: Readable for R32_PFIC_IPRIOR11_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior11::W](W) writer structure"]
  13877. impl crate :: Writable for R32_PFIC_IPRIOR11_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR11 to value 0"]
  13878. impl crate :: Resettable for R32_PFIC_IPRIOR11_SPEC { # [inline (always)]
  13879. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR12 register accessor: an alias for `Reg<R32_PFIC_IPRIOR12_SPEC>`"]
  13880. pub type R32_PFIC_IPRIOR12 = crate :: Reg < r32_pfic_iprior12 :: R32_PFIC_IPRIOR12_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13881. pub mod r32_pfic_iprior12 { # [doc = "Register `R32_PFIC_IPRIOR12` reader"]
  13882. pub struct R (crate :: R < R32_PFIC_IPRIOR12_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR12_SPEC > ; # [inline (always)]
  13883. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR12_SPEC >> for R { # [inline (always)]
  13884. fn from (reader : crate :: R < R32_PFIC_IPRIOR12_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR12` writer"]
  13885. pub struct W (crate :: W < R32_PFIC_IPRIOR12_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR12_SPEC > ; # [inline (always)]
  13886. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13887. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR12_SPEC >> for W { # [inline (always)]
  13888. fn from (writer : crate :: W < R32_PFIC_IPRIOR12_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR12` reader - IPRIOR12"]
  13889. pub struct IPRIOR12_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR12_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR12_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR12_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13890. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR12` writer - IPRIOR12"]
  13891. pub struct IPRIOR12_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR12_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13892. # [inline (always)]
  13893. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR12"]
  13894. # [inline (always)]
  13895. pub fn iprior12 (& self) -> IPRIOR12_R { IPRIOR12_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR12"]
  13896. # [inline (always)]
  13897. pub fn iprior12 (& mut self) -> IPRIOR12_W { IPRIOR12_W { w : self } } # [doc = "Writes raw bits to the register."]
  13898. # [inline (always)]
  13899. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior12](index.html) module"]
  13900. pub struct R32_PFIC_IPRIOR12_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR12_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior12::R](R) reader structure"]
  13901. impl crate :: Readable for R32_PFIC_IPRIOR12_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior12::W](W) writer structure"]
  13902. impl crate :: Writable for R32_PFIC_IPRIOR12_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR12 to value 0"]
  13903. impl crate :: Resettable for R32_PFIC_IPRIOR12_SPEC { # [inline (always)]
  13904. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR13 register accessor: an alias for `Reg<R32_PFIC_IPRIOR13_SPEC>`"]
  13905. pub type R32_PFIC_IPRIOR13 = crate :: Reg < r32_pfic_iprior13 :: R32_PFIC_IPRIOR13_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13906. pub mod r32_pfic_iprior13 { # [doc = "Register `R32_PFIC_IPRIOR13` reader"]
  13907. pub struct R (crate :: R < R32_PFIC_IPRIOR13_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR13_SPEC > ; # [inline (always)]
  13908. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR13_SPEC >> for R { # [inline (always)]
  13909. fn from (reader : crate :: R < R32_PFIC_IPRIOR13_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR13` writer"]
  13910. pub struct W (crate :: W < R32_PFIC_IPRIOR13_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR13_SPEC > ; # [inline (always)]
  13911. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13912. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR13_SPEC >> for W { # [inline (always)]
  13913. fn from (writer : crate :: W < R32_PFIC_IPRIOR13_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR13` reader - IPRIOR13"]
  13914. pub struct IPRIOR13_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR13_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR13_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR13_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13915. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR13` writer - IPRIOR13"]
  13916. pub struct IPRIOR13_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR13_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13917. # [inline (always)]
  13918. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR13"]
  13919. # [inline (always)]
  13920. pub fn iprior13 (& self) -> IPRIOR13_R { IPRIOR13_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR13"]
  13921. # [inline (always)]
  13922. pub fn iprior13 (& mut self) -> IPRIOR13_W { IPRIOR13_W { w : self } } # [doc = "Writes raw bits to the register."]
  13923. # [inline (always)]
  13924. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior13](index.html) module"]
  13925. pub struct R32_PFIC_IPRIOR13_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR13_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior13::R](R) reader structure"]
  13926. impl crate :: Readable for R32_PFIC_IPRIOR13_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior13::W](W) writer structure"]
  13927. impl crate :: Writable for R32_PFIC_IPRIOR13_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR13 to value 0"]
  13928. impl crate :: Resettable for R32_PFIC_IPRIOR13_SPEC { # [inline (always)]
  13929. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR14 register accessor: an alias for `Reg<R32_PFIC_IPRIOR14_SPEC>`"]
  13930. pub type R32_PFIC_IPRIOR14 = crate :: Reg < r32_pfic_iprior14 :: R32_PFIC_IPRIOR14_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13931. pub mod r32_pfic_iprior14 { # [doc = "Register `R32_PFIC_IPRIOR14` reader"]
  13932. pub struct R (crate :: R < R32_PFIC_IPRIOR14_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR14_SPEC > ; # [inline (always)]
  13933. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR14_SPEC >> for R { # [inline (always)]
  13934. fn from (reader : crate :: R < R32_PFIC_IPRIOR14_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR14` writer"]
  13935. pub struct W (crate :: W < R32_PFIC_IPRIOR14_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR14_SPEC > ; # [inline (always)]
  13936. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13937. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR14_SPEC >> for W { # [inline (always)]
  13938. fn from (writer : crate :: W < R32_PFIC_IPRIOR14_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR14` reader - IPRIOR14"]
  13939. pub struct IPRIOR14_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR14_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR14_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR14_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13940. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR14` writer - IPRIOR14"]
  13941. pub struct IPRIOR14_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR14_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13942. # [inline (always)]
  13943. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR14"]
  13944. # [inline (always)]
  13945. pub fn iprior14 (& self) -> IPRIOR14_R { IPRIOR14_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR14"]
  13946. # [inline (always)]
  13947. pub fn iprior14 (& mut self) -> IPRIOR14_W { IPRIOR14_W { w : self } } # [doc = "Writes raw bits to the register."]
  13948. # [inline (always)]
  13949. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior14](index.html) module"]
  13950. pub struct R32_PFIC_IPRIOR14_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR14_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior14::R](R) reader structure"]
  13951. impl crate :: Readable for R32_PFIC_IPRIOR14_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior14::W](W) writer structure"]
  13952. impl crate :: Writable for R32_PFIC_IPRIOR14_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR14 to value 0"]
  13953. impl crate :: Resettable for R32_PFIC_IPRIOR14_SPEC { # [inline (always)]
  13954. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR15 register accessor: an alias for `Reg<R32_PFIC_IPRIOR15_SPEC>`"]
  13955. pub type R32_PFIC_IPRIOR15 = crate :: Reg < r32_pfic_iprior15 :: R32_PFIC_IPRIOR15_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13956. pub mod r32_pfic_iprior15 { # [doc = "Register `R32_PFIC_IPRIOR15` reader"]
  13957. pub struct R (crate :: R < R32_PFIC_IPRIOR15_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR15_SPEC > ; # [inline (always)]
  13958. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR15_SPEC >> for R { # [inline (always)]
  13959. fn from (reader : crate :: R < R32_PFIC_IPRIOR15_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR15` writer"]
  13960. pub struct W (crate :: W < R32_PFIC_IPRIOR15_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR15_SPEC > ; # [inline (always)]
  13961. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13962. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR15_SPEC >> for W { # [inline (always)]
  13963. fn from (writer : crate :: W < R32_PFIC_IPRIOR15_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR15` reader - IPRIOR15"]
  13964. pub struct IPRIOR15_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR15_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR15_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR15_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13965. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR15` writer - IPRIOR15"]
  13966. pub struct IPRIOR15_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR15_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13967. # [inline (always)]
  13968. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR15"]
  13969. # [inline (always)]
  13970. pub fn iprior15 (& self) -> IPRIOR15_R { IPRIOR15_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR15"]
  13971. # [inline (always)]
  13972. pub fn iprior15 (& mut self) -> IPRIOR15_W { IPRIOR15_W { w : self } } # [doc = "Writes raw bits to the register."]
  13973. # [inline (always)]
  13974. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior15](index.html) module"]
  13975. pub struct R32_PFIC_IPRIOR15_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR15_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior15::R](R) reader structure"]
  13976. impl crate :: Readable for R32_PFIC_IPRIOR15_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior15::W](W) writer structure"]
  13977. impl crate :: Writable for R32_PFIC_IPRIOR15_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR15 to value 0"]
  13978. impl crate :: Resettable for R32_PFIC_IPRIOR15_SPEC { # [inline (always)]
  13979. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR16 register accessor: an alias for `Reg<R32_PFIC_IPRIOR16_SPEC>`"]
  13980. pub type R32_PFIC_IPRIOR16 = crate :: Reg < r32_pfic_iprior16 :: R32_PFIC_IPRIOR16_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  13981. pub mod r32_pfic_iprior16 { # [doc = "Register `R32_PFIC_IPRIOR16` reader"]
  13982. pub struct R (crate :: R < R32_PFIC_IPRIOR16_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR16_SPEC > ; # [inline (always)]
  13983. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR16_SPEC >> for R { # [inline (always)]
  13984. fn from (reader : crate :: R < R32_PFIC_IPRIOR16_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR16` writer"]
  13985. pub struct W (crate :: W < R32_PFIC_IPRIOR16_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR16_SPEC > ; # [inline (always)]
  13986. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  13987. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR16_SPEC >> for W { # [inline (always)]
  13988. fn from (writer : crate :: W < R32_PFIC_IPRIOR16_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR16` reader - IPRIOR16"]
  13989. pub struct IPRIOR16_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR16_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR16_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR16_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  13990. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR16` writer - IPRIOR16"]
  13991. pub struct IPRIOR16_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR16_W < 'a > { # [doc = r"Writes raw bits to the field"]
  13992. # [inline (always)]
  13993. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR16"]
  13994. # [inline (always)]
  13995. pub fn iprior16 (& self) -> IPRIOR16_R { IPRIOR16_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR16"]
  13996. # [inline (always)]
  13997. pub fn iprior16 (& mut self) -> IPRIOR16_W { IPRIOR16_W { w : self } } # [doc = "Writes raw bits to the register."]
  13998. # [inline (always)]
  13999. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior16](index.html) module"]
  14000. pub struct R32_PFIC_IPRIOR16_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR16_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior16::R](R) reader structure"]
  14001. impl crate :: Readable for R32_PFIC_IPRIOR16_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior16::W](W) writer structure"]
  14002. impl crate :: Writable for R32_PFIC_IPRIOR16_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR16 to value 0"]
  14003. impl crate :: Resettable for R32_PFIC_IPRIOR16_SPEC { # [inline (always)]
  14004. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR17 register accessor: an alias for `Reg<R32_PFIC_IPRIOR17_SPEC>`"]
  14005. pub type R32_PFIC_IPRIOR17 = crate :: Reg < r32_pfic_iprior17 :: R32_PFIC_IPRIOR17_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14006. pub mod r32_pfic_iprior17 { # [doc = "Register `R32_PFIC_IPRIOR17` reader"]
  14007. pub struct R (crate :: R < R32_PFIC_IPRIOR17_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR17_SPEC > ; # [inline (always)]
  14008. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR17_SPEC >> for R { # [inline (always)]
  14009. fn from (reader : crate :: R < R32_PFIC_IPRIOR17_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR17` writer"]
  14010. pub struct W (crate :: W < R32_PFIC_IPRIOR17_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR17_SPEC > ; # [inline (always)]
  14011. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14012. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR17_SPEC >> for W { # [inline (always)]
  14013. fn from (writer : crate :: W < R32_PFIC_IPRIOR17_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR17` reader - IPRIOR17"]
  14014. pub struct IPRIOR17_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR17_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR17_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR17_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14015. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR17` writer - IPRIOR17"]
  14016. pub struct IPRIOR17_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR17_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14017. # [inline (always)]
  14018. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR17"]
  14019. # [inline (always)]
  14020. pub fn iprior17 (& self) -> IPRIOR17_R { IPRIOR17_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR17"]
  14021. # [inline (always)]
  14022. pub fn iprior17 (& mut self) -> IPRIOR17_W { IPRIOR17_W { w : self } } # [doc = "Writes raw bits to the register."]
  14023. # [inline (always)]
  14024. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior17](index.html) module"]
  14025. pub struct R32_PFIC_IPRIOR17_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR17_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior17::R](R) reader structure"]
  14026. impl crate :: Readable for R32_PFIC_IPRIOR17_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior17::W](W) writer structure"]
  14027. impl crate :: Writable for R32_PFIC_IPRIOR17_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR17 to value 0"]
  14028. impl crate :: Resettable for R32_PFIC_IPRIOR17_SPEC { # [inline (always)]
  14029. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR18 register accessor: an alias for `Reg<R32_PFIC_IPRIOR18_SPEC>`"]
  14030. pub type R32_PFIC_IPRIOR18 = crate :: Reg < r32_pfic_iprior18 :: R32_PFIC_IPRIOR18_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14031. pub mod r32_pfic_iprior18 { # [doc = "Register `R32_PFIC_IPRIOR18` reader"]
  14032. pub struct R (crate :: R < R32_PFIC_IPRIOR18_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR18_SPEC > ; # [inline (always)]
  14033. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR18_SPEC >> for R { # [inline (always)]
  14034. fn from (reader : crate :: R < R32_PFIC_IPRIOR18_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR18` writer"]
  14035. pub struct W (crate :: W < R32_PFIC_IPRIOR18_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR18_SPEC > ; # [inline (always)]
  14036. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14037. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR18_SPEC >> for W { # [inline (always)]
  14038. fn from (writer : crate :: W < R32_PFIC_IPRIOR18_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR18` reader - IPRIOR18"]
  14039. pub struct IPRIOR18_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR18_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR18_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR18_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14040. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR18` writer - IPRIOR18"]
  14041. pub struct IPRIOR18_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR18_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14042. # [inline (always)]
  14043. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR18"]
  14044. # [inline (always)]
  14045. pub fn iprior18 (& self) -> IPRIOR18_R { IPRIOR18_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR18"]
  14046. # [inline (always)]
  14047. pub fn iprior18 (& mut self) -> IPRIOR18_W { IPRIOR18_W { w : self } } # [doc = "Writes raw bits to the register."]
  14048. # [inline (always)]
  14049. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior18](index.html) module"]
  14050. pub struct R32_PFIC_IPRIOR18_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR18_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior18::R](R) reader structure"]
  14051. impl crate :: Readable for R32_PFIC_IPRIOR18_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior18::W](W) writer structure"]
  14052. impl crate :: Writable for R32_PFIC_IPRIOR18_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR18 to value 0"]
  14053. impl crate :: Resettable for R32_PFIC_IPRIOR18_SPEC { # [inline (always)]
  14054. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR19 register accessor: an alias for `Reg<R32_PFIC_IPRIOR19_SPEC>`"]
  14055. pub type R32_PFIC_IPRIOR19 = crate :: Reg < r32_pfic_iprior19 :: R32_PFIC_IPRIOR19_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14056. pub mod r32_pfic_iprior19 { # [doc = "Register `R32_PFIC_IPRIOR19` reader"]
  14057. pub struct R (crate :: R < R32_PFIC_IPRIOR19_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR19_SPEC > ; # [inline (always)]
  14058. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR19_SPEC >> for R { # [inline (always)]
  14059. fn from (reader : crate :: R < R32_PFIC_IPRIOR19_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR19` writer"]
  14060. pub struct W (crate :: W < R32_PFIC_IPRIOR19_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR19_SPEC > ; # [inline (always)]
  14061. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14062. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR19_SPEC >> for W { # [inline (always)]
  14063. fn from (writer : crate :: W < R32_PFIC_IPRIOR19_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR19` reader - IPRIOR19"]
  14064. pub struct IPRIOR19_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR19_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR19_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR19_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14065. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR19` writer - IPRIOR19"]
  14066. pub struct IPRIOR19_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR19_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14067. # [inline (always)]
  14068. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR19"]
  14069. # [inline (always)]
  14070. pub fn iprior19 (& self) -> IPRIOR19_R { IPRIOR19_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR19"]
  14071. # [inline (always)]
  14072. pub fn iprior19 (& mut self) -> IPRIOR19_W { IPRIOR19_W { w : self } } # [doc = "Writes raw bits to the register."]
  14073. # [inline (always)]
  14074. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior19](index.html) module"]
  14075. pub struct R32_PFIC_IPRIOR19_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR19_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior19::R](R) reader structure"]
  14076. impl crate :: Readable for R32_PFIC_IPRIOR19_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior19::W](W) writer structure"]
  14077. impl crate :: Writable for R32_PFIC_IPRIOR19_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR19 to value 0"]
  14078. impl crate :: Resettable for R32_PFIC_IPRIOR19_SPEC { # [inline (always)]
  14079. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR20 register accessor: an alias for `Reg<R32_PFIC_IPRIOR20_SPEC>`"]
  14080. pub type R32_PFIC_IPRIOR20 = crate :: Reg < r32_pfic_iprior20 :: R32_PFIC_IPRIOR20_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14081. pub mod r32_pfic_iprior20 { # [doc = "Register `R32_PFIC_IPRIOR20` reader"]
  14082. pub struct R (crate :: R < R32_PFIC_IPRIOR20_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR20_SPEC > ; # [inline (always)]
  14083. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR20_SPEC >> for R { # [inline (always)]
  14084. fn from (reader : crate :: R < R32_PFIC_IPRIOR20_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR20` writer"]
  14085. pub struct W (crate :: W < R32_PFIC_IPRIOR20_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR20_SPEC > ; # [inline (always)]
  14086. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14087. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR20_SPEC >> for W { # [inline (always)]
  14088. fn from (writer : crate :: W < R32_PFIC_IPRIOR20_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR20` reader - IPRIOR20"]
  14089. pub struct IPRIOR20_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR20_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR20_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR20_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14090. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR20` writer - IPRIOR20"]
  14091. pub struct IPRIOR20_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR20_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14092. # [inline (always)]
  14093. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR20"]
  14094. # [inline (always)]
  14095. pub fn iprior20 (& self) -> IPRIOR20_R { IPRIOR20_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR20"]
  14096. # [inline (always)]
  14097. pub fn iprior20 (& mut self) -> IPRIOR20_W { IPRIOR20_W { w : self } } # [doc = "Writes raw bits to the register."]
  14098. # [inline (always)]
  14099. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior20](index.html) module"]
  14100. pub struct R32_PFIC_IPRIOR20_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR20_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior20::R](R) reader structure"]
  14101. impl crate :: Readable for R32_PFIC_IPRIOR20_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior20::W](W) writer structure"]
  14102. impl crate :: Writable for R32_PFIC_IPRIOR20_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR20 to value 0"]
  14103. impl crate :: Resettable for R32_PFIC_IPRIOR20_SPEC { # [inline (always)]
  14104. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR21 register accessor: an alias for `Reg<R32_PFIC_IPRIOR21_SPEC>`"]
  14105. pub type R32_PFIC_IPRIOR21 = crate :: Reg < r32_pfic_iprior21 :: R32_PFIC_IPRIOR21_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14106. pub mod r32_pfic_iprior21 { # [doc = "Register `R32_PFIC_IPRIOR21` reader"]
  14107. pub struct R (crate :: R < R32_PFIC_IPRIOR21_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR21_SPEC > ; # [inline (always)]
  14108. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR21_SPEC >> for R { # [inline (always)]
  14109. fn from (reader : crate :: R < R32_PFIC_IPRIOR21_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR21` writer"]
  14110. pub struct W (crate :: W < R32_PFIC_IPRIOR21_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR21_SPEC > ; # [inline (always)]
  14111. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14112. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR21_SPEC >> for W { # [inline (always)]
  14113. fn from (writer : crate :: W < R32_PFIC_IPRIOR21_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR21` reader - IPRIOR21"]
  14114. pub struct IPRIOR21_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR21_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR21_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR21_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14115. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR21` writer - IPRIOR21"]
  14116. pub struct IPRIOR21_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR21_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14117. # [inline (always)]
  14118. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR21"]
  14119. # [inline (always)]
  14120. pub fn iprior21 (& self) -> IPRIOR21_R { IPRIOR21_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR21"]
  14121. # [inline (always)]
  14122. pub fn iprior21 (& mut self) -> IPRIOR21_W { IPRIOR21_W { w : self } } # [doc = "Writes raw bits to the register."]
  14123. # [inline (always)]
  14124. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior21](index.html) module"]
  14125. pub struct R32_PFIC_IPRIOR21_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR21_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior21::R](R) reader structure"]
  14126. impl crate :: Readable for R32_PFIC_IPRIOR21_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior21::W](W) writer structure"]
  14127. impl crate :: Writable for R32_PFIC_IPRIOR21_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR21 to value 0"]
  14128. impl crate :: Resettable for R32_PFIC_IPRIOR21_SPEC { # [inline (always)]
  14129. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR22 register accessor: an alias for `Reg<R32_PFIC_IPRIOR22_SPEC>`"]
  14130. pub type R32_PFIC_IPRIOR22 = crate :: Reg < r32_pfic_iprior22 :: R32_PFIC_IPRIOR22_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14131. pub mod r32_pfic_iprior22 { # [doc = "Register `R32_PFIC_IPRIOR22` reader"]
  14132. pub struct R (crate :: R < R32_PFIC_IPRIOR22_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR22_SPEC > ; # [inline (always)]
  14133. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR22_SPEC >> for R { # [inline (always)]
  14134. fn from (reader : crate :: R < R32_PFIC_IPRIOR22_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR22` writer"]
  14135. pub struct W (crate :: W < R32_PFIC_IPRIOR22_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR22_SPEC > ; # [inline (always)]
  14136. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14137. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR22_SPEC >> for W { # [inline (always)]
  14138. fn from (writer : crate :: W < R32_PFIC_IPRIOR22_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR22` reader - IPRIOR22"]
  14139. pub struct IPRIOR22_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR22_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR22_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR22_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14140. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR22` writer - IPRIOR22"]
  14141. pub struct IPRIOR22_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR22_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14142. # [inline (always)]
  14143. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR22"]
  14144. # [inline (always)]
  14145. pub fn iprior22 (& self) -> IPRIOR22_R { IPRIOR22_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR22"]
  14146. # [inline (always)]
  14147. pub fn iprior22 (& mut self) -> IPRIOR22_W { IPRIOR22_W { w : self } } # [doc = "Writes raw bits to the register."]
  14148. # [inline (always)]
  14149. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior22](index.html) module"]
  14150. pub struct R32_PFIC_IPRIOR22_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR22_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior22::R](R) reader structure"]
  14151. impl crate :: Readable for R32_PFIC_IPRIOR22_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior22::W](W) writer structure"]
  14152. impl crate :: Writable for R32_PFIC_IPRIOR22_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR22 to value 0"]
  14153. impl crate :: Resettable for R32_PFIC_IPRIOR22_SPEC { # [inline (always)]
  14154. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR23 register accessor: an alias for `Reg<R32_PFIC_IPRIOR23_SPEC>`"]
  14155. pub type R32_PFIC_IPRIOR23 = crate :: Reg < r32_pfic_iprior23 :: R32_PFIC_IPRIOR23_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14156. pub mod r32_pfic_iprior23 { # [doc = "Register `R32_PFIC_IPRIOR23` reader"]
  14157. pub struct R (crate :: R < R32_PFIC_IPRIOR23_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR23_SPEC > ; # [inline (always)]
  14158. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR23_SPEC >> for R { # [inline (always)]
  14159. fn from (reader : crate :: R < R32_PFIC_IPRIOR23_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR23` writer"]
  14160. pub struct W (crate :: W < R32_PFIC_IPRIOR23_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR23_SPEC > ; # [inline (always)]
  14161. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14162. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR23_SPEC >> for W { # [inline (always)]
  14163. fn from (writer : crate :: W < R32_PFIC_IPRIOR23_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR23` reader - IPRIOR23"]
  14164. pub struct IPRIOR23_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR23_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR23_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR23_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14165. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR23` writer - IPRIOR23"]
  14166. pub struct IPRIOR23_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR23_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14167. # [inline (always)]
  14168. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR23"]
  14169. # [inline (always)]
  14170. pub fn iprior23 (& self) -> IPRIOR23_R { IPRIOR23_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR23"]
  14171. # [inline (always)]
  14172. pub fn iprior23 (& mut self) -> IPRIOR23_W { IPRIOR23_W { w : self } } # [doc = "Writes raw bits to the register."]
  14173. # [inline (always)]
  14174. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior23](index.html) module"]
  14175. pub struct R32_PFIC_IPRIOR23_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR23_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior23::R](R) reader structure"]
  14176. impl crate :: Readable for R32_PFIC_IPRIOR23_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior23::W](W) writer structure"]
  14177. impl crate :: Writable for R32_PFIC_IPRIOR23_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR23 to value 0"]
  14178. impl crate :: Resettable for R32_PFIC_IPRIOR23_SPEC { # [inline (always)]
  14179. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR24 register accessor: an alias for `Reg<R32_PFIC_IPRIOR24_SPEC>`"]
  14180. pub type R32_PFIC_IPRIOR24 = crate :: Reg < r32_pfic_iprior24 :: R32_PFIC_IPRIOR24_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14181. pub mod r32_pfic_iprior24 { # [doc = "Register `R32_PFIC_IPRIOR24` reader"]
  14182. pub struct R (crate :: R < R32_PFIC_IPRIOR24_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR24_SPEC > ; # [inline (always)]
  14183. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR24_SPEC >> for R { # [inline (always)]
  14184. fn from (reader : crate :: R < R32_PFIC_IPRIOR24_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR24` writer"]
  14185. pub struct W (crate :: W < R32_PFIC_IPRIOR24_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR24_SPEC > ; # [inline (always)]
  14186. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14187. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR24_SPEC >> for W { # [inline (always)]
  14188. fn from (writer : crate :: W < R32_PFIC_IPRIOR24_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR24` reader - IPRIOR24"]
  14189. pub struct IPRIOR24_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR24_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR24_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR24_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14190. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR24` writer - IPRIOR24"]
  14191. pub struct IPRIOR24_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR24_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14192. # [inline (always)]
  14193. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR24"]
  14194. # [inline (always)]
  14195. pub fn iprior24 (& self) -> IPRIOR24_R { IPRIOR24_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR24"]
  14196. # [inline (always)]
  14197. pub fn iprior24 (& mut self) -> IPRIOR24_W { IPRIOR24_W { w : self } } # [doc = "Writes raw bits to the register."]
  14198. # [inline (always)]
  14199. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior24](index.html) module"]
  14200. pub struct R32_PFIC_IPRIOR24_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR24_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior24::R](R) reader structure"]
  14201. impl crate :: Readable for R32_PFIC_IPRIOR24_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior24::W](W) writer structure"]
  14202. impl crate :: Writable for R32_PFIC_IPRIOR24_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR24 to value 0"]
  14203. impl crate :: Resettable for R32_PFIC_IPRIOR24_SPEC { # [inline (always)]
  14204. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR25 register accessor: an alias for `Reg<R32_PFIC_IPRIOR25_SPEC>`"]
  14205. pub type R32_PFIC_IPRIOR25 = crate :: Reg < r32_pfic_iprior25 :: R32_PFIC_IPRIOR25_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14206. pub mod r32_pfic_iprior25 { # [doc = "Register `R32_PFIC_IPRIOR25` reader"]
  14207. pub struct R (crate :: R < R32_PFIC_IPRIOR25_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR25_SPEC > ; # [inline (always)]
  14208. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR25_SPEC >> for R { # [inline (always)]
  14209. fn from (reader : crate :: R < R32_PFIC_IPRIOR25_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR25` writer"]
  14210. pub struct W (crate :: W < R32_PFIC_IPRIOR25_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR25_SPEC > ; # [inline (always)]
  14211. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14212. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR25_SPEC >> for W { # [inline (always)]
  14213. fn from (writer : crate :: W < R32_PFIC_IPRIOR25_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR25` reader - IPRIOR25"]
  14214. pub struct IPRIOR25_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR25_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR25_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR25_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14215. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR25` writer - IPRIOR25"]
  14216. pub struct IPRIOR25_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR25_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14217. # [inline (always)]
  14218. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR25"]
  14219. # [inline (always)]
  14220. pub fn iprior25 (& self) -> IPRIOR25_R { IPRIOR25_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR25"]
  14221. # [inline (always)]
  14222. pub fn iprior25 (& mut self) -> IPRIOR25_W { IPRIOR25_W { w : self } } # [doc = "Writes raw bits to the register."]
  14223. # [inline (always)]
  14224. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior25](index.html) module"]
  14225. pub struct R32_PFIC_IPRIOR25_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR25_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior25::R](R) reader structure"]
  14226. impl crate :: Readable for R32_PFIC_IPRIOR25_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior25::W](W) writer structure"]
  14227. impl crate :: Writable for R32_PFIC_IPRIOR25_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR25 to value 0"]
  14228. impl crate :: Resettable for R32_PFIC_IPRIOR25_SPEC { # [inline (always)]
  14229. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR26 register accessor: an alias for `Reg<R32_PFIC_IPRIOR26_SPEC>`"]
  14230. pub type R32_PFIC_IPRIOR26 = crate :: Reg < r32_pfic_iprior26 :: R32_PFIC_IPRIOR26_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14231. pub mod r32_pfic_iprior26 { # [doc = "Register `R32_PFIC_IPRIOR26` reader"]
  14232. pub struct R (crate :: R < R32_PFIC_IPRIOR26_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR26_SPEC > ; # [inline (always)]
  14233. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR26_SPEC >> for R { # [inline (always)]
  14234. fn from (reader : crate :: R < R32_PFIC_IPRIOR26_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR26` writer"]
  14235. pub struct W (crate :: W < R32_PFIC_IPRIOR26_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR26_SPEC > ; # [inline (always)]
  14236. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14237. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR26_SPEC >> for W { # [inline (always)]
  14238. fn from (writer : crate :: W < R32_PFIC_IPRIOR26_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR26` reader - IPRIOR26"]
  14239. pub struct IPRIOR26_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR26_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR26_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR26_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14240. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR26` writer - IPRIOR26"]
  14241. pub struct IPRIOR26_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR26_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14242. # [inline (always)]
  14243. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR26"]
  14244. # [inline (always)]
  14245. pub fn iprior26 (& self) -> IPRIOR26_R { IPRIOR26_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR26"]
  14246. # [inline (always)]
  14247. pub fn iprior26 (& mut self) -> IPRIOR26_W { IPRIOR26_W { w : self } } # [doc = "Writes raw bits to the register."]
  14248. # [inline (always)]
  14249. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior26](index.html) module"]
  14250. pub struct R32_PFIC_IPRIOR26_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR26_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior26::R](R) reader structure"]
  14251. impl crate :: Readable for R32_PFIC_IPRIOR26_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior26::W](W) writer structure"]
  14252. impl crate :: Writable for R32_PFIC_IPRIOR26_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR26 to value 0"]
  14253. impl crate :: Resettable for R32_PFIC_IPRIOR26_SPEC { # [inline (always)]
  14254. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR27 register accessor: an alias for `Reg<R32_PFIC_IPRIOR27_SPEC>`"]
  14255. pub type R32_PFIC_IPRIOR27 = crate :: Reg < r32_pfic_iprior27 :: R32_PFIC_IPRIOR27_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14256. pub mod r32_pfic_iprior27 { # [doc = "Register `R32_PFIC_IPRIOR27` reader"]
  14257. pub struct R (crate :: R < R32_PFIC_IPRIOR27_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR27_SPEC > ; # [inline (always)]
  14258. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR27_SPEC >> for R { # [inline (always)]
  14259. fn from (reader : crate :: R < R32_PFIC_IPRIOR27_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR27` writer"]
  14260. pub struct W (crate :: W < R32_PFIC_IPRIOR27_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR27_SPEC > ; # [inline (always)]
  14261. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14262. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR27_SPEC >> for W { # [inline (always)]
  14263. fn from (writer : crate :: W < R32_PFIC_IPRIOR27_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR27` reader - IPRIOR27"]
  14264. pub struct IPRIOR27_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR27_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR27_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR27_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14265. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR27` writer - IPRIOR27"]
  14266. pub struct IPRIOR27_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR27_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14267. # [inline (always)]
  14268. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR27"]
  14269. # [inline (always)]
  14270. pub fn iprior27 (& self) -> IPRIOR27_R { IPRIOR27_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR27"]
  14271. # [inline (always)]
  14272. pub fn iprior27 (& mut self) -> IPRIOR27_W { IPRIOR27_W { w : self } } # [doc = "Writes raw bits to the register."]
  14273. # [inline (always)]
  14274. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior27](index.html) module"]
  14275. pub struct R32_PFIC_IPRIOR27_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR27_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior27::R](R) reader structure"]
  14276. impl crate :: Readable for R32_PFIC_IPRIOR27_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior27::W](W) writer structure"]
  14277. impl crate :: Writable for R32_PFIC_IPRIOR27_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR27 to value 0"]
  14278. impl crate :: Resettable for R32_PFIC_IPRIOR27_SPEC { # [inline (always)]
  14279. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR28 register accessor: an alias for `Reg<R32_PFIC_IPRIOR28_SPEC>`"]
  14280. pub type R32_PFIC_IPRIOR28 = crate :: Reg < r32_pfic_iprior28 :: R32_PFIC_IPRIOR28_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14281. pub mod r32_pfic_iprior28 { # [doc = "Register `R32_PFIC_IPRIOR28` reader"]
  14282. pub struct R (crate :: R < R32_PFIC_IPRIOR28_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR28_SPEC > ; # [inline (always)]
  14283. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR28_SPEC >> for R { # [inline (always)]
  14284. fn from (reader : crate :: R < R32_PFIC_IPRIOR28_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR28` writer"]
  14285. pub struct W (crate :: W < R32_PFIC_IPRIOR28_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR28_SPEC > ; # [inline (always)]
  14286. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14287. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR28_SPEC >> for W { # [inline (always)]
  14288. fn from (writer : crate :: W < R32_PFIC_IPRIOR28_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR28` reader - IPRIOR28"]
  14289. pub struct IPRIOR28_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR28_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR28_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR28_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14290. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR28` writer - IPRIOR28"]
  14291. pub struct IPRIOR28_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR28_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14292. # [inline (always)]
  14293. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR28"]
  14294. # [inline (always)]
  14295. pub fn iprior28 (& self) -> IPRIOR28_R { IPRIOR28_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR28"]
  14296. # [inline (always)]
  14297. pub fn iprior28 (& mut self) -> IPRIOR28_W { IPRIOR28_W { w : self } } # [doc = "Writes raw bits to the register."]
  14298. # [inline (always)]
  14299. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior28](index.html) module"]
  14300. pub struct R32_PFIC_IPRIOR28_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR28_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior28::R](R) reader structure"]
  14301. impl crate :: Readable for R32_PFIC_IPRIOR28_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior28::W](W) writer structure"]
  14302. impl crate :: Writable for R32_PFIC_IPRIOR28_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR28 to value 0"]
  14303. impl crate :: Resettable for R32_PFIC_IPRIOR28_SPEC { # [inline (always)]
  14304. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR29 register accessor: an alias for `Reg<R32_PFIC_IPRIOR29_SPEC>`"]
  14305. pub type R32_PFIC_IPRIOR29 = crate :: Reg < r32_pfic_iprior29 :: R32_PFIC_IPRIOR29_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14306. pub mod r32_pfic_iprior29 { # [doc = "Register `R32_PFIC_IPRIOR29` reader"]
  14307. pub struct R (crate :: R < R32_PFIC_IPRIOR29_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR29_SPEC > ; # [inline (always)]
  14308. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR29_SPEC >> for R { # [inline (always)]
  14309. fn from (reader : crate :: R < R32_PFIC_IPRIOR29_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR29` writer"]
  14310. pub struct W (crate :: W < R32_PFIC_IPRIOR29_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR29_SPEC > ; # [inline (always)]
  14311. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14312. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR29_SPEC >> for W { # [inline (always)]
  14313. fn from (writer : crate :: W < R32_PFIC_IPRIOR29_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR29` reader - IPRIOR29"]
  14314. pub struct IPRIOR29_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR29_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR29_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR29_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14315. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR29` writer - IPRIOR29"]
  14316. pub struct IPRIOR29_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR29_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14317. # [inline (always)]
  14318. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR29"]
  14319. # [inline (always)]
  14320. pub fn iprior29 (& self) -> IPRIOR29_R { IPRIOR29_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR29"]
  14321. # [inline (always)]
  14322. pub fn iprior29 (& mut self) -> IPRIOR29_W { IPRIOR29_W { w : self } } # [doc = "Writes raw bits to the register."]
  14323. # [inline (always)]
  14324. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior29](index.html) module"]
  14325. pub struct R32_PFIC_IPRIOR29_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR29_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior29::R](R) reader structure"]
  14326. impl crate :: Readable for R32_PFIC_IPRIOR29_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior29::W](W) writer structure"]
  14327. impl crate :: Writable for R32_PFIC_IPRIOR29_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR29 to value 0"]
  14328. impl crate :: Resettable for R32_PFIC_IPRIOR29_SPEC { # [inline (always)]
  14329. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR30 register accessor: an alias for `Reg<R32_PFIC_IPRIOR30_SPEC>`"]
  14330. pub type R32_PFIC_IPRIOR30 = crate :: Reg < r32_pfic_iprior30 :: R32_PFIC_IPRIOR30_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14331. pub mod r32_pfic_iprior30 { # [doc = "Register `R32_PFIC_IPRIOR30` reader"]
  14332. pub struct R (crate :: R < R32_PFIC_IPRIOR30_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR30_SPEC > ; # [inline (always)]
  14333. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR30_SPEC >> for R { # [inline (always)]
  14334. fn from (reader : crate :: R < R32_PFIC_IPRIOR30_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR30` writer"]
  14335. pub struct W (crate :: W < R32_PFIC_IPRIOR30_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR30_SPEC > ; # [inline (always)]
  14336. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14337. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR30_SPEC >> for W { # [inline (always)]
  14338. fn from (writer : crate :: W < R32_PFIC_IPRIOR30_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR30` reader - IPRIOR30"]
  14339. pub struct IPRIOR30_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR30_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR30_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR30_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14340. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR30` writer - IPRIOR30"]
  14341. pub struct IPRIOR30_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR30_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14342. # [inline (always)]
  14343. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR30"]
  14344. # [inline (always)]
  14345. pub fn iprior30 (& self) -> IPRIOR30_R { IPRIOR30_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR30"]
  14346. # [inline (always)]
  14347. pub fn iprior30 (& mut self) -> IPRIOR30_W { IPRIOR30_W { w : self } } # [doc = "Writes raw bits to the register."]
  14348. # [inline (always)]
  14349. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior30](index.html) module"]
  14350. pub struct R32_PFIC_IPRIOR30_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR30_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior30::R](R) reader structure"]
  14351. impl crate :: Readable for R32_PFIC_IPRIOR30_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior30::W](W) writer structure"]
  14352. impl crate :: Writable for R32_PFIC_IPRIOR30_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR30 to value 0"]
  14353. impl crate :: Resettable for R32_PFIC_IPRIOR30_SPEC { # [inline (always)]
  14354. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR31 register accessor: an alias for `Reg<R32_PFIC_IPRIOR31_SPEC>`"]
  14355. pub type R32_PFIC_IPRIOR31 = crate :: Reg < r32_pfic_iprior31 :: R32_PFIC_IPRIOR31_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14356. pub mod r32_pfic_iprior31 { # [doc = "Register `R32_PFIC_IPRIOR31` reader"]
  14357. pub struct R (crate :: R < R32_PFIC_IPRIOR31_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR31_SPEC > ; # [inline (always)]
  14358. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR31_SPEC >> for R { # [inline (always)]
  14359. fn from (reader : crate :: R < R32_PFIC_IPRIOR31_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR31` writer"]
  14360. pub struct W (crate :: W < R32_PFIC_IPRIOR31_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR31_SPEC > ; # [inline (always)]
  14361. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14362. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR31_SPEC >> for W { # [inline (always)]
  14363. fn from (writer : crate :: W < R32_PFIC_IPRIOR31_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR31` reader - IPRIOR31"]
  14364. pub struct IPRIOR31_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR31_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR31_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR31_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14365. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR31` writer - IPRIOR31"]
  14366. pub struct IPRIOR31_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR31_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14367. # [inline (always)]
  14368. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR31"]
  14369. # [inline (always)]
  14370. pub fn iprior31 (& self) -> IPRIOR31_R { IPRIOR31_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR31"]
  14371. # [inline (always)]
  14372. pub fn iprior31 (& mut self) -> IPRIOR31_W { IPRIOR31_W { w : self } } # [doc = "Writes raw bits to the register."]
  14373. # [inline (always)]
  14374. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior31](index.html) module"]
  14375. pub struct R32_PFIC_IPRIOR31_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR31_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior31::R](R) reader structure"]
  14376. impl crate :: Readable for R32_PFIC_IPRIOR31_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior31::W](W) writer structure"]
  14377. impl crate :: Writable for R32_PFIC_IPRIOR31_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR31 to value 0"]
  14378. impl crate :: Resettable for R32_PFIC_IPRIOR31_SPEC { # [inline (always)]
  14379. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR32 register accessor: an alias for `Reg<R32_PFIC_IPRIOR32_SPEC>`"]
  14380. pub type R32_PFIC_IPRIOR32 = crate :: Reg < r32_pfic_iprior32 :: R32_PFIC_IPRIOR32_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14381. pub mod r32_pfic_iprior32 { # [doc = "Register `R32_PFIC_IPRIOR32` reader"]
  14382. pub struct R (crate :: R < R32_PFIC_IPRIOR32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR32_SPEC > ; # [inline (always)]
  14383. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR32_SPEC >> for R { # [inline (always)]
  14384. fn from (reader : crate :: R < R32_PFIC_IPRIOR32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR32` writer"]
  14385. pub struct W (crate :: W < R32_PFIC_IPRIOR32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR32_SPEC > ; # [inline (always)]
  14386. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14387. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR32_SPEC >> for W { # [inline (always)]
  14388. fn from (writer : crate :: W < R32_PFIC_IPRIOR32_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR32` reader - IPRIOR32"]
  14389. pub struct IPRIOR32_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR32_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14390. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR32` writer - IPRIOR32"]
  14391. pub struct IPRIOR32_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR32_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14392. # [inline (always)]
  14393. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR32"]
  14394. # [inline (always)]
  14395. pub fn iprior32 (& self) -> IPRIOR32_R { IPRIOR32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR32"]
  14396. # [inline (always)]
  14397. pub fn iprior32 (& mut self) -> IPRIOR32_W { IPRIOR32_W { w : self } } # [doc = "Writes raw bits to the register."]
  14398. # [inline (always)]
  14399. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior32](index.html) module"]
  14400. pub struct R32_PFIC_IPRIOR32_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior32::R](R) reader structure"]
  14401. impl crate :: Readable for R32_PFIC_IPRIOR32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior32::W](W) writer structure"]
  14402. impl crate :: Writable for R32_PFIC_IPRIOR32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR32 to value 0"]
  14403. impl crate :: Resettable for R32_PFIC_IPRIOR32_SPEC { # [inline (always)]
  14404. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR33 register accessor: an alias for `Reg<R32_PFIC_IPRIOR33_SPEC>`"]
  14405. pub type R32_PFIC_IPRIOR33 = crate :: Reg < r32_pfic_iprior33 :: R32_PFIC_IPRIOR33_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14406. pub mod r32_pfic_iprior33 { # [doc = "Register `R32_PFIC_IPRIOR33` reader"]
  14407. pub struct R (crate :: R < R32_PFIC_IPRIOR33_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR33_SPEC > ; # [inline (always)]
  14408. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR33_SPEC >> for R { # [inline (always)]
  14409. fn from (reader : crate :: R < R32_PFIC_IPRIOR33_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR33` writer"]
  14410. pub struct W (crate :: W < R32_PFIC_IPRIOR33_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR33_SPEC > ; # [inline (always)]
  14411. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14412. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR33_SPEC >> for W { # [inline (always)]
  14413. fn from (writer : crate :: W < R32_PFIC_IPRIOR33_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR33` reader - IPRIOR33"]
  14414. pub struct IPRIOR33_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR33_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR33_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR33_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14415. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR33` writer - IPRIOR33"]
  14416. pub struct IPRIOR33_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR33_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14417. # [inline (always)]
  14418. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR33"]
  14419. # [inline (always)]
  14420. pub fn iprior33 (& self) -> IPRIOR33_R { IPRIOR33_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR33"]
  14421. # [inline (always)]
  14422. pub fn iprior33 (& mut self) -> IPRIOR33_W { IPRIOR33_W { w : self } } # [doc = "Writes raw bits to the register."]
  14423. # [inline (always)]
  14424. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior33](index.html) module"]
  14425. pub struct R32_PFIC_IPRIOR33_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR33_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior33::R](R) reader structure"]
  14426. impl crate :: Readable for R32_PFIC_IPRIOR33_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior33::W](W) writer structure"]
  14427. impl crate :: Writable for R32_PFIC_IPRIOR33_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR33 to value 0"]
  14428. impl crate :: Resettable for R32_PFIC_IPRIOR33_SPEC { # [inline (always)]
  14429. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR34 register accessor: an alias for `Reg<R32_PFIC_IPRIOR34_SPEC>`"]
  14430. pub type R32_PFIC_IPRIOR34 = crate :: Reg < r32_pfic_iprior34 :: R32_PFIC_IPRIOR34_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14431. pub mod r32_pfic_iprior34 { # [doc = "Register `R32_PFIC_IPRIOR34` reader"]
  14432. pub struct R (crate :: R < R32_PFIC_IPRIOR34_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR34_SPEC > ; # [inline (always)]
  14433. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR34_SPEC >> for R { # [inline (always)]
  14434. fn from (reader : crate :: R < R32_PFIC_IPRIOR34_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR34` writer"]
  14435. pub struct W (crate :: W < R32_PFIC_IPRIOR34_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR34_SPEC > ; # [inline (always)]
  14436. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14437. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR34_SPEC >> for W { # [inline (always)]
  14438. fn from (writer : crate :: W < R32_PFIC_IPRIOR34_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR34` reader - IPRIOR34"]
  14439. pub struct IPRIOR34_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR34_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR34_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR34_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14440. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR34` writer - IPRIOR34"]
  14441. pub struct IPRIOR34_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR34_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14442. # [inline (always)]
  14443. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR34"]
  14444. # [inline (always)]
  14445. pub fn iprior34 (& self) -> IPRIOR34_R { IPRIOR34_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR34"]
  14446. # [inline (always)]
  14447. pub fn iprior34 (& mut self) -> IPRIOR34_W { IPRIOR34_W { w : self } } # [doc = "Writes raw bits to the register."]
  14448. # [inline (always)]
  14449. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior34](index.html) module"]
  14450. pub struct R32_PFIC_IPRIOR34_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR34_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior34::R](R) reader structure"]
  14451. impl crate :: Readable for R32_PFIC_IPRIOR34_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior34::W](W) writer structure"]
  14452. impl crate :: Writable for R32_PFIC_IPRIOR34_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR34 to value 0"]
  14453. impl crate :: Resettable for R32_PFIC_IPRIOR34_SPEC { # [inline (always)]
  14454. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR35 register accessor: an alias for `Reg<R32_PFIC_IPRIOR35_SPEC>`"]
  14455. pub type R32_PFIC_IPRIOR35 = crate :: Reg < r32_pfic_iprior35 :: R32_PFIC_IPRIOR35_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14456. pub mod r32_pfic_iprior35 { # [doc = "Register `R32_PFIC_IPRIOR35` reader"]
  14457. pub struct R (crate :: R < R32_PFIC_IPRIOR35_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR35_SPEC > ; # [inline (always)]
  14458. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR35_SPEC >> for R { # [inline (always)]
  14459. fn from (reader : crate :: R < R32_PFIC_IPRIOR35_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR35` writer"]
  14460. pub struct W (crate :: W < R32_PFIC_IPRIOR35_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR35_SPEC > ; # [inline (always)]
  14461. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14462. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR35_SPEC >> for W { # [inline (always)]
  14463. fn from (writer : crate :: W < R32_PFIC_IPRIOR35_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR35` reader - IPRIOR35"]
  14464. pub struct IPRIOR35_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR35_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR35_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR35_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14465. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR35` writer - IPRIOR35"]
  14466. pub struct IPRIOR35_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR35_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14467. # [inline (always)]
  14468. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR35"]
  14469. # [inline (always)]
  14470. pub fn iprior35 (& self) -> IPRIOR35_R { IPRIOR35_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR35"]
  14471. # [inline (always)]
  14472. pub fn iprior35 (& mut self) -> IPRIOR35_W { IPRIOR35_W { w : self } } # [doc = "Writes raw bits to the register."]
  14473. # [inline (always)]
  14474. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior35](index.html) module"]
  14475. pub struct R32_PFIC_IPRIOR35_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR35_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior35::R](R) reader structure"]
  14476. impl crate :: Readable for R32_PFIC_IPRIOR35_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior35::W](W) writer structure"]
  14477. impl crate :: Writable for R32_PFIC_IPRIOR35_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR35 to value 0"]
  14478. impl crate :: Resettable for R32_PFIC_IPRIOR35_SPEC { # [inline (always)]
  14479. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR36 register accessor: an alias for `Reg<R32_PFIC_IPRIOR36_SPEC>`"]
  14480. pub type R32_PFIC_IPRIOR36 = crate :: Reg < r32_pfic_iprior36 :: R32_PFIC_IPRIOR36_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14481. pub mod r32_pfic_iprior36 { # [doc = "Register `R32_PFIC_IPRIOR36` reader"]
  14482. pub struct R (crate :: R < R32_PFIC_IPRIOR36_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR36_SPEC > ; # [inline (always)]
  14483. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR36_SPEC >> for R { # [inline (always)]
  14484. fn from (reader : crate :: R < R32_PFIC_IPRIOR36_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR36` writer"]
  14485. pub struct W (crate :: W < R32_PFIC_IPRIOR36_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR36_SPEC > ; # [inline (always)]
  14486. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14487. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR36_SPEC >> for W { # [inline (always)]
  14488. fn from (writer : crate :: W < R32_PFIC_IPRIOR36_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR36` reader - IPRIOR36"]
  14489. pub struct IPRIOR36_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR36_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR36_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR36_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14490. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR36` writer - IPRIOR36"]
  14491. pub struct IPRIOR36_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR36_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14492. # [inline (always)]
  14493. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR36"]
  14494. # [inline (always)]
  14495. pub fn iprior36 (& self) -> IPRIOR36_R { IPRIOR36_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR36"]
  14496. # [inline (always)]
  14497. pub fn iprior36 (& mut self) -> IPRIOR36_W { IPRIOR36_W { w : self } } # [doc = "Writes raw bits to the register."]
  14498. # [inline (always)]
  14499. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior36](index.html) module"]
  14500. pub struct R32_PFIC_IPRIOR36_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR36_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior36::R](R) reader structure"]
  14501. impl crate :: Readable for R32_PFIC_IPRIOR36_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior36::W](W) writer structure"]
  14502. impl crate :: Writable for R32_PFIC_IPRIOR36_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR36 to value 0"]
  14503. impl crate :: Resettable for R32_PFIC_IPRIOR36_SPEC { # [inline (always)]
  14504. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR37 register accessor: an alias for `Reg<R32_PFIC_IPRIOR37_SPEC>`"]
  14505. pub type R32_PFIC_IPRIOR37 = crate :: Reg < r32_pfic_iprior37 :: R32_PFIC_IPRIOR37_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14506. pub mod r32_pfic_iprior37 { # [doc = "Register `R32_PFIC_IPRIOR37` reader"]
  14507. pub struct R (crate :: R < R32_PFIC_IPRIOR37_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR37_SPEC > ; # [inline (always)]
  14508. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR37_SPEC >> for R { # [inline (always)]
  14509. fn from (reader : crate :: R < R32_PFIC_IPRIOR37_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR37` writer"]
  14510. pub struct W (crate :: W < R32_PFIC_IPRIOR37_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR37_SPEC > ; # [inline (always)]
  14511. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14512. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR37_SPEC >> for W { # [inline (always)]
  14513. fn from (writer : crate :: W < R32_PFIC_IPRIOR37_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR37` reader - IPRIOR37"]
  14514. pub struct IPRIOR37_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR37_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR37_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR37_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14515. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR37` writer - IPRIOR37"]
  14516. pub struct IPRIOR37_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR37_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14517. # [inline (always)]
  14518. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR37"]
  14519. # [inline (always)]
  14520. pub fn iprior37 (& self) -> IPRIOR37_R { IPRIOR37_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR37"]
  14521. # [inline (always)]
  14522. pub fn iprior37 (& mut self) -> IPRIOR37_W { IPRIOR37_W { w : self } } # [doc = "Writes raw bits to the register."]
  14523. # [inline (always)]
  14524. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior37](index.html) module"]
  14525. pub struct R32_PFIC_IPRIOR37_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR37_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior37::R](R) reader structure"]
  14526. impl crate :: Readable for R32_PFIC_IPRIOR37_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior37::W](W) writer structure"]
  14527. impl crate :: Writable for R32_PFIC_IPRIOR37_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR37 to value 0"]
  14528. impl crate :: Resettable for R32_PFIC_IPRIOR37_SPEC { # [inline (always)]
  14529. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR38 register accessor: an alias for `Reg<R32_PFIC_IPRIOR38_SPEC>`"]
  14530. pub type R32_PFIC_IPRIOR38 = crate :: Reg < r32_pfic_iprior38 :: R32_PFIC_IPRIOR38_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14531. pub mod r32_pfic_iprior38 { # [doc = "Register `R32_PFIC_IPRIOR38` reader"]
  14532. pub struct R (crate :: R < R32_PFIC_IPRIOR38_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR38_SPEC > ; # [inline (always)]
  14533. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR38_SPEC >> for R { # [inline (always)]
  14534. fn from (reader : crate :: R < R32_PFIC_IPRIOR38_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR38` writer"]
  14535. pub struct W (crate :: W < R32_PFIC_IPRIOR38_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR38_SPEC > ; # [inline (always)]
  14536. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14537. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR38_SPEC >> for W { # [inline (always)]
  14538. fn from (writer : crate :: W < R32_PFIC_IPRIOR38_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR38` reader - IPRIOR38"]
  14539. pub struct IPRIOR38_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR38_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR38_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR38_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14540. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR38` writer - IPRIOR38"]
  14541. pub struct IPRIOR38_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR38_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14542. # [inline (always)]
  14543. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR38"]
  14544. # [inline (always)]
  14545. pub fn iprior38 (& self) -> IPRIOR38_R { IPRIOR38_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR38"]
  14546. # [inline (always)]
  14547. pub fn iprior38 (& mut self) -> IPRIOR38_W { IPRIOR38_W { w : self } } # [doc = "Writes raw bits to the register."]
  14548. # [inline (always)]
  14549. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior38](index.html) module"]
  14550. pub struct R32_PFIC_IPRIOR38_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR38_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior38::R](R) reader structure"]
  14551. impl crate :: Readable for R32_PFIC_IPRIOR38_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior38::W](W) writer structure"]
  14552. impl crate :: Writable for R32_PFIC_IPRIOR38_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR38 to value 0"]
  14553. impl crate :: Resettable for R32_PFIC_IPRIOR38_SPEC { # [inline (always)]
  14554. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR39 register accessor: an alias for `Reg<R32_PFIC_IPRIOR39_SPEC>`"]
  14555. pub type R32_PFIC_IPRIOR39 = crate :: Reg < r32_pfic_iprior39 :: R32_PFIC_IPRIOR39_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14556. pub mod r32_pfic_iprior39 { # [doc = "Register `R32_PFIC_IPRIOR39` reader"]
  14557. pub struct R (crate :: R < R32_PFIC_IPRIOR39_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR39_SPEC > ; # [inline (always)]
  14558. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR39_SPEC >> for R { # [inline (always)]
  14559. fn from (reader : crate :: R < R32_PFIC_IPRIOR39_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR39` writer"]
  14560. pub struct W (crate :: W < R32_PFIC_IPRIOR39_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR39_SPEC > ; # [inline (always)]
  14561. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14562. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR39_SPEC >> for W { # [inline (always)]
  14563. fn from (writer : crate :: W < R32_PFIC_IPRIOR39_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR39` reader - IPRIOR39"]
  14564. pub struct IPRIOR39_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR39_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR39_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR39_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14565. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR39` writer - IPRIOR39"]
  14566. pub struct IPRIOR39_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR39_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14567. # [inline (always)]
  14568. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR39"]
  14569. # [inline (always)]
  14570. pub fn iprior39 (& self) -> IPRIOR39_R { IPRIOR39_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR39"]
  14571. # [inline (always)]
  14572. pub fn iprior39 (& mut self) -> IPRIOR39_W { IPRIOR39_W { w : self } } # [doc = "Writes raw bits to the register."]
  14573. # [inline (always)]
  14574. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior39](index.html) module"]
  14575. pub struct R32_PFIC_IPRIOR39_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR39_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior39::R](R) reader structure"]
  14576. impl crate :: Readable for R32_PFIC_IPRIOR39_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior39::W](W) writer structure"]
  14577. impl crate :: Writable for R32_PFIC_IPRIOR39_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR39 to value 0"]
  14578. impl crate :: Resettable for R32_PFIC_IPRIOR39_SPEC { # [inline (always)]
  14579. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR40 register accessor: an alias for `Reg<R32_PFIC_IPRIOR40_SPEC>`"]
  14580. pub type R32_PFIC_IPRIOR40 = crate :: Reg < r32_pfic_iprior40 :: R32_PFIC_IPRIOR40_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14581. pub mod r32_pfic_iprior40 { # [doc = "Register `R32_PFIC_IPRIOR40` reader"]
  14582. pub struct R (crate :: R < R32_PFIC_IPRIOR40_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR40_SPEC > ; # [inline (always)]
  14583. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR40_SPEC >> for R { # [inline (always)]
  14584. fn from (reader : crate :: R < R32_PFIC_IPRIOR40_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR40` writer"]
  14585. pub struct W (crate :: W < R32_PFIC_IPRIOR40_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR40_SPEC > ; # [inline (always)]
  14586. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14587. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR40_SPEC >> for W { # [inline (always)]
  14588. fn from (writer : crate :: W < R32_PFIC_IPRIOR40_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR40` reader - IPRIOR40"]
  14589. pub struct IPRIOR40_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR40_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR40_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR40_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14590. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR40` writer - IPRIOR40"]
  14591. pub struct IPRIOR40_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR40_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14592. # [inline (always)]
  14593. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR40"]
  14594. # [inline (always)]
  14595. pub fn iprior40 (& self) -> IPRIOR40_R { IPRIOR40_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR40"]
  14596. # [inline (always)]
  14597. pub fn iprior40 (& mut self) -> IPRIOR40_W { IPRIOR40_W { w : self } } # [doc = "Writes raw bits to the register."]
  14598. # [inline (always)]
  14599. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior40](index.html) module"]
  14600. pub struct R32_PFIC_IPRIOR40_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR40_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior40::R](R) reader structure"]
  14601. impl crate :: Readable for R32_PFIC_IPRIOR40_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior40::W](W) writer structure"]
  14602. impl crate :: Writable for R32_PFIC_IPRIOR40_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR40 to value 0"]
  14603. impl crate :: Resettable for R32_PFIC_IPRIOR40_SPEC { # [inline (always)]
  14604. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR41 register accessor: an alias for `Reg<R32_PFIC_IPRIOR41_SPEC>`"]
  14605. pub type R32_PFIC_IPRIOR41 = crate :: Reg < r32_pfic_iprior41 :: R32_PFIC_IPRIOR41_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14606. pub mod r32_pfic_iprior41 { # [doc = "Register `R32_PFIC_IPRIOR41` reader"]
  14607. pub struct R (crate :: R < R32_PFIC_IPRIOR41_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR41_SPEC > ; # [inline (always)]
  14608. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR41_SPEC >> for R { # [inline (always)]
  14609. fn from (reader : crate :: R < R32_PFIC_IPRIOR41_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR41` writer"]
  14610. pub struct W (crate :: W < R32_PFIC_IPRIOR41_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR41_SPEC > ; # [inline (always)]
  14611. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14612. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR41_SPEC >> for W { # [inline (always)]
  14613. fn from (writer : crate :: W < R32_PFIC_IPRIOR41_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR41` reader - IPRIOR41"]
  14614. pub struct IPRIOR41_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR41_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR41_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR41_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14615. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR41` writer - IPRIOR41"]
  14616. pub struct IPRIOR41_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR41_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14617. # [inline (always)]
  14618. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR41"]
  14619. # [inline (always)]
  14620. pub fn iprior41 (& self) -> IPRIOR41_R { IPRIOR41_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR41"]
  14621. # [inline (always)]
  14622. pub fn iprior41 (& mut self) -> IPRIOR41_W { IPRIOR41_W { w : self } } # [doc = "Writes raw bits to the register."]
  14623. # [inline (always)]
  14624. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior41](index.html) module"]
  14625. pub struct R32_PFIC_IPRIOR41_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR41_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior41::R](R) reader structure"]
  14626. impl crate :: Readable for R32_PFIC_IPRIOR41_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior41::W](W) writer structure"]
  14627. impl crate :: Writable for R32_PFIC_IPRIOR41_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR41 to value 0"]
  14628. impl crate :: Resettable for R32_PFIC_IPRIOR41_SPEC { # [inline (always)]
  14629. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR42 register accessor: an alias for `Reg<R32_PFIC_IPRIOR42_SPEC>`"]
  14630. pub type R32_PFIC_IPRIOR42 = crate :: Reg < r32_pfic_iprior42 :: R32_PFIC_IPRIOR42_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14631. pub mod r32_pfic_iprior42 { # [doc = "Register `R32_PFIC_IPRIOR42` reader"]
  14632. pub struct R (crate :: R < R32_PFIC_IPRIOR42_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR42_SPEC > ; # [inline (always)]
  14633. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR42_SPEC >> for R { # [inline (always)]
  14634. fn from (reader : crate :: R < R32_PFIC_IPRIOR42_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR42` writer"]
  14635. pub struct W (crate :: W < R32_PFIC_IPRIOR42_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR42_SPEC > ; # [inline (always)]
  14636. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14637. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR42_SPEC >> for W { # [inline (always)]
  14638. fn from (writer : crate :: W < R32_PFIC_IPRIOR42_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR42` reader - IPRIOR42"]
  14639. pub struct IPRIOR42_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR42_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR42_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR42_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14640. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR42` writer - IPRIOR42"]
  14641. pub struct IPRIOR42_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR42_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14642. # [inline (always)]
  14643. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR42"]
  14644. # [inline (always)]
  14645. pub fn iprior42 (& self) -> IPRIOR42_R { IPRIOR42_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR42"]
  14646. # [inline (always)]
  14647. pub fn iprior42 (& mut self) -> IPRIOR42_W { IPRIOR42_W { w : self } } # [doc = "Writes raw bits to the register."]
  14648. # [inline (always)]
  14649. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior42](index.html) module"]
  14650. pub struct R32_PFIC_IPRIOR42_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR42_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior42::R](R) reader structure"]
  14651. impl crate :: Readable for R32_PFIC_IPRIOR42_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior42::W](W) writer structure"]
  14652. impl crate :: Writable for R32_PFIC_IPRIOR42_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR42 to value 0"]
  14653. impl crate :: Resettable for R32_PFIC_IPRIOR42_SPEC { # [inline (always)]
  14654. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR43 register accessor: an alias for `Reg<R32_PFIC_IPRIOR43_SPEC>`"]
  14655. pub type R32_PFIC_IPRIOR43 = crate :: Reg < r32_pfic_iprior43 :: R32_PFIC_IPRIOR43_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14656. pub mod r32_pfic_iprior43 { # [doc = "Register `R32_PFIC_IPRIOR43` reader"]
  14657. pub struct R (crate :: R < R32_PFIC_IPRIOR43_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR43_SPEC > ; # [inline (always)]
  14658. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR43_SPEC >> for R { # [inline (always)]
  14659. fn from (reader : crate :: R < R32_PFIC_IPRIOR43_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR43` writer"]
  14660. pub struct W (crate :: W < R32_PFIC_IPRIOR43_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR43_SPEC > ; # [inline (always)]
  14661. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14662. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR43_SPEC >> for W { # [inline (always)]
  14663. fn from (writer : crate :: W < R32_PFIC_IPRIOR43_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR43` reader - IPRIOR43"]
  14664. pub struct IPRIOR43_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR43_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR43_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR43_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14665. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR43` writer - IPRIOR43"]
  14666. pub struct IPRIOR43_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR43_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14667. # [inline (always)]
  14668. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR43"]
  14669. # [inline (always)]
  14670. pub fn iprior43 (& self) -> IPRIOR43_R { IPRIOR43_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR43"]
  14671. # [inline (always)]
  14672. pub fn iprior43 (& mut self) -> IPRIOR43_W { IPRIOR43_W { w : self } } # [doc = "Writes raw bits to the register."]
  14673. # [inline (always)]
  14674. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior43](index.html) module"]
  14675. pub struct R32_PFIC_IPRIOR43_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR43_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior43::R](R) reader structure"]
  14676. impl crate :: Readable for R32_PFIC_IPRIOR43_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior43::W](W) writer structure"]
  14677. impl crate :: Writable for R32_PFIC_IPRIOR43_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR43 to value 0"]
  14678. impl crate :: Resettable for R32_PFIC_IPRIOR43_SPEC { # [inline (always)]
  14679. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR44 register accessor: an alias for `Reg<R32_PFIC_IPRIOR44_SPEC>`"]
  14680. pub type R32_PFIC_IPRIOR44 = crate :: Reg < r32_pfic_iprior44 :: R32_PFIC_IPRIOR44_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14681. pub mod r32_pfic_iprior44 { # [doc = "Register `R32_PFIC_IPRIOR44` reader"]
  14682. pub struct R (crate :: R < R32_PFIC_IPRIOR44_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR44_SPEC > ; # [inline (always)]
  14683. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR44_SPEC >> for R { # [inline (always)]
  14684. fn from (reader : crate :: R < R32_PFIC_IPRIOR44_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR44` writer"]
  14685. pub struct W (crate :: W < R32_PFIC_IPRIOR44_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR44_SPEC > ; # [inline (always)]
  14686. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14687. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR44_SPEC >> for W { # [inline (always)]
  14688. fn from (writer : crate :: W < R32_PFIC_IPRIOR44_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR44` reader - IPRIOR44"]
  14689. pub struct IPRIOR44_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR44_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR44_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR44_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14690. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR44` writer - IPRIOR44"]
  14691. pub struct IPRIOR44_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR44_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14692. # [inline (always)]
  14693. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR44"]
  14694. # [inline (always)]
  14695. pub fn iprior44 (& self) -> IPRIOR44_R { IPRIOR44_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR44"]
  14696. # [inline (always)]
  14697. pub fn iprior44 (& mut self) -> IPRIOR44_W { IPRIOR44_W { w : self } } # [doc = "Writes raw bits to the register."]
  14698. # [inline (always)]
  14699. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior44](index.html) module"]
  14700. pub struct R32_PFIC_IPRIOR44_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR44_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior44::R](R) reader structure"]
  14701. impl crate :: Readable for R32_PFIC_IPRIOR44_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior44::W](W) writer structure"]
  14702. impl crate :: Writable for R32_PFIC_IPRIOR44_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR44 to value 0"]
  14703. impl crate :: Resettable for R32_PFIC_IPRIOR44_SPEC { # [inline (always)]
  14704. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR45 register accessor: an alias for `Reg<R32_PFIC_IPRIOR45_SPEC>`"]
  14705. pub type R32_PFIC_IPRIOR45 = crate :: Reg < r32_pfic_iprior45 :: R32_PFIC_IPRIOR45_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14706. pub mod r32_pfic_iprior45 { # [doc = "Register `R32_PFIC_IPRIOR45` reader"]
  14707. pub struct R (crate :: R < R32_PFIC_IPRIOR45_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR45_SPEC > ; # [inline (always)]
  14708. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR45_SPEC >> for R { # [inline (always)]
  14709. fn from (reader : crate :: R < R32_PFIC_IPRIOR45_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR45` writer"]
  14710. pub struct W (crate :: W < R32_PFIC_IPRIOR45_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR45_SPEC > ; # [inline (always)]
  14711. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14712. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR45_SPEC >> for W { # [inline (always)]
  14713. fn from (writer : crate :: W < R32_PFIC_IPRIOR45_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR45` reader - IPRIOR45"]
  14714. pub struct IPRIOR45_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR45_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR45_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR45_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14715. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR45` writer - IPRIOR45"]
  14716. pub struct IPRIOR45_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR45_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14717. # [inline (always)]
  14718. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR45"]
  14719. # [inline (always)]
  14720. pub fn iprior45 (& self) -> IPRIOR45_R { IPRIOR45_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR45"]
  14721. # [inline (always)]
  14722. pub fn iprior45 (& mut self) -> IPRIOR45_W { IPRIOR45_W { w : self } } # [doc = "Writes raw bits to the register."]
  14723. # [inline (always)]
  14724. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior45](index.html) module"]
  14725. pub struct R32_PFIC_IPRIOR45_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR45_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior45::R](R) reader structure"]
  14726. impl crate :: Readable for R32_PFIC_IPRIOR45_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior45::W](W) writer structure"]
  14727. impl crate :: Writable for R32_PFIC_IPRIOR45_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR45 to value 0"]
  14728. impl crate :: Resettable for R32_PFIC_IPRIOR45_SPEC { # [inline (always)]
  14729. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR46 register accessor: an alias for `Reg<R32_PFIC_IPRIOR46_SPEC>`"]
  14730. pub type R32_PFIC_IPRIOR46 = crate :: Reg < r32_pfic_iprior46 :: R32_PFIC_IPRIOR46_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14731. pub mod r32_pfic_iprior46 { # [doc = "Register `R32_PFIC_IPRIOR46` reader"]
  14732. pub struct R (crate :: R < R32_PFIC_IPRIOR46_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR46_SPEC > ; # [inline (always)]
  14733. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR46_SPEC >> for R { # [inline (always)]
  14734. fn from (reader : crate :: R < R32_PFIC_IPRIOR46_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR46` writer"]
  14735. pub struct W (crate :: W < R32_PFIC_IPRIOR46_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR46_SPEC > ; # [inline (always)]
  14736. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14737. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR46_SPEC >> for W { # [inline (always)]
  14738. fn from (writer : crate :: W < R32_PFIC_IPRIOR46_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR46` reader - IPRIOR46"]
  14739. pub struct IPRIOR46_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR46_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR46_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR46_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14740. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR46` writer - IPRIOR46"]
  14741. pub struct IPRIOR46_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR46_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14742. # [inline (always)]
  14743. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR46"]
  14744. # [inline (always)]
  14745. pub fn iprior46 (& self) -> IPRIOR46_R { IPRIOR46_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR46"]
  14746. # [inline (always)]
  14747. pub fn iprior46 (& mut self) -> IPRIOR46_W { IPRIOR46_W { w : self } } # [doc = "Writes raw bits to the register."]
  14748. # [inline (always)]
  14749. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior46](index.html) module"]
  14750. pub struct R32_PFIC_IPRIOR46_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR46_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior46::R](R) reader structure"]
  14751. impl crate :: Readable for R32_PFIC_IPRIOR46_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior46::W](W) writer structure"]
  14752. impl crate :: Writable for R32_PFIC_IPRIOR46_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR46 to value 0"]
  14753. impl crate :: Resettable for R32_PFIC_IPRIOR46_SPEC { # [inline (always)]
  14754. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR47 register accessor: an alias for `Reg<R32_PFIC_IPRIOR47_SPEC>`"]
  14755. pub type R32_PFIC_IPRIOR47 = crate :: Reg < r32_pfic_iprior47 :: R32_PFIC_IPRIOR47_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14756. pub mod r32_pfic_iprior47 { # [doc = "Register `R32_PFIC_IPRIOR47` reader"]
  14757. pub struct R (crate :: R < R32_PFIC_IPRIOR47_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR47_SPEC > ; # [inline (always)]
  14758. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR47_SPEC >> for R { # [inline (always)]
  14759. fn from (reader : crate :: R < R32_PFIC_IPRIOR47_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR47` writer"]
  14760. pub struct W (crate :: W < R32_PFIC_IPRIOR47_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR47_SPEC > ; # [inline (always)]
  14761. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14762. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR47_SPEC >> for W { # [inline (always)]
  14763. fn from (writer : crate :: W < R32_PFIC_IPRIOR47_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR47` reader - IPRIOR47"]
  14764. pub struct IPRIOR47_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR47_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR47_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR47_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14765. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR47` writer - IPRIOR47"]
  14766. pub struct IPRIOR47_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR47_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14767. # [inline (always)]
  14768. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR47"]
  14769. # [inline (always)]
  14770. pub fn iprior47 (& self) -> IPRIOR47_R { IPRIOR47_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR47"]
  14771. # [inline (always)]
  14772. pub fn iprior47 (& mut self) -> IPRIOR47_W { IPRIOR47_W { w : self } } # [doc = "Writes raw bits to the register."]
  14773. # [inline (always)]
  14774. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior47](index.html) module"]
  14775. pub struct R32_PFIC_IPRIOR47_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR47_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior47::R](R) reader structure"]
  14776. impl crate :: Readable for R32_PFIC_IPRIOR47_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior47::W](W) writer structure"]
  14777. impl crate :: Writable for R32_PFIC_IPRIOR47_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR47 to value 0"]
  14778. impl crate :: Resettable for R32_PFIC_IPRIOR47_SPEC { # [inline (always)]
  14779. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR48 register accessor: an alias for `Reg<R32_PFIC_IPRIOR48_SPEC>`"]
  14780. pub type R32_PFIC_IPRIOR48 = crate :: Reg < r32_pfic_iprior48 :: R32_PFIC_IPRIOR48_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14781. pub mod r32_pfic_iprior48 { # [doc = "Register `R32_PFIC_IPRIOR48` reader"]
  14782. pub struct R (crate :: R < R32_PFIC_IPRIOR48_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR48_SPEC > ; # [inline (always)]
  14783. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR48_SPEC >> for R { # [inline (always)]
  14784. fn from (reader : crate :: R < R32_PFIC_IPRIOR48_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR48` writer"]
  14785. pub struct W (crate :: W < R32_PFIC_IPRIOR48_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR48_SPEC > ; # [inline (always)]
  14786. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14787. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR48_SPEC >> for W { # [inline (always)]
  14788. fn from (writer : crate :: W < R32_PFIC_IPRIOR48_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR48` reader - IPRIOR48"]
  14789. pub struct IPRIOR48_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR48_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR48_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR48_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14790. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR48` writer - IPRIOR48"]
  14791. pub struct IPRIOR48_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR48_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14792. # [inline (always)]
  14793. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR48"]
  14794. # [inline (always)]
  14795. pub fn iprior48 (& self) -> IPRIOR48_R { IPRIOR48_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR48"]
  14796. # [inline (always)]
  14797. pub fn iprior48 (& mut self) -> IPRIOR48_W { IPRIOR48_W { w : self } } # [doc = "Writes raw bits to the register."]
  14798. # [inline (always)]
  14799. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior48](index.html) module"]
  14800. pub struct R32_PFIC_IPRIOR48_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR48_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior48::R](R) reader structure"]
  14801. impl crate :: Readable for R32_PFIC_IPRIOR48_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior48::W](W) writer structure"]
  14802. impl crate :: Writable for R32_PFIC_IPRIOR48_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR48 to value 0"]
  14803. impl crate :: Resettable for R32_PFIC_IPRIOR48_SPEC { # [inline (always)]
  14804. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR49 register accessor: an alias for `Reg<R32_PFIC_IPRIOR49_SPEC>`"]
  14805. pub type R32_PFIC_IPRIOR49 = crate :: Reg < r32_pfic_iprior49 :: R32_PFIC_IPRIOR49_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14806. pub mod r32_pfic_iprior49 { # [doc = "Register `R32_PFIC_IPRIOR49` reader"]
  14807. pub struct R (crate :: R < R32_PFIC_IPRIOR49_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR49_SPEC > ; # [inline (always)]
  14808. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR49_SPEC >> for R { # [inline (always)]
  14809. fn from (reader : crate :: R < R32_PFIC_IPRIOR49_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR49` writer"]
  14810. pub struct W (crate :: W < R32_PFIC_IPRIOR49_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR49_SPEC > ; # [inline (always)]
  14811. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14812. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR49_SPEC >> for W { # [inline (always)]
  14813. fn from (writer : crate :: W < R32_PFIC_IPRIOR49_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR49` reader - IPRIOR49"]
  14814. pub struct IPRIOR49_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR49_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR49_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR49_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14815. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR49` writer - IPRIOR49"]
  14816. pub struct IPRIOR49_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR49_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14817. # [inline (always)]
  14818. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR49"]
  14819. # [inline (always)]
  14820. pub fn iprior49 (& self) -> IPRIOR49_R { IPRIOR49_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR49"]
  14821. # [inline (always)]
  14822. pub fn iprior49 (& mut self) -> IPRIOR49_W { IPRIOR49_W { w : self } } # [doc = "Writes raw bits to the register."]
  14823. # [inline (always)]
  14824. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior49](index.html) module"]
  14825. pub struct R32_PFIC_IPRIOR49_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR49_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior49::R](R) reader structure"]
  14826. impl crate :: Readable for R32_PFIC_IPRIOR49_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior49::W](W) writer structure"]
  14827. impl crate :: Writable for R32_PFIC_IPRIOR49_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR49 to value 0"]
  14828. impl crate :: Resettable for R32_PFIC_IPRIOR49_SPEC { # [inline (always)]
  14829. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR50 register accessor: an alias for `Reg<R32_PFIC_IPRIOR50_SPEC>`"]
  14830. pub type R32_PFIC_IPRIOR50 = crate :: Reg < r32_pfic_iprior50 :: R32_PFIC_IPRIOR50_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14831. pub mod r32_pfic_iprior50 { # [doc = "Register `R32_PFIC_IPRIOR50` reader"]
  14832. pub struct R (crate :: R < R32_PFIC_IPRIOR50_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR50_SPEC > ; # [inline (always)]
  14833. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR50_SPEC >> for R { # [inline (always)]
  14834. fn from (reader : crate :: R < R32_PFIC_IPRIOR50_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR50` writer"]
  14835. pub struct W (crate :: W < R32_PFIC_IPRIOR50_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR50_SPEC > ; # [inline (always)]
  14836. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14837. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR50_SPEC >> for W { # [inline (always)]
  14838. fn from (writer : crate :: W < R32_PFIC_IPRIOR50_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR50` reader - IPRIOR50"]
  14839. pub struct IPRIOR50_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR50_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR50_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR50_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14840. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR50` writer - IPRIOR50"]
  14841. pub struct IPRIOR50_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR50_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14842. # [inline (always)]
  14843. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR50"]
  14844. # [inline (always)]
  14845. pub fn iprior50 (& self) -> IPRIOR50_R { IPRIOR50_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR50"]
  14846. # [inline (always)]
  14847. pub fn iprior50 (& mut self) -> IPRIOR50_W { IPRIOR50_W { w : self } } # [doc = "Writes raw bits to the register."]
  14848. # [inline (always)]
  14849. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior50](index.html) module"]
  14850. pub struct R32_PFIC_IPRIOR50_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR50_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior50::R](R) reader structure"]
  14851. impl crate :: Readable for R32_PFIC_IPRIOR50_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior50::W](W) writer structure"]
  14852. impl crate :: Writable for R32_PFIC_IPRIOR50_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR50 to value 0"]
  14853. impl crate :: Resettable for R32_PFIC_IPRIOR50_SPEC { # [inline (always)]
  14854. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR51 register accessor: an alias for `Reg<R32_PFIC_IPRIOR51_SPEC>`"]
  14855. pub type R32_PFIC_IPRIOR51 = crate :: Reg < r32_pfic_iprior51 :: R32_PFIC_IPRIOR51_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14856. pub mod r32_pfic_iprior51 { # [doc = "Register `R32_PFIC_IPRIOR51` reader"]
  14857. pub struct R (crate :: R < R32_PFIC_IPRIOR51_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR51_SPEC > ; # [inline (always)]
  14858. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR51_SPEC >> for R { # [inline (always)]
  14859. fn from (reader : crate :: R < R32_PFIC_IPRIOR51_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR51` writer"]
  14860. pub struct W (crate :: W < R32_PFIC_IPRIOR51_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR51_SPEC > ; # [inline (always)]
  14861. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14862. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR51_SPEC >> for W { # [inline (always)]
  14863. fn from (writer : crate :: W < R32_PFIC_IPRIOR51_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR51` reader - IPRIOR51"]
  14864. pub struct IPRIOR51_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR51_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR51_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR51_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14865. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR51` writer - IPRIOR51"]
  14866. pub struct IPRIOR51_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR51_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14867. # [inline (always)]
  14868. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR51"]
  14869. # [inline (always)]
  14870. pub fn iprior51 (& self) -> IPRIOR51_R { IPRIOR51_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR51"]
  14871. # [inline (always)]
  14872. pub fn iprior51 (& mut self) -> IPRIOR51_W { IPRIOR51_W { w : self } } # [doc = "Writes raw bits to the register."]
  14873. # [inline (always)]
  14874. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior51](index.html) module"]
  14875. pub struct R32_PFIC_IPRIOR51_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR51_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior51::R](R) reader structure"]
  14876. impl crate :: Readable for R32_PFIC_IPRIOR51_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior51::W](W) writer structure"]
  14877. impl crate :: Writable for R32_PFIC_IPRIOR51_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR51 to value 0"]
  14878. impl crate :: Resettable for R32_PFIC_IPRIOR51_SPEC { # [inline (always)]
  14879. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR52 register accessor: an alias for `Reg<R32_PFIC_IPRIOR52_SPEC>`"]
  14880. pub type R32_PFIC_IPRIOR52 = crate :: Reg < r32_pfic_iprior52 :: R32_PFIC_IPRIOR52_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14881. pub mod r32_pfic_iprior52 { # [doc = "Register `R32_PFIC_IPRIOR52` reader"]
  14882. pub struct R (crate :: R < R32_PFIC_IPRIOR52_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR52_SPEC > ; # [inline (always)]
  14883. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR52_SPEC >> for R { # [inline (always)]
  14884. fn from (reader : crate :: R < R32_PFIC_IPRIOR52_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR52` writer"]
  14885. pub struct W (crate :: W < R32_PFIC_IPRIOR52_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR52_SPEC > ; # [inline (always)]
  14886. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14887. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR52_SPEC >> for W { # [inline (always)]
  14888. fn from (writer : crate :: W < R32_PFIC_IPRIOR52_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR52` reader - IPRIOR52"]
  14889. pub struct IPRIOR52_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR52_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR52_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR52_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14890. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR52` writer - IPRIOR52"]
  14891. pub struct IPRIOR52_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR52_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14892. # [inline (always)]
  14893. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR52"]
  14894. # [inline (always)]
  14895. pub fn iprior52 (& self) -> IPRIOR52_R { IPRIOR52_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR52"]
  14896. # [inline (always)]
  14897. pub fn iprior52 (& mut self) -> IPRIOR52_W { IPRIOR52_W { w : self } } # [doc = "Writes raw bits to the register."]
  14898. # [inline (always)]
  14899. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior52](index.html) module"]
  14900. pub struct R32_PFIC_IPRIOR52_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR52_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior52::R](R) reader structure"]
  14901. impl crate :: Readable for R32_PFIC_IPRIOR52_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior52::W](W) writer structure"]
  14902. impl crate :: Writable for R32_PFIC_IPRIOR52_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR52 to value 0"]
  14903. impl crate :: Resettable for R32_PFIC_IPRIOR52_SPEC { # [inline (always)]
  14904. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR53 register accessor: an alias for `Reg<R32_PFIC_IPRIOR53_SPEC>`"]
  14905. pub type R32_PFIC_IPRIOR53 = crate :: Reg < r32_pfic_iprior53 :: R32_PFIC_IPRIOR53_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14906. pub mod r32_pfic_iprior53 { # [doc = "Register `R32_PFIC_IPRIOR53` reader"]
  14907. pub struct R (crate :: R < R32_PFIC_IPRIOR53_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR53_SPEC > ; # [inline (always)]
  14908. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR53_SPEC >> for R { # [inline (always)]
  14909. fn from (reader : crate :: R < R32_PFIC_IPRIOR53_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR53` writer"]
  14910. pub struct W (crate :: W < R32_PFIC_IPRIOR53_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR53_SPEC > ; # [inline (always)]
  14911. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14912. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR53_SPEC >> for W { # [inline (always)]
  14913. fn from (writer : crate :: W < R32_PFIC_IPRIOR53_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR53` reader - IPRIOR53"]
  14914. pub struct IPRIOR53_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR53_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR53_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR53_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14915. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR53` writer - IPRIOR53"]
  14916. pub struct IPRIOR53_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR53_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14917. # [inline (always)]
  14918. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR53"]
  14919. # [inline (always)]
  14920. pub fn iprior53 (& self) -> IPRIOR53_R { IPRIOR53_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR53"]
  14921. # [inline (always)]
  14922. pub fn iprior53 (& mut self) -> IPRIOR53_W { IPRIOR53_W { w : self } } # [doc = "Writes raw bits to the register."]
  14923. # [inline (always)]
  14924. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior53](index.html) module"]
  14925. pub struct R32_PFIC_IPRIOR53_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR53_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior53::R](R) reader structure"]
  14926. impl crate :: Readable for R32_PFIC_IPRIOR53_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior53::W](W) writer structure"]
  14927. impl crate :: Writable for R32_PFIC_IPRIOR53_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR53 to value 0"]
  14928. impl crate :: Resettable for R32_PFIC_IPRIOR53_SPEC { # [inline (always)]
  14929. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR54 register accessor: an alias for `Reg<R32_PFIC_IPRIOR54_SPEC>`"]
  14930. pub type R32_PFIC_IPRIOR54 = crate :: Reg < r32_pfic_iprior54 :: R32_PFIC_IPRIOR54_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14931. pub mod r32_pfic_iprior54 { # [doc = "Register `R32_PFIC_IPRIOR54` reader"]
  14932. pub struct R (crate :: R < R32_PFIC_IPRIOR54_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR54_SPEC > ; # [inline (always)]
  14933. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR54_SPEC >> for R { # [inline (always)]
  14934. fn from (reader : crate :: R < R32_PFIC_IPRIOR54_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR54` writer"]
  14935. pub struct W (crate :: W < R32_PFIC_IPRIOR54_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR54_SPEC > ; # [inline (always)]
  14936. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14937. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR54_SPEC >> for W { # [inline (always)]
  14938. fn from (writer : crate :: W < R32_PFIC_IPRIOR54_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR54` reader - IPRIOR54"]
  14939. pub struct IPRIOR54_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR54_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR54_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR54_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14940. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR54` writer - IPRIOR54"]
  14941. pub struct IPRIOR54_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR54_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14942. # [inline (always)]
  14943. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR54"]
  14944. # [inline (always)]
  14945. pub fn iprior54 (& self) -> IPRIOR54_R { IPRIOR54_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR54"]
  14946. # [inline (always)]
  14947. pub fn iprior54 (& mut self) -> IPRIOR54_W { IPRIOR54_W { w : self } } # [doc = "Writes raw bits to the register."]
  14948. # [inline (always)]
  14949. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior54](index.html) module"]
  14950. pub struct R32_PFIC_IPRIOR54_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR54_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior54::R](R) reader structure"]
  14951. impl crate :: Readable for R32_PFIC_IPRIOR54_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior54::W](W) writer structure"]
  14952. impl crate :: Writable for R32_PFIC_IPRIOR54_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR54 to value 0"]
  14953. impl crate :: Resettable for R32_PFIC_IPRIOR54_SPEC { # [inline (always)]
  14954. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR55 register accessor: an alias for `Reg<R32_PFIC_IPRIOR55_SPEC>`"]
  14955. pub type R32_PFIC_IPRIOR55 = crate :: Reg < r32_pfic_iprior55 :: R32_PFIC_IPRIOR55_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14956. pub mod r32_pfic_iprior55 { # [doc = "Register `R32_PFIC_IPRIOR55` reader"]
  14957. pub struct R (crate :: R < R32_PFIC_IPRIOR55_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR55_SPEC > ; # [inline (always)]
  14958. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR55_SPEC >> for R { # [inline (always)]
  14959. fn from (reader : crate :: R < R32_PFIC_IPRIOR55_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR55` writer"]
  14960. pub struct W (crate :: W < R32_PFIC_IPRIOR55_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR55_SPEC > ; # [inline (always)]
  14961. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14962. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR55_SPEC >> for W { # [inline (always)]
  14963. fn from (writer : crate :: W < R32_PFIC_IPRIOR55_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR55` reader - IPRIOR55"]
  14964. pub struct IPRIOR55_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR55_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR55_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR55_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14965. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR55` writer - IPRIOR55"]
  14966. pub struct IPRIOR55_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR55_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14967. # [inline (always)]
  14968. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR55"]
  14969. # [inline (always)]
  14970. pub fn iprior55 (& self) -> IPRIOR55_R { IPRIOR55_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR55"]
  14971. # [inline (always)]
  14972. pub fn iprior55 (& mut self) -> IPRIOR55_W { IPRIOR55_W { w : self } } # [doc = "Writes raw bits to the register."]
  14973. # [inline (always)]
  14974. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior55](index.html) module"]
  14975. pub struct R32_PFIC_IPRIOR55_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR55_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior55::R](R) reader structure"]
  14976. impl crate :: Readable for R32_PFIC_IPRIOR55_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior55::W](W) writer structure"]
  14977. impl crate :: Writable for R32_PFIC_IPRIOR55_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR55 to value 0"]
  14978. impl crate :: Resettable for R32_PFIC_IPRIOR55_SPEC { # [inline (always)]
  14979. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR56 register accessor: an alias for `Reg<R32_PFIC_IPRIOR56_SPEC>`"]
  14980. pub type R32_PFIC_IPRIOR56 = crate :: Reg < r32_pfic_iprior56 :: R32_PFIC_IPRIOR56_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  14981. pub mod r32_pfic_iprior56 { # [doc = "Register `R32_PFIC_IPRIOR56` reader"]
  14982. pub struct R (crate :: R < R32_PFIC_IPRIOR56_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR56_SPEC > ; # [inline (always)]
  14983. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR56_SPEC >> for R { # [inline (always)]
  14984. fn from (reader : crate :: R < R32_PFIC_IPRIOR56_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR56` writer"]
  14985. pub struct W (crate :: W < R32_PFIC_IPRIOR56_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR56_SPEC > ; # [inline (always)]
  14986. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  14987. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR56_SPEC >> for W { # [inline (always)]
  14988. fn from (writer : crate :: W < R32_PFIC_IPRIOR56_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR56` reader - IPRIOR56"]
  14989. pub struct IPRIOR56_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR56_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR56_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR56_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  14990. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR56` writer - IPRIOR56"]
  14991. pub struct IPRIOR56_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR56_W < 'a > { # [doc = r"Writes raw bits to the field"]
  14992. # [inline (always)]
  14993. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR56"]
  14994. # [inline (always)]
  14995. pub fn iprior56 (& self) -> IPRIOR56_R { IPRIOR56_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR56"]
  14996. # [inline (always)]
  14997. pub fn iprior56 (& mut self) -> IPRIOR56_W { IPRIOR56_W { w : self } } # [doc = "Writes raw bits to the register."]
  14998. # [inline (always)]
  14999. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior56](index.html) module"]
  15000. pub struct R32_PFIC_IPRIOR56_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR56_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior56::R](R) reader structure"]
  15001. impl crate :: Readable for R32_PFIC_IPRIOR56_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior56::W](W) writer structure"]
  15002. impl crate :: Writable for R32_PFIC_IPRIOR56_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR56 to value 0"]
  15003. impl crate :: Resettable for R32_PFIC_IPRIOR56_SPEC { # [inline (always)]
  15004. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR57 register accessor: an alias for `Reg<R32_PFIC_IPRIOR57_SPEC>`"]
  15005. pub type R32_PFIC_IPRIOR57 = crate :: Reg < r32_pfic_iprior57 :: R32_PFIC_IPRIOR57_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15006. pub mod r32_pfic_iprior57 { # [doc = "Register `R32_PFIC_IPRIOR57` reader"]
  15007. pub struct R (crate :: R < R32_PFIC_IPRIOR57_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR57_SPEC > ; # [inline (always)]
  15008. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR57_SPEC >> for R { # [inline (always)]
  15009. fn from (reader : crate :: R < R32_PFIC_IPRIOR57_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR57` writer"]
  15010. pub struct W (crate :: W < R32_PFIC_IPRIOR57_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR57_SPEC > ; # [inline (always)]
  15011. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15012. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR57_SPEC >> for W { # [inline (always)]
  15013. fn from (writer : crate :: W < R32_PFIC_IPRIOR57_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR57` reader - IPRIOR57"]
  15014. pub struct IPRIOR57_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR57_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR57_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR57_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15015. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR57` writer - IPRIOR57"]
  15016. pub struct IPRIOR57_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR57_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15017. # [inline (always)]
  15018. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR57"]
  15019. # [inline (always)]
  15020. pub fn iprior57 (& self) -> IPRIOR57_R { IPRIOR57_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR57"]
  15021. # [inline (always)]
  15022. pub fn iprior57 (& mut self) -> IPRIOR57_W { IPRIOR57_W { w : self } } # [doc = "Writes raw bits to the register."]
  15023. # [inline (always)]
  15024. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior57](index.html) module"]
  15025. pub struct R32_PFIC_IPRIOR57_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR57_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior57::R](R) reader structure"]
  15026. impl crate :: Readable for R32_PFIC_IPRIOR57_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior57::W](W) writer structure"]
  15027. impl crate :: Writable for R32_PFIC_IPRIOR57_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR57 to value 0"]
  15028. impl crate :: Resettable for R32_PFIC_IPRIOR57_SPEC { # [inline (always)]
  15029. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR58 register accessor: an alias for `Reg<R32_PFIC_IPRIOR58_SPEC>`"]
  15030. pub type R32_PFIC_IPRIOR58 = crate :: Reg < r32_pfic_iprior58 :: R32_PFIC_IPRIOR58_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15031. pub mod r32_pfic_iprior58 { # [doc = "Register `R32_PFIC_IPRIOR58` reader"]
  15032. pub struct R (crate :: R < R32_PFIC_IPRIOR58_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR58_SPEC > ; # [inline (always)]
  15033. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR58_SPEC >> for R { # [inline (always)]
  15034. fn from (reader : crate :: R < R32_PFIC_IPRIOR58_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR58` writer"]
  15035. pub struct W (crate :: W < R32_PFIC_IPRIOR58_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR58_SPEC > ; # [inline (always)]
  15036. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15037. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR58_SPEC >> for W { # [inline (always)]
  15038. fn from (writer : crate :: W < R32_PFIC_IPRIOR58_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR58` reader - IPRIOR58"]
  15039. pub struct IPRIOR58_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR58_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR58_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR58_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15040. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR58` writer - IPRIOR58"]
  15041. pub struct IPRIOR58_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR58_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15042. # [inline (always)]
  15043. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR58"]
  15044. # [inline (always)]
  15045. pub fn iprior58 (& self) -> IPRIOR58_R { IPRIOR58_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR58"]
  15046. # [inline (always)]
  15047. pub fn iprior58 (& mut self) -> IPRIOR58_W { IPRIOR58_W { w : self } } # [doc = "Writes raw bits to the register."]
  15048. # [inline (always)]
  15049. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior58](index.html) module"]
  15050. pub struct R32_PFIC_IPRIOR58_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR58_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior58::R](R) reader structure"]
  15051. impl crate :: Readable for R32_PFIC_IPRIOR58_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior58::W](W) writer structure"]
  15052. impl crate :: Writable for R32_PFIC_IPRIOR58_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR58 to value 0"]
  15053. impl crate :: Resettable for R32_PFIC_IPRIOR58_SPEC { # [inline (always)]
  15054. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR59 register accessor: an alias for `Reg<R32_PFIC_IPRIOR59_SPEC>`"]
  15055. pub type R32_PFIC_IPRIOR59 = crate :: Reg < r32_pfic_iprior59 :: R32_PFIC_IPRIOR59_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15056. pub mod r32_pfic_iprior59 { # [doc = "Register `R32_PFIC_IPRIOR59` reader"]
  15057. pub struct R (crate :: R < R32_PFIC_IPRIOR59_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR59_SPEC > ; # [inline (always)]
  15058. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR59_SPEC >> for R { # [inline (always)]
  15059. fn from (reader : crate :: R < R32_PFIC_IPRIOR59_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR59` writer"]
  15060. pub struct W (crate :: W < R32_PFIC_IPRIOR59_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR59_SPEC > ; # [inline (always)]
  15061. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15062. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR59_SPEC >> for W { # [inline (always)]
  15063. fn from (writer : crate :: W < R32_PFIC_IPRIOR59_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR59` reader - IPRIOR59"]
  15064. pub struct IPRIOR59_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR59_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR59_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR59_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15065. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR59` writer - IPRIOR59"]
  15066. pub struct IPRIOR59_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR59_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15067. # [inline (always)]
  15068. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR59"]
  15069. # [inline (always)]
  15070. pub fn iprior59 (& self) -> IPRIOR59_R { IPRIOR59_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR59"]
  15071. # [inline (always)]
  15072. pub fn iprior59 (& mut self) -> IPRIOR59_W { IPRIOR59_W { w : self } } # [doc = "Writes raw bits to the register."]
  15073. # [inline (always)]
  15074. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior59](index.html) module"]
  15075. pub struct R32_PFIC_IPRIOR59_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR59_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior59::R](R) reader structure"]
  15076. impl crate :: Readable for R32_PFIC_IPRIOR59_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior59::W](W) writer structure"]
  15077. impl crate :: Writable for R32_PFIC_IPRIOR59_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR59 to value 0"]
  15078. impl crate :: Resettable for R32_PFIC_IPRIOR59_SPEC { # [inline (always)]
  15079. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR60 register accessor: an alias for `Reg<R32_PFIC_IPRIOR60_SPEC>`"]
  15080. pub type R32_PFIC_IPRIOR60 = crate :: Reg < r32_pfic_iprior60 :: R32_PFIC_IPRIOR60_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15081. pub mod r32_pfic_iprior60 { # [doc = "Register `R32_PFIC_IPRIOR60` reader"]
  15082. pub struct R (crate :: R < R32_PFIC_IPRIOR60_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR60_SPEC > ; # [inline (always)]
  15083. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR60_SPEC >> for R { # [inline (always)]
  15084. fn from (reader : crate :: R < R32_PFIC_IPRIOR60_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR60` writer"]
  15085. pub struct W (crate :: W < R32_PFIC_IPRIOR60_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR60_SPEC > ; # [inline (always)]
  15086. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15087. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR60_SPEC >> for W { # [inline (always)]
  15088. fn from (writer : crate :: W < R32_PFIC_IPRIOR60_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR60` reader - IPRIOR60"]
  15089. pub struct IPRIOR60_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR60_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR60_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR60_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15090. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR60` writer - IPRIOR60"]
  15091. pub struct IPRIOR60_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR60_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15092. # [inline (always)]
  15093. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR60"]
  15094. # [inline (always)]
  15095. pub fn iprior60 (& self) -> IPRIOR60_R { IPRIOR60_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR60"]
  15096. # [inline (always)]
  15097. pub fn iprior60 (& mut self) -> IPRIOR60_W { IPRIOR60_W { w : self } } # [doc = "Writes raw bits to the register."]
  15098. # [inline (always)]
  15099. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior60](index.html) module"]
  15100. pub struct R32_PFIC_IPRIOR60_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR60_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior60::R](R) reader structure"]
  15101. impl crate :: Readable for R32_PFIC_IPRIOR60_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior60::W](W) writer structure"]
  15102. impl crate :: Writable for R32_PFIC_IPRIOR60_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR60 to value 0"]
  15103. impl crate :: Resettable for R32_PFIC_IPRIOR60_SPEC { # [inline (always)]
  15104. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR61 register accessor: an alias for `Reg<R32_PFIC_IPRIOR61_SPEC>`"]
  15105. pub type R32_PFIC_IPRIOR61 = crate :: Reg < r32_pfic_iprior61 :: R32_PFIC_IPRIOR61_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15106. pub mod r32_pfic_iprior61 { # [doc = "Register `R32_PFIC_IPRIOR61` reader"]
  15107. pub struct R (crate :: R < R32_PFIC_IPRIOR61_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR61_SPEC > ; # [inline (always)]
  15108. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR61_SPEC >> for R { # [inline (always)]
  15109. fn from (reader : crate :: R < R32_PFIC_IPRIOR61_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR61` writer"]
  15110. pub struct W (crate :: W < R32_PFIC_IPRIOR61_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR61_SPEC > ; # [inline (always)]
  15111. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15112. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR61_SPEC >> for W { # [inline (always)]
  15113. fn from (writer : crate :: W < R32_PFIC_IPRIOR61_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR61` reader - IPRIOR61"]
  15114. pub struct IPRIOR61_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR61_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR61_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR61_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15115. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR61` writer - IPRIOR61"]
  15116. pub struct IPRIOR61_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR61_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15117. # [inline (always)]
  15118. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR61"]
  15119. # [inline (always)]
  15120. pub fn iprior61 (& self) -> IPRIOR61_R { IPRIOR61_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR61"]
  15121. # [inline (always)]
  15122. pub fn iprior61 (& mut self) -> IPRIOR61_W { IPRIOR61_W { w : self } } # [doc = "Writes raw bits to the register."]
  15123. # [inline (always)]
  15124. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior61](index.html) module"]
  15125. pub struct R32_PFIC_IPRIOR61_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR61_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior61::R](R) reader structure"]
  15126. impl crate :: Readable for R32_PFIC_IPRIOR61_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior61::W](W) writer structure"]
  15127. impl crate :: Writable for R32_PFIC_IPRIOR61_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR61 to value 0"]
  15128. impl crate :: Resettable for R32_PFIC_IPRIOR61_SPEC { # [inline (always)]
  15129. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR62 register accessor: an alias for `Reg<R32_PFIC_IPRIOR62_SPEC>`"]
  15130. pub type R32_PFIC_IPRIOR62 = crate :: Reg < r32_pfic_iprior62 :: R32_PFIC_IPRIOR62_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15131. pub mod r32_pfic_iprior62 { # [doc = "Register `R32_PFIC_IPRIOR62` reader"]
  15132. pub struct R (crate :: R < R32_PFIC_IPRIOR62_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR62_SPEC > ; # [inline (always)]
  15133. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR62_SPEC >> for R { # [inline (always)]
  15134. fn from (reader : crate :: R < R32_PFIC_IPRIOR62_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR62` writer"]
  15135. pub struct W (crate :: W < R32_PFIC_IPRIOR62_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR62_SPEC > ; # [inline (always)]
  15136. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15137. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR62_SPEC >> for W { # [inline (always)]
  15138. fn from (writer : crate :: W < R32_PFIC_IPRIOR62_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR62` reader - IPRIOR62"]
  15139. pub struct IPRIOR62_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR62_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR62_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR62_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15140. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR62` writer - IPRIOR62"]
  15141. pub struct IPRIOR62_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR62_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15142. # [inline (always)]
  15143. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR62"]
  15144. # [inline (always)]
  15145. pub fn iprior62 (& self) -> IPRIOR62_R { IPRIOR62_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR62"]
  15146. # [inline (always)]
  15147. pub fn iprior62 (& mut self) -> IPRIOR62_W { IPRIOR62_W { w : self } } # [doc = "Writes raw bits to the register."]
  15148. # [inline (always)]
  15149. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior62](index.html) module"]
  15150. pub struct R32_PFIC_IPRIOR62_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR62_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior62::R](R) reader structure"]
  15151. impl crate :: Readable for R32_PFIC_IPRIOR62_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior62::W](W) writer structure"]
  15152. impl crate :: Writable for R32_PFIC_IPRIOR62_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR62 to value 0"]
  15153. impl crate :: Resettable for R32_PFIC_IPRIOR62_SPEC { # [inline (always)]
  15154. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR63 register accessor: an alias for `Reg<R32_PFIC_IPRIOR63_SPEC>`"]
  15155. pub type R32_PFIC_IPRIOR63 = crate :: Reg < r32_pfic_iprior63 :: R32_PFIC_IPRIOR63_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
  15156. pub mod r32_pfic_iprior63 { # [doc = "Register `R32_PFIC_IPRIOR63` reader"]
  15157. pub struct R (crate :: R < R32_PFIC_IPRIOR63_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR63_SPEC > ; # [inline (always)]
  15158. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR63_SPEC >> for R { # [inline (always)]
  15159. fn from (reader : crate :: R < R32_PFIC_IPRIOR63_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR63` writer"]
  15160. pub struct W (crate :: W < R32_PFIC_IPRIOR63_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR63_SPEC > ; # [inline (always)]
  15161. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15162. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR63_SPEC >> for W { # [inline (always)]
  15163. fn from (writer : crate :: W < R32_PFIC_IPRIOR63_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR63` reader - IPRIOR63"]
  15164. pub struct IPRIOR63_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR63_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR63_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR63_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15165. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR63` writer - IPRIOR63"]
  15166. pub struct IPRIOR63_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR63_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15167. # [inline (always)]
  15168. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR63"]
  15169. # [inline (always)]
  15170. pub fn iprior63 (& self) -> IPRIOR63_R { IPRIOR63_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR63"]
  15171. # [inline (always)]
  15172. pub fn iprior63 (& mut self) -> IPRIOR63_W { IPRIOR63_W { w : self } } # [doc = "Writes raw bits to the register."]
  15173. # [inline (always)]
  15174. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior63](index.html) module"]
  15175. pub struct R32_PFIC_IPRIOR63_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR63_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior63::R](R) reader structure"]
  15176. impl crate :: Readable for R32_PFIC_IPRIOR63_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior63::W](W) writer structure"]
  15177. impl crate :: Writable for R32_PFIC_IPRIOR63_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR63 to value 0"]
  15178. impl crate :: Resettable for R32_PFIC_IPRIOR63_SPEC { # [inline (always)]
  15179. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_SCTLR register accessor: an alias for `Reg<R32_PFIC_SCTLR_SPEC>`"]
  15180. pub type R32_PFIC_SCTLR = crate :: Reg < r32_pfic_sctlr :: R32_PFIC_SCTLR_SPEC > ; # [doc = "System Control Register"]
  15181. pub mod r32_pfic_sctlr { # [doc = "Register `R32_PFIC_SCTLR` reader"]
  15182. pub struct R (crate :: R < R32_PFIC_SCTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_SCTLR_SPEC > ; # [inline (always)]
  15183. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_SCTLR_SPEC >> for R { # [inline (always)]
  15184. fn from (reader : crate :: R < R32_PFIC_SCTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_SCTLR` writer"]
  15185. pub struct W (crate :: W < R32_PFIC_SCTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_SCTLR_SPEC > ; # [inline (always)]
  15186. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15187. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_SCTLR_SPEC >> for W { # [inline (always)]
  15188. fn from (writer : crate :: W < R32_PFIC_SCTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `SLEEPONEXIT` reader - SLEEPONEXIT"]
  15189. pub struct SLEEPONEXIT_R (crate :: FieldReader < bool , bool >) ; impl SLEEPONEXIT_R { pub (crate) fn new (bits : bool) -> Self { SLEEPONEXIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SLEEPONEXIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15190. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SLEEPONEXIT` writer - SLEEPONEXIT"]
  15191. pub struct SLEEPONEXIT_W < 'a > { w : & 'a mut W , } impl < 'a > SLEEPONEXIT_W < 'a > { # [doc = r"Sets the field bit"]
  15192. # [inline (always)]
  15193. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15194. # [inline (always)]
  15195. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15196. # [inline (always)]
  15197. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `SLEEPDEEP` reader - SLEEPDEEP"]
  15198. pub struct SLEEPDEEP_R (crate :: FieldReader < bool , bool >) ; impl SLEEPDEEP_R { pub (crate) fn new (bits : bool) -> Self { SLEEPDEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SLEEPDEEP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15199. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SLEEPDEEP` writer - SLEEPDEEP"]
  15200. pub struct SLEEPDEEP_W < 'a > { w : & 'a mut W , } impl < 'a > SLEEPDEEP_W < 'a > { # [doc = r"Sets the field bit"]
  15201. # [inline (always)]
  15202. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15203. # [inline (always)]
  15204. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15205. # [inline (always)]
  15206. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `WFITOWFE` reader - WFITOWFE"]
  15207. pub struct WFITOWFE_R (crate :: FieldReader < bool , bool >) ; impl WFITOWFE_R { pub (crate) fn new (bits : bool) -> Self { WFITOWFE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for WFITOWFE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15208. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `WFITOWFE` writer - WFITOWFE"]
  15209. pub struct WFITOWFE_W < 'a > { w : & 'a mut W , } impl < 'a > WFITOWFE_W < 'a > { # [doc = r"Sets the field bit"]
  15210. # [inline (always)]
  15211. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15212. # [inline (always)]
  15213. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15214. # [inline (always)]
  15215. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `SEVONPEND` reader - SEVONPEND"]
  15216. pub struct SEVONPEND_R (crate :: FieldReader < bool , bool >) ; impl SEVONPEND_R { pub (crate) fn new (bits : bool) -> Self { SEVONPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SEVONPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15217. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SEVONPEND` writer - SEVONPEND"]
  15218. pub struct SEVONPEND_W < 'a > { w : & 'a mut W , } impl < 'a > SEVONPEND_W < 'a > { # [doc = r"Sets the field bit"]
  15219. # [inline (always)]
  15220. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15221. # [inline (always)]
  15222. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15223. # [inline (always)]
  15224. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `SETEVENT` reader - SETEVENT"]
  15225. pub struct SETEVENT_R (crate :: FieldReader < bool , bool >) ; impl SETEVENT_R { pub (crate) fn new (bits : bool) -> Self { SETEVENT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SETEVENT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15226. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SETEVENT` writer - SETEVENT"]
  15227. pub struct SETEVENT_W < 'a > { w : & 'a mut W , } impl < 'a > SETEVENT_W < 'a > { # [doc = r"Sets the field bit"]
  15228. # [inline (always)]
  15229. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15230. # [inline (always)]
  15231. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15232. # [inline (always)]
  15233. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u32 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 1 - SLEEPONEXIT"]
  15234. # [inline (always)]
  15235. pub fn sleeponexit (& self) -> SLEEPONEXIT_R { SLEEPONEXIT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SLEEPDEEP"]
  15236. # [inline (always)]
  15237. pub fn sleepdeep (& self) -> SLEEPDEEP_R { SLEEPDEEP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - WFITOWFE"]
  15238. # [inline (always)]
  15239. pub fn wfitowfe (& self) -> WFITOWFE_R { WFITOWFE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SEVONPEND"]
  15240. # [inline (always)]
  15241. pub fn sevonpend (& self) -> SEVONPEND_R { SEVONPEND_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SETEVENT"]
  15242. # [inline (always)]
  15243. pub fn setevent (& self) -> SETEVENT_R { SETEVENT_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - SLEEPONEXIT"]
  15244. # [inline (always)]
  15245. pub fn sleeponexit (& mut self) -> SLEEPONEXIT_W { SLEEPONEXIT_W { w : self } } # [doc = "Bit 2 - SLEEPDEEP"]
  15246. # [inline (always)]
  15247. pub fn sleepdeep (& mut self) -> SLEEPDEEP_W { SLEEPDEEP_W { w : self } } # [doc = "Bit 3 - WFITOWFE"]
  15248. # [inline (always)]
  15249. pub fn wfitowfe (& mut self) -> WFITOWFE_W { WFITOWFE_W { w : self } } # [doc = "Bit 4 - SEVONPEND"]
  15250. # [inline (always)]
  15251. pub fn sevonpend (& mut self) -> SEVONPEND_W { SEVONPEND_W { w : self } } # [doc = "Bit 5 - SETEVENT"]
  15252. # [inline (always)]
  15253. pub fn setevent (& mut self) -> SETEVENT_W { SETEVENT_W { w : self } } # [doc = "Writes raw bits to the register."]
  15254. # [inline (always)]
  15255. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "System Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_sctlr](index.html) module"]
  15256. pub struct R32_PFIC_SCTLR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_SCTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_sctlr::R](R) reader structure"]
  15257. impl crate :: Readable for R32_PFIC_SCTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_sctlr::W](W) writer structure"]
  15258. impl crate :: Writable for R32_PFIC_SCTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_SCTLR to value 0"]
  15259. impl crate :: Resettable for R32_PFIC_SCTLR_SPEC { # [inline (always)]
  15260. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "Systick register"]
  15261. pub struct SYSTICK { _marker : PhantomData < * const () > } unsafe impl Send for SYSTICK { } impl SYSTICK { # [doc = r"Pointer to the register block"]
  15262. pub const PTR : * const systick :: RegisterBlock = 0xe000_f000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  15263. # [inline (always)]
  15264. pub const fn ptr () -> * const systick :: RegisterBlock { Self :: PTR } } impl Deref for SYSTICK { type Target = systick :: RegisterBlock ; # [inline (always)]
  15265. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SYSTICK { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SYSTICK") . finish () } } # [doc = "Systick register"]
  15266. pub mod systick { # [doc = r"Register block"]
  15267. # [repr (C)]
  15268. pub struct RegisterBlock { # [doc = "0x00 - Systick counter control register"]
  15269. pub r32_stk_ctlr : crate :: Reg < r32_stk_ctlr :: R32_STK_CTLR_SPEC > , # [doc = "0x04 - Systick counter low register"]
  15270. pub r32_stk_cntl : crate :: Reg < r32_stk_cntl :: R32_STK_CNTL_SPEC > , # [doc = "0x08 - Systick counter high register"]
  15271. pub r32_stk_cnth : crate :: Reg < r32_stk_cnth :: R32_STK_CNTH_SPEC > , # [doc = "0x0c - Systick compare low register"]
  15272. pub r32_stk_cmplr : crate :: Reg < r32_stk_cmplr :: R32_STK_CMPLR_SPEC > , # [doc = "0x10 - Systick compare high register"]
  15273. pub r32_stk_cmphr : crate :: Reg < r32_stk_cmphr :: R32_STK_CMPHR_SPEC > , # [doc = "0x14 - Systick counter flag"]
  15274. pub r32_stk_cntfg : crate :: Reg < r32_stk_cntfg :: R32_STK_CNTFG_SPEC > , } # [doc = "R32_STK_CTLR register accessor: an alias for `Reg<R32_STK_CTLR_SPEC>`"]
  15275. pub type R32_STK_CTLR = crate :: Reg < r32_stk_ctlr :: R32_STK_CTLR_SPEC > ; # [doc = "Systick counter control register"]
  15276. pub mod r32_stk_ctlr { # [doc = "Register `R32_STK_CTLR` reader"]
  15277. pub struct R (crate :: R < R32_STK_CTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CTLR_SPEC > ; # [inline (always)]
  15278. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CTLR_SPEC >> for R { # [inline (always)]
  15279. fn from (reader : crate :: R < R32_STK_CTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CTLR` writer"]
  15280. pub struct W (crate :: W < R32_STK_CTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CTLR_SPEC > ; # [inline (always)]
  15281. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15282. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CTLR_SPEC >> for W { # [inline (always)]
  15283. fn from (writer : crate :: W < R32_STK_CTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `STE` reader - Systick counter enable"]
  15284. pub struct STE_R (crate :: FieldReader < bool , bool >) ; impl STE_R { pub (crate) fn new (bits : bool) -> Self { STE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15285. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STE` writer - Systick counter enable"]
  15286. pub struct STE_W < 'a > { w : & 'a mut W , } impl < 'a > STE_W < 'a > { # [doc = r"Sets the field bit"]
  15287. # [inline (always)]
  15288. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15289. # [inline (always)]
  15290. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15291. # [inline (always)]
  15292. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `STIE` reader - Systick counter interrupt enable"]
  15293. pub struct STIE_R (crate :: FieldReader < bool , bool >) ; impl STIE_R { pub (crate) fn new (bits : bool) -> Self { STIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15294. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STIE` writer - Systick counter interrupt enable"]
  15295. pub struct STIE_W < 'a > { w : & 'a mut W , } impl < 'a > STIE_W < 'a > { # [doc = r"Sets the field bit"]
  15296. # [inline (always)]
  15297. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15298. # [inline (always)]
  15299. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15300. # [inline (always)]
  15301. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `STCLK` reader - System counter clock Source selection"]
  15302. pub struct STCLK_R (crate :: FieldReader < bool , bool >) ; impl STCLK_R { pub (crate) fn new (bits : bool) -> Self { STCLK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STCLK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15303. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STCLK` writer - System counter clock Source selection"]
  15304. pub struct STCLK_W < 'a > { w : & 'a mut W , } impl < 'a > STCLK_W < 'a > { # [doc = r"Sets the field bit"]
  15305. # [inline (always)]
  15306. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15307. # [inline (always)]
  15308. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15309. # [inline (always)]
  15310. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `STRELOAD` reader - System counter reload control"]
  15311. pub struct STRELOAD_R (crate :: FieldReader < bool , bool >) ; impl STRELOAD_R { pub (crate) fn new (bits : bool) -> Self { STRELOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STRELOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15312. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STRELOAD` writer - System counter reload control"]
  15313. pub struct STRELOAD_W < 'a > { w : & 'a mut W , } impl < 'a > STRELOAD_W < 'a > { # [doc = r"Sets the field bit"]
  15314. # [inline (always)]
  15315. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15316. # [inline (always)]
  15317. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15318. # [inline (always)]
  15319. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u32 & 0x01) << 8) ; self . w } } impl R { # [doc = "Bit 0 - Systick counter enable"]
  15320. # [inline (always)]
  15321. pub fn ste (& self) -> STE_R { STE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Systick counter interrupt enable"]
  15322. # [inline (always)]
  15323. pub fn stie (& self) -> STIE_R { STIE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - System counter clock Source selection"]
  15324. # [inline (always)]
  15325. pub fn stclk (& self) -> STCLK_R { STCLK_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 8 - System counter reload control"]
  15326. # [inline (always)]
  15327. pub fn streload (& self) -> STRELOAD_R { STRELOAD_R :: new (((self . bits >> 8) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Systick counter enable"]
  15328. # [inline (always)]
  15329. pub fn ste (& mut self) -> STE_W { STE_W { w : self } } # [doc = "Bit 1 - Systick counter interrupt enable"]
  15330. # [inline (always)]
  15331. pub fn stie (& mut self) -> STIE_W { STIE_W { w : self } } # [doc = "Bit 2 - System counter clock Source selection"]
  15332. # [inline (always)]
  15333. pub fn stclk (& mut self) -> STCLK_W { STCLK_W { w : self } } # [doc = "Bit 8 - System counter reload control"]
  15334. # [inline (always)]
  15335. pub fn streload (& mut self) -> STRELOAD_W { STRELOAD_W { w : self } } # [doc = "Writes raw bits to the register."]
  15336. # [inline (always)]
  15337. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_ctlr](index.html) module"]
  15338. pub struct R32_STK_CTLR_SPEC ; impl crate :: RegisterSpec for R32_STK_CTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_ctlr::R](R) reader structure"]
  15339. impl crate :: Readable for R32_STK_CTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_ctlr::W](W) writer structure"]
  15340. impl crate :: Writable for R32_STK_CTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CTLR to value 0"]
  15341. impl crate :: Resettable for R32_STK_CTLR_SPEC { # [inline (always)]
  15342. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTL register accessor: an alias for `Reg<R32_STK_CNTL_SPEC>`"]
  15343. pub type R32_STK_CNTL = crate :: Reg < r32_stk_cntl :: R32_STK_CNTL_SPEC > ; # [doc = "Systick counter low register"]
  15344. pub mod r32_stk_cntl { # [doc = "Register `R32_STK_CNTL` reader"]
  15345. pub struct R (crate :: R < R32_STK_CNTL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTL_SPEC > ; # [inline (always)]
  15346. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTL_SPEC >> for R { # [inline (always)]
  15347. fn from (reader : crate :: R < R32_STK_CNTL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTL` writer"]
  15348. pub struct W (crate :: W < R32_STK_CNTL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTL_SPEC > ; # [inline (always)]
  15349. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15350. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTL_SPEC >> for W { # [inline (always)]
  15351. fn from (writer : crate :: W < R32_STK_CNTL_SPEC >) -> Self { W (writer) } } # [doc = "Field `CNTL` reader - CNTL"]
  15352. pub struct CNTL_R (crate :: FieldReader < u32 , u32 >) ; impl CNTL_R { pub (crate) fn new (bits : u32) -> Self { CNTL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTL_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15353. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTL` writer - CNTL"]
  15354. pub struct CNTL_W < 'a > { w : & 'a mut W , } impl < 'a > CNTL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15355. # [inline (always)]
  15356. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CNTL"]
  15357. # [inline (always)]
  15358. pub fn cntl (& self) -> CNTL_R { CNTL_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CNTL"]
  15359. # [inline (always)]
  15360. pub fn cntl (& mut self) -> CNTL_W { CNTL_W { w : self } } # [doc = "Writes raw bits to the register."]
  15361. # [inline (always)]
  15362. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cntl](index.html) module"]
  15363. pub struct R32_STK_CNTL_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTL_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cntl::R](R) reader structure"]
  15364. impl crate :: Readable for R32_STK_CNTL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cntl::W](W) writer structure"]
  15365. impl crate :: Writable for R32_STK_CNTL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTL to value 0"]
  15366. impl crate :: Resettable for R32_STK_CNTL_SPEC { # [inline (always)]
  15367. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTH register accessor: an alias for `Reg<R32_STK_CNTH_SPEC>`"]
  15368. pub type R32_STK_CNTH = crate :: Reg < r32_stk_cnth :: R32_STK_CNTH_SPEC > ; # [doc = "Systick counter high register"]
  15369. pub mod r32_stk_cnth { # [doc = "Register `R32_STK_CNTH` reader"]
  15370. pub struct R (crate :: R < R32_STK_CNTH_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTH_SPEC > ; # [inline (always)]
  15371. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTH_SPEC >> for R { # [inline (always)]
  15372. fn from (reader : crate :: R < R32_STK_CNTH_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTH` writer"]
  15373. pub struct W (crate :: W < R32_STK_CNTH_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTH_SPEC > ; # [inline (always)]
  15374. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15375. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTH_SPEC >> for W { # [inline (always)]
  15376. fn from (writer : crate :: W < R32_STK_CNTH_SPEC >) -> Self { W (writer) } } # [doc = "Field `CNTH` reader - CNTH"]
  15377. pub struct CNTH_R (crate :: FieldReader < u32 , u32 >) ; impl CNTH_R { pub (crate) fn new (bits : u32) -> Self { CNTH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTH_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15378. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTH` writer - CNTH"]
  15379. pub struct CNTH_W < 'a > { w : & 'a mut W , } impl < 'a > CNTH_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15380. # [inline (always)]
  15381. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CNTH"]
  15382. # [inline (always)]
  15383. pub fn cnth (& self) -> CNTH_R { CNTH_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CNTH"]
  15384. # [inline (always)]
  15385. pub fn cnth (& mut self) -> CNTH_W { CNTH_W { w : self } } # [doc = "Writes raw bits to the register."]
  15386. # [inline (always)]
  15387. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cnth](index.html) module"]
  15388. pub struct R32_STK_CNTH_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTH_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cnth::R](R) reader structure"]
  15389. impl crate :: Readable for R32_STK_CNTH_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cnth::W](W) writer structure"]
  15390. impl crate :: Writable for R32_STK_CNTH_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTH to value 0"]
  15391. impl crate :: Resettable for R32_STK_CNTH_SPEC { # [inline (always)]
  15392. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CMPLR register accessor: an alias for `Reg<R32_STK_CMPLR_SPEC>`"]
  15393. pub type R32_STK_CMPLR = crate :: Reg < r32_stk_cmplr :: R32_STK_CMPLR_SPEC > ; # [doc = "Systick compare low register"]
  15394. pub mod r32_stk_cmplr { # [doc = "Register `R32_STK_CMPLR` reader"]
  15395. pub struct R (crate :: R < R32_STK_CMPLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CMPLR_SPEC > ; # [inline (always)]
  15396. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CMPLR_SPEC >> for R { # [inline (always)]
  15397. fn from (reader : crate :: R < R32_STK_CMPLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CMPLR` writer"]
  15398. pub struct W (crate :: W < R32_STK_CMPLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CMPLR_SPEC > ; # [inline (always)]
  15399. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15400. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CMPLR_SPEC >> for W { # [inline (always)]
  15401. fn from (writer : crate :: W < R32_STK_CMPLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `CMPL` reader - CMPL"]
  15402. pub struct CMPL_R (crate :: FieldReader < u32 , u32 >) ; impl CMPL_R { pub (crate) fn new (bits : u32) -> Self { CMPL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CMPL_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15403. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CMPL` writer - CMPL"]
  15404. pub struct CMPL_W < 'a > { w : & 'a mut W , } impl < 'a > CMPL_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15405. # [inline (always)]
  15406. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CMPL"]
  15407. # [inline (always)]
  15408. pub fn cmpl (& self) -> CMPL_R { CMPL_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CMPL"]
  15409. # [inline (always)]
  15410. pub fn cmpl (& mut self) -> CMPL_W { CMPL_W { w : self } } # [doc = "Writes raw bits to the register."]
  15411. # [inline (always)]
  15412. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick compare low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cmplr](index.html) module"]
  15413. pub struct R32_STK_CMPLR_SPEC ; impl crate :: RegisterSpec for R32_STK_CMPLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cmplr::R](R) reader structure"]
  15414. impl crate :: Readable for R32_STK_CMPLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cmplr::W](W) writer structure"]
  15415. impl crate :: Writable for R32_STK_CMPLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CMPLR to value 0"]
  15416. impl crate :: Resettable for R32_STK_CMPLR_SPEC { # [inline (always)]
  15417. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CMPHR register accessor: an alias for `Reg<R32_STK_CMPHR_SPEC>`"]
  15418. pub type R32_STK_CMPHR = crate :: Reg < r32_stk_cmphr :: R32_STK_CMPHR_SPEC > ; # [doc = "Systick compare high register"]
  15419. pub mod r32_stk_cmphr { # [doc = "Register `R32_STK_CMPHR` reader"]
  15420. pub struct R (crate :: R < R32_STK_CMPHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CMPHR_SPEC > ; # [inline (always)]
  15421. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CMPHR_SPEC >> for R { # [inline (always)]
  15422. fn from (reader : crate :: R < R32_STK_CMPHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CMPHR` writer"]
  15423. pub struct W (crate :: W < R32_STK_CMPHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CMPHR_SPEC > ; # [inline (always)]
  15424. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15425. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CMPHR_SPEC >> for W { # [inline (always)]
  15426. fn from (writer : crate :: W < R32_STK_CMPHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `CMPH` reader - CMPH"]
  15427. pub struct CMPH_R (crate :: FieldReader < u32 , u32 >) ; impl CMPH_R { pub (crate) fn new (bits : u32) -> Self { CMPH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CMPH_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15428. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CMPH` writer - CMPH"]
  15429. pub struct CMPH_W < 'a > { w : & 'a mut W , } impl < 'a > CMPH_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15430. # [inline (always)]
  15431. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CMPH"]
  15432. # [inline (always)]
  15433. pub fn cmph (& self) -> CMPH_R { CMPH_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CMPH"]
  15434. # [inline (always)]
  15435. pub fn cmph (& mut self) -> CMPH_W { CMPH_W { w : self } } # [doc = "Writes raw bits to the register."]
  15436. # [inline (always)]
  15437. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick compare high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cmphr](index.html) module"]
  15438. pub struct R32_STK_CMPHR_SPEC ; impl crate :: RegisterSpec for R32_STK_CMPHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cmphr::R](R) reader structure"]
  15439. impl crate :: Readable for R32_STK_CMPHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cmphr::W](W) writer structure"]
  15440. impl crate :: Writable for R32_STK_CMPHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CMPHR to value 0"]
  15441. impl crate :: Resettable for R32_STK_CMPHR_SPEC { # [inline (always)]
  15442. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTFG register accessor: an alias for `Reg<R32_STK_CNTFG_SPEC>`"]
  15443. pub type R32_STK_CNTFG = crate :: Reg < r32_stk_cntfg :: R32_STK_CNTFG_SPEC > ; # [doc = "Systick counter flag"]
  15444. pub mod r32_stk_cntfg { # [doc = "Register `R32_STK_CNTFG` reader"]
  15445. pub struct R (crate :: R < R32_STK_CNTFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTFG_SPEC > ; # [inline (always)]
  15446. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTFG_SPEC >> for R { # [inline (always)]
  15447. fn from (reader : crate :: R < R32_STK_CNTFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTFG` writer"]
  15448. pub struct W (crate :: W < R32_STK_CNTFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTFG_SPEC > ; # [inline (always)]
  15449. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15450. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTFG_SPEC >> for W { # [inline (always)]
  15451. fn from (writer : crate :: W < R32_STK_CNTFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `SWIE` reader - System soft interrupt enable"]
  15452. pub struct SWIE_R (crate :: FieldReader < bool , bool >) ; impl SWIE_R { pub (crate) fn new (bits : bool) -> Self { SWIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SWIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15453. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SWIE` writer - System soft interrupt enable"]
  15454. pub struct SWIE_W < 'a > { w : & 'a mut W , } impl < 'a > SWIE_W < 'a > { # [doc = r"Sets the field bit"]
  15455. # [inline (always)]
  15456. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15457. # [inline (always)]
  15458. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15459. # [inline (always)]
  15460. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `CNTIF` reader - Systick counter clear zero flag"]
  15461. pub struct CNTIF_R (crate :: FieldReader < bool , bool >) ; impl CNTIF_R { pub (crate) fn new (bits : bool) -> Self { CNTIF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTIF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15462. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTIF` writer - Systick counter clear zero flag"]
  15463. pub struct CNTIF_W < 'a > { w : & 'a mut W , } impl < 'a > CNTIF_W < 'a > { # [doc = r"Sets the field bit"]
  15464. # [inline (always)]
  15465. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15466. # [inline (always)]
  15467. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15468. # [inline (always)]
  15469. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 0 - System soft interrupt enable"]
  15470. # [inline (always)]
  15471. pub fn swie (& self) -> SWIE_R { SWIE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Systick counter clear zero flag"]
  15472. # [inline (always)]
  15473. pub fn cntif (& self) -> CNTIF_R { CNTIF_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - System soft interrupt enable"]
  15474. # [inline (always)]
  15475. pub fn swie (& mut self) -> SWIE_W { SWIE_W { w : self } } # [doc = "Bit 1 - Systick counter clear zero flag"]
  15476. # [inline (always)]
  15477. pub fn cntif (& mut self) -> CNTIF_W { CNTIF_W { w : self } } # [doc = "Writes raw bits to the register."]
  15478. # [inline (always)]
  15479. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cntfg](index.html) module"]
  15480. pub struct R32_STK_CNTFG_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTFG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cntfg::R](R) reader structure"]
  15481. impl crate :: Readable for R32_STK_CNTFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cntfg::W](W) writer structure"]
  15482. impl crate :: Writable for R32_STK_CNTFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTFG to value 0"]
  15483. impl crate :: Resettable for R32_STK_CNTFG_SPEC { # [inline (always)]
  15484. fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "EMMC register"]
  15485. pub struct EMMC { _marker : PhantomData < * const () > } unsafe impl Send for EMMC { } impl EMMC { # [doc = r"Pointer to the register block"]
  15486. pub const PTR : * const emmc :: RegisterBlock = 0x4000_a000 as * const _ ; # [doc = r"Return the pointer to the register block"]
  15487. # [inline (always)]
  15488. pub const fn ptr () -> * const emmc :: RegisterBlock { Self :: PTR } } impl Deref for EMMC { type Target = emmc :: RegisterBlock ; # [inline (always)]
  15489. fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for EMMC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("EMMC") . finish () } } # [doc = "EMMC register"]
  15490. pub mod emmc { # [doc = r"Register block"]
  15491. # [repr (C)]
  15492. pub struct RegisterBlock { # [doc = "0x00 - SD 32bits command argument register"]
  15493. pub r32_emmc_argument : crate :: Reg < r32_emmc_argument :: R32_EMMC_ARGUMENT_SPEC > , # [doc = "0x04 - SD 16bits cmd setting register"]
  15494. pub r16_emmc_cmd_set : crate :: Reg < r16_emmc_cmd_set :: R16_EMMC_CMD_SET_SPEC > , _reserved2 : [u8 ; 0x02]
  15495. , # [doc = "0x08 - SD 128bits response register, \\[31:0\\]
  15496. 32bits"]
  15497. pub r32_emmc_response0 : crate :: Reg < r32_emmc_response0 :: R32_EMMC_RESPONSE0_SPEC > , # [doc = "0x0c - SD 128bits response register, \\[63:32\\]
  15498. 32bits"]
  15499. pub r32_emmc_response1 : crate :: Reg < r32_emmc_response1 :: R32_EMMC_RESPONSE1_SPEC > , # [doc = "0x10 - SD 128bits response register, \\[95:64\\]
  15500. 32bits"]
  15501. pub r32_emmc_response2 : crate :: Reg < r32_emmc_response2 :: R32_EMMC_RESPONSE2_SPEC > , _reserved_5_r32_emmc : [u8 ; 0x04]
  15502. , # [doc = "0x18 - SD 8bits control register"]
  15503. pub r8_emmc_control : crate :: Reg < r8_emmc_control :: R8_EMMC_CONTROL_SPEC > , _reserved7 : [u8 ; 0x03]
  15504. , # [doc = "0x1c - SD 8bits data timeout value"]
  15505. pub r8_emmc_timeout : crate :: Reg < r8_emmc_timeout :: R8_EMMC_TIMEOUT_SPEC > , _reserved8 : [u8 ; 0x03]
  15506. , # [doc = "0x20 - SD status"]
  15507. pub r32_emmc_status : crate :: Reg < r32_emmc_status :: R32_EMMC_STATUS_SPEC > , # [doc = "0x24 - SD 16bits interrupt flag register"]
  15508. pub r16_emmc_int_fg : crate :: Reg < r16_emmc_int_fg :: R16_EMMC_INT_FG_SPEC > , _reserved10 : [u8 ; 0x02]
  15509. , # [doc = "0x28 - SD 16bits interrupt enable register"]
  15510. pub r16_emmc_int_en : crate :: Reg < r16_emmc_int_en :: R16_EMMC_INT_EN_SPEC > , _reserved11 : [u8 ; 0x02]
  15511. , # [doc = "0x2c - SD 16bits DMA start address register when to operate"]
  15512. pub r32_emmc_dma_beg1 : crate :: Reg < r32_emmc_dma_beg1 :: R32_EMMC_DMA_BEG1_SPEC > , # [doc = "0x30 - SD 32bits data counter, \\[15:0\\]
  15513. number of blocks this time will tran/recv, \\[27:16\\]
  15514. block sise(byte number) of every block in this time tran/recv"]
  15515. pub r32_emmc_block_cfg : crate :: Reg < r32_emmc_block_cfg :: R32_EMMC_BLOCK_CFG_SPEC > , # [doc = "0x34 - SD TRANSFER MODE register"]
  15516. pub r32_emmc_tran_mode : crate :: Reg < r32_emmc_tran_mode :: R32_EMMC_TRAN_MODE_SPEC > , # [doc = "0x38 - SD clock divider register"]
  15517. pub r16_emmc_clk_div : crate :: Reg < r16_emmc_clk_div :: R16_EMMC_CLK_DIV_SPEC > , _reserved15 : [u8 ; 0x02]
  15518. , # [doc = "0x3c - SD 16bits DMA start address register when to operate"]
  15519. pub r32_emmc_dma_beg2 : crate :: Reg < r32_emmc_dma_beg2 :: R32_EMMC_DMA_BEG2_SPEC > , } impl RegisterBlock { # [doc = "0x14 - Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
  15520. 32bits"]
  15521. # [inline (always)]
  15522. pub fn r32_emmc_write_cont (& self) -> & crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (20usize) as * const crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC >) } } # [doc = "0x14 - SD 128bits response register, \\[127:96\\]
  15523. 32bits"]
  15524. # [inline (always)]
  15525. pub fn r32_emmc_response3 (& self) -> & crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (20usize) as * const crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC >) } } } # [doc = "R16_EMMC_CLK_DIV register accessor: an alias for `Reg<R16_EMMC_CLK_DIV_SPEC>`"]
  15526. pub type R16_EMMC_CLK_DIV = crate :: Reg < r16_emmc_clk_div :: R16_EMMC_CLK_DIV_SPEC > ; # [doc = "SD clock divider register"]
  15527. pub mod r16_emmc_clk_div { # [doc = "Register `R16_EMMC_CLK_DIV` reader"]
  15528. pub struct R (crate :: R < R16_EMMC_CLK_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_CLK_DIV_SPEC > ; # [inline (always)]
  15529. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_CLK_DIV_SPEC >> for R { # [inline (always)]
  15530. fn from (reader : crate :: R < R16_EMMC_CLK_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_CLK_DIV` writer"]
  15531. pub struct W (crate :: W < R16_EMMC_CLK_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_CLK_DIV_SPEC > ; # [inline (always)]
  15532. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15533. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_CLK_DIV_SPEC >> for W { # [inline (always)]
  15534. fn from (writer : crate :: W < R16_EMMC_CLK_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DIV_MASK` reader - clk div"]
  15535. pub struct RB_EMMC_DIV_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_DIV_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_DIV_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DIV_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  15536. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DIV_MASK` writer - clk div"]
  15537. pub struct RB_EMMC_DIV_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DIV_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15538. # [inline (always)]
  15539. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x1f) | (value as u16 & 0x1f) ; self . w } } # [doc = "Field `RB_EMMC_CLKOE` reader - chip output sdclk oe"]
  15540. pub struct RB_EMMC_CLKOE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CLKOE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CLKOE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CLKOE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15541. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CLKOE` writer - chip output sdclk oe"]
  15542. pub struct RB_EMMC_CLKOE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CLKOE_W < 'a > { # [doc = r"Sets the field bit"]
  15543. # [inline (always)]
  15544. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15545. # [inline (always)]
  15546. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15547. # [inline (always)]
  15548. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_CLKMode` reader - EMMC clock frequency mode selection bit"]
  15549. pub struct RB_EMMC_CLKMODE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CLKMODE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CLKMODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CLKMODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15550. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CLKMode` writer - EMMC clock frequency mode selection bit"]
  15551. pub struct RB_EMMC_CLKMODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CLKMODE_W < 'a > { # [doc = r"Sets the field bit"]
  15552. # [inline (always)]
  15553. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15554. # [inline (always)]
  15555. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15556. # [inline (always)]
  15557. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } # [doc = "Field `RB_EMMC_PHASEINV` reader - invert chip output sdclk phase"]
  15558. pub struct RB_EMMC_PHASEINV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_PHASEINV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_PHASEINV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_PHASEINV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15559. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_PHASEINV` writer - invert chip output sdclk phase"]
  15560. pub struct RB_EMMC_PHASEINV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_PHASEINV_W < 'a > { # [doc = r"Sets the field bit"]
  15561. # [inline (always)]
  15562. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15563. # [inline (always)]
  15564. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15565. # [inline (always)]
  15566. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 10)) | ((value as u16 & 0x01) << 10) ; self . w } } impl R { # [doc = "Bits 0:4 - clk div"]
  15567. # [inline (always)]
  15568. pub fn rb_emmc_div_mask (& self) -> RB_EMMC_DIV_MASK_R { RB_EMMC_DIV_MASK_R :: new ((self . bits & 0x1f) as u8) } # [doc = "Bit 8 - chip output sdclk oe"]
  15569. # [inline (always)]
  15570. pub fn rb_emmc_clkoe (& self) -> RB_EMMC_CLKOE_R { RB_EMMC_CLKOE_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - EMMC clock frequency mode selection bit"]
  15571. # [inline (always)]
  15572. pub fn rb_emmc_clkmode (& self) -> RB_EMMC_CLKMODE_R { RB_EMMC_CLKMODE_R :: new (((self . bits >> 9) & 0x01) != 0) } # [doc = "Bit 10 - invert chip output sdclk phase"]
  15573. # [inline (always)]
  15574. pub fn rb_emmc_phaseinv (& self) -> RB_EMMC_PHASEINV_R { RB_EMMC_PHASEINV_R :: new (((self . bits >> 10) & 0x01) != 0) } } impl W { # [doc = "Bits 0:4 - clk div"]
  15575. # [inline (always)]
  15576. pub fn rb_emmc_div_mask (& mut self) -> RB_EMMC_DIV_MASK_W { RB_EMMC_DIV_MASK_W { w : self } } # [doc = "Bit 8 - chip output sdclk oe"]
  15577. # [inline (always)]
  15578. pub fn rb_emmc_clkoe (& mut self) -> RB_EMMC_CLKOE_W { RB_EMMC_CLKOE_W { w : self } } # [doc = "Bit 9 - EMMC clock frequency mode selection bit"]
  15579. # [inline (always)]
  15580. pub fn rb_emmc_clkmode (& mut self) -> RB_EMMC_CLKMODE_W { RB_EMMC_CLKMODE_W { w : self } } # [doc = "Bit 10 - invert chip output sdclk phase"]
  15581. # [inline (always)]
  15582. pub fn rb_emmc_phaseinv (& mut self) -> RB_EMMC_PHASEINV_W { RB_EMMC_PHASEINV_W { w : self } } # [doc = "Writes raw bits to the register."]
  15583. # [inline (always)]
  15584. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD clock divider register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_clk_div](index.html) module"]
  15585. pub struct R16_EMMC_CLK_DIV_SPEC ; impl crate :: RegisterSpec for R16_EMMC_CLK_DIV_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_clk_div::R](R) reader structure"]
  15586. impl crate :: Readable for R16_EMMC_CLK_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_clk_div::W](W) writer structure"]
  15587. impl crate :: Writable for R16_EMMC_CLK_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_CLK_DIV to value 0x0213"]
  15588. impl crate :: Resettable for R16_EMMC_CLK_DIV_SPEC { # [inline (always)]
  15589. fn reset_value () -> Self :: Ux { 0x0213 } } } # [doc = "R32_EMMC_ARGUMENT register accessor: an alias for `Reg<R32_EMMC_ARGUMENT_SPEC>`"]
  15590. pub type R32_EMMC_ARGUMENT = crate :: Reg < r32_emmc_argument :: R32_EMMC_ARGUMENT_SPEC > ; # [doc = "SD 32bits command argument register"]
  15591. pub mod r32_emmc_argument { # [doc = "Register `R32_EMMC_ARGUMENT` reader"]
  15592. pub struct R (crate :: R < R32_EMMC_ARGUMENT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_ARGUMENT_SPEC > ; # [inline (always)]
  15593. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_ARGUMENT_SPEC >> for R { # [inline (always)]
  15594. fn from (reader : crate :: R < R32_EMMC_ARGUMENT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_ARGUMENT` writer"]
  15595. pub struct W (crate :: W < R32_EMMC_ARGUMENT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_ARGUMENT_SPEC > ; # [inline (always)]
  15596. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15597. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_ARGUMENT_SPEC >> for W { # [inline (always)]
  15598. fn from (writer : crate :: W < R32_EMMC_ARGUMENT_SPEC >) -> Self { W (writer) } } # [doc = "Field `EMMC_ARGUMENT` reader - 32 bit command parameter register"]
  15599. pub struct EMMC_ARGUMENT_R (crate :: FieldReader < u32 , u32 >) ; impl EMMC_ARGUMENT_R { pub (crate) fn new (bits : u32) -> Self { EMMC_ARGUMENT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for EMMC_ARGUMENT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15600. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `EMMC_ARGUMENT` writer - 32 bit command parameter register"]
  15601. pub struct EMMC_ARGUMENT_W < 'a > { w : & 'a mut W , } impl < 'a > EMMC_ARGUMENT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15602. # [inline (always)]
  15603. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - 32 bit command parameter register"]
  15604. # [inline (always)]
  15605. pub fn emmc_argument (& self) -> EMMC_ARGUMENT_R { EMMC_ARGUMENT_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - 32 bit command parameter register"]
  15606. # [inline (always)]
  15607. pub fn emmc_argument (& mut self) -> EMMC_ARGUMENT_W { EMMC_ARGUMENT_W { w : self } } # [doc = "Writes raw bits to the register."]
  15608. # [inline (always)]
  15609. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 32bits command argument register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_argument](index.html) module"]
  15610. pub struct R32_EMMC_ARGUMENT_SPEC ; impl crate :: RegisterSpec for R32_EMMC_ARGUMENT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_argument::R](R) reader structure"]
  15611. impl crate :: Readable for R32_EMMC_ARGUMENT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_argument::W](W) writer structure"]
  15612. impl crate :: Writable for R32_EMMC_ARGUMENT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_ARGUMENT to value 0"]
  15613. impl crate :: Resettable for R32_EMMC_ARGUMENT_SPEC { # [inline (always)]
  15614. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_CMD_SET register accessor: an alias for `Reg<R16_EMMC_CMD_SET_SPEC>`"]
  15615. pub type R16_EMMC_CMD_SET = crate :: Reg < r16_emmc_cmd_set :: R16_EMMC_CMD_SET_SPEC > ; # [doc = "SD 16bits cmd setting register"]
  15616. pub mod r16_emmc_cmd_set { # [doc = "Register `R16_EMMC_CMD_SET` reader"]
  15617. pub struct R (crate :: R < R16_EMMC_CMD_SET_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_CMD_SET_SPEC > ; # [inline (always)]
  15618. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_CMD_SET_SPEC >> for R { # [inline (always)]
  15619. fn from (reader : crate :: R < R16_EMMC_CMD_SET_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_CMD_SET` writer"]
  15620. pub struct W (crate :: W < R16_EMMC_CMD_SET_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_CMD_SET_SPEC > ; # [inline (always)]
  15621. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15622. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_CMD_SET_SPEC >> for W { # [inline (always)]
  15623. fn from (writer : crate :: W < R16_EMMC_CMD_SET_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_CMDIDX_MASK` reader - the index number of the currently sent command"]
  15624. pub struct RB_EMMC_CMDIDX_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_CMDIDX_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_CMDIDX_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CMDIDX_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  15625. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CMDIDX_MASK` writer - the index number of the currently sent command"]
  15626. pub struct RB_EMMC_CMDIDX_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CMDIDX_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15627. # [inline (always)]
  15628. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x3f) | (value as u16 & 0x3f) ; self . w } } # [doc = "Field `RB_EMMC_RPTY_MASK` reader - current respone type"]
  15629. pub struct RB_EMMC_RPTY_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_RPTY_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_RPTY_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_RPTY_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  15630. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_RPTY_MASK` writer - current respone type"]
  15631. pub struct RB_EMMC_RPTY_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_RPTY_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15632. # [inline (always)]
  15633. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 8)) | ((value as u16 & 0x03) << 8) ; self . w } } # [doc = "Field `RB_EMMC_CKCRC` reader - check the response CRC"]
  15634. pub struct RB_EMMC_CKCRC_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CKCRC_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CKCRC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CKCRC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15635. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CKCRC` writer - check the response CRC"]
  15636. pub struct RB_EMMC_CKCRC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CKCRC_W < 'a > { # [doc = r"Sets the field bit"]
  15637. # [inline (always)]
  15638. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15639. # [inline (always)]
  15640. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15641. # [inline (always)]
  15642. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 10)) | ((value as u16 & 0x01) << 10) ; self . w } } # [doc = "Field `RB_EMMC_CKIDX` reader - check the response command index"]
  15643. pub struct RB_EMMC_CKIDX_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CKIDX_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CKIDX_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CKIDX_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15644. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CKIDX` writer - check the response command index"]
  15645. pub struct RB_EMMC_CKIDX_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CKIDX_W < 'a > { # [doc = r"Sets the field bit"]
  15646. # [inline (always)]
  15647. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15648. # [inline (always)]
  15649. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15650. # [inline (always)]
  15651. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 11)) | ((value as u16 & 0x01) << 11) ; self . w } } impl R { # [doc = "Bits 0:5 - the index number of the currently sent command"]
  15652. # [inline (always)]
  15653. pub fn rb_emmc_cmdidx_mask (& self) -> RB_EMMC_CMDIDX_MASK_R { RB_EMMC_CMDIDX_MASK_R :: new ((self . bits & 0x3f) as u8) } # [doc = "Bits 8:9 - current respone type"]
  15654. # [inline (always)]
  15655. pub fn rb_emmc_rpty_mask (& self) -> RB_EMMC_RPTY_MASK_R { RB_EMMC_RPTY_MASK_R :: new (((self . bits >> 8) & 0x03) as u8) } # [doc = "Bit 10 - check the response CRC"]
  15656. # [inline (always)]
  15657. pub fn rb_emmc_ckcrc (& self) -> RB_EMMC_CKCRC_R { RB_EMMC_CKCRC_R :: new (((self . bits >> 10) & 0x01) != 0) } # [doc = "Bit 11 - check the response command index"]
  15658. # [inline (always)]
  15659. pub fn rb_emmc_ckidx (& self) -> RB_EMMC_CKIDX_R { RB_EMMC_CKIDX_R :: new (((self . bits >> 11) & 0x01) != 0) } } impl W { # [doc = "Bits 0:5 - the index number of the currently sent command"]
  15660. # [inline (always)]
  15661. pub fn rb_emmc_cmdidx_mask (& mut self) -> RB_EMMC_CMDIDX_MASK_W { RB_EMMC_CMDIDX_MASK_W { w : self } } # [doc = "Bits 8:9 - current respone type"]
  15662. # [inline (always)]
  15663. pub fn rb_emmc_rpty_mask (& mut self) -> RB_EMMC_RPTY_MASK_W { RB_EMMC_RPTY_MASK_W { w : self } } # [doc = "Bit 10 - check the response CRC"]
  15664. # [inline (always)]
  15665. pub fn rb_emmc_ckcrc (& mut self) -> RB_EMMC_CKCRC_W { RB_EMMC_CKCRC_W { w : self } } # [doc = "Bit 11 - check the response command index"]
  15666. # [inline (always)]
  15667. pub fn rb_emmc_ckidx (& mut self) -> RB_EMMC_CKIDX_W { RB_EMMC_CKIDX_W { w : self } } # [doc = "Writes raw bits to the register."]
  15668. # [inline (always)]
  15669. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits cmd setting register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_cmd_set](index.html) module"]
  15670. pub struct R16_EMMC_CMD_SET_SPEC ; impl crate :: RegisterSpec for R16_EMMC_CMD_SET_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_cmd_set::R](R) reader structure"]
  15671. impl crate :: Readable for R16_EMMC_CMD_SET_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_cmd_set::W](W) writer structure"]
  15672. impl crate :: Writable for R16_EMMC_CMD_SET_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_CMD_SET to value 0"]
  15673. impl crate :: Resettable for R16_EMMC_CMD_SET_SPEC { # [inline (always)]
  15674. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE0 register accessor: an alias for `Reg<R32_EMMC_RESPONSE0_SPEC>`"]
  15675. pub type R32_EMMC_RESPONSE0 = crate :: Reg < r32_emmc_response0 :: R32_EMMC_RESPONSE0_SPEC > ; # [doc = "SD 128bits response register, \\[31:0\\]
  15676. 32bits"]
  15677. pub mod r32_emmc_response0 { # [doc = "Register `R32_EMMC_RESPONSE0` reader"]
  15678. pub struct R (crate :: R < R32_EMMC_RESPONSE0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE0_SPEC > ; # [inline (always)]
  15679. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE0_SPEC >> for R { # [inline (always)]
  15680. fn from (reader : crate :: R < R32_EMMC_RESPONSE0_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE0` reader - response parameter register"]
  15681. pub struct R32_EMMC_RESPONSE0_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE0_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15682. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - response parameter register"]
  15683. # [inline (always)]
  15684. pub fn r32_emmc_response0 (& self) -> R32_EMMC_RESPONSE0_R { R32_EMMC_RESPONSE0_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[31:0\\]
  15685. 32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response0](index.html) module"]
  15686. pub struct R32_EMMC_RESPONSE0_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response0::R](R) reader structure"]
  15687. impl crate :: Readable for R32_EMMC_RESPONSE0_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE0 to value 0"]
  15688. impl crate :: Resettable for R32_EMMC_RESPONSE0_SPEC { # [inline (always)]
  15689. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE1 register accessor: an alias for `Reg<R32_EMMC_RESPONSE1_SPEC>`"]
  15690. pub type R32_EMMC_RESPONSE1 = crate :: Reg < r32_emmc_response1 :: R32_EMMC_RESPONSE1_SPEC > ; # [doc = "SD 128bits response register, \\[63:32\\]
  15691. 32bits"]
  15692. pub mod r32_emmc_response1 { # [doc = "Register `R32_EMMC_RESPONSE1` reader"]
  15693. pub struct R (crate :: R < R32_EMMC_RESPONSE1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE1_SPEC > ; # [inline (always)]
  15694. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE1_SPEC >> for R { # [inline (always)]
  15695. fn from (reader : crate :: R < R32_EMMC_RESPONSE1_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE1` reader - response parameter register"]
  15696. pub struct R32_EMMC_RESPONSE1_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE1_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15697. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 32:63 - response parameter register"]
  15698. # [inline (always)]
  15699. pub fn r32_emmc_response1 (& self) -> R32_EMMC_RESPONSE1_R { R32_EMMC_RESPONSE1_R :: new (((self . bits >> 32) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[63:32\\]
  15700. 32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response1](index.html) module"]
  15701. pub struct R32_EMMC_RESPONSE1_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response1::R](R) reader structure"]
  15702. impl crate :: Readable for R32_EMMC_RESPONSE1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE1 to value 0"]
  15703. impl crate :: Resettable for R32_EMMC_RESPONSE1_SPEC { # [inline (always)]
  15704. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE2 register accessor: an alias for `Reg<R32_EMMC_RESPONSE2_SPEC>`"]
  15705. pub type R32_EMMC_RESPONSE2 = crate :: Reg < r32_emmc_response2 :: R32_EMMC_RESPONSE2_SPEC > ; # [doc = "SD 128bits response register, \\[95:64\\]
  15706. 32bits"]
  15707. pub mod r32_emmc_response2 { # [doc = "Register `R32_EMMC_RESPONSE2` reader"]
  15708. pub struct R (crate :: R < R32_EMMC_RESPONSE2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE2_SPEC > ; # [inline (always)]
  15709. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE2_SPEC >> for R { # [inline (always)]
  15710. fn from (reader : crate :: R < R32_EMMC_RESPONSE2_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE2` reader - response parameter register"]
  15711. pub struct R32_EMMC_RESPONSE2_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE2_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15712. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 64:95 - response parameter register"]
  15713. # [inline (always)]
  15714. pub fn r32_emmc_response2 (& self) -> R32_EMMC_RESPONSE2_R { R32_EMMC_RESPONSE2_R :: new (((self . bits >> 64) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[95:64\\]
  15715. 32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response2](index.html) module"]
  15716. pub struct R32_EMMC_RESPONSE2_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response2::R](R) reader structure"]
  15717. impl crate :: Readable for R32_EMMC_RESPONSE2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE2 to value 0"]
  15718. impl crate :: Resettable for R32_EMMC_RESPONSE2_SPEC { # [inline (always)]
  15719. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE3 register accessor: an alias for `Reg<R32_EMMC_RESPONSE3_SPEC>`"]
  15720. pub type R32_EMMC_RESPONSE3 = crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC > ; # [doc = "SD 128bits response register, \\[127:96\\]
  15721. 32bits"]
  15722. pub mod r32_emmc_response3 { # [doc = "Register `R32_EMMC_RESPONSE3` reader"]
  15723. pub struct R (crate :: R < R32_EMMC_RESPONSE3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE3_SPEC > ; # [inline (always)]
  15724. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE3_SPEC >> for R { # [inline (always)]
  15725. fn from (reader : crate :: R < R32_EMMC_RESPONSE3_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE3` reader - response parameter register"]
  15726. pub struct R32_EMMC_RESPONSE3_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE3_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  15727. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 96:127 - response parameter register"]
  15728. # [inline (always)]
  15729. pub fn r32_emmc_response3 (& self) -> R32_EMMC_RESPONSE3_R { R32_EMMC_RESPONSE3_R :: new (((self . bits >> 96) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[127:96\\]
  15730. 32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response3](index.html) module"]
  15731. pub struct R32_EMMC_RESPONSE3_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response3::R](R) reader structure"]
  15732. impl crate :: Readable for R32_EMMC_RESPONSE3_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE3 to value 0"]
  15733. impl crate :: Resettable for R32_EMMC_RESPONSE3_SPEC { # [inline (always)]
  15734. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_WRITE_CONT register accessor: an alias for `Reg<R32_EMMC_WRITE_CONT_SPEC>`"]
  15735. pub type R32_EMMC_WRITE_CONT = crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC > ; # [doc = "Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
  15736. 32bits"]
  15737. pub mod r32_emmc_write_cont { # [doc = "Register `R32_EMMC_WRITE_CONT` writer"]
  15738. pub struct W (crate :: W < R32_EMMC_WRITE_CONT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_WRITE_CONT_SPEC > ; # [inline (always)]
  15739. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15740. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_WRITE_CONT_SPEC >> for W { # [inline (always)]
  15741. fn from (writer : crate :: W < R32_EMMC_WRITE_CONT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_EMMC_WRITE_CONT` writer - response parameter register"]
  15742. pub struct R32_EMMC_WRITE_CONT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_EMMC_WRITE_CONT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15743. # [inline (always)]
  15744. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xffff_ffff << 96)) | ((value as u32 & 0xffff_ffff) << 96) ; self . w } } impl W { # [doc = "Bits 96:127 - response parameter register"]
  15745. # [inline (always)]
  15746. pub fn r32_emmc_write_cont (& mut self) -> R32_EMMC_WRITE_CONT_W { R32_EMMC_WRITE_CONT_W { w : self } } # [doc = "Writes raw bits to the register."]
  15747. # [inline (always)]
  15748. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
  15749. 32bits\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_write_cont](index.html) module"]
  15750. pub struct R32_EMMC_WRITE_CONT_SPEC ; impl crate :: RegisterSpec for R32_EMMC_WRITE_CONT_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_write_cont::W](W) writer structure"]
  15751. impl crate :: Writable for R32_EMMC_WRITE_CONT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_WRITE_CONT to value 0"]
  15752. impl crate :: Resettable for R32_EMMC_WRITE_CONT_SPEC { # [inline (always)]
  15753. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_EMMC_CONTROL register accessor: an alias for `Reg<R8_EMMC_CONTROL_SPEC>`"]
  15754. pub type R8_EMMC_CONTROL = crate :: Reg < r8_emmc_control :: R8_EMMC_CONTROL_SPEC > ; # [doc = "SD 8bits control register"]
  15755. pub mod r8_emmc_control { # [doc = "Register `R8_EMMC_CONTROL` reader"]
  15756. pub struct R (crate :: R < R8_EMMC_CONTROL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_EMMC_CONTROL_SPEC > ; # [inline (always)]
  15757. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_EMMC_CONTROL_SPEC >> for R { # [inline (always)]
  15758. fn from (reader : crate :: R < R8_EMMC_CONTROL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_EMMC_CONTROL` writer"]
  15759. pub struct W (crate :: W < R8_EMMC_CONTROL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_EMMC_CONTROL_SPEC > ; # [inline (always)]
  15760. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15761. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_EMMC_CONTROL_SPEC >> for W { # [inline (always)]
  15762. fn from (writer : crate :: W < R8_EMMC_CONTROL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_LW_MASK` reader - effctive data width for sending or receiving data"]
  15763. pub struct RB_EMMC_LW_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_LW_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_LW_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_LW_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  15764. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_LW_MASK` writer - effctive data width for sending or receiving data"]
  15765. pub struct RB_EMMC_LW_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_LW_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15766. # [inline (always)]
  15767. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_EMMC_ALL_CLR` reader - reset all the inner logic, default is valid"]
  15768. pub struct RB_EMMC_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15769. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_ALL_CLR` writer - reset all the inner logic, default is valid"]
  15770. pub struct RB_EMMC_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
  15771. # [inline (always)]
  15772. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15773. # [inline (always)]
  15774. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15775. # [inline (always)]
  15776. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_DMAEN` reader - enable the dma"]
  15777. pub struct RB_EMMC_DMAEN_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DMAEN_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DMAEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAEN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15778. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAEN` writer - enable the dma"]
  15779. pub struct RB_EMMC_DMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAEN_W < 'a > { # [doc = r"Sets the field bit"]
  15780. # [inline (always)]
  15781. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15782. # [inline (always)]
  15783. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15784. # [inline (always)]
  15785. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_RST_LGC` reader - reset the data tran/recv logic"]
  15786. pub struct RB_EMMC_RST_LGC_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_RST_LGC_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_RST_LGC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_RST_LGC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15787. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_RST_LGC` writer - reset the data tran/recv logic"]
  15788. pub struct RB_EMMC_RST_LGC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_RST_LGC_W < 'a > { # [doc = r"Sets the field bit"]
  15789. # [inline (always)]
  15790. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15791. # [inline (always)]
  15792. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15793. # [inline (always)]
  15794. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_NEGSMP` reader - controller use nagedge sample cmd"]
  15795. pub struct RB_EMMC_NEGSMP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_NEGSMP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_NEGSMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_NEGSMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15796. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_NEGSMP` writer - controller use nagedge sample cmd"]
  15797. pub struct RB_EMMC_NEGSMP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_NEGSMP_W < 'a > { # [doc = r"Sets the field bit"]
  15798. # [inline (always)]
  15799. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15800. # [inline (always)]
  15801. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15802. # [inline (always)]
  15803. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - effctive data width for sending or receiving data"]
  15804. # [inline (always)]
  15805. pub fn rb_emmc_lw_mask (& self) -> RB_EMMC_LW_MASK_R { RB_EMMC_LW_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - reset all the inner logic, default is valid"]
  15806. # [inline (always)]
  15807. pub fn rb_emmc_all_clr (& self) -> RB_EMMC_ALL_CLR_R { RB_EMMC_ALL_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable the dma"]
  15808. # [inline (always)]
  15809. pub fn rb_emmc_dmaen (& self) -> RB_EMMC_DMAEN_R { RB_EMMC_DMAEN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - reset the data tran/recv logic"]
  15810. # [inline (always)]
  15811. pub fn rb_emmc_rst_lgc (& self) -> RB_EMMC_RST_LGC_R { RB_EMMC_RST_LGC_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - controller use nagedge sample cmd"]
  15812. # [inline (always)]
  15813. pub fn rb_emmc_negsmp (& self) -> RB_EMMC_NEGSMP_R { RB_EMMC_NEGSMP_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - effctive data width for sending or receiving data"]
  15814. # [inline (always)]
  15815. pub fn rb_emmc_lw_mask (& mut self) -> RB_EMMC_LW_MASK_W { RB_EMMC_LW_MASK_W { w : self } } # [doc = "Bit 2 - reset all the inner logic, default is valid"]
  15816. # [inline (always)]
  15817. pub fn rb_emmc_all_clr (& mut self) -> RB_EMMC_ALL_CLR_W { RB_EMMC_ALL_CLR_W { w : self } } # [doc = "Bit 3 - enable the dma"]
  15818. # [inline (always)]
  15819. pub fn rb_emmc_dmaen (& mut self) -> RB_EMMC_DMAEN_W { RB_EMMC_DMAEN_W { w : self } } # [doc = "Bit 4 - reset the data tran/recv logic"]
  15820. # [inline (always)]
  15821. pub fn rb_emmc_rst_lgc (& mut self) -> RB_EMMC_RST_LGC_W { RB_EMMC_RST_LGC_W { w : self } } # [doc = "Bit 5 - controller use nagedge sample cmd"]
  15822. # [inline (always)]
  15823. pub fn rb_emmc_negsmp (& mut self) -> RB_EMMC_NEGSMP_W { RB_EMMC_NEGSMP_W { w : self } } # [doc = "Writes raw bits to the register."]
  15824. # [inline (always)]
  15825. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 8bits control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_emmc_control](index.html) module"]
  15826. pub struct R8_EMMC_CONTROL_SPEC ; impl crate :: RegisterSpec for R8_EMMC_CONTROL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_emmc_control::R](R) reader structure"]
  15827. impl crate :: Readable for R8_EMMC_CONTROL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_emmc_control::W](W) writer structure"]
  15828. impl crate :: Writable for R8_EMMC_CONTROL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_EMMC_CONTROL to value 0x15"]
  15829. impl crate :: Resettable for R8_EMMC_CONTROL_SPEC { # [inline (always)]
  15830. fn reset_value () -> Self :: Ux { 0x15 } } } # [doc = "R8_EMMC_TIMEOUT register accessor: an alias for `Reg<R8_EMMC_TIMEOUT_SPEC>`"]
  15831. pub type R8_EMMC_TIMEOUT = crate :: Reg < r8_emmc_timeout :: R8_EMMC_TIMEOUT_SPEC > ; # [doc = "SD 8bits data timeout value"]
  15832. pub mod r8_emmc_timeout { # [doc = "Register `R8_EMMC_TIMEOUT` reader"]
  15833. pub struct R (crate :: R < R8_EMMC_TIMEOUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_EMMC_TIMEOUT_SPEC > ; # [inline (always)]
  15834. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_EMMC_TIMEOUT_SPEC >> for R { # [inline (always)]
  15835. fn from (reader : crate :: R < R8_EMMC_TIMEOUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_EMMC_TIMEOUT` writer"]
  15836. pub struct W (crate :: W < R8_EMMC_TIMEOUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_EMMC_TIMEOUT_SPEC > ; # [inline (always)]
  15837. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15838. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_EMMC_TIMEOUT_SPEC >> for W { # [inline (always)]
  15839. fn from (writer : crate :: W < R8_EMMC_TIMEOUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_TOCNT_MASK` reader - response /data timeout configuration"]
  15840. pub struct RB_EMMC_TOCNT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_TOCNT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_TOCNT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_TOCNT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  15841. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_TOCNT_MASK` writer - response /data timeout configuration"]
  15842. pub struct RB_EMMC_TOCNT_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_TOCNT_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  15843. # [inline (always)]
  15844. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } impl R { # [doc = "Bits 0:3 - response /data timeout configuration"]
  15845. # [inline (always)]
  15846. pub fn rb_emmc_tocnt_mask (& self) -> RB_EMMC_TOCNT_MASK_R { RB_EMMC_TOCNT_MASK_R :: new ((self . bits & 0x0f) as u8) } } impl W { # [doc = "Bits 0:3 - response /data timeout configuration"]
  15847. # [inline (always)]
  15848. pub fn rb_emmc_tocnt_mask (& mut self) -> RB_EMMC_TOCNT_MASK_W { RB_EMMC_TOCNT_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
  15849. # [inline (always)]
  15850. pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 8bits data timeout value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_emmc_timeout](index.html) module"]
  15851. pub struct R8_EMMC_TIMEOUT_SPEC ; impl crate :: RegisterSpec for R8_EMMC_TIMEOUT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_emmc_timeout::R](R) reader structure"]
  15852. impl crate :: Readable for R8_EMMC_TIMEOUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_emmc_timeout::W](W) writer structure"]
  15853. impl crate :: Writable for R8_EMMC_TIMEOUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_EMMC_TIMEOUT to value 0x0c"]
  15854. impl crate :: Resettable for R8_EMMC_TIMEOUT_SPEC { # [inline (always)]
  15855. fn reset_value () -> Self :: Ux { 0x0c } } } # [doc = "R32_EMMC_STATUS register accessor: an alias for `Reg<R32_EMMC_STATUS_SPEC>`"]
  15856. pub type R32_EMMC_STATUS = crate :: Reg < r32_emmc_status :: R32_EMMC_STATUS_SPEC > ; # [doc = "SD status"]
  15857. pub mod r32_emmc_status { # [doc = "Register `R32_EMMC_STATUS` reader"]
  15858. pub struct R (crate :: R < R32_EMMC_STATUS_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_STATUS_SPEC > ; # [inline (always)]
  15859. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_STATUS_SPEC >> for R { # [inline (always)]
  15860. fn from (reader : crate :: R < R32_EMMC_STATUS_SPEC >) -> Self { R (reader) } } # [doc = "Field `MASK_BLOCK_NUM` reader - the number of blocks successfully transmitted in the current multi-block transmission"]
  15861. pub struct MASK_BLOCK_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl MASK_BLOCK_NUM_R { pub (crate) fn new (bits : u16) -> Self { MASK_BLOCK_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for MASK_BLOCK_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  15862. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CMDSTA` reader - indicate cmd line is high level now"]
  15863. pub struct RB_EMMC_CMDSTA_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CMDSTA_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CMDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CMDSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15864. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DAT0STA` reader - indicate dat\\[0\\]
  15865. line is high level now"]
  15866. pub struct RB_EMMC_DAT0STA_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DAT0STA_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DAT0STA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DAT0STA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15867. fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - the number of blocks successfully transmitted in the current multi-block transmission"]
  15868. # [inline (always)]
  15869. pub fn mask_block_num (& self) -> MASK_BLOCK_NUM_R { MASK_BLOCK_NUM_R :: new ((self . bits & 0xffff) as u16) } # [doc = "Bit 16 - indicate cmd line is high level now"]
  15870. # [inline (always)]
  15871. pub fn rb_emmc_cmdsta (& self) -> RB_EMMC_CMDSTA_R { RB_EMMC_CMDSTA_R :: new (((self . bits >> 16) & 0x01) != 0) } # [doc = "Bit 17 - indicate dat\\[0\\]
  15872. line is high level now"]
  15873. # [inline (always)]
  15874. pub fn rb_emmc_dat0sta (& self) -> RB_EMMC_DAT0STA_R { RB_EMMC_DAT0STA_R :: new (((self . bits >> 17) & 0x01) != 0) } } # [doc = "SD status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_status](index.html) module"]
  15875. pub struct R32_EMMC_STATUS_SPEC ; impl crate :: RegisterSpec for R32_EMMC_STATUS_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_status::R](R) reader structure"]
  15876. impl crate :: Readable for R32_EMMC_STATUS_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_STATUS to value 0"]
  15877. impl crate :: Resettable for R32_EMMC_STATUS_SPEC { # [inline (always)]
  15878. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_INT_FG register accessor: an alias for `Reg<R16_EMMC_INT_FG_SPEC>`"]
  15879. pub type R16_EMMC_INT_FG = crate :: Reg < r16_emmc_int_fg :: R16_EMMC_INT_FG_SPEC > ; # [doc = "SD 16bits interrupt flag register"]
  15880. pub mod r16_emmc_int_fg { # [doc = "Register `R16_EMMC_INT_FG` reader"]
  15881. pub struct R (crate :: R < R16_EMMC_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_INT_FG_SPEC > ; # [inline (always)]
  15882. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_INT_FG_SPEC >> for R { # [inline (always)]
  15883. fn from (reader : crate :: R < R16_EMMC_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_INT_FG` writer"]
  15884. pub struct W (crate :: W < R16_EMMC_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_INT_FG_SPEC > ; # [inline (always)]
  15885. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  15886. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_INT_FG_SPEC >> for W { # [inline (always)]
  15887. fn from (writer : crate :: W < R16_EMMC_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_IF_RE_TMOUT` reader - indicate when expect the response, timeout"]
  15888. pub struct RB_EMMC_IF_RE_TMOUT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_RE_TMOUT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_RE_TMOUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_RE_TMOUT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15889. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_RE_TMOUT` writer - indicate when expect the response, timeout"]
  15890. pub struct RB_EMMC_IF_RE_TMOUT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_RE_TMOUT_W < 'a > { # [doc = r"Sets the field bit"]
  15891. # [inline (always)]
  15892. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15893. # [inline (always)]
  15894. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15895. # [inline (always)]
  15896. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_IF_RECRC_WR` reader - indicate CRC error of the response"]
  15897. pub struct RB_EMMC_IF_RECRC_WR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_RECRC_WR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_RECRC_WR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_RECRC_WR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15898. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_RECRC_WR` writer - indicate CRC error of the response"]
  15899. pub struct RB_EMMC_IF_RECRC_WR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_RECRC_WR_W < 'a > { # [doc = r"Sets the field bit"]
  15900. # [inline (always)]
  15901. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15902. # [inline (always)]
  15903. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15904. # [inline (always)]
  15905. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_IF_REIDX_ER` reader - indicate INDEX error of the response"]
  15906. pub struct RB_EMMC_IF_REIDX_ER_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_REIDX_ER_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_REIDX_ER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_REIDX_ER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15907. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_REIDX_ER` writer - indicate INDEX error of the response"]
  15908. pub struct RB_EMMC_IF_REIDX_ER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_REIDX_ER_W < 'a > { # [doc = r"Sets the field bit"]
  15909. # [inline (always)]
  15910. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15911. # [inline (always)]
  15912. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15913. # [inline (always)]
  15914. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_IF_CMDDONE` reader - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
  15915. pub struct RB_EMMC_IF_CMDDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_CMDDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_CMDDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_CMDDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15916. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_CMDDONE` writer - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
  15917. pub struct RB_EMMC_IF_CMDDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_CMDDONE_W < 'a > { # [doc = r"Sets the field bit"]
  15918. # [inline (always)]
  15919. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15920. # [inline (always)]
  15921. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15922. # [inline (always)]
  15923. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_IF_DATTMO` reader - data line busy timeout"]
  15924. pub struct RB_EMMC_IF_DATTMO_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_DATTMO_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_DATTMO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_DATTMO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15925. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_DATTMO` writer - data line busy timeout"]
  15926. pub struct RB_EMMC_IF_DATTMO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_DATTMO_W < 'a > { # [doc = r"Sets the field bit"]
  15927. # [inline (always)]
  15928. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15929. # [inline (always)]
  15930. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15931. # [inline (always)]
  15932. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u16 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_IF_TRANERR` reader - last block have encountered a CRC error"]
  15933. pub struct RB_EMMC_IF_TRANERR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_TRANERR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_TRANERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_TRANERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15934. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_TRANERR` writer - last block have encountered a CRC error"]
  15935. pub struct RB_EMMC_IF_TRANERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_TRANERR_W < 'a > { # [doc = r"Sets the field bit"]
  15936. # [inline (always)]
  15937. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15938. # [inline (always)]
  15939. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15940. # [inline (always)]
  15941. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u16 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_EMMC_IF_TRANDONE` reader - all the blocks have been tran/recv successfully"]
  15942. pub struct RB_EMMC_IF_TRANDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_TRANDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_TRANDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_TRANDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15943. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_TRANDONE` writer - all the blocks have been tran/recv successfully"]
  15944. pub struct RB_EMMC_IF_TRANDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_TRANDONE_W < 'a > { # [doc = r"Sets the field bit"]
  15945. # [inline (always)]
  15946. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15947. # [inline (always)]
  15948. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15949. # [inline (always)]
  15950. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u16 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_EMMC_IF_BKGAP` reader - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
  15951. pub struct RB_EMMC_IF_BKGAP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_BKGAP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_BKGAP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_BKGAP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15952. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_BKGAP` writer - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
  15953. pub struct RB_EMMC_IF_BKGAP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_BKGAP_W < 'a > { # [doc = r"Sets the field bit"]
  15954. # [inline (always)]
  15955. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15956. # [inline (always)]
  15957. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15958. # [inline (always)]
  15959. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_EMMC_IF_FIFO_OV` reader - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
  15960. pub struct RB_EMMC_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15961. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_FIFO_OV` writer - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
  15962. pub struct RB_EMMC_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  15963. # [inline (always)]
  15964. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15965. # [inline (always)]
  15966. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15967. # [inline (always)]
  15968. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_IF_SDIOINT` reader - interrupt from SDIO card inside"]
  15969. pub struct RB_EMMC_IF_SDIOINT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_SDIOINT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_SDIOINT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_SDIOINT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  15970. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_SDIOINT` writer - interrupt from SDIO card inside"]
  15971. pub struct RB_EMMC_IF_SDIOINT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_SDIOINT_W < 'a > { # [doc = r"Sets the field bit"]
  15972. # [inline (always)]
  15973. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  15974. # [inline (always)]
  15975. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  15976. # [inline (always)]
  15977. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bit 0 - indicate when expect the response, timeout"]
  15978. # [inline (always)]
  15979. pub fn rb_emmc_if_re_tmout (& self) -> RB_EMMC_IF_RE_TMOUT_R { RB_EMMC_IF_RE_TMOUT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - indicate CRC error of the response"]
  15980. # [inline (always)]
  15981. pub fn rb_emmc_if_recrc_wr (& self) -> RB_EMMC_IF_RECRC_WR_R { RB_EMMC_IF_RECRC_WR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - indicate INDEX error of the response"]
  15982. # [inline (always)]
  15983. pub fn rb_emmc_if_reidx_er (& self) -> RB_EMMC_IF_REIDX_ER_R { RB_EMMC_IF_REIDX_ER_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
  15984. # [inline (always)]
  15985. pub fn rb_emmc_if_cmddone (& self) -> RB_EMMC_IF_CMDDONE_R { RB_EMMC_IF_CMDDONE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - data line busy timeout"]
  15986. # [inline (always)]
  15987. pub fn rb_emmc_if_dattmo (& self) -> RB_EMMC_IF_DATTMO_R { RB_EMMC_IF_DATTMO_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - last block have encountered a CRC error"]
  15988. # [inline (always)]
  15989. pub fn rb_emmc_if_tranerr (& self) -> RB_EMMC_IF_TRANERR_R { RB_EMMC_IF_TRANERR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - all the blocks have been tran/recv successfully"]
  15990. # [inline (always)]
  15991. pub fn rb_emmc_if_trandone (& self) -> RB_EMMC_IF_TRANDONE_R { RB_EMMC_IF_TRANDONE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
  15992. # [inline (always)]
  15993. pub fn rb_emmc_if_bkgap (& self) -> RB_EMMC_IF_BKGAP_R { RB_EMMC_IF_BKGAP_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
  15994. # [inline (always)]
  15995. pub fn rb_emmc_if_fifo_ov (& self) -> RB_EMMC_IF_FIFO_OV_R { RB_EMMC_IF_FIFO_OV_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - interrupt from SDIO card inside"]
  15996. # [inline (always)]
  15997. pub fn rb_emmc_if_sdioint (& self) -> RB_EMMC_IF_SDIOINT_R { RB_EMMC_IF_SDIOINT_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - indicate when expect the response, timeout"]
  15998. # [inline (always)]
  15999. pub fn rb_emmc_if_re_tmout (& mut self) -> RB_EMMC_IF_RE_TMOUT_W { RB_EMMC_IF_RE_TMOUT_W { w : self } } # [doc = "Bit 1 - indicate CRC error of the response"]
  16000. # [inline (always)]
  16001. pub fn rb_emmc_if_recrc_wr (& mut self) -> RB_EMMC_IF_RECRC_WR_W { RB_EMMC_IF_RECRC_WR_W { w : self } } # [doc = "Bit 2 - indicate INDEX error of the response"]
  16002. # [inline (always)]
  16003. pub fn rb_emmc_if_reidx_er (& mut self) -> RB_EMMC_IF_REIDX_ER_W { RB_EMMC_IF_REIDX_ER_W { w : self } } # [doc = "Bit 3 - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
  16004. # [inline (always)]
  16005. pub fn rb_emmc_if_cmddone (& mut self) -> RB_EMMC_IF_CMDDONE_W { RB_EMMC_IF_CMDDONE_W { w : self } } # [doc = "Bit 4 - data line busy timeout"]
  16006. # [inline (always)]
  16007. pub fn rb_emmc_if_dattmo (& mut self) -> RB_EMMC_IF_DATTMO_W { RB_EMMC_IF_DATTMO_W { w : self } } # [doc = "Bit 5 - last block have encountered a CRC error"]
  16008. # [inline (always)]
  16009. pub fn rb_emmc_if_tranerr (& mut self) -> RB_EMMC_IF_TRANERR_W { RB_EMMC_IF_TRANERR_W { w : self } } # [doc = "Bit 6 - all the blocks have been tran/recv successfully"]
  16010. # [inline (always)]
  16011. pub fn rb_emmc_if_trandone (& mut self) -> RB_EMMC_IF_TRANDONE_W { RB_EMMC_IF_TRANDONE_W { w : self } } # [doc = "Bit 7 - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
  16012. # [inline (always)]
  16013. pub fn rb_emmc_if_bkgap (& mut self) -> RB_EMMC_IF_BKGAP_W { RB_EMMC_IF_BKGAP_W { w : self } } # [doc = "Bit 8 - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
  16014. # [inline (always)]
  16015. pub fn rb_emmc_if_fifo_ov (& mut self) -> RB_EMMC_IF_FIFO_OV_W { RB_EMMC_IF_FIFO_OV_W { w : self } } # [doc = "Bit 9 - interrupt from SDIO card inside"]
  16016. # [inline (always)]
  16017. pub fn rb_emmc_if_sdioint (& mut self) -> RB_EMMC_IF_SDIOINT_W { RB_EMMC_IF_SDIOINT_W { w : self } } # [doc = "Writes raw bits to the register."]
  16018. # [inline (always)]
  16019. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_int_fg](index.html) module"]
  16020. pub struct R16_EMMC_INT_FG_SPEC ; impl crate :: RegisterSpec for R16_EMMC_INT_FG_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_int_fg::R](R) reader structure"]
  16021. impl crate :: Readable for R16_EMMC_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_int_fg::W](W) writer structure"]
  16022. impl crate :: Writable for R16_EMMC_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_INT_FG to value 0"]
  16023. impl crate :: Resettable for R16_EMMC_INT_FG_SPEC { # [inline (always)]
  16024. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_INT_EN register accessor: an alias for `Reg<R16_EMMC_INT_EN_SPEC>`"]
  16025. pub type R16_EMMC_INT_EN = crate :: Reg < r16_emmc_int_en :: R16_EMMC_INT_EN_SPEC > ; # [doc = "SD 16bits interrupt enable register"]
  16026. pub mod r16_emmc_int_en { # [doc = "Register `R16_EMMC_INT_EN` reader"]
  16027. pub struct R (crate :: R < R16_EMMC_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_INT_EN_SPEC > ; # [inline (always)]
  16028. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_INT_EN_SPEC >> for R { # [inline (always)]
  16029. fn from (reader : crate :: R < R16_EMMC_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_INT_EN` writer"]
  16030. pub struct W (crate :: W < R16_EMMC_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_INT_EN_SPEC > ; # [inline (always)]
  16031. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  16032. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_INT_EN_SPEC >> for W { # [inline (always)]
  16033. fn from (writer : crate :: W < R16_EMMC_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_IE_RE_TMOUT` reader - command response timeout interrupt enable"]
  16034. pub struct RB_EMMC_IE_RE_TMOUT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_RE_TMOUT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_RE_TMOUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_RE_TMOUT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16035. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_RE_TMOUT` writer - command response timeout interrupt enable"]
  16036. pub struct RB_EMMC_IE_RE_TMOUT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_RE_TMOUT_W < 'a > { # [doc = r"Sets the field bit"]
  16037. # [inline (always)]
  16038. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16039. # [inline (always)]
  16040. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16041. # [inline (always)]
  16042. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_IE_RECRC_WR` reader - response CRC check error interrupt enable"]
  16043. pub struct RB_EMMC_IE_RECRC_WR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_RECRC_WR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_RECRC_WR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_RECRC_WR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16044. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_RECRC_WR` writer - response CRC check error interrupt enable"]
  16045. pub struct RB_EMMC_IE_RECRC_WR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_RECRC_WR_W < 'a > { # [doc = r"Sets the field bit"]
  16046. # [inline (always)]
  16047. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16048. # [inline (always)]
  16049. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16050. # [inline (always)]
  16051. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_IE_REIDX_ER` reader - response index check error interrupt enable"]
  16052. pub struct RB_EMMC_IE_REIDX_ER_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_REIDX_ER_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_REIDX_ER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_REIDX_ER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16053. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_REIDX_ER` writer - response index check error interrupt enable"]
  16054. pub struct RB_EMMC_IE_REIDX_ER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_REIDX_ER_W < 'a > { # [doc = r"Sets the field bit"]
  16055. # [inline (always)]
  16056. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16057. # [inline (always)]
  16058. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16059. # [inline (always)]
  16060. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_IE_CMDDONE` reader - command completion interrupt enable"]
  16061. pub struct RB_EMMC_IE_CMDDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_CMDDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_CMDDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_CMDDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16062. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_CMDDONE` writer - command completion interrupt enable"]
  16063. pub struct RB_EMMC_IE_CMDDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_CMDDONE_W < 'a > { # [doc = r"Sets the field bit"]
  16064. # [inline (always)]
  16065. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16066. # [inline (always)]
  16067. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16068. # [inline (always)]
  16069. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_IE_DATTMO` reader - data timeout interrupt enable"]
  16070. pub struct RB_EMMC_IE_DATTMO_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_DATTMO_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_DATTMO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_DATTMO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16071. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_DATTMO` writer - data timeout interrupt enable"]
  16072. pub struct RB_EMMC_IE_DATTMO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_DATTMO_W < 'a > { # [doc = r"Sets the field bit"]
  16073. # [inline (always)]
  16074. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16075. # [inline (always)]
  16076. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16077. # [inline (always)]
  16078. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u16 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_IE_TRANERR` reader - blocks transfer CRC error interrupt enable"]
  16079. pub struct RB_EMMC_IE_TRANERR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_TRANERR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_TRANERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_TRANERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16080. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_TRANERR` writer - blocks transfer CRC error interrupt enable"]
  16081. pub struct RB_EMMC_IE_TRANERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_TRANERR_W < 'a > { # [doc = r"Sets the field bit"]
  16082. # [inline (always)]
  16083. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16084. # [inline (always)]
  16085. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16086. # [inline (always)]
  16087. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u16 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_EMMC_IE_TRANDONE` reader - all blocks transfer complete interrupt enable"]
  16088. pub struct RB_EMMC_IE_TRANDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_TRANDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_TRANDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_TRANDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16089. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_TRANDONE` writer - all blocks transfer complete interrupt enable"]
  16090. pub struct RB_EMMC_IE_TRANDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_TRANDONE_W < 'a > { # [doc = r"Sets the field bit"]
  16091. # [inline (always)]
  16092. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16093. # [inline (always)]
  16094. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16095. # [inline (always)]
  16096. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u16 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_EMMC_IE_BKGAP` reader - single block transmission completion interrupt enable"]
  16097. pub struct RB_EMMC_IE_BKGAP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_BKGAP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_BKGAP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_BKGAP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16098. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_BKGAP` writer - single block transmission completion interrupt enable"]
  16099. pub struct RB_EMMC_IE_BKGAP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_BKGAP_W < 'a > { # [doc = r"Sets the field bit"]
  16100. # [inline (always)]
  16101. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16102. # [inline (always)]
  16103. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16104. # [inline (always)]
  16105. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_EMMC_IE_FIFO_OV` reader - FIFO overflow interrupt enable"]
  16106. pub struct RB_EMMC_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16107. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_FIFO_OV` writer - FIFO overflow interrupt enable"]
  16108. pub struct RB_EMMC_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
  16109. # [inline (always)]
  16110. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16111. # [inline (always)]
  16112. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16113. # [inline (always)]
  16114. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_IE_SDIOINT` reader - SDIO card interrupt enable"]
  16115. pub struct RB_EMMC_IE_SDIOINT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_SDIOINT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_SDIOINT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_SDIOINT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16116. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_SDIOINT` writer - SDIO card interrupt enable"]
  16117. pub struct RB_EMMC_IE_SDIOINT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_SDIOINT_W < 'a > { # [doc = r"Sets the field bit"]
  16118. # [inline (always)]
  16119. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16120. # [inline (always)]
  16121. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16122. # [inline (always)]
  16123. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bit 0 - command response timeout interrupt enable"]
  16124. # [inline (always)]
  16125. pub fn rb_emmc_ie_re_tmout (& self) -> RB_EMMC_IE_RE_TMOUT_R { RB_EMMC_IE_RE_TMOUT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - response CRC check error interrupt enable"]
  16126. # [inline (always)]
  16127. pub fn rb_emmc_ie_recrc_wr (& self) -> RB_EMMC_IE_RECRC_WR_R { RB_EMMC_IE_RECRC_WR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - response index check error interrupt enable"]
  16128. # [inline (always)]
  16129. pub fn rb_emmc_ie_reidx_er (& self) -> RB_EMMC_IE_REIDX_ER_R { RB_EMMC_IE_REIDX_ER_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - command completion interrupt enable"]
  16130. # [inline (always)]
  16131. pub fn rb_emmc_ie_cmddone (& self) -> RB_EMMC_IE_CMDDONE_R { RB_EMMC_IE_CMDDONE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - data timeout interrupt enable"]
  16132. # [inline (always)]
  16133. pub fn rb_emmc_ie_dattmo (& self) -> RB_EMMC_IE_DATTMO_R { RB_EMMC_IE_DATTMO_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - blocks transfer CRC error interrupt enable"]
  16134. # [inline (always)]
  16135. pub fn rb_emmc_ie_tranerr (& self) -> RB_EMMC_IE_TRANERR_R { RB_EMMC_IE_TRANERR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - all blocks transfer complete interrupt enable"]
  16136. # [inline (always)]
  16137. pub fn rb_emmc_ie_trandone (& self) -> RB_EMMC_IE_TRANDONE_R { RB_EMMC_IE_TRANDONE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - single block transmission completion interrupt enable"]
  16138. # [inline (always)]
  16139. pub fn rb_emmc_ie_bkgap (& self) -> RB_EMMC_IE_BKGAP_R { RB_EMMC_IE_BKGAP_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - FIFO overflow interrupt enable"]
  16140. # [inline (always)]
  16141. pub fn rb_emmc_ie_fifo_ov (& self) -> RB_EMMC_IE_FIFO_OV_R { RB_EMMC_IE_FIFO_OV_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - SDIO card interrupt enable"]
  16142. # [inline (always)]
  16143. pub fn rb_emmc_ie_sdioint (& self) -> RB_EMMC_IE_SDIOINT_R { RB_EMMC_IE_SDIOINT_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - command response timeout interrupt enable"]
  16144. # [inline (always)]
  16145. pub fn rb_emmc_ie_re_tmout (& mut self) -> RB_EMMC_IE_RE_TMOUT_W { RB_EMMC_IE_RE_TMOUT_W { w : self } } # [doc = "Bit 1 - response CRC check error interrupt enable"]
  16146. # [inline (always)]
  16147. pub fn rb_emmc_ie_recrc_wr (& mut self) -> RB_EMMC_IE_RECRC_WR_W { RB_EMMC_IE_RECRC_WR_W { w : self } } # [doc = "Bit 2 - response index check error interrupt enable"]
  16148. # [inline (always)]
  16149. pub fn rb_emmc_ie_reidx_er (& mut self) -> RB_EMMC_IE_REIDX_ER_W { RB_EMMC_IE_REIDX_ER_W { w : self } } # [doc = "Bit 3 - command completion interrupt enable"]
  16150. # [inline (always)]
  16151. pub fn rb_emmc_ie_cmddone (& mut self) -> RB_EMMC_IE_CMDDONE_W { RB_EMMC_IE_CMDDONE_W { w : self } } # [doc = "Bit 4 - data timeout interrupt enable"]
  16152. # [inline (always)]
  16153. pub fn rb_emmc_ie_dattmo (& mut self) -> RB_EMMC_IE_DATTMO_W { RB_EMMC_IE_DATTMO_W { w : self } } # [doc = "Bit 5 - blocks transfer CRC error interrupt enable"]
  16154. # [inline (always)]
  16155. pub fn rb_emmc_ie_tranerr (& mut self) -> RB_EMMC_IE_TRANERR_W { RB_EMMC_IE_TRANERR_W { w : self } } # [doc = "Bit 6 - all blocks transfer complete interrupt enable"]
  16156. # [inline (always)]
  16157. pub fn rb_emmc_ie_trandone (& mut self) -> RB_EMMC_IE_TRANDONE_W { RB_EMMC_IE_TRANDONE_W { w : self } } # [doc = "Bit 7 - single block transmission completion interrupt enable"]
  16158. # [inline (always)]
  16159. pub fn rb_emmc_ie_bkgap (& mut self) -> RB_EMMC_IE_BKGAP_W { RB_EMMC_IE_BKGAP_W { w : self } } # [doc = "Bit 8 - FIFO overflow interrupt enable"]
  16160. # [inline (always)]
  16161. pub fn rb_emmc_ie_fifo_ov (& mut self) -> RB_EMMC_IE_FIFO_OV_W { RB_EMMC_IE_FIFO_OV_W { w : self } } # [doc = "Bit 9 - SDIO card interrupt enable"]
  16162. # [inline (always)]
  16163. pub fn rb_emmc_ie_sdioint (& mut self) -> RB_EMMC_IE_SDIOINT_W { RB_EMMC_IE_SDIOINT_W { w : self } } # [doc = "Writes raw bits to the register."]
  16164. # [inline (always)]
  16165. pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_int_en](index.html) module"]
  16166. pub struct R16_EMMC_INT_EN_SPEC ; impl crate :: RegisterSpec for R16_EMMC_INT_EN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_int_en::R](R) reader structure"]
  16167. impl crate :: Readable for R16_EMMC_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_int_en::W](W) writer structure"]
  16168. impl crate :: Writable for R16_EMMC_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_INT_EN to value 0"]
  16169. impl crate :: Resettable for R16_EMMC_INT_EN_SPEC { # [inline (always)]
  16170. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_DMA_BEG1 register accessor: an alias for `Reg<R32_EMMC_DMA_BEG1_SPEC>`"]
  16171. pub type R32_EMMC_DMA_BEG1 = crate :: Reg < r32_emmc_dma_beg1 :: R32_EMMC_DMA_BEG1_SPEC > ; # [doc = "SD 16bits DMA start address register when to operate"]
  16172. pub mod r32_emmc_dma_beg1 { # [doc = "Register `R32_EMMC_DMA_BEG1` reader"]
  16173. pub struct R (crate :: R < R32_EMMC_DMA_BEG1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_DMA_BEG1_SPEC > ; # [inline (always)]
  16174. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_DMA_BEG1_SPEC >> for R { # [inline (always)]
  16175. fn from (reader : crate :: R < R32_EMMC_DMA_BEG1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_DMA_BEG1` writer"]
  16176. pub struct W (crate :: W < R32_EMMC_DMA_BEG1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_DMA_BEG1_SPEC > ; # [inline (always)]
  16177. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  16178. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_DMA_BEG1_SPEC >> for W { # [inline (always)]
  16179. fn from (writer : crate :: W < R32_EMMC_DMA_BEG1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMAAD1_MASK` reader - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
  16180. pub struct RB_EMMC_DMAAD1_MASK_R (crate :: FieldReader < u32 , u32 >) ; impl RB_EMMC_DMAAD1_MASK_R { pub (crate) fn new (bits : u32) -> Self { RB_EMMC_DMAAD1_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAAD1_MASK_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  16181. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAAD1_MASK` writer - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
  16182. pub struct RB_EMMC_DMAAD1_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAAD1_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16183. # [inline (always)]
  16184. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
  16185. # [inline (always)]
  16186. pub fn rb_emmc_dmaad1_mask (& self) -> RB_EMMC_DMAAD1_MASK_R { RB_EMMC_DMAAD1_MASK_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
  16187. # [inline (always)]
  16188. pub fn rb_emmc_dmaad1_mask (& mut self) -> RB_EMMC_DMAAD1_MASK_W { RB_EMMC_DMAAD1_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
  16189. # [inline (always)]
  16190. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits DMA start address register when to operate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_dma_beg1](index.html) module"]
  16191. pub struct R32_EMMC_DMA_BEG1_SPEC ; impl crate :: RegisterSpec for R32_EMMC_DMA_BEG1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_dma_beg1::R](R) reader structure"]
  16192. impl crate :: Readable for R32_EMMC_DMA_BEG1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_dma_beg1::W](W) writer structure"]
  16193. impl crate :: Writable for R32_EMMC_DMA_BEG1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_DMA_BEG1 to value 0"]
  16194. impl crate :: Resettable for R32_EMMC_DMA_BEG1_SPEC { # [inline (always)]
  16195. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_BLOCK_CFG register accessor: an alias for `Reg<R32_EMMC_BLOCK_CFG_SPEC>`"]
  16196. pub type R32_EMMC_BLOCK_CFG = crate :: Reg < r32_emmc_block_cfg :: R32_EMMC_BLOCK_CFG_SPEC > ; # [doc = "SD 32bits data counter, \\[15:0\\]
  16197. number of blocks this time will tran/recv, \\[27:16\\]
  16198. block sise(byte number) of every block in this time tran/recv"]
  16199. pub mod r32_emmc_block_cfg { # [doc = "Register `R32_EMMC_BLOCK_CFG` reader"]
  16200. pub struct R (crate :: R < R32_EMMC_BLOCK_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_BLOCK_CFG_SPEC > ; # [inline (always)]
  16201. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_BLOCK_CFG_SPEC >> for R { # [inline (always)]
  16202. fn from (reader : crate :: R < R32_EMMC_BLOCK_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_BLOCK_CFG` writer"]
  16203. pub struct W (crate :: W < R32_EMMC_BLOCK_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_BLOCK_CFG_SPEC > ; # [inline (always)]
  16204. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  16205. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_BLOCK_CFG_SPEC >> for W { # [inline (always)]
  16206. fn from (writer : crate :: W < R32_EMMC_BLOCK_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_BKNUM_MASK` reader - the number of blocks to be transferred"]
  16207. pub struct RB_EMMC_BKNUM_MASK_R (crate :: FieldReader < u16 , u16 >) ; impl RB_EMMC_BKNUM_MASK_R { pub (crate) fn new (bits : u16) -> Self { RB_EMMC_BKNUM_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_BKNUM_MASK_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  16208. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_BKNUM_MASK` writer - the number of blocks to be transferred"]
  16209. pub struct RB_EMMC_BKNUM_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_BKNUM_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16210. # [inline (always)]
  16211. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u32 & 0xffff) ; self . w } } # [doc = "Field `RB_EMMC_BKSIZE_MASK` reader - single block transfer size"]
  16212. pub struct RB_EMMC_BKSIZE_MASK_R (crate :: FieldReader < u16 , u16 >) ; impl RB_EMMC_BKSIZE_MASK_R { pub (crate) fn new (bits : u16) -> Self { RB_EMMC_BKSIZE_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_BKSIZE_MASK_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
  16213. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_BKSIZE_MASK` writer - single block transfer size"]
  16214. pub struct RB_EMMC_BKSIZE_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_BKSIZE_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16215. # [inline (always)]
  16216. pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0fff << 16)) | ((value as u32 & 0x0fff) << 16) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of blocks to be transferred"]
  16217. # [inline (always)]
  16218. pub fn rb_emmc_bknum_mask (& self) -> RB_EMMC_BKNUM_MASK_R { RB_EMMC_BKNUM_MASK_R :: new ((self . bits & 0xffff) as u16) } # [doc = "Bits 16:27 - single block transfer size"]
  16219. # [inline (always)]
  16220. pub fn rb_emmc_bksize_mask (& self) -> RB_EMMC_BKSIZE_MASK_R { RB_EMMC_BKSIZE_MASK_R :: new (((self . bits >> 16) & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of blocks to be transferred"]
  16221. # [inline (always)]
  16222. pub fn rb_emmc_bknum_mask (& mut self) -> RB_EMMC_BKNUM_MASK_W { RB_EMMC_BKNUM_MASK_W { w : self } } # [doc = "Bits 16:27 - single block transfer size"]
  16223. # [inline (always)]
  16224. pub fn rb_emmc_bksize_mask (& mut self) -> RB_EMMC_BKSIZE_MASK_W { RB_EMMC_BKSIZE_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
  16225. # [inline (always)]
  16226. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 32bits data counter, \\[15:0\\]
  16227. number of blocks this time will tran/recv, \\[27:16\\]
  16228. block sise(byte number) of every block in this time tran/recv\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_block_cfg](index.html) module"]
  16229. pub struct R32_EMMC_BLOCK_CFG_SPEC ; impl crate :: RegisterSpec for R32_EMMC_BLOCK_CFG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_block_cfg::R](R) reader structure"]
  16230. impl crate :: Readable for R32_EMMC_BLOCK_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_block_cfg::W](W) writer structure"]
  16231. impl crate :: Writable for R32_EMMC_BLOCK_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_BLOCK_CFG to value 0"]
  16232. impl crate :: Resettable for R32_EMMC_BLOCK_CFG_SPEC { # [inline (always)]
  16233. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_TRAN_MODE register accessor: an alias for `Reg<R32_EMMC_TRAN_MODE_SPEC>`"]
  16234. pub type R32_EMMC_TRAN_MODE = crate :: Reg < r32_emmc_tran_mode :: R32_EMMC_TRAN_MODE_SPEC > ; # [doc = "SD TRANSFER MODE register"]
  16235. pub mod r32_emmc_tran_mode { # [doc = "Register `R32_EMMC_TRAN_MODE` reader"]
  16236. pub struct R (crate :: R < R32_EMMC_TRAN_MODE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_TRAN_MODE_SPEC > ; # [inline (always)]
  16237. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_TRAN_MODE_SPEC >> for R { # [inline (always)]
  16238. fn from (reader : crate :: R < R32_EMMC_TRAN_MODE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_TRAN_MODE` writer"]
  16239. pub struct W (crate :: W < R32_EMMC_TRAN_MODE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_TRAN_MODE_SPEC > ; # [inline (always)]
  16240. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  16241. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_TRAN_MODE_SPEC >> for W { # [inline (always)]
  16242. fn from (writer : crate :: W < R32_EMMC_TRAN_MODE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMA_DIR` reader - set DMA direction is controller to emmc card"]
  16243. pub struct RB_EMMC_DMA_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DMA_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DMA_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMA_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16244. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMA_DIR` writer - set DMA direction is controller to emmc card"]
  16245. pub struct RB_EMMC_DMA_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMA_DIR_W < 'a > { # [doc = r"Sets the field bit"]
  16246. # [inline (always)]
  16247. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16248. # [inline (always)]
  16249. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16250. # [inline (always)]
  16251. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_GAP_STOP` reader - clock stop mode after block completion"]
  16252. pub struct RB_EMMC_GAP_STOP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_GAP_STOP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_GAP_STOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_GAP_STOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16253. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_GAP_STOP` writer - clock stop mode after block completion"]
  16254. pub struct RB_EMMC_GAP_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_GAP_STOP_W < 'a > { # [doc = r"Sets the field bit"]
  16255. # [inline (always)]
  16256. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16257. # [inline (always)]
  16258. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16259. # [inline (always)]
  16260. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_MODE_BOOT` reader - enable emmc boot mode"]
  16261. pub struct RB_EMMC_MODE_BOOT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_MODE_BOOT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_MODE_BOOT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_MODE_BOOT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16262. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_MODE_BOOT` writer - enable emmc boot mode"]
  16263. pub struct RB_EMMC_MODE_BOOT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_MODE_BOOT_W < 'a > { # [doc = r"Sets the field bit"]
  16264. # [inline (always)]
  16265. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16266. # [inline (always)]
  16267. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16268. # [inline (always)]
  16269. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_AUTOGAPSTOP` reader - enable auto set bTM_GAP_STOP when tran start"]
  16270. pub struct RB_EMMC_AUTOGAPSTOP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_AUTOGAPSTOP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_AUTOGAPSTOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_AUTOGAPSTOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16271. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_AUTOGAPSTOP` writer - enable auto set bTM_GAP_STOP when tran start"]
  16272. pub struct RB_EMMC_AUTOGAPSTOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_AUTOGAPSTOP_W < 'a > { # [doc = r"Sets the field bit"]
  16273. # [inline (always)]
  16274. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16275. # [inline (always)]
  16276. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16277. # [inline (always)]
  16278. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_FIFO_RDY` reader - FIFO ready select signal when writing EMMC"]
  16279. pub struct RB_EMMC_FIFO_RDY_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_FIFO_RDY_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_FIFO_RDY_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  16280. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_FIFO_RDY` writer - FIFO ready select signal when writing EMMC"]
  16281. pub struct RB_EMMC_FIFO_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_FIFO_RDY_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16282. # [inline (always)]
  16283. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u32 & 0x03) << 6) ; self . w } } # [doc = "Field `RB_EMMC_DMATN_CNT` reader - in double buffer mode,set the block count value of buffer switch"]
  16284. pub struct RB_EMMC_DMATN_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_DMATN_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_DMATN_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMATN_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
  16285. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMATN_CNT` writer - in double buffer mode,set the block count value of buffer switch"]
  16286. pub struct RB_EMMC_DMATN_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMATN_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16287. # [inline (always)]
  16288. pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x7f << 8)) | ((value as u32 & 0x7f) << 8) ; self . w } } # [doc = "Field `RB_EMMC_DULEDMA_EN` reader - enable double buffer dma"]
  16289. pub struct RB_EMMC_DULEDMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DULEDMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DULEDMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DULEDMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
  16290. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DULEDMA_EN` writer - enable double buffer dma"]
  16291. pub struct RB_EMMC_DULEDMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DULEDMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
  16292. # [inline (always)]
  16293. pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
  16294. # [inline (always)]
  16295. pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
  16296. # [inline (always)]
  16297. pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 16)) | ((value as u32 & 0x01) << 16) ; self . w } } impl R { # [doc = "Bit 0 - set DMA direction is controller to emmc card"]
  16298. # [inline (always)]
  16299. pub fn rb_emmc_dma_dir (& self) -> RB_EMMC_DMA_DIR_R { RB_EMMC_DMA_DIR_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock stop mode after block completion"]
  16300. # [inline (always)]
  16301. pub fn rb_emmc_gap_stop (& self) -> RB_EMMC_GAP_STOP_R { RB_EMMC_GAP_STOP_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable emmc boot mode"]
  16302. # [inline (always)]
  16303. pub fn rb_emmc_mode_boot (& self) -> RB_EMMC_MODE_BOOT_R { RB_EMMC_MODE_BOOT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable auto set bTM_GAP_STOP when tran start"]
  16304. # [inline (always)]
  16305. pub fn rb_emmc_autogapstop (& self) -> RB_EMMC_AUTOGAPSTOP_R { RB_EMMC_AUTOGAPSTOP_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - FIFO ready select signal when writing EMMC"]
  16306. # [inline (always)]
  16307. pub fn rb_emmc_fifo_rdy (& self) -> RB_EMMC_FIFO_RDY_R { RB_EMMC_FIFO_RDY_R :: new (((self . bits >> 6) & 0x03) as u8) } # [doc = "Bits 8:14 - in double buffer mode,set the block count value of buffer switch"]
  16308. # [inline (always)]
  16309. pub fn rb_emmc_dmatn_cnt (& self) -> RB_EMMC_DMATN_CNT_R { RB_EMMC_DMATN_CNT_R :: new (((self . bits >> 8) & 0x7f) as u8) } # [doc = "Bit 16 - enable double buffer dma"]
  16310. # [inline (always)]
  16311. pub fn rb_emmc_duledma_en (& self) -> RB_EMMC_DULEDMA_EN_R { RB_EMMC_DULEDMA_EN_R :: new (((self . bits >> 16) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - set DMA direction is controller to emmc card"]
  16312. # [inline (always)]
  16313. pub fn rb_emmc_dma_dir (& mut self) -> RB_EMMC_DMA_DIR_W { RB_EMMC_DMA_DIR_W { w : self } } # [doc = "Bit 1 - clock stop mode after block completion"]
  16314. # [inline (always)]
  16315. pub fn rb_emmc_gap_stop (& mut self) -> RB_EMMC_GAP_STOP_W { RB_EMMC_GAP_STOP_W { w : self } } # [doc = "Bit 2 - enable emmc boot mode"]
  16316. # [inline (always)]
  16317. pub fn rb_emmc_mode_boot (& mut self) -> RB_EMMC_MODE_BOOT_W { RB_EMMC_MODE_BOOT_W { w : self } } # [doc = "Bit 4 - enable auto set bTM_GAP_STOP when tran start"]
  16318. # [inline (always)]
  16319. pub fn rb_emmc_autogapstop (& mut self) -> RB_EMMC_AUTOGAPSTOP_W { RB_EMMC_AUTOGAPSTOP_W { w : self } } # [doc = "Bits 6:7 - FIFO ready select signal when writing EMMC"]
  16320. # [inline (always)]
  16321. pub fn rb_emmc_fifo_rdy (& mut self) -> RB_EMMC_FIFO_RDY_W { RB_EMMC_FIFO_RDY_W { w : self } } # [doc = "Bits 8:14 - in double buffer mode,set the block count value of buffer switch"]
  16322. # [inline (always)]
  16323. pub fn rb_emmc_dmatn_cnt (& mut self) -> RB_EMMC_DMATN_CNT_W { RB_EMMC_DMATN_CNT_W { w : self } } # [doc = "Bit 16 - enable double buffer dma"]
  16324. # [inline (always)]
  16325. pub fn rb_emmc_duledma_en (& mut self) -> RB_EMMC_DULEDMA_EN_W { RB_EMMC_DULEDMA_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
  16326. # [inline (always)]
  16327. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD TRANSFER MODE register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_tran_mode](index.html) module"]
  16328. pub struct R32_EMMC_TRAN_MODE_SPEC ; impl crate :: RegisterSpec for R32_EMMC_TRAN_MODE_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_tran_mode::R](R) reader structure"]
  16329. impl crate :: Readable for R32_EMMC_TRAN_MODE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_tran_mode::W](W) writer structure"]
  16330. impl crate :: Writable for R32_EMMC_TRAN_MODE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_TRAN_MODE to value 0"]
  16331. impl crate :: Resettable for R32_EMMC_TRAN_MODE_SPEC { # [inline (always)]
  16332. fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_DMA_BEG2 register accessor: an alias for `Reg<R32_EMMC_DMA_BEG2_SPEC>`"]
  16333. pub type R32_EMMC_DMA_BEG2 = crate :: Reg < r32_emmc_dma_beg2 :: R32_EMMC_DMA_BEG2_SPEC > ; # [doc = "SD 16bits DMA start address register when to operate"]
  16334. pub mod r32_emmc_dma_beg2 { # [doc = "Register `R32_EMMC_DMA_BEG2` reader"]
  16335. pub struct R (crate :: R < R32_EMMC_DMA_BEG2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_DMA_BEG2_SPEC > ; # [inline (always)]
  16336. fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_DMA_BEG2_SPEC >> for R { # [inline (always)]
  16337. fn from (reader : crate :: R < R32_EMMC_DMA_BEG2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_DMA_BEG2` writer"]
  16338. pub struct W (crate :: W < R32_EMMC_DMA_BEG2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_DMA_BEG2_SPEC > ; # [inline (always)]
  16339. fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
  16340. fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_DMA_BEG2_SPEC >> for W { # [inline (always)]
  16341. fn from (writer : crate :: W < R32_EMMC_DMA_BEG2_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMAAD2_MASK` reader - block DMA start address register"]
  16342. pub struct RB_EMMC_DMAAD2_MASK_R (crate :: FieldReader < u32 , u32 >) ; impl RB_EMMC_DMAAD2_MASK_R { pub (crate) fn new (bits : u32) -> Self { RB_EMMC_DMAAD2_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAAD2_MASK_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
  16343. fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAAD2_MASK` writer - block DMA start address register"]
  16344. pub struct RB_EMMC_DMAAD2_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAAD2_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
  16345. # [inline (always)]
  16346. pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - block DMA start address register"]
  16347. # [inline (always)]
  16348. pub fn rb_emmc_dmaad2_mask (& self) -> RB_EMMC_DMAAD2_MASK_R { RB_EMMC_DMAAD2_MASK_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - block DMA start address register"]
  16349. # [inline (always)]
  16350. pub fn rb_emmc_dmaad2_mask (& mut self) -> RB_EMMC_DMAAD2_MASK_W { RB_EMMC_DMAAD2_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
  16351. # [inline (always)]
  16352. pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits DMA start address register when to operate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_dma_beg2](index.html) module"]
  16353. pub struct R32_EMMC_DMA_BEG2_SPEC ; impl crate :: RegisterSpec for R32_EMMC_DMA_BEG2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_dma_beg2::R](R) reader structure"]
  16354. impl crate :: Readable for R32_EMMC_DMA_BEG2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_dma_beg2::W](W) writer structure"]
  16355. impl crate :: Writable for R32_EMMC_DMA_BEG2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_DMA_BEG2 to value 0"]
  16356. impl crate :: Resettable for R32_EMMC_DMA_BEG2_SPEC { # [inline (always)]
  16357. fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle]
  16358. static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"]
  16359. # [allow (non_snake_case)]
  16360. pub struct Peripherals { # [doc = "SYS"]
  16361. pub SYS : SYS , # [doc = "TMR0"]
  16362. pub TMR0 : TMR0 , # [doc = "TMR1"]
  16363. pub TMR1 : TMR1 , # [doc = "TMR2"]
  16364. pub TMR2 : TMR2 , # [doc = "UART0"]
  16365. pub UART0 : UART0 , # [doc = "UART1"]
  16366. pub UART1 : UART1 , # [doc = "UART2"]
  16367. pub UART2 : UART2 , # [doc = "UART3"]
  16368. pub UART3 : UART3 , # [doc = "SPI0"]
  16369. pub SPI0 : SPI0 , # [doc = "SPI1"]
  16370. pub SPI1 : SPI1 , # [doc = "PWMX"]
  16371. pub PWMX : PWMX , # [doc = "HSPI"]
  16372. pub HSPI : HSPI , # [doc = "ECDC"]
  16373. pub ECDC : ECDC , # [doc = "USBHS"]
  16374. pub USBHS : USBHS , # [doc = "ETH"]
  16375. pub ETH : ETH , # [doc = "DVP"]
  16376. pub DVP : DVP , # [doc = "PFIC"]
  16377. pub PFIC : PFIC , # [doc = "SYSTICK"]
  16378. pub SYSTICK : SYSTICK , # [doc = "EMMC"]
  16379. pub EMMC : EMMC , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"]
  16380. # [inline]
  16381. pub fn take () -> Option < Self > { riscv :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"]
  16382. # [inline]
  16383. pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { SYS : SYS { _marker : PhantomData } , TMR0 : TMR0 { _marker : PhantomData } , TMR1 : TMR1 { _marker : PhantomData } , TMR2 : TMR2 { _marker : PhantomData } , UART0 : UART0 { _marker : PhantomData } , UART1 : UART1 { _marker : PhantomData } , UART2 : UART2 { _marker : PhantomData } , UART3 : UART3 { _marker : PhantomData } , SPI0 : SPI0 { _marker : PhantomData } , SPI1 : SPI1 { _marker : PhantomData } , PWMX : PWMX { _marker : PhantomData } , HSPI : HSPI { _marker : PhantomData } , ECDC : ECDC { _marker : PhantomData } , USBHS : USBHS { _marker : PhantomData } , ETH : ETH { _marker : PhantomData } , DVP : DVP { _marker : PhantomData } , PFIC : PFIC { _marker : PhantomData } , SYSTICK : SYSTICK { _marker : PhantomData } , EMMC : EMMC { _marker : PhantomData } , } } }