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- # [ doc = "Register `R8_TMR1_CTRL_DMA` reader" ] pub struct R ( crate :: R < R8_TMR1_CTRL_DMA_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_CTRL_DMA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_CTRL_DMA_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < R8_TMR1_CTRL_DMA_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `R8_TMR1_CTRL_DMA` writer" ] pub struct W ( crate :: W < R8_TMR1_CTRL_DMA_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_CTRL_DMA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_CTRL_DMA_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < R8_TMR1_CTRL_DMA_SPEC > ) -> Self { W ( writer ) } } # [ doc = "Field `RB_TMR_DMA_ENABLE` reader - timer1/2 DMA enable" ] pub struct RB_TMR_DMA_ENABLE_R ( crate :: FieldReader < bool , bool > ) ; impl RB_TMR_DMA_ENABLE_R { pub ( crate ) fn new ( bits : bool ) -> Self { RB_TMR_DMA_ENABLE_R ( crate :: FieldReader :: new ( bits ) ) } } impl core :: ops :: Deref for RB_TMR_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } # [ doc = "Field `RB_TMR_DMA_ENABLE` writer - timer1/2 DMA enable" ] pub struct RB_TMR_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_ENABLE_W < 'a > { # [ doc = r"Sets the field bit" ] # [ inline ( always ) ] pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ] # [ inline ( always ) ] pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ] # [ inline ( always ) ] pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( value as u8 & 0x01 ) ; self . w } } # [ doc = "Field `RB_TMR_DMA_LOOP` reader - timer1/2 DMA address loop enable" ] pub struct RB_TMR_DMA_LOOP_R ( crate :: FieldReader < bool , bool > ) ; impl RB_TMR_DMA_LOOP_R { pub ( crate ) fn new ( bits : bool ) -> Self { RB_TMR_DMA_LOOP_R ( crate :: FieldReader :: new ( bits ) ) } } impl core :: ops :: Deref for RB_TMR_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } # [ doc = "Field `RB_TMR_DMA_LOOP` writer - timer1/2 DMA address loop enable" ] pub struct RB_TMR_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_LOOP_W < 'a > { # [ doc = r"Sets the field bit" ] # [ inline ( always ) ] pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ] # [ inline ( always ) ] pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ] # [ inline ( always ) ] pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( value as u8 & 0x01 ) << 2 ) ; self . w } } impl R { # [ doc = "Bit 0 - timer1/2 DMA enable" ] # [ inline ( always ) ] pub fn rb_tmr_dma_enable ( & self ) -> RB_TMR_DMA_ENABLE_R { RB_TMR_DMA_ENABLE_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 2 - timer1/2 DMA address loop enable" ] # [ inline ( always ) ] pub fn rb_tmr_dma_loop ( & self ) -> RB_TMR_DMA_LOOP_R { RB_TMR_DMA_LOOP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - timer1/2 DMA enable" ] # [ inline ( always ) ] pub fn rb_tmr_dma_enable ( & mut self ) -> RB_TMR_DMA_ENABLE_W { RB_TMR_DMA_ENABLE_W { w : self } } # [ doc = "Bit 2 - timer1/2 DMA address loop enable" ] # [ inline ( always ) ] pub fn rb_tmr_dma_loop ( & mut self ) -> RB_TMR_DMA_LOOP_W { RB_TMR_DMA_LOOP_W { w : self } } # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u8 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "TMR1 DMA control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_ctrl_dma](index.html) module" ] pub struct R8_TMR1_CTRL_DMA_SPEC ; impl crate :: RegisterSpec for R8_TMR1_CTRL_DMA_SPEC { type Ux = u8 ; } # [ doc = "`read()` method returns [r8_tmr1_ctrl_dma::R](R) reader structure" ] impl crate :: Readable for R8_TMR1_CTRL_DMA_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [r8_tmr1_ctrl_dma::W](W) writer structure" ] impl crate :: Writable for R8_TMR1_CTRL_DMA_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets R8_TMR1_CTRL_DMA to value 0" ] impl crate :: Resettable for R8_TMR1_CTRL_DMA_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } }
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