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- # [ doc = "Register `R32_UEP6_TX_DMA` reader" ] pub struct R ( crate :: R < R32_UEP6_TX_DMA_SPEC > ) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP6_TX_DMA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP6_TX_DMA_SPEC > > for R { # [ inline ( always ) ] fn from ( reader : crate :: R < R32_UEP6_TX_DMA_SPEC > ) -> Self { R ( reader ) } } # [ doc = "Register `R32_UEP6_TX_DMA` writer" ] pub struct W ( crate :: W < R32_UEP6_TX_DMA_SPEC > ) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP6_TX_DMA_SPEC > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [ inline ( always ) ] fn deref_mut ( & mut self ) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP6_TX_DMA_SPEC > > for W { # [ inline ( always ) ] fn from ( writer : crate :: W < R32_UEP6_TX_DMA_SPEC > ) -> Self { W ( writer ) } } # [ doc = "Field `UEP6_TX_DMA` reader - endpoint 6 DMA TX buffer address" ] pub struct UEP6_TX_DMA_R ( crate :: FieldReader < u32 , u32 > ) ; impl UEP6_TX_DMA_R { pub ( crate ) fn new ( bits : u32 ) -> Self { UEP6_TX_DMA_R ( crate :: FieldReader :: new ( bits ) ) } } impl core :: ops :: Deref for UEP6_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [ inline ( always ) ] fn deref ( & self ) -> & Self :: Target { & self . 0 } } # [ doc = "Field `UEP6_TX_DMA` writer - endpoint 6 DMA TX buffer address" ] pub struct UEP6_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_TX_DMA_W < 'a > { # [ doc = r"Writes raw bits to the field" ] # [ inline ( always ) ] pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0001_ffff ) | ( value as u32 & 0x0001_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:16 - endpoint 6 DMA TX buffer address" ] # [ inline ( always ) ] pub fn uep6_tx_dma ( & self ) -> UEP6_TX_DMA_R { UEP6_TX_DMA_R :: new ( ( self . bits & 0x0001_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:16 - endpoint 6 DMA TX buffer address" ] # [ inline ( always ) ] pub fn uep6_tx_dma ( & mut self ) -> UEP6_TX_DMA_W { UEP6_TX_DMA_W { w : self } } # [ doc = "Writes raw bits to the register." ] # [ inline ( always ) ] pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self { self . 0 . bits ( bits ) ; self } } # [ doc = "endpoint 4 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep6_tx_dma](index.html) module" ] pub struct R32_UEP6_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP6_TX_DMA_SPEC { type Ux = u32 ; } # [ doc = "`read()` method returns [r32_uep6_tx_dma::R](R) reader structure" ] impl crate :: Readable for R32_UEP6_TX_DMA_SPEC { type Reader = R ; } # [ doc = "`write(|w| ..)` method takes [r32_uep6_tx_dma::W](W) writer structure" ] impl crate :: Writable for R32_UEP6_TX_DMA_SPEC { type Writer = W ; } # [ doc = "`reset()` method sets R32_UEP6_TX_DMA to value 0" ] impl crate :: Resettable for R32_UEP6_TX_DMA_SPEC { # [ inline ( always ) ] fn reset_value ( ) -> Self :: Ux { 0 } }
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