Touched up some code to compile with stm32f1 and ran cargo fmt

Signed-off-by: Daniel Egger <daniel@eggers-club.de>

src/afio.rs

@@ -15,10 +15,10 @@ impl AfioExt for AFIO {
         Parts {
             evcr: EVCR { _0: () },
             mapr: MAPR { _0: () },
-            exticr1:  EXTICR1 { _0: () },
-            exticr2:  EXTICR2 { _0: () },
-            exticr3:  EXTICR3 { _0: () },
-            exticr4:  EXTICR4 { _0: () },
+            exticr1: EXTICR1 { _0: () },
+            exticr2: EXTICR2 { _0: () },
+            exticr3: EXTICR3 { _0: () },
+            exticr4: EXTICR4 { _0: () },
             mapr2: MAPR2 { _0: () },
         }
     }
@@ -55,7 +55,8 @@ impl MAPR {
 
     /// Disables the JTAG to free up pb3, pb4 and pa15 for normal use
     pub fn disable_jtag(&mut self) {
-        self.mapr().modify(|_, w| unsafe{w.swj_cfg().bits(0b010)})
+        self.mapr()
+            .modify(|_, w| unsafe { w.swj_cfg().bits(0b010) })
     }
 }
 

src/delay.rs

@@ -48,7 +48,7 @@ impl DelayMs<u8> for Delay {
 impl DelayUs<u32> for Delay {
     fn delay_us(&mut self, us: u32) {
         // The SysTick Reload Value register supports values between 1 and 0x00FFFFFF.
-        const MAX_RVR: u32 =  0x00FF_FFFF;
+        const MAX_RVR: u32 = 0x00FF_FFFF;
 
         let mut total_rvr = us * (self.clocks.sysclk().0 / 1_000_000);
 

src/gpio.rs

@@ -62,7 +62,7 @@ macro_rules! gpio {
                 Alternate, Floating, GpioExt, Input,
                 OpenDrain,
                 Output,
-                PullDown, 
+                PullDown,
                 PullUp,
                 PushPull,
                 Analog,
@@ -340,7 +340,7 @@ macro_rules! gpio {
 
                         $PXi { _mode: PhantomData }
                     }
-                    
+
                     /// Configures the pin to operate as an analog input pin
                     pub fn into_analog(self, cr: &mut $CR) -> $PXi<Analog> {
                         let offset = (4 * $i) % 32;

src/i2c.rs

@@ -1,14 +1,14 @@
 //! Inter-Integrated Circuit (I2C) bus
 
 use afio::MAPR;
-use gpio::{Alternate, OpenDrain};
 use gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9};
+use gpio::{Alternate, OpenDrain};
 use hal::blocking::i2c::{Read, Write, WriteRead};
-use nb::{Error as NbError, Result as NbResult};
 use nb::Error::{Other, WouldBlock};
-use rcc::{APB1, Clocks};
-use stm32::{I2C1, I2C2};
+use nb::{Error as NbError, Result as NbResult};
+use rcc::{Clocks, APB1};
 use stm32::DWT;
+use stm32::{I2C1, I2C2};
 
 /// I2C error
 #[derive(Debug, Eq, PartialEq)]
@@ -24,7 +24,8 @@ pub enum Error {
     // Pec, // SMBUS mode only
     // Timeout, // SMBUS mode only
     // Alert, // SMBUS mode only
-    #[doc(hidden)] _Extensible,
+    #[doc(hidden)]
+    _Extensible,
 }
 
 #[derive(Debug, Eq, PartialEq)]
@@ -35,8 +36,13 @@ pub enum DutyCycle {
 
 #[derive(Debug, PartialEq)]
 pub enum Mode {
-    Standard { frequency: u32 },
-    Fast { frequency: u32, duty_cycle: DutyCycle },
+    Standard {
+        frequency: u32,
+    },
+    Fast {
+        frequency: u32,
+        duty_cycle: DutyCycle,
+    },
 }
 
 impl Mode {
@@ -48,32 +54,19 @@ impl Mode {
     }
 }
 
-
 pub trait Pins<I2C> {
     const REMAP: bool;
 }
 
-impl Pins<I2C1>
-for (
-    PB6<Alternate<OpenDrain>>,
-    PB7<Alternate<OpenDrain>>,
-) {
+impl Pins<I2C1> for (PB6<Alternate<OpenDrain>>, PB7<Alternate<OpenDrain>>) {
     const REMAP: bool = false;
 }
 
-impl Pins<I2C1>
-for (
-    PB8<Alternate<OpenDrain>>,
-    PB9<Alternate<OpenDrain>>,
-) {
+impl Pins<I2C1> for (PB8<Alternate<OpenDrain>>, PB9<Alternate<OpenDrain>>) {
     const REMAP: bool = true;
 }
 
-impl Pins<I2C2>
-for (
-    PB10<Alternate<OpenDrain>>,
-    PB11<Alternate<OpenDrain>>,
-) {
+impl Pins<I2C2> for (PB10<Alternate<OpenDrain>>, PB11<Alternate<OpenDrain>>) {
     const REMAP: bool = false;
 }
 
@@ -102,8 +95,8 @@ impl<PINS> I2c<I2C1, PINS> {
         clocks: Clocks,
         apb: &mut APB1,
     ) -> Self
-        where
-            PINS: Pins<I2C1>,
+    where
+        PINS: Pins<I2C1>,
     {
         mapr.mapr().modify(|_, w| w.i2c1_remap().bit(PINS::REMAP));
         I2c::_i2c1(i2c, pins, mode, clocks, apb)
@@ -123,25 +116,28 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
         addr_timeout_us: u32,
         data_timeout_us: u32,
     ) -> Self
-        where
-            PINS: Pins<I2C1>,
+    where
+        PINS: Pins<I2C1>,
     {
         mapr.mapr().modify(|_, w| w.i2c1_remap().bit(PINS::REMAP));
-        BlockingI2c::_i2c1(i2c, pins, mode, clocks, apb,
-                           start_timeout_us, start_retries, addr_timeout_us, data_timeout_us)
+        BlockingI2c::_i2c1(
+            i2c,
+            pins,
+            mode,
+            clocks,
+            apb,
+            start_timeout_us,
+            start_retries,
+            addr_timeout_us,
+            data_timeout_us,
+        )
     }
 }
 
 impl<PINS> I2c<I2C2, PINS> {
-    pub fn i2c2(
-        i2c: I2C2,
-        pins: PINS,
-        mode: Mode,
-        clocks: Clocks,
-        apb: &mut APB1,
-    ) -> Self
-        where
-            PINS: Pins<I2C2>,
+    pub fn i2c2(i2c: I2C2, pins: PINS, mode: Mode, clocks: Clocks, apb: &mut APB1) -> Self
+    where
+        PINS: Pins<I2C2>,
     {
         I2c::_i2c2(i2c, pins, mode, clocks, apb)
     }
@@ -159,20 +155,31 @@ impl<PINS> BlockingI2c<I2C2, PINS> {
         addr_timeout_us: u32,
         data_timeout_us: u32,
     ) -> Self
-        where
-            PINS: Pins<I2C2>,
+    where
+        PINS: Pins<I2C2>,
     {
-        BlockingI2c::_i2c2(i2c, pins, mode, clocks, apb,
-                           start_timeout_us, start_retries, addr_timeout_us, data_timeout_us)
+        BlockingI2c::_i2c2(
+            i2c,
+            pins,
+            mode,
+            clocks,
+            apb,
+            start_timeout_us,
+            start_retries,
+            addr_timeout_us,
+            data_timeout_us,
+        )
     }
 }
 
-pub fn blocking_i2c<I2C, PINS>(i2c: I2c<I2C, PINS>,
-                               clocks: Clocks,
-                               start_timeout_us: u32,
-                               start_retries: u8,
-                               addr_timeout_us: u32,
-                               data_timeout_us: u32) -> BlockingI2c<I2C, PINS> {
+pub fn blocking_i2c<I2C, PINS>(
+    i2c: I2c<I2C, PINS>,
+    clocks: Clocks,
+    start_timeout_us: u32,
+    start_retries: u8,
+    addr_timeout_us: u32,
+    data_timeout_us: u32,
+) -> BlockingI2c<I2C, PINS> {
     let sysclk_mhz = clocks.sysclk().0 / 1_000_000;
     return BlockingI2c {
         nb: i2c,
@@ -184,51 +191,48 @@ pub fn blocking_i2c<I2C, PINS>(i2c: I2c<I2C, PINS>,
 }
 
 macro_rules! wait_for_flag {
-    ($i2c:expr, $flag:ident) => {
-        {
-            let sr1 = $i2c.sr1.read();
-
-            if sr1.berr().bit_is_set() {
-                Err(Other(Error::Bus))
-            } else if sr1.arlo().bit_is_set() {
-                Err(Other(Error::Arbitration))
-            } else if sr1.af().bit_is_set() {
-                Err(Other(Error::Acknowledge))
-            } else if sr1.ovr().bit_is_set() {
-                Err(Other(Error::Overrun))
-            } else if sr1.$flag().bit_is_set() {
-                Ok(())
-            } else {
-                Err(WouldBlock)
-            }
+    ($i2c:expr, $flag:ident) => {{
+        let sr1 = $i2c.sr1.read();
+
+        if sr1.berr().bit_is_set() {
+            Err(Other(Error::Bus))
+        } else if sr1.arlo().bit_is_set() {
+            Err(Other(Error::Arbitration))
+        } else if sr1.af().bit_is_set() {
+            Err(Other(Error::Acknowledge))
+        } else if sr1.ovr().bit_is_set() {
+            Err(Other(Error::Overrun))
+        } else if sr1.$flag().bit_is_set() {
+            Ok(())
+        } else {
+            Err(WouldBlock)
         }
-    }
+    }};
 }
 
 macro_rules! busy_wait {
-    ($nb_expr:expr, $exit_cond:expr) => {
-        {
-            loop {
-                let res = $nb_expr;
-                if res != Err(WouldBlock) {
-                    break res;
-                }
-                if $exit_cond {
-                    break res;
-                }
+    ($nb_expr:expr, $exit_cond:expr) => {{
+        loop {
+            let res = $nb_expr;
+            if res != Err(WouldBlock) {
+                break res;
+            }
+            if $exit_cond {
+                break res;
             }
         }
-    }
+    }};
 }
 
 macro_rules! busy_wait_cycles {
-    ($nb_expr:expr, $cycles:expr) => {
-        {
-            let started = DWT::get_cycle_count();
-            let cycles = $cycles;
-            busy_wait!($nb_expr, DWT::get_cycle_count().wrapping_sub(started) >= cycles)
-        }
-    }
+    ($nb_expr:expr, $cycles:expr) => {{
+        let started = DWT::get_cycle_count();
+        let cycles = $cycles;
+        busy_wait!(
+            $nb_expr,
+            DWT::get_cycle_count().wrapping_sub(started) >= cycles
+        )
+    }};
 }
 
 macro_rules! hal {
@@ -267,7 +271,7 @@ macro_rules! hal {
 
                     match self.mode {
                         Mode::Standard { .. } => {
-                            self.i2c.trise.write(|w| unsafe {
+                            self.i2c.trise.write(|w| {
                                 w.trise().bits((pclk1_mhz + 1) as u8)
                             });
                             self.i2c.ccr.write(|w| unsafe {
@@ -275,7 +279,7 @@ macro_rules! hal {
                             });
                         },
                         Mode::Fast { ref duty_cycle, .. } => {
-                            self.i2c.trise.write(|w| unsafe {
+                            self.i2c.trise.write(|w| {
                                 w.trise().bits((pclk1_mhz * 300 / 1000 + 1) as u8)
                             });
 
@@ -310,7 +314,7 @@ macro_rules! hal {
                 }
 
                 fn send_addr(&self, addr: u8, read: bool) {
-                    self.i2c.dr.write(|w| unsafe { w.dr().bits(addr << 1 | (if read {1} else {0})) });
+                    self.i2c.dr.write(|w| { w.dr().bits(addr << 1 | (if read {1} else {0})) });
                 }
 
                 fn wait_after_sent_addr(&self) -> NbResult<(), Error> {
@@ -375,7 +379,7 @@ macro_rules! hal {
 
                     for byte in bytes {
                         busy_wait_cycles!(wait_for_flag!(self.nb.i2c, tx_e), self.data_timeout)?;
-                        self.nb.i2c.dr.write(|w| unsafe { w.dr().bits(*byte) });
+                        self.nb.i2c.dr.write(|w| { w.dr().bits(*byte) });
                     }
                     busy_wait_cycles!(wait_for_flag!(self.nb.i2c, tx_e), self.data_timeout)?;
 

src/lib.rs

@@ -56,8 +56,6 @@ pub mod afio;
 pub mod bb;
 pub mod delay;
 pub mod dma;
-#[cfg(feature = "doc")]
-pub mod examples;
 pub mod flash;
 pub mod gpio;
 pub mod i2c;

src/prelude.rs

@@ -1,6 +1,6 @@
 pub use afio::AfioExt as _stm32_hal_afio_AfioExt;
-pub use dma::DmaExt as _stm32_hal_dma_DmaExt;
 pub use dma::DmaChannel as _stm32_hal_dma_DmaChannel;
+pub use dma::DmaExt as _stm32_hal_dma_DmaExt;
 pub use flash::FlashExt as _stm32_hal_flash_FlashExt;
 pub use gpio::GpioExt as _stm32_hal_gpio_GpioExt;
 pub use hal::digital::StatefulOutputPin as _embedded_hal_digital_StatefulOutputPin;

src/pwm.rs

@@ -10,7 +10,7 @@ use bb;
 use gpio::gpioa::{PA0, PA1, PA2, PA3, PA6, PA7};
 use gpio::gpiob::{PB0, PB1, PB6, PB7, PB8, PB9};
 use gpio::{Alternate, PushPull};
-use rcc::{APB1, Clocks};
+use rcc::{Clocks, APB1};
 use time::Hertz;
 
 pub trait Pins<TIM> {
@@ -191,31 +191,31 @@ macro_rules! hal {
 
                 if PINS::C1 {
                     tim.ccmr1_output
-                        .modify(|_, w| w.oc1pe().set_bit().oc1m().bits(6));
+                        .modify(|_, w| unsafe { w.oc1pe().set_bit().oc1m().bits(6) });
                 }
 
                 if PINS::C2 {
                     tim.ccmr1_output
-                        .modify(|_, w| w.oc2pe().set_bit().oc2m().bits(6));
+                        .modify(|_, w| unsafe { w.oc2pe().set_bit().oc2m().bits(6) });
                 }
 
                 if PINS::C3 {
                     tim.ccmr2_output
-                        .modify(|_, w| w.oc3pe().set_bit().oc3m().bits(6));
+                        .modify(|_, w| unsafe { w.oc3pe().set_bit().oc3m().bits(6) });
                 }
 
                 if PINS::C4 {
                     tim.ccmr2_output
-                        .modify(|_, w| w.oc4pe().set_bit().oc4m().bits(6));
+                        .modify(|_, w| unsafe { w.oc4pe().set_bit().oc4m().bits(6) });
                 }
 
                 let clk = clocks.pclk1().0 * if clocks.ppre1() == 1 { 1 } else { 2 };
                 let freq = freq.0;
                 let ticks = clk / freq;
                 let psc = u16(ticks / (1 << 16)).unwrap();
-                tim.psc.write(|w| w.psc().bits(psc));
+                tim.psc.write(|w| unsafe { w.psc().bits(psc) });
                 let arr = u16(ticks / u32(psc + 1)).unwrap();
-                tim.arr.write(|w| w.arr().bits(arr));
+                tim.arr.write(|w| { w.arr().bits(arr) });
 
                 tim.cr1.write(|w| unsafe {
                     w.cms()

src/qei.rs

@@ -93,7 +93,7 @@ macro_rules! hal {
                     });
 
                     // configure as quadrature encoder
-                    tim.smcr.write(|w| w.sms().bits(3));
+                    tim.smcr.write(|w| unsafe { w.sms().bits(3) });
 
                     tim.arr.write(|w| w.arr().bits(u16::MAX));
                     tim.cr1.write(|w| w.cen().set_bit());

src/rcc.rs

@@ -1,7 +1,6 @@
 use core::cmp;
 
 use cast::u32;
-use stm32::rcc::cfgr::{SWW, USBPREW};
 use stm32::{rcc, RCC};
 
 use flash::ACR;
@@ -160,7 +159,8 @@ impl CFGR {
 
         assert!(sysclk <= 72_000_000);
 
-        let hpre_bits = self.hclk
+        let hpre_bits = self
+            .hclk
             .map(|hclk| match sysclk / hclk {
                 0 => unreachable!(),
                 1 => 0b0111,
@@ -179,7 +179,8 @@ impl CFGR {
 
         assert!(hclk <= 72_000_000);
 
-        let ppre1_bits = self.pclk1
+        let ppre1_bits = self
+            .pclk1
             .map(|pclk1| match hclk / pclk1 {
                 0 => unreachable!(),
                 1 => 0b011,
@@ -195,7 +196,8 @@ impl CFGR {
 
         assert!(pclk1 <= 36_000_000);
 
-        let ppre2_bits = self.pclk2
+        let ppre2_bits = self
+            .pclk2
             .map(|pclk2| match hclk / pclk2 {
                 0 => unreachable!(),
                 1 => 0b011,
@@ -226,10 +228,11 @@ impl CFGR {
 
         // the USB clock is only valid if an external crystal is used, the PLL is enabled, and the
         // PLL output frequency is a supported one.
+        // usbpre == true: divide clock by 1.5, otherwise no division
         let (usbpre, usbclk_valid) = match (self.hse, pllmul_bits, sysclk) {
-            (Some(_), Some(_), 72_000_000) => (USBPREW::DIV15, true),
-            (Some(_), Some(_), 48_000_000) => (USBPREW::NODIV, true),
-            _ => (USBPREW::NODIV, false),
+            (Some(_), Some(_), 72_000_000) => (false, true),
+            (Some(_), Some(_), 48_000_000) => (true, true),
+            _ => (true, false),
         };
 
         let rcc = unsafe { &*RCC::ptr() };
@@ -249,11 +252,7 @@ impl CFGR {
                 w.pllmul()
                     .bits(pllmul_bits)
                     .pllsrc()
-                    .bit(if self.hse.is_some() {
-                        true
-                    } else {
-                        false
-                    })
+                    .bit(if self.hse.is_some() { true } else { false })
             });
 
             rcc.cr.modify(|_, w| w.pllon().set_bit());
@@ -270,14 +269,17 @@ impl CFGR {
                 .hpre()
                 .bits(hpre_bits)
                 .usbpre()
-                .variant(usbpre)
+                .bit(usbpre)
                 .sw()
-                .variant(if pllmul_bits.is_some() {
-                    SWW::PLL
+                .bits(if pllmul_bits.is_some() {
+                    // PLL
+                    0b10
                 } else if self.hse.is_some() {
-                    SWW::HSE
+                    // HSE
+                    0b1
                 } else {
-                    SWW::HSI
+                    // HSI
+                    0b0
                 })
         });
 

src/serial.rs

@@ -13,7 +13,7 @@ use dma::{dma1, CircBuffer, Static, Transfer, R, W};
 use gpio::gpioa::{PA10, PA2, PA3, PA9};
 use gpio::gpiob::{PB10, PB11, PB6, PB7};
 use gpio::{Alternate, Floating, Input, PushPull};
-use rcc::{APB1, APB2, Clocks};
+use rcc::{Clocks, APB1, APB2};
 use time::Bps;
 
 /// Interrupt event
@@ -221,10 +221,10 @@ macro_rules! hal {
                 {
                     {
                         let buffer = buffer[0].as_mut();
-                        chan.cmar().write(|w| unsafe {
+                        chan.cmar().write(|w| {
                             w.ma().bits(buffer.as_ptr() as usize as u32)
                         });
-                        chan.cndtr().write(|w| unsafe{
+                        chan.cndtr().write(|w| {
                             w.ndt().bits(u16(buffer.len() * 2).unwrap())
                         });
                         chan.cpar().write(|w| unsafe {
@@ -266,10 +266,10 @@ macro_rules! hal {
                 {
                     {
                         let buffer = buffer.as_mut();
-                        chan.cmar().write(|w| unsafe {
+                        chan.cmar().write(|w| {
                             w.ma().bits(buffer.as_ptr() as usize as u32)
                         });
-                        chan.cndtr().write(|w| unsafe{
+                        chan.cndtr().write(|w| {
                             w.ndt().bits(u16(buffer.len()).unwrap())
                         });
                         chan.cpar().write(|w| unsafe {
@@ -313,10 +313,10 @@ macro_rules! hal {
                 {
                     {
                         let buffer = buffer.borrow().as_ref();
-                        chan.cmar().write(|w| unsafe {
+                        chan.cmar().write(|w| {
                             w.ma().bits(buffer.as_ptr() as usize as u32)
                         });
-                        chan.cndtr().write(|w| unsafe{
+                        chan.cndtr().write(|w| {
                             w.ndt().bits(u16(buffer.len()).unwrap())
                         });
                         chan.cpar().write(|w| unsafe {

src/spi.rs

@@ -9,7 +9,7 @@ use afio::MAPR;
 use gpio::gpioa::{PA5, PA6, PA7};
 use gpio::gpiob::{PB13, PB14, PB15, PB3, PB4, PB5};
 use gpio::{Alternate, Floating, Input, PushPull};
-use rcc::{APB1, APB2, Clocks};
+use rcc::{Clocks, APB1, APB2};
 use time::Hertz;
 
 /// SPI error
@@ -139,7 +139,7 @@ macro_rules! hal {
                     // dff: 8 bit frames
                     // bidimode: 2-line unidirectional
                     // spe: enable the SPI bus
-                    spi.cr1.write(|w| {
+                    spi.cr1.write(|w| unsafe {
                         w.cpha()
                             .bit(mode.phase == Phase::CaptureOnSecondTransition)
                             .cpol()

src/timer.rs

@@ -8,7 +8,7 @@ use void::Void;
 
 use core::any::TypeId;
 
-use rcc::{APB1, APB2, Clocks};
+use rcc::{Clocks, APB1, APB2};
 use time::Hertz;
 
 /// Interrupt events
@@ -154,8 +154,8 @@ macro_rules! hal {
                     let ticks = timer_clock.0 / frequency;
                     let psc = u16((ticks - 1) / (1 << 16)).unwrap();
 
-                    self.tim.psc.write(|w| w.psc().bits(psc));
-                    
+                    self.tim.psc.write(|w| unsafe { w.psc().bits(psc) });
+
                     let arr = u16(ticks / u32(psc + 1)).unwrap();
 
                     self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) });