i2c.rs 15 KB

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  1. //! Inter-Integrated Circuit (I2C) bus
  2. use afio::MAPR;
  3. use gpio::{Alternate, OpenDrain};
  4. use gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9};
  5. use hal::blocking::i2c::{Read, Write, WriteRead};
  6. use nb::{Error as NbError, Result as NbResult};
  7. use nb::Error::{Other, WouldBlock};
  8. use rcc::{APB1, Clocks};
  9. use stm32::{I2C1, I2C2};
  10. use stm32::DWT;
  11. /// I2C error
  12. #[derive(Debug, Eq, PartialEq)]
  13. pub enum Error {
  14. /// Bus error
  15. Bus,
  16. /// Arbitration loss
  17. Arbitration,
  18. /// No ack received
  19. Acknowledge,
  20. /// Overrun/underrun
  21. Overrun,
  22. // Pec, // SMBUS mode only
  23. // Timeout, // SMBUS mode only
  24. // Alert, // SMBUS mode only
  25. #[doc(hidden)] _Extensible,
  26. }
  27. #[derive(Debug, Eq, PartialEq)]
  28. pub enum DutyCycle {
  29. Ratio2to1,
  30. Ratio16to9,
  31. }
  32. #[derive(Debug, PartialEq)]
  33. pub enum Mode {
  34. Standard { frequency: u32 },
  35. Fast { frequency: u32, duty_cycle: DutyCycle },
  36. }
  37. impl Mode {
  38. pub fn get_frequency(&self) -> u32 {
  39. match self {
  40. &Mode::Standard { frequency } => frequency,
  41. &Mode::Fast { frequency, .. } => frequency,
  42. }
  43. }
  44. }
  45. pub trait Pins<I2C> {
  46. const REMAP: bool;
  47. }
  48. impl Pins<I2C1>
  49. for (
  50. PB6<Alternate<OpenDrain>>,
  51. PB7<Alternate<OpenDrain>>,
  52. ) {
  53. const REMAP: bool = false;
  54. }
  55. impl Pins<I2C1>
  56. for (
  57. PB8<Alternate<OpenDrain>>,
  58. PB9<Alternate<OpenDrain>>,
  59. ) {
  60. const REMAP: bool = true;
  61. }
  62. impl Pins<I2C2>
  63. for (
  64. PB10<Alternate<OpenDrain>>,
  65. PB11<Alternate<OpenDrain>>,
  66. ) {
  67. const REMAP: bool = false;
  68. }
  69. /// I2C peripheral operating in master mode
  70. pub struct I2c<I2C, PINS> {
  71. i2c: I2C,
  72. pins: PINS,
  73. mode: Mode,
  74. pclk1: u32,
  75. }
  76. pub struct BlockingI2c<I2C, PINS> {
  77. nb: I2c<I2C, PINS>,
  78. start_timeout: u32,
  79. start_retries: u8,
  80. addr_timeout: u32,
  81. data_timeout: u32,
  82. }
  83. impl<PINS> I2c<I2C1, PINS> {
  84. pub fn i2c1(
  85. i2c: I2C1,
  86. pins: PINS,
  87. mapr: &mut MAPR,
  88. mode: Mode,
  89. clocks: Clocks,
  90. apb: &mut APB1,
  91. ) -> Self
  92. where
  93. PINS: Pins<I2C1>,
  94. {
  95. mapr.mapr().modify(|_, w| w.i2c1_remap().bit(PINS::REMAP));
  96. I2c::_i2c1(i2c, pins, mode, clocks, apb)
  97. }
  98. }
  99. impl<PINS> BlockingI2c<I2C1, PINS> {
  100. pub fn i2c1(
  101. i2c: I2C1,
  102. pins: PINS,
  103. mapr: &mut MAPR,
  104. mode: Mode,
  105. clocks: Clocks,
  106. apb: &mut APB1,
  107. start_timeout_us: u32,
  108. start_retries: u8,
  109. addr_timeout_us: u32,
  110. data_timeout_us: u32,
  111. ) -> Self
  112. where
  113. PINS: Pins<I2C1>,
  114. {
  115. mapr.mapr().modify(|_, w| w.i2c1_remap().bit(PINS::REMAP));
  116. BlockingI2c::_i2c1(i2c, pins, mode, clocks, apb,
  117. start_timeout_us, start_retries, addr_timeout_us, data_timeout_us)
  118. }
  119. }
  120. impl<PINS> I2c<I2C2, PINS> {
  121. pub fn i2c2(
  122. i2c: I2C2,
  123. pins: PINS,
  124. mode: Mode,
  125. clocks: Clocks,
  126. apb: &mut APB1,
  127. ) -> Self
  128. where
  129. PINS: Pins<I2C2>,
  130. {
  131. I2c::_i2c2(i2c, pins, mode, clocks, apb)
  132. }
  133. }
  134. impl<PINS> BlockingI2c<I2C2, PINS> {
  135. pub fn i2c2(
  136. i2c: I2C2,
  137. pins: PINS,
  138. mode: Mode,
  139. clocks: Clocks,
  140. apb: &mut APB1,
  141. start_timeout_us: u32,
  142. start_retries: u8,
  143. addr_timeout_us: u32,
  144. data_timeout_us: u32,
  145. ) -> Self
  146. where
  147. PINS: Pins<I2C2>,
  148. {
  149. BlockingI2c::_i2c2(i2c, pins, mode, clocks, apb,
  150. start_timeout_us, start_retries, addr_timeout_us, data_timeout_us)
  151. }
  152. }
  153. pub fn blocking_i2c<I2C, PINS>(i2c: I2c<I2C, PINS>,
  154. clocks: Clocks,
  155. start_timeout_us: u32,
  156. start_retries: u8,
  157. addr_timeout_us: u32,
  158. data_timeout_us: u32) -> BlockingI2c<I2C, PINS> {
  159. let sysclk_mhz = clocks.sysclk().0 / 1_000_000;
  160. return BlockingI2c {
  161. nb: i2c,
  162. start_timeout: start_timeout_us * sysclk_mhz,
  163. start_retries,
  164. addr_timeout: addr_timeout_us * sysclk_mhz,
  165. data_timeout: data_timeout_us * sysclk_mhz,
  166. };
  167. }
  168. macro_rules! wait_for_flag {
  169. ($i2c:expr, $flag:ident) => {
  170. {
  171. let sr1 = $i2c.sr1.read();
  172. if sr1.berr().bit_is_set() {
  173. Err(Other(Error::Bus))
  174. } else if sr1.arlo().bit_is_set() {
  175. Err(Other(Error::Arbitration))
  176. } else if sr1.af().bit_is_set() {
  177. Err(Other(Error::Acknowledge))
  178. } else if sr1.ovr().bit_is_set() {
  179. Err(Other(Error::Overrun))
  180. } else if sr1.$flag().bit_is_set() {
  181. Ok(())
  182. } else {
  183. Err(WouldBlock)
  184. }
  185. }
  186. }
  187. }
  188. macro_rules! busy_wait {
  189. ($nb_expr:expr, $exit_cond:expr) => {
  190. {
  191. loop {
  192. let res = $nb_expr;
  193. if res != Err(WouldBlock) {
  194. break res;
  195. }
  196. if $exit_cond {
  197. break res;
  198. }
  199. }
  200. }
  201. }
  202. }
  203. macro_rules! busy_wait_cycles {
  204. ($nb_expr:expr, $cycles:expr) => {
  205. {
  206. let started = DWT::get_cycle_count();
  207. let cycles = $cycles;
  208. busy_wait!($nb_expr, DWT::get_cycle_count().wrapping_sub(started) >= cycles)
  209. }
  210. }
  211. }
  212. macro_rules! hal {
  213. ($($I2CX:ident: ($i2cX:ident, $i2cXen:ident, $i2cXrst:ident),)+) => {
  214. $(
  215. impl<PINS> I2c<$I2CX, PINS> {
  216. /// Configures the I2C peripheral to work in master mode
  217. pub fn $i2cX(
  218. i2c: $I2CX,
  219. pins: PINS,
  220. mode: Mode,
  221. clocks: Clocks,
  222. apb: &mut APB1,
  223. ) -> Self {
  224. apb.enr().modify(|_, w| w.$i2cXen().set_bit());
  225. apb.rstr().modify(|_, w| w.$i2cXrst().set_bit());
  226. apb.rstr().modify(|_, w| w.$i2cXrst().clear_bit());
  227. let pclk1 = clocks.pclk1().0;
  228. assert!(mode.get_frequency() <= 400_000);
  229. let mut i2c = I2c { i2c, pins, mode, pclk1 };
  230. i2c.init();
  231. i2c
  232. }
  233. fn init(&mut self) {
  234. let freq = self.mode.get_frequency();
  235. let pclk1_mhz = (self.pclk1 / 1000000) as u16;
  236. self.i2c.cr2.write(|w| unsafe {
  237. w.freq().bits(pclk1_mhz as u8)
  238. });
  239. self.i2c.cr1.write(|w| w.pe().clear_bit());
  240. match self.mode {
  241. Mode::Standard { .. } => {
  242. self.i2c.trise.write(|w| unsafe {
  243. w.trise().bits((pclk1_mhz + 1) as u8)
  244. });
  245. self.i2c.ccr.write(|w| unsafe {
  246. w.ccr().bits(((self.pclk1 / (freq * 2)) as u16).max(4))
  247. });
  248. },
  249. Mode::Fast { ref duty_cycle, .. } => {
  250. self.i2c.trise.write(|w| unsafe {
  251. w.trise().bits((pclk1_mhz * 300 / 1000 + 1) as u8)
  252. });
  253. self.i2c.ccr.write(|w| {
  254. let (freq, duty) = match duty_cycle {
  255. &DutyCycle::Ratio2to1 => (((self.pclk1 / (freq * 3)) as u16).max(1), false),
  256. &DutyCycle::Ratio16to9 => (((self.pclk1 / (freq * 25)) as u16).max(1), true)
  257. };
  258. unsafe {
  259. w.ccr().bits(freq).duty().bit(duty).f_s().set_bit()
  260. }
  261. });
  262. }
  263. };
  264. self.i2c.cr1.modify(|_, w| w.pe().set_bit());
  265. }
  266. fn reset(&mut self) {
  267. self.i2c.cr1.write(|w| w.pe().set_bit().swrst().set_bit());
  268. self.i2c.cr1.reset();
  269. self.init();
  270. }
  271. fn send_start(&mut self) {
  272. self.i2c.cr1.modify(|_, w| w.start().set_bit());
  273. }
  274. fn wait_after_sent_start(&mut self) -> NbResult<(), Error> {
  275. wait_for_flag!(self.i2c, sb)
  276. }
  277. fn send_addr(&self, addr: u8, read: bool) {
  278. self.i2c.dr.write(|w| unsafe { w.dr().bits(addr << 1 | (if read {1} else {0})) });
  279. }
  280. fn wait_after_sent_addr(&self) -> NbResult<(), Error> {
  281. wait_for_flag!(self.i2c, addr)?;
  282. self.i2c.sr2.read();
  283. Ok(())
  284. }
  285. fn send_stop(&self) {
  286. self.i2c.cr1.modify(|_, w| w.stop().set_bit());
  287. }
  288. /// Releases the I2C peripheral and associated pins
  289. pub fn free(self) -> ($I2CX, PINS) {
  290. (self.i2c, self.pins)
  291. }
  292. }
  293. impl<PINS> BlockingI2c<$I2CX, PINS> {
  294. pub fn $i2cX(
  295. i2c: $I2CX,
  296. pins: PINS,
  297. mode: Mode,
  298. clocks: Clocks,
  299. apb: &mut APB1,
  300. start_timeout_us: u32,
  301. start_retries: u8,
  302. addr_timeout_us: u32,
  303. data_timeout_us: u32
  304. ) -> Self {
  305. blocking_i2c(I2c::$i2cX(i2c, pins, mode, clocks, apb),
  306. clocks, start_timeout_us, start_retries,
  307. addr_timeout_us, data_timeout_us)
  308. }
  309. fn send_start_and_wait(&mut self) -> NbResult<(), Error> {
  310. // According to http://www.st.com/content/ccc/resource/technical/document/errata_sheet/f5/50/c9/46/56/db/4a/f6/CD00197763.pdf/files/CD00197763.pdf/jcr:content/translations/en.CD00197763.pdf
  311. // 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced Stop
  312. let mut retries_left = self.start_retries;
  313. let mut last_ret: NbResult<(), Error> = Err(WouldBlock);
  314. while retries_left > 0 {
  315. self.nb.send_start();
  316. last_ret = busy_wait_cycles!(self.nb.wait_after_sent_start(), self.start_timeout);
  317. if let Err(_) = last_ret {
  318. self.nb.reset();
  319. } else {
  320. break;
  321. }
  322. retries_left -= 1;
  323. }
  324. last_ret
  325. }
  326. fn send_addr_and_wait(&self, addr: u8, read: bool) -> NbResult<(), Error> {
  327. self.nb.send_addr(addr, read);
  328. busy_wait_cycles!(self.nb.wait_after_sent_addr(), self.addr_timeout)
  329. }
  330. fn write_without_stop(&mut self, addr: u8, bytes: &[u8]) -> NbResult<(), Error> {
  331. self.send_start_and_wait()?;
  332. self.send_addr_and_wait(addr, false)?;
  333. for byte in bytes {
  334. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, tx_e), self.data_timeout)?;
  335. self.nb.i2c.dr.write(|w| unsafe { w.dr().bits(*byte) });
  336. }
  337. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, tx_e), self.data_timeout)?;
  338. Ok(())
  339. }
  340. }
  341. impl<PINS> Write for BlockingI2c<$I2CX, PINS> {
  342. type Error = NbError<Error>;
  343. fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
  344. self.write_without_stop(addr, bytes)?;
  345. self.nb.send_stop();
  346. Ok(())
  347. }
  348. }
  349. impl<PINS> Read for BlockingI2c<$I2CX, PINS> {
  350. type Error = NbError<Error>;
  351. fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
  352. self.send_start_and_wait()?;
  353. match buffer.len() {
  354. 1 => {
  355. self.nb.send_addr(addr, true);
  356. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, addr), self.addr_timeout)?;
  357. self.nb.i2c.cr1.modify(|_, w| w.ack().clear_bit());
  358. let _ = self.nb.i2c.sr2.read();
  359. self.nb.send_stop();
  360. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, rx_ne), self.data_timeout)?;
  361. buffer[0] = self.nb.i2c.dr.read().dr().bits();
  362. }
  363. 2 => {
  364. self.nb.i2c.cr1.modify(|_, w| w.pos().set_bit().ack().set_bit());
  365. self.send_addr_and_wait(addr, true)?;
  366. self.nb.i2c.cr1.modify(|_, w| w.pos().clear_bit().ack().clear_bit());
  367. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, btf), self.data_timeout)?;
  368. self.nb.send_stop();
  369. buffer[0] = self.nb.i2c.dr.read().dr().bits();
  370. buffer[1] = self.nb.i2c.dr.read().dr().bits();
  371. }
  372. buffer_len => {
  373. self.nb.i2c.cr1.modify(|_, w| w.ack().set_bit());
  374. self.send_addr_and_wait(addr, true)?;
  375. let (mut first_bytes, mut last_two_bytes) = buffer.split_at_mut(buffer_len - 3);
  376. for mut byte in first_bytes {
  377. self.nb.i2c.cr1.modify(|_, w| w.ack().set_bit());
  378. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, rx_ne), self.data_timeout)?;
  379. *byte = self.nb.i2c.dr.read().dr().bits();
  380. }
  381. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, btf), self.data_timeout)?;
  382. self.nb.i2c.cr1.modify(|_, w| w.ack().clear_bit());
  383. last_two_bytes[0] = self.nb.i2c.dr.read().dr().bits();
  384. self.nb.send_stop();
  385. last_two_bytes[1] = self.nb.i2c.dr.read().dr().bits();
  386. busy_wait_cycles!(wait_for_flag!(self.nb.i2c, rx_ne), self.data_timeout)?;
  387. last_two_bytes[2] = self.nb.i2c.dr.read().dr().bits();
  388. }
  389. }
  390. Ok(())
  391. }
  392. }
  393. impl<PINS> WriteRead for BlockingI2c<$I2CX, PINS> {
  394. type Error = NbError<Error>;
  395. fn write_read(
  396. &mut self,
  397. addr: u8,
  398. bytes: &[u8],
  399. buffer: &mut [u8],
  400. ) -> Result<(), Self::Error> {
  401. assert!(buffer.len() > 0);
  402. if bytes.len() != 0 {
  403. self.write_without_stop(addr, bytes)?;
  404. }
  405. self.read(addr, buffer)?;
  406. Ok(())
  407. }
  408. }
  409. )+
  410. }
  411. }
  412. hal! {
  413. I2C1: (_i2c1, i2c1en, i2c1rst),
  414. I2C2: (_i2c2, i2c2en, i2c2rst),
  415. }