openocd.cfg 899 B

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  1. adapter_khz 1000
  2. reset_config srst_only
  3. adapter_nsrst_assert_width 100
  4. interface jlink
  5. transport select jtag
  6. # autoexit true
  7. set _CHIPNAME riscv
  8. jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1e200a6d
  9. set _TARGETNAME $_CHIPNAME.cpu
  10. target create $_TARGETNAME riscv -chain-position $_TARGETNAME
  11. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0
  12. # Work-area is a space in RAM used for flash programming
  13. if { [info exists WORKAREASIZE] } {
  14. set _WORKAREASIZE $WORKAREASIZE
  15. } else {
  16. set _WORKAREASIZE 0x5000
  17. }
  18. # Allow overriding the Flash bank size
  19. if { [info exists FLASH_SIZE] } {
  20. set _FLASH_SIZE $FLASH_SIZE
  21. } else {
  22. # autodetect size
  23. set _FLASH_SIZE 0
  24. }
  25. # flash size will be probed
  26. set _FLASHNAME $_CHIPNAME.flash
  27. flash bank $_FLASHNAME gd32vf103 0x08000000 0 0 0 $_TARGETNAME
  28. riscv set_reset_timeout_sec 1
  29. init
  30. halt