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+# ! [doc = "Peripheral access API for CH569 microcontrollers (generated using svd2rust v0.19.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
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+svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
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+# ! [deny (const_err)]
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+# ! [deny (dead_code)]
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+# ! [deny (improper_ctypes)]
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+# ! [deny (missing_docs)]
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+# ! [deny (no_mangle_generic_items)]
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+# ! [deny (non_shorthand_field_patterns)]
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+# ! [deny (overflowing_literals)]
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+# ! [deny (path_statements)]
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+# ! [deny (patterns_in_fns_without_body)]
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+# ! [deny (private_in_public)]
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+# ! [deny (unconditional_recursion)]
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+# ! [deny (unused_allocation)]
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+# ! [deny (unused_comparisons)]
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+# ! [deny (unused_parens)]
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+# ! [deny (while_true)]
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+# ! [allow (non_camel_case_types)]
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+# ! [allow (non_snake_case)]
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+# ! [no_std]
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+use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [allow (unused_imports)]
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+use generic :: * ; # [doc = r"Common register and bit access and modify traits"]
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+pub mod generic { use core :: marker ; # [doc = " Raw register type"]
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+pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."]
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+type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."]
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+# [doc = ""]
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+# [doc = " Registers marked with `Writable` can be also `modify`'ed."]
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+pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."]
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+type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."]
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+# [doc = ""]
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+# [doc = " This enables the `write`, `write_with_zero` and `reset` methods."]
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+# [doc = ""]
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+# [doc = " Registers marked with `Readable` can be also `modify`'ed."]
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+pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."]
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+type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."]
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+# [doc = ""]
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+# [doc = " This value is the initial value for the `write` method. It can also be directly written to the"]
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+# [doc = " register by using the `reset` method."]
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+pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."]
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+fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."]
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+# [repr (transparent)]
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+pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."]
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+# [doc = ""]
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+# [doc = " ```ignore"]
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+# [doc = " let reg_ptr = periph.reg.as_ptr();"]
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+# [doc = " ```"]
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+# [inline (always)]
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+pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."]
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+# [doc = ""]
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+# [doc = " You can read the raw contents of a register by using `bits`:"]
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+# [doc = " ```ignore"]
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+# [doc = " let bits = periph.reg.read().bits();"]
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+# [doc = " ```"]
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+# [doc = " or get the content of a particular field of a register:"]
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+# [doc = " ```ignore"]
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+# [doc = " let reader = periph.reg.read();"]
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+# [doc = " let bits = reader.field1().bits();"]
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+# [doc = " let flag = reader.field2().bit_is_set();"]
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+# [doc = " ```"]
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+# [inline (always)]
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+pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."]
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+# [doc = ""]
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+# [doc = " Resets the register to its initial state."]
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+# [inline (always)]
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+pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."]
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+# [doc = ""]
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+# [doc = " You can write raw bits into a register:"]
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+# [doc = " ```ignore"]
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+# [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
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+# [doc = " ```"]
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+# [doc = " or write only the fields you need:"]
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+# [doc = " ```ignore"]
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+# [doc = " periph.reg.write(|w| w"]
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+# [doc = " .field1().bits(newfield1bits)"]
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+# [doc = " .field2().set_bit()"]
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+# [doc = " .field3().variant(VARIANT)"]
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+# [doc = " );"]
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+# [doc = " ```"]
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+# [doc = " In the latter case, other fields will be set to their reset value."]
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+# [inline (always)]
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+pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."]
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+# [doc = ""]
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+# [doc = " Similar to `write`, but unused bits will contain 0."]
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+# [inline (always)]
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+pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."]
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+# [doc = ""]
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+# [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
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+# [doc = " ```ignore"]
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+# [doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
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+# [doc = " r.bits() | 3"]
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+# [doc = " ) });"]
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+# [doc = " ```"]
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+# [doc = " or"]
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+# [doc = " ```ignore"]
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+# [doc = " periph.reg.modify(|_, w| w"]
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+# [doc = " .field1().bits(newfield1bits)"]
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+# [doc = " .field2().set_bit()"]
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+# [doc = " .field3().variant(VARIANT)"]
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+# [doc = " );"]
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+# [doc = " ```"]
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+# [doc = " Other fields will have the value they had before the call to `modify`."]
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+# [inline (always)]
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+pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."]
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+# [doc = ""]
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+# [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"]
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+# [doc = " method."]
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+pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."]
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+# [inline (always)]
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+pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)]
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+fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."]
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+# [doc = ""]
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+# [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."]
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+pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"]
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+pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."]
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+# [doc = ""]
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+# [doc = " Result of the `read` methods of fields."]
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+pub struct FieldReader < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , T > FieldReader < U , T > where U : Copy , { # [doc = " Creates a new instance of the reader."]
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+# [allow (unused)]
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+# [inline (always)]
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+pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } # [doc = " Reads raw bits from field."]
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+# [inline (always)]
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+pub fn bits (& self) -> U { self . bits } } impl < U , T , FI > PartialEq < FI > for FieldReader < U , T > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)]
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+fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > FieldReader < bool , FI > { # [doc = " Value of the field as raw bits."]
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+# [inline (always)]
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+pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."]
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+# [inline (always)]
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+pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."]
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+# [inline (always)]
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+pub fn bit_is_set (& self) -> bool { self . bit () } } } # [doc = "SYS register"]
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+pub struct SYS { _marker : PhantomData < * const () > } unsafe impl Send for SYS { } impl SYS { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const sys :: RegisterBlock = 0x4000_1000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const sys :: RegisterBlock { Self :: PTR } } impl Deref for SYS { type Target = sys :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SYS { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SYS") . finish () } } # [doc = "SYS register"]
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+pub mod sys { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - safe accessing sign register"]
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+pub r8_safe_access_sig : crate :: Reg < r8_safe_access_sig :: R8_SAFE_ACCESS_SIG_SPEC > , # [doc = "0x01 - chip ID register"]
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+pub r8_chip_id : crate :: Reg < r8_chip_id :: R8_CHIP_ID_SPEC > , # [doc = "0x02 - safe accessing ID register"]
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+pub r8_safe_access_id : crate :: Reg < r8_safe_access_id :: R8_SAFE_ACCESS_ID_SPEC > , # [doc = "0x03 - watch-dog count register"]
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+pub r8_wdog_count : crate :: Reg < r8_wdog_count :: R8_WDOG_COUNT_SPEC > , # [doc = "0x04 - flash ROM configuration register"]
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+pub r8_glob_rom_cfg : crate :: Reg < r8_glob_rom_cfg :: R8_GLOB_ROM_CFG_SPEC > , # [doc = "0x05 - reset status and boot/debug status"]
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+pub r8_rst_boot_stat : crate :: Reg < r8_rst_boot_stat :: R8_RST_BOOT_STAT_SPEC > , # [doc = "0x06 - reset and watch-dog control"]
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+pub r8_rst_wdog_ctrl : crate :: Reg < r8_rst_wdog_ctrl :: R8_RST_WDOG_CTRL_SPEC > , # [doc = "0x07 - value keeper during global reset"]
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+pub r8_glob_reset_keep : crate :: Reg < r8_glob_reset_keep :: R8_GLOB_RESET_KEEP_SPEC > , # [doc = "0x08 - output clock divider from PLL"]
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+pub r8_clk_pll_div : crate :: Reg < r8_clk_pll_div :: R8_CLK_PLL_DIV_SPEC > , _reserved9 : [u8 ; 0x01]
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+, # [doc = "0x0a - clock control"]
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+pub r8_clk_cfg_ctrl : crate :: Reg < r8_clk_cfg_ctrl :: R8_CLK_CFG_CTRL_SPEC > , # [doc = "0x0b - clock mode aux register"]
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+pub r8_clk_mod_aux : crate :: Reg < r8_clk_mod_aux :: R8_CLK_MOD_AUX_SPEC > , # [doc = "0x0c - sleep clock off control byte 0"]
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+pub r8_slp_clk_off0 : crate :: Reg < r8_slp_clk_off0 :: R8_SLP_CLK_OFF0_SPEC > , # [doc = "0x0d - sleep clock off control byte 1"]
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+pub r8_slp_clk_off1 : crate :: Reg < r8_slp_clk_off1 :: R8_SLP_CLK_OFF1_SPEC > , # [doc = "0x0e - wake control"]
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+pub r8_slp_wake_ctrl : crate :: Reg < r8_slp_wake_ctrl :: R8_SLP_WAKE_CTRL_SPEC > , # [doc = "0x0f - power control"]
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+pub r8_slp_power_ctrl : crate :: Reg < r8_slp_power_ctrl :: R8_SLP_POWER_CTRL_SPEC > , _reserved15 : [u8 ; 0x02]
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+, # [doc = "0x12 - alternate pin control"]
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+pub r8_pin_alternate : crate :: Reg < r8_pin_alternate :: R8_PIN_ALTERNATE_SPEC > , _reserved16 : [u8 ; 0x09]
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+, # [doc = "0x1c - GPIO interrupt control"]
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+pub r8_gpio_int_flag : crate :: Reg < r8_gpio_int_flag :: R8_GPIO_INT_FLAG_SPEC > , # [doc = "0x1d - GPIO interrupt enable"]
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+pub r8_gpio_int_enable : crate :: Reg < r8_gpio_int_enable :: R8_GPIO_INT_ENABLE_SPEC > , # [doc = "0x1e - GPIO interrupt mode"]
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+pub r8_gpio_int_mode : crate :: Reg < r8_gpio_int_mode :: R8_GPIO_INT_MODE_SPEC > , # [doc = "0x1f - GPIO interrupt polarity"]
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+pub r8_gpio_int_polar : crate :: Reg < r8_gpio_int_polar :: R8_GPIO_INT_POLAR_SPEC > , # [doc = "0x20 - Serdes Analog parameter configuration1"]
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+pub r16_serd_ana_cfg1 : crate :: Reg < r16_serd_ana_cfg1 :: R16_SERD_ANA_CFG1_SPEC > , _reserved21 : [u8 ; 0x02]
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+, # [doc = "0x24 - Serdes Analog parameter configuration2"]
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+pub r32_serd_ana_cfg2 : crate :: Reg < r32_serd_ana_cfg2 :: R32_SERD_ANA_CFG2_SPEC > , _reserved22 : [u8 ; 0x18]
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+, # [doc = "0x40 - GPIO PA I/O direction"]
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+pub r32_pa_dir : crate :: Reg < r32_pa_dir :: R32_PA_DIR_SPEC > , # [doc = "0x44 - GPIO PA input"]
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+pub r32_pa_pin : crate :: Reg < r32_pa_pin :: R32_PA_PIN_SPEC > , # [doc = "0x48 - GPIO PA output"]
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+pub r32_pa_out : crate :: Reg < r32_pa_out :: R32_PA_OUT_SPEC > , # [doc = "0x4c - GPIO PA clear output"]
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+pub r32_pa_clr : crate :: Reg < r32_pa_clr :: R32_PA_CLR_SPEC > , # [doc = "0x50 - GPIO PA pullup resistance enable"]
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+pub r32_pa_pu : crate :: Reg < r32_pa_pu :: R32_PA_PU_SPEC > , # [doc = "0x54 - GPIO PA output open-drain and input pulldown resistance enable"]
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+pub r32_pa_pd : crate :: Reg < r32_pa_pd :: R32_PA_PD_SPEC > , # [doc = "0x58 - GPIO PA driving capability"]
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+pub r32_pa_drv : crate :: Reg < r32_pa_drv :: R32_PA_DRV_SPEC > , # [doc = "0x5c - GPIO PA output slew rate and input schmitt trigger"]
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+pub r32_pa_smt : crate :: Reg < r32_pa_smt :: R32_PA_SMT_SPEC > , # [doc = "0x60 - GPIO PB I/O direction"]
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+pub r32_pb_dir : crate :: Reg < r32_pb_dir :: R32_PB_DIR_SPEC > , # [doc = "0x64 - GPIO PB input"]
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+pub r32_pb_pin : crate :: Reg < r32_pb_pin :: R32_PB_PIN_SPEC > , # [doc = "0x68 - GPIO PB output"]
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+pub r32_pb_out : crate :: Reg < r32_pb_out :: R32_PB_OUT_SPEC > , # [doc = "0x6c - GPIO PB clear output"]
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+pub r32_pb_clr : crate :: Reg < r32_pb_clr :: R32_PB_CLR_SPEC > , # [doc = "0x70 - GPIO PB pullup resistance enable"]
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+pub r32_pb_pu : crate :: Reg < r32_pb_pu :: R32_PB_PU_SPEC > , # [doc = "0x74 - GPIO PB output open-drain and input pulldown resistance enable"]
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+pub r32_pb_pd : crate :: Reg < r32_pb_pd :: R32_PB_PD_SPEC > , # [doc = "0x78 - GPIO PB driving capability"]
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+pub r32_pb_drv : crate :: Reg < r32_pb_drv :: R32_PB_DRV_SPEC > , # [doc = "0x7c - GPIO PB output slew rate and input schmitt trigger"]
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+pub r32_pb_smt : crate :: Reg < r32_pb_smt :: R32_PB_SMT_SPEC > , } # [doc = "R8_SAFE_ACCESS_SIG register accessor: an alias for `Reg<R8_SAFE_ACCESS_SIG_SPEC>`"]
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+pub type R8_SAFE_ACCESS_SIG = crate :: Reg < r8_safe_access_sig :: R8_SAFE_ACCESS_SIG_SPEC > ; # [doc = "safe accessing sign register"]
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+pub mod r8_safe_access_sig { # [doc = "Register `R8_SAFE_ACCESS_SIG` reader"]
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+pub struct R (crate :: R < R8_SAFE_ACCESS_SIG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SAFE_ACCESS_SIG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SAFE_ACCESS_SIG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SAFE_ACCESS_SIG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SAFE_ACCESS_SIG` writer"]
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+pub struct W (crate :: W < R8_SAFE_ACCESS_SIG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SAFE_ACCESS_SIG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SAFE_ACCESS_SIG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SAFE_ACCESS_SIG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SAFE_ACC_MODE` reader - current safe accessing mode"]
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+pub struct RB_SAFE_ACC_MODE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SAFE_ACC_MODE_R { pub (crate) fn new (bits : u8) -> Self { RB_SAFE_ACC_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SAFE_ACC_MODE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SAFE_ACC_MODE` writer - current safe accessing mode"]
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+pub struct RB_SAFE_ACC_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SAFE_ACC_MODE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_SAFE_ACC_TIMER` reader - safe accessing timer bit mask"]
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+pub struct RB_SAFE_ACC_TIMER_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SAFE_ACC_TIMER_R { pub (crate) fn new (bits : u8) -> Self { RB_SAFE_ACC_TIMER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SAFE_ACC_TIMER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SAFE_ACC_TIMER` writer - safe accessing timer bit mask"]
|
|
|
+pub struct RB_SAFE_ACC_TIMER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SAFE_ACC_TIMER_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x07 << 4)) | ((value as u8 & 0x07) << 4) ; self . w } } impl R { # [doc = "Bits 0:1 - current safe accessing mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_safe_acc_mode (& self) -> RB_SAFE_ACC_MODE_R { RB_SAFE_ACC_MODE_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bits 4:6 - safe accessing timer bit mask"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_safe_acc_timer (& self) -> RB_SAFE_ACC_TIMER_R { RB_SAFE_ACC_TIMER_R :: new (((self . bits >> 4) & 0x07) as u8) } } impl W { # [doc = "Bits 0:1 - current safe accessing mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_safe_acc_mode (& mut self) -> RB_SAFE_ACC_MODE_W { RB_SAFE_ACC_MODE_W { w : self } } # [doc = "Bits 4:6 - safe accessing timer bit mask"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_safe_acc_timer (& mut self) -> RB_SAFE_ACC_TIMER_W { RB_SAFE_ACC_TIMER_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "safe accessing sign register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_safe_access_sig](index.html) module"]
|
|
|
+pub struct R8_SAFE_ACCESS_SIG_SPEC ; impl crate :: RegisterSpec for R8_SAFE_ACCESS_SIG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_safe_access_sig::R](R) reader structure"]
|
|
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+impl crate :: Readable for R8_SAFE_ACCESS_SIG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_safe_access_sig::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_SAFE_ACCESS_SIG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SAFE_ACCESS_SIG to value 0"]
|
|
|
+impl crate :: Resettable for R8_SAFE_ACCESS_SIG_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_CHIP_ID register accessor: an alias for `Reg<R8_CHIP_ID_SPEC>`"]
|
|
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+pub type R8_CHIP_ID = crate :: Reg < r8_chip_id :: R8_CHIP_ID_SPEC > ; # [doc = "chip ID register"]
|
|
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+pub mod r8_chip_id { # [doc = "Register `R8_CHIP_ID` reader"]
|
|
|
+pub struct R (crate :: R < R8_CHIP_ID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CHIP_ID_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CHIP_ID_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_CHIP_ID_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_CHIP_ID` reader - chip ID"]
|
|
|
+pub struct R8_CHIP_ID_R (crate :: FieldReader < u8 , u8 >) ; impl R8_CHIP_ID_R { pub (crate) fn new (bits : u8) -> Self { R8_CHIP_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_CHIP_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - chip ID"]
|
|
|
+# [inline (always)]
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|
|
+pub fn r8_chip_id (& self) -> R8_CHIP_ID_R { R8_CHIP_ID_R :: new ((self . bits & 0xff) as u8) } } # [doc = "chip ID register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_chip_id](index.html) module"]
|
|
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+pub struct R8_CHIP_ID_SPEC ; impl crate :: RegisterSpec for R8_CHIP_ID_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_chip_id::R](R) reader structure"]
|
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+impl crate :: Readable for R8_CHIP_ID_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_CHIP_ID to value 0x69"]
|
|
|
+impl crate :: Resettable for R8_CHIP_ID_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x69 } } } # [doc = "R8_SAFE_ACCESS_ID register accessor: an alias for `Reg<R8_SAFE_ACCESS_ID_SPEC>`"]
|
|
|
+pub type R8_SAFE_ACCESS_ID = crate :: Reg < r8_safe_access_id :: R8_SAFE_ACCESS_ID_SPEC > ; # [doc = "safe accessing ID register"]
|
|
|
+pub mod r8_safe_access_id { # [doc = "Register `R8_SAFE_ACCESS_ID` reader"]
|
|
|
+pub struct R (crate :: R < R8_SAFE_ACCESS_ID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SAFE_ACCESS_ID_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SAFE_ACCESS_ID_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SAFE_ACCESS_ID_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SAFE_ACCESS_ID` reader - safe accessing ID"]
|
|
|
+pub struct R8_SAFE_ACCESS_ID_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SAFE_ACCESS_ID_R { pub (crate) fn new (bits : u8) -> Self { R8_SAFE_ACCESS_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SAFE_ACCESS_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - safe accessing ID"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_safe_access_id (& self) -> R8_SAFE_ACCESS_ID_R { R8_SAFE_ACCESS_ID_R :: new ((self . bits & 0xff) as u8) } } # [doc = "safe accessing ID register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_safe_access_id](index.html) module"]
|
|
|
+pub struct R8_SAFE_ACCESS_ID_SPEC ; impl crate :: RegisterSpec for R8_SAFE_ACCESS_ID_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_safe_access_id::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SAFE_ACCESS_ID_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SAFE_ACCESS_ID to value 0x02"]
|
|
|
+impl crate :: Resettable for R8_SAFE_ACCESS_ID_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_WDOG_COUNT register accessor: an alias for `Reg<R8_WDOG_COUNT_SPEC>`"]
|
|
|
+pub type R8_WDOG_COUNT = crate :: Reg < r8_wdog_count :: R8_WDOG_COUNT_SPEC > ; # [doc = "watch-dog count register"]
|
|
|
+pub mod r8_wdog_count { # [doc = "Register `R8_WDOG_COUNT` reader"]
|
|
|
+pub struct R (crate :: R < R8_WDOG_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_WDOG_COUNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_WDOG_COUNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_WDOG_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_WDOG_COUNT` writer"]
|
|
|
+pub struct W (crate :: W < R8_WDOG_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_WDOG_COUNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_WDOG_COUNT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_WDOG_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_WDOG_COUNT` reader - watch-dog count"]
|
|
|
+pub struct R8_WDOG_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_WDOG_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_WDOG_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_WDOG_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_WDOG_COUNT` writer - watch-dog count"]
|
|
|
+pub struct R8_WDOG_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_WDOG_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - watch-dog count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_wdog_count (& self) -> R8_WDOG_COUNT_R { R8_WDOG_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - watch-dog count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_wdog_count (& mut self) -> R8_WDOG_COUNT_W { R8_WDOG_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "watch-dog count register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_wdog_count](index.html) module"]
|
|
|
+pub struct R8_WDOG_COUNT_SPEC ; impl crate :: RegisterSpec for R8_WDOG_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_wdog_count::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_WDOG_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_wdog_count::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_WDOG_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_WDOG_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_WDOG_COUNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GLOB_ROM_CFG register accessor: an alias for `Reg<R8_GLOB_ROM_CFG_SPEC>`"]
|
|
|
+pub type R8_GLOB_ROM_CFG = crate :: Reg < r8_glob_rom_cfg :: R8_GLOB_ROM_CFG_SPEC > ; # [doc = "flash ROM configuration register"]
|
|
|
+pub mod r8_glob_rom_cfg { # [doc = "Register `R8_GLOB_ROM_CFG` reader"]
|
|
|
+pub struct R (crate :: R < R8_GLOB_ROM_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GLOB_ROM_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GLOB_ROM_CFG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_GLOB_ROM_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GLOB_ROM_CFG` writer"]
|
|
|
+pub struct W (crate :: W < R8_GLOB_ROM_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GLOB_ROM_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GLOB_ROM_CFG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_GLOB_ROM_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ROM_EXT_RE` reader - enable flash ROM being read by external programmer"]
|
|
|
+pub struct RB_ROM_EXT_RE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_EXT_RE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_EXT_RE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_EXT_RE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_EXT_RE` writer - enable flash ROM being read by external programmer"]
|
|
|
+pub struct RB_ROM_EXT_RE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_EXT_RE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_CODE_RAM_WE` reader - enable code RAM being write"]
|
|
|
+pub struct RB_CODE_RAM_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_CODE_RAM_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_CODE_RAM_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CODE_RAM_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CODE_RAM_WE` writer - enable code RAM being write"]
|
|
|
+pub struct RB_CODE_RAM_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CODE_RAM_WE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ROM_DATA_WE` reader - enable flash ROM data area being erase/write"]
|
|
|
+pub struct RB_ROM_DATA_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_DATA_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_DATA_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_DATA_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_DATA_WE` writer - enable flash ROM data area being erase/write"]
|
|
|
+pub struct RB_ROM_DATA_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_DATA_WE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_ROM_CODE_WE` reader - enable flash ROM code and data area being erase or write"]
|
|
|
+pub struct RB_ROM_CODE_WE_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_CODE_WE_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_CODE_WE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_CODE_WE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_CODE_WE` writer - enable flash ROM code and data area being erase or write"]
|
|
|
+pub struct RB_ROM_CODE_WE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_CODE_WE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_ROM_CODE_OFS` reader - Config the start offset address of user code in Flash"]
|
|
|
+pub struct RB_ROM_CODE_OFS_R (crate :: FieldReader < bool , bool >) ; impl RB_ROM_CODE_OFS_R { pub (crate) fn new (bits : bool) -> Self { RB_ROM_CODE_OFS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ROM_CODE_OFS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ROM_CODE_OFS` writer - Config the start offset address of user code in Flash"]
|
|
|
+pub struct RB_ROM_CODE_OFS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ROM_CODE_OFS_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable flash ROM being read by external programmer"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_ext_re (& self) -> RB_ROM_EXT_RE_R { RB_ROM_EXT_RE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable code RAM being write"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_code_ram_we (& self) -> RB_CODE_RAM_WE_R { RB_CODE_RAM_WE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable flash ROM data area being erase/write"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_data_we (& self) -> RB_ROM_DATA_WE_R { RB_ROM_DATA_WE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable flash ROM code and data area being erase or write"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_code_we (& self) -> RB_ROM_CODE_WE_R { RB_ROM_CODE_WE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - Config the start offset address of user code in Flash"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_code_ofs (& self) -> RB_ROM_CODE_OFS_R { RB_ROM_CODE_OFS_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable flash ROM being read by external programmer"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_ext_re (& mut self) -> RB_ROM_EXT_RE_W { RB_ROM_EXT_RE_W { w : self } } # [doc = "Bit 1 - enable code RAM being write"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_code_ram_we (& mut self) -> RB_CODE_RAM_WE_W { RB_CODE_RAM_WE_W { w : self } } # [doc = "Bit 2 - enable flash ROM data area being erase/write"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_rom_data_we (& mut self) -> RB_ROM_DATA_WE_W { RB_ROM_DATA_WE_W { w : self } } # [doc = "Bit 3 - enable flash ROM code and data area being erase or write"]
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+# [inline (always)]
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+pub fn rb_rom_code_we (& mut self) -> RB_ROM_CODE_WE_W { RB_ROM_CODE_WE_W { w : self } } # [doc = "Bit 4 - Config the start offset address of user code in Flash"]
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+# [inline (always)]
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+pub fn rb_rom_code_ofs (& mut self) -> RB_ROM_CODE_OFS_W { RB_ROM_CODE_OFS_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "flash ROM configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_glob_rom_cfg](index.html) module"]
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+pub struct R8_GLOB_ROM_CFG_SPEC ; impl crate :: RegisterSpec for R8_GLOB_ROM_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_glob_rom_cfg::R](R) reader structure"]
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+impl crate :: Readable for R8_GLOB_ROM_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_glob_rom_cfg::W](W) writer structure"]
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+impl crate :: Writable for R8_GLOB_ROM_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GLOB_ROM_CFG to value 0x80"]
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+impl crate :: Resettable for R8_GLOB_ROM_CFG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x80 } } } # [doc = "R8_RST_BOOT_STAT register accessor: an alias for `Reg<R8_RST_BOOT_STAT_SPEC>`"]
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+pub type R8_RST_BOOT_STAT = crate :: Reg < r8_rst_boot_stat :: R8_RST_BOOT_STAT_SPEC > ; # [doc = "reset status and boot/debug status"]
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+pub mod r8_rst_boot_stat { # [doc = "Register `R8_RST_BOOT_STAT` reader"]
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+pub struct R (crate :: R < R8_RST_BOOT_STAT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_RST_BOOT_STAT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_RST_BOOT_STAT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_RST_BOOT_STAT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_RESET_FLAG` reader - recent reset flag"]
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+pub struct RB_RESET_FLAG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_RESET_FLAG_R { pub (crate) fn new (bits : u8) -> Self { RB_RESET_FLAG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_RESET_FLAG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_RESET_EN` reader - manual reset input enable status"]
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+pub struct RB_CFG_RESET_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_RESET_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_RESET_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_RESET_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_BOOT_EN` reader - boot-loader enable status"]
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+pub struct RB_CFG_BOOT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_BOOT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_BOOT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_BOOT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CFG_DEBUG_EN` reader - debug enable status"]
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+pub struct RB_CFG_DEBUG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_CFG_DEBUG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_CFG_DEBUG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CFG_DEBUG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_BOOT_LOADER` reader - indicate boot loader status"]
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+pub struct RB_BOOT_LOADER_R (crate :: FieldReader < bool , bool >) ; impl RB_BOOT_LOADER_R { pub (crate) fn new (bits : bool) -> Self { RB_BOOT_LOADER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_BOOT_LOADER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:1 - recent reset flag"]
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|
+# [inline (always)]
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+pub fn rb_reset_flag (& self) -> RB_RESET_FLAG_R { RB_RESET_FLAG_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - manual reset input enable status"]
|
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+# [inline (always)]
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+pub fn rb_cfg_reset_en (& self) -> RB_CFG_RESET_EN_R { RB_CFG_RESET_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - boot-loader enable status"]
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+# [inline (always)]
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+pub fn rb_cfg_boot_en (& self) -> RB_CFG_BOOT_EN_R { RB_CFG_BOOT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - debug enable status"]
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+# [inline (always)]
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+pub fn rb_cfg_debug_en (& self) -> RB_CFG_DEBUG_EN_R { RB_CFG_DEBUG_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - indicate boot loader status"]
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+# [inline (always)]
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+pub fn rb_boot_loader (& self) -> RB_BOOT_LOADER_R { RB_BOOT_LOADER_R :: new (((self . bits >> 5) & 0x01) != 0) } } # [doc = "reset status and boot/debug status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_rst_boot_stat](index.html) module"]
|
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+pub struct R8_RST_BOOT_STAT_SPEC ; impl crate :: RegisterSpec for R8_RST_BOOT_STAT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_rst_boot_stat::R](R) reader structure"]
|
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+impl crate :: Readable for R8_RST_BOOT_STAT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_RST_BOOT_STAT to value 0xc8"]
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+impl crate :: Resettable for R8_RST_BOOT_STAT_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0xc8 } } } # [doc = "R8_RST_WDOG_CTRL register accessor: an alias for `Reg<R8_RST_WDOG_CTRL_SPEC>`"]
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+pub type R8_RST_WDOG_CTRL = crate :: Reg < r8_rst_wdog_ctrl :: R8_RST_WDOG_CTRL_SPEC > ; # [doc = "reset and watch-dog control"]
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+pub mod r8_rst_wdog_ctrl { # [doc = "Register `R8_RST_WDOG_CTRL` reader"]
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+pub struct R (crate :: R < R8_RST_WDOG_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_RST_WDOG_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_RST_WDOG_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_RST_WDOG_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_RST_WDOG_CTRL` writer"]
|
|
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+pub struct W (crate :: W < R8_RST_WDOG_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_RST_WDOG_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_RST_WDOG_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_RST_WDOG_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SOFTWARE_RESET` reader - global software reset"]
|
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+pub struct RB_SOFTWARE_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_SOFTWARE_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_SOFTWARE_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SOFTWARE_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SOFTWARE_RESET` writer - global software reset"]
|
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|
+pub struct RB_SOFTWARE_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SOFTWARE_RESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_WDOG_RST_EN` reader - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
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+pub struct RB_WDOG_RST_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_RST_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_RST_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_RST_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_RST_EN` writer - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
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+pub struct RB_WDOG_RST_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_RST_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_WDOG_INT_EN` reader - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
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|
|
+pub struct RB_WDOG_INT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_INT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_INT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_INT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_INT_EN` writer - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
|
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|
+pub struct RB_WDOG_INT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_INT_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_WDOG_INT_FLAG` reader - watch-dog timer overflow interrupt flag"]
|
|
|
+pub struct RB_WDOG_INT_FLAG_R (crate :: FieldReader < bool , bool >) ; impl RB_WDOG_INT_FLAG_R { pub (crate) fn new (bits : bool) -> Self { RB_WDOG_INT_FLAG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_WDOG_INT_FLAG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_WDOG_INT_FLAG` writer - watch-dog timer overflow interrupt flag"]
|
|
|
+pub struct RB_WDOG_INT_FLAG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_WDOG_INT_FLAG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - global software reset"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_software_reset (& self) -> RB_SOFTWARE_RESET_R { RB_SOFTWARE_RESET_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_rst_en (& self) -> RB_WDOG_RST_EN_R { RB_WDOG_RST_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_int_en (& self) -> RB_WDOG_INT_EN_R { RB_WDOG_INT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - watch-dog timer overflow interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_int_flag (& self) -> RB_WDOG_INT_FLAG_R { RB_WDOG_INT_FLAG_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - global software reset"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_software_reset (& mut self) -> RB_SOFTWARE_RESET_W { RB_SOFTWARE_RESET_W { w : self } } # [doc = "Bit 1 - enable watch-dog reset if watch-dog timer overflow: 0=as timer only, 1=enable reset if timer overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_rst_en (& mut self) -> RB_WDOG_RST_EN_W { RB_WDOG_RST_EN_W { w : self } } # [doc = "Bit 2 - watch-dog interrupt enable or INT_ID_WDOG interrupt source selection: 0=software interrupt"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_int_en (& mut self) -> RB_WDOG_INT_EN_W { RB_WDOG_INT_EN_W { w : self } } # [doc = "Bit 3 - watch-dog timer overflow interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_wdog_int_flag (& mut self) -> RB_WDOG_INT_FLAG_W { RB_WDOG_INT_FLAG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "reset and watch-dog control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_rst_wdog_ctrl](index.html) module"]
|
|
|
+pub struct R8_RST_WDOG_CTRL_SPEC ; impl crate :: RegisterSpec for R8_RST_WDOG_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_rst_wdog_ctrl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_RST_WDOG_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_rst_wdog_ctrl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_RST_WDOG_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_RST_WDOG_CTRL to value 0"]
|
|
|
+impl crate :: Resettable for R8_RST_WDOG_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GLOB_RESET_KEEP register accessor: an alias for `Reg<R8_GLOB_RESET_KEEP_SPEC>`"]
|
|
|
+pub type R8_GLOB_RESET_KEEP = crate :: Reg < r8_glob_reset_keep :: R8_GLOB_RESET_KEEP_SPEC > ; # [doc = "value keeper during global reset"]
|
|
|
+pub mod r8_glob_reset_keep { # [doc = "Register `R8_GLOB_RESET_KEEP` reader"]
|
|
|
+pub struct R (crate :: R < R8_GLOB_RESET_KEEP_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GLOB_RESET_KEEP_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GLOB_RESET_KEEP_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_GLOB_RESET_KEEP_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GLOB_RESET_KEEP` writer"]
|
|
|
+pub struct W (crate :: W < R8_GLOB_RESET_KEEP_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GLOB_RESET_KEEP_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GLOB_RESET_KEEP_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_GLOB_RESET_KEEP_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_GLOB_RESET_KEEP` reader - value keeper during global reset"]
|
|
|
+pub struct R8_GLOB_RESET_KEEP_R (crate :: FieldReader < u8 , u8 >) ; impl R8_GLOB_RESET_KEEP_R { pub (crate) fn new (bits : u8) -> Self { R8_GLOB_RESET_KEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_GLOB_RESET_KEEP_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_GLOB_RESET_KEEP` writer - value keeper during global reset"]
|
|
|
+pub struct R8_GLOB_RESET_KEEP_W < 'a > { w : & 'a mut W , } impl < 'a > R8_GLOB_RESET_KEEP_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - value keeper during global reset"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_glob_reset_keep (& self) -> R8_GLOB_RESET_KEEP_R { R8_GLOB_RESET_KEEP_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - value keeper during global reset"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_glob_reset_keep (& mut self) -> R8_GLOB_RESET_KEEP_W { R8_GLOB_RESET_KEEP_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "value keeper during global reset\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_glob_reset_keep](index.html) module"]
|
|
|
+pub struct R8_GLOB_RESET_KEEP_SPEC ; impl crate :: RegisterSpec for R8_GLOB_RESET_KEEP_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_glob_reset_keep::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_GLOB_RESET_KEEP_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_glob_reset_keep::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_GLOB_RESET_KEEP_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GLOB_RESET_KEEP to value 0"]
|
|
|
+impl crate :: Resettable for R8_GLOB_RESET_KEEP_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_CLK_PLL_DIV register accessor: an alias for `Reg<R8_CLK_PLL_DIV_SPEC>`"]
|
|
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+pub type R8_CLK_PLL_DIV = crate :: Reg < r8_clk_pll_div :: R8_CLK_PLL_DIV_SPEC > ; # [doc = "output clock divider from PLL"]
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+pub mod r8_clk_pll_div { # [doc = "Register `R8_CLK_PLL_DIV` reader"]
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+pub struct R (crate :: R < R8_CLK_PLL_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_PLL_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_PLL_DIV_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_CLK_PLL_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_PLL_DIV` writer"]
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+pub struct W (crate :: W < R8_CLK_PLL_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_PLL_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_PLL_DIV_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_CLK_PLL_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_CLK_PLL_DIV` reader - output clock divider from PLL"]
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+pub struct R8_CLK_PLL_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_CLK_PLL_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_CLK_PLL_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_CLK_PLL_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_CLK_PLL_DIV` writer - output clock divider from PLL"]
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+pub struct R8_CLK_PLL_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_CLK_PLL_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - output clock divider from PLL"]
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+# [inline (always)]
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+pub fn r8_clk_pll_div (& self) -> R8_CLK_PLL_DIV_R { R8_CLK_PLL_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - output clock divider from PLL"]
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+# [inline (always)]
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+pub fn r8_clk_pll_div (& mut self) -> R8_CLK_PLL_DIV_W { R8_CLK_PLL_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "output clock divider from PLL\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_pll_div](index.html) module"]
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+pub struct R8_CLK_PLL_DIV_SPEC ; impl crate :: RegisterSpec for R8_CLK_PLL_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_pll_div::R](R) reader structure"]
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+impl crate :: Readable for R8_CLK_PLL_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_pll_div::W](W) writer structure"]
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+impl crate :: Writable for R8_CLK_PLL_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_PLL_DIV to value 0x42"]
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+impl crate :: Resettable for R8_CLK_PLL_DIV_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x42 } } } # [doc = "R8_CLK_CFG_CTRL register accessor: an alias for `Reg<R8_CLK_CFG_CTRL_SPEC>`"]
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+pub type R8_CLK_CFG_CTRL = crate :: Reg < r8_clk_cfg_ctrl :: R8_CLK_CFG_CTRL_SPEC > ; # [doc = "clock control"]
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+pub mod r8_clk_cfg_ctrl { # [doc = "Register `R8_CLK_CFG_CTRL` reader"]
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+pub struct R (crate :: R < R8_CLK_CFG_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_CFG_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_CFG_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_CLK_CFG_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_CFG_CTRL` writer"]
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+pub struct W (crate :: W < R8_CLK_CFG_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_CFG_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_CFG_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_CLK_CFG_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_CLK_PLL_SLEEP` reader - PLL sleep control"]
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+pub struct RB_CLK_PLL_SLEEP_R (crate :: FieldReader < bool , bool >) ; impl RB_CLK_PLL_SLEEP_R { pub (crate) fn new (bits : bool) -> Self { RB_CLK_PLL_SLEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CLK_PLL_SLEEP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CLK_PLL_SLEEP` writer - PLL sleep control"]
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+pub struct RB_CLK_PLL_SLEEP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CLK_PLL_SLEEP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_CLK_SEL_PLL` reader - clock source selection"]
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+pub struct RB_CLK_SEL_PLL_R (crate :: FieldReader < bool , bool >) ; impl RB_CLK_SEL_PLL_R { pub (crate) fn new (bits : bool) -> Self { RB_CLK_SEL_PLL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_CLK_SEL_PLL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_CLK_SEL_PLL` writer - clock source selection"]
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+pub struct RB_CLK_SEL_PLL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_CLK_SEL_PLL_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 0 - PLL sleep control"]
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+# [inline (always)]
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+pub fn rb_clk_pll_sleep (& self) -> RB_CLK_PLL_SLEEP_R { RB_CLK_PLL_SLEEP_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock source selection"]
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+# [inline (always)]
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+pub fn rb_clk_sel_pll (& self) -> RB_CLK_SEL_PLL_R { RB_CLK_SEL_PLL_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PLL sleep control"]
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+# [inline (always)]
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+pub fn rb_clk_pll_sleep (& mut self) -> RB_CLK_PLL_SLEEP_W { RB_CLK_PLL_SLEEP_W { w : self } } # [doc = "Bit 1 - clock source selection"]
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+# [inline (always)]
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+pub fn rb_clk_sel_pll (& mut self) -> RB_CLK_SEL_PLL_W { RB_CLK_SEL_PLL_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "clock control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_cfg_ctrl](index.html) module"]
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+pub struct R8_CLK_CFG_CTRL_SPEC ; impl crate :: RegisterSpec for R8_CLK_CFG_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_cfg_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_CLK_CFG_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_cfg_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_CLK_CFG_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_CFG_CTRL to value 0x80"]
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+impl crate :: Resettable for R8_CLK_CFG_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x80 } } } # [doc = "R8_CLK_MOD_AUX register accessor: an alias for `Reg<R8_CLK_MOD_AUX_SPEC>`"]
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+pub type R8_CLK_MOD_AUX = crate :: Reg < r8_clk_mod_aux :: R8_CLK_MOD_AUX_SPEC > ; # [doc = "clock mode aux register"]
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+pub mod r8_clk_mod_aux { # [doc = "Register `R8_CLK_MOD_AUX` reader"]
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+pub struct R (crate :: R < R8_CLK_MOD_AUX_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_CLK_MOD_AUX_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_CLK_MOD_AUX_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_CLK_MOD_AUX_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_CLK_MOD_AUX` writer"]
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+pub struct W (crate :: W < R8_CLK_MOD_AUX_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_CLK_MOD_AUX_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_CLK_MOD_AUX_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_CLK_MOD_AUX_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_INT_125M_EN` reader - clock from USB_PHY PCLK(125MHz)"]
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+pub struct RB_INT_125M_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_INT_125M_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_INT_125M_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_INT_125M_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_INT_125M_EN` writer - clock from USB_PHY PCLK(125MHz)"]
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+pub struct RB_INT_125M_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_INT_125M_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_EXT_125M_EN` reader - clock from pin_PA\\[16\\]"]
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+pub struct RB_EXT_125M_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_EXT_125M_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_EXT_125M_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EXT_125M_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EXT_125M_EN` writer - clock from pin_PA\\[16\\]"]
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+pub struct RB_EXT_125M_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EXT_125M_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_MCO_SEL_MSK` reader - MCO output selection"]
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+pub struct RB_MCO_SEL_MSK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_MCO_SEL_MSK_R { pub (crate) fn new (bits : u8) -> Self { RB_MCO_SEL_MSK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCO_SEL_MSK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCO_SEL_MSK` writer - MCO output selection"]
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+pub struct RB_MCO_SEL_MSK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCO_SEL_MSK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 2)) | ((value as u8 & 0x03) << 2) ; self . w } } # [doc = "Field `RB_MCO_EN` reader - MCO output enable"]
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+pub struct RB_MCO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_MCO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_MCO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCO_EN` writer - MCO output enable"]
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|
+pub struct RB_MCO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCO_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - clock from USB_PHY PCLK(125MHz)"]
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|
+# [inline (always)]
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+pub fn rb_int_125m_en (& self) -> RB_INT_125M_EN_R { RB_INT_125M_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock from pin_PA\\[16\\]"]
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|
+# [inline (always)]
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+pub fn rb_ext_125m_en (& self) -> RB_EXT_125M_EN_R { RB_EXT_125M_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bits 2:3 - MCO output selection"]
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|
+# [inline (always)]
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+pub fn rb_mco_sel_msk (& self) -> RB_MCO_SEL_MSK_R { RB_MCO_SEL_MSK_R :: new (((self . bits >> 2) & 0x03) as u8) } # [doc = "Bit 4 - MCO output enable"]
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|
+# [inline (always)]
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+pub fn rb_mco_en (& self) -> RB_MCO_EN_R { RB_MCO_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - clock from USB_PHY PCLK(125MHz)"]
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|
+# [inline (always)]
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+pub fn rb_int_125m_en (& mut self) -> RB_INT_125M_EN_W { RB_INT_125M_EN_W { w : self } } # [doc = "Bit 1 - clock from pin_PA\\[16\\]"]
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|
|
+# [inline (always)]
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|
+pub fn rb_ext_125m_en (& mut self) -> RB_EXT_125M_EN_W { RB_EXT_125M_EN_W { w : self } } # [doc = "Bits 2:3 - MCO output selection"]
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|
|
+# [inline (always)]
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|
+pub fn rb_mco_sel_msk (& mut self) -> RB_MCO_SEL_MSK_W { RB_MCO_SEL_MSK_W { w : self } } # [doc = "Bit 4 - MCO output enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_mco_en (& mut self) -> RB_MCO_EN_W { RB_MCO_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "clock mode aux register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_clk_mod_aux](index.html) module"]
|
|
|
+pub struct R8_CLK_MOD_AUX_SPEC ; impl crate :: RegisterSpec for R8_CLK_MOD_AUX_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_clk_mod_aux::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_CLK_MOD_AUX_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_clk_mod_aux::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_CLK_MOD_AUX_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_CLK_MOD_AUX to value 0"]
|
|
|
+impl crate :: Resettable for R8_CLK_MOD_AUX_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_CLK_OFF0 register accessor: an alias for `Reg<R8_SLP_CLK_OFF0_SPEC>`"]
|
|
|
+pub type R8_SLP_CLK_OFF0 = crate :: Reg < r8_slp_clk_off0 :: R8_SLP_CLK_OFF0_SPEC > ; # [doc = "sleep clock off control byte 0"]
|
|
|
+pub mod r8_slp_clk_off0 { # [doc = "Register `R8_SLP_CLK_OFF0` reader"]
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|
|
+pub struct R (crate :: R < R8_SLP_CLK_OFF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_CLK_OFF0_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_CLK_OFF0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SLP_CLK_OFF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_CLK_OFF0` writer"]
|
|
|
+pub struct W (crate :: W < R8_SLP_CLK_OFF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_CLK_OFF0_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_CLK_OFF0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_SLP_CLK_OFF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_CLK_TMR0` reader - sleep TMR0 clock"]
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+pub struct RB_SLP_CLK_TMR0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR0` writer - sleep TMR0 clock"]
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+pub struct RB_SLP_CLK_TMR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR0_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_CLK_TMR1` reader - sleep TMR1 clock"]
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+pub struct RB_SLP_CLK_TMR1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR1` writer - sleep TMR1 clock"]
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+pub struct RB_SLP_CLK_TMR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR1_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_TMR2` reader - sleep TMR2 clock"]
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+pub struct RB_SLP_CLK_TMR2_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_TMR2_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_TMR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_TMR2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_TMR2` writer - sleep TMR2 clock"]
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+pub struct RB_SLP_CLK_TMR2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_TMR2_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_PWMX` reader - sleep PWMX clock"]
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+pub struct RB_SLP_CLK_PWMX_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_PWMX_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_PWMX_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_PWMX_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_PWMX` writer - sleep PWMX clock"]
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+pub struct RB_SLP_CLK_PWMX_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_PWMX_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART0` reader - sleep UART0 clock"]
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+pub struct RB_SLP_CLK_UART0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART0` writer - sleep UART0 clock"]
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+pub struct RB_SLP_CLK_UART0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART0_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART1` reader - sleep UART1 clock"]
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+pub struct RB_SLP_CLK_UART1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART1` writer - sleep UART1 clock"]
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+pub struct RB_SLP_CLK_UART1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART1_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART2` reader - sleep UART2 clock"]
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+pub struct RB_SLP_CLK_UART2_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART2_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART2` writer - sleep UART2 clock"]
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+pub struct RB_SLP_CLK_UART2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART2_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SLP_CLK_UART3` reader - sleep UART3 clock"]
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+pub struct RB_SLP_CLK_UART3_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_UART3_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_UART3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_UART3_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_UART3` writer - sleep UART3 clock"]
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+pub struct RB_SLP_CLK_UART3_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_UART3_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - sleep TMR0 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr0 (& self) -> RB_SLP_CLK_TMR0_R { RB_SLP_CLK_TMR0_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - sleep TMR1 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr1 (& self) -> RB_SLP_CLK_TMR1_R { RB_SLP_CLK_TMR1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep TMR2 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr2 (& self) -> RB_SLP_CLK_TMR2_R { RB_SLP_CLK_TMR2_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep PWMX clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_pwmx (& self) -> RB_SLP_CLK_PWMX_R { RB_SLP_CLK_PWMX_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - sleep UART0 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_uart0 (& self) -> RB_SLP_CLK_UART0_R { RB_SLP_CLK_UART0_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - sleep UART1 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_uart1 (& self) -> RB_SLP_CLK_UART1_R { RB_SLP_CLK_UART1_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - sleep UART2 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_uart2 (& self) -> RB_SLP_CLK_UART2_R { RB_SLP_CLK_UART2_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - sleep UART3 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_uart3 (& self) -> RB_SLP_CLK_UART3_R { RB_SLP_CLK_UART3_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - sleep TMR0 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr0 (& mut self) -> RB_SLP_CLK_TMR0_W { RB_SLP_CLK_TMR0_W { w : self } } # [doc = "Bit 1 - sleep TMR1 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr1 (& mut self) -> RB_SLP_CLK_TMR1_W { RB_SLP_CLK_TMR1_W { w : self } } # [doc = "Bit 2 - sleep TMR2 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_tmr2 (& mut self) -> RB_SLP_CLK_TMR2_W { RB_SLP_CLK_TMR2_W { w : self } } # [doc = "Bit 3 - sleep PWMX clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_pwmx (& mut self) -> RB_SLP_CLK_PWMX_W { RB_SLP_CLK_PWMX_W { w : self } } # [doc = "Bit 4 - sleep UART0 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_uart0 (& mut self) -> RB_SLP_CLK_UART0_W { RB_SLP_CLK_UART0_W { w : self } } # [doc = "Bit 5 - sleep UART1 clock"]
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|
+# [inline (always)]
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+pub fn rb_slp_clk_uart1 (& mut self) -> RB_SLP_CLK_UART1_W { RB_SLP_CLK_UART1_W { w : self } } # [doc = "Bit 6 - sleep UART2 clock"]
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|
|
+# [inline (always)]
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+pub fn rb_slp_clk_uart2 (& mut self) -> RB_SLP_CLK_UART2_W { RB_SLP_CLK_UART2_W { w : self } } # [doc = "Bit 7 - sleep UART3 clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_uart3 (& mut self) -> RB_SLP_CLK_UART3_W { RB_SLP_CLK_UART3_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "sleep clock off control byte 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_clk_off0](index.html) module"]
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|
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+pub struct R8_SLP_CLK_OFF0_SPEC ; impl crate :: RegisterSpec for R8_SLP_CLK_OFF0_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_clk_off0::R](R) reader structure"]
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+impl crate :: Readable for R8_SLP_CLK_OFF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_clk_off0::W](W) writer structure"]
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+impl crate :: Writable for R8_SLP_CLK_OFF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_CLK_OFF0 to value 0"]
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|
+impl crate :: Resettable for R8_SLP_CLK_OFF0_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_CLK_OFF1 register accessor: an alias for `Reg<R8_SLP_CLK_OFF1_SPEC>`"]
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+pub type R8_SLP_CLK_OFF1 = crate :: Reg < r8_slp_clk_off1 :: R8_SLP_CLK_OFF1_SPEC > ; # [doc = "sleep clock off control byte 1"]
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|
+pub mod r8_slp_clk_off1 { # [doc = "Register `R8_SLP_CLK_OFF1` reader"]
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|
|
+pub struct R (crate :: R < R8_SLP_CLK_OFF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_CLK_OFF1_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_CLK_OFF1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SLP_CLK_OFF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_CLK_OFF1` writer"]
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|
+pub struct W (crate :: W < R8_SLP_CLK_OFF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_CLK_OFF1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_CLK_OFF1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SLP_CLK_OFF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_CLK_SPI0` reader - sleep SPI0 clock"]
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|
|
+pub struct RB_SLP_CLK_SPI0_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SPI0_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SPI0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SPI0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SPI0` writer - sleep SPI0 clock"]
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|
+pub struct RB_SLP_CLK_SPI0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SPI0_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_CLK_SPI1` reader - sleep SPI1 clock"]
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|
|
+pub struct RB_SLP_CLK_SPI1_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SPI1_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SPI1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SPI1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SPI1` writer - sleep SPI1 clock"]
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|
|
+pub struct RB_SLP_CLK_SPI1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SPI1_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_EMMC` reader - sleep EMMC clock"]
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|
|
+pub struct RB_SLP_CLK_EMMC_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_EMMC_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_EMMC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_EMMC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_EMMC` writer - sleep EMMC clock"]
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|
|
+pub struct RB_SLP_CLK_EMMC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_EMMC_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_HSPI` reader - sleep HSPI clock"]
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+pub struct RB_SLP_CLK_HSPI_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_HSPI_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_HSPI_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_HSPI_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_HSPI` writer - sleep HSPI clock"]
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+pub struct RB_SLP_CLK_HSPI_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_HSPI_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_CLK_USBHS` reader - sleep USBHS clock"]
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+pub struct RB_SLP_CLK_USBHS_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_USBHS_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_USBHS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_USBHS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_USBHS` writer - sleep USBHS clock"]
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+pub struct RB_SLP_CLK_USBHS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_USBHS_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_CLK_USBSS` reader - sleep USBSS clock"]
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+pub struct RB_SLP_CLK_USBSS_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_USBSS_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_USBSS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_USBSS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_USBSS` writer - sleep USBSS clock"]
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+pub struct RB_SLP_CLK_USBSS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_USBSS_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SLP_CLK_SERD` reader - sleep SERD clock"]
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+pub struct RB_SLP_CLK_SERD_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_SERD_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_SERD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_SERD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_SERD` writer - sleep SERD clock"]
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+pub struct RB_SLP_CLK_SERD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_SERD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SLP_CLK_DVP` reader - sleep DVP clock"]
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+pub struct RB_SLP_CLK_DVP_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_DVP_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_DVP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_DVP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_DVP` writer - sleep DVP clock"]
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+pub struct RB_SLP_CLK_DVP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_DVP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - sleep SPI0 clock"]
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|
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+# [inline (always)]
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+pub fn rb_slp_clk_spi0 (& self) -> RB_SLP_CLK_SPI0_R { RB_SLP_CLK_SPI0_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - sleep SPI1 clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_spi1 (& self) -> RB_SLP_CLK_SPI1_R { RB_SLP_CLK_SPI1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep EMMC clock"]
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|
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+# [inline (always)]
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+pub fn rb_slp_clk_emmc (& self) -> RB_SLP_CLK_EMMC_R { RB_SLP_CLK_EMMC_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep HSPI clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_hspi (& self) -> RB_SLP_CLK_HSPI_R { RB_SLP_CLK_HSPI_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - sleep USBHS clock"]
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|
|
+# [inline (always)]
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+pub fn rb_slp_clk_usbhs (& self) -> RB_SLP_CLK_USBHS_R { RB_SLP_CLK_USBHS_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - sleep USBSS clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_usbss (& self) -> RB_SLP_CLK_USBSS_R { RB_SLP_CLK_USBSS_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - sleep SERD clock"]
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|
|
+# [inline (always)]
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+pub fn rb_slp_clk_serd (& self) -> RB_SLP_CLK_SERD_R { RB_SLP_CLK_SERD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - sleep DVP clock"]
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|
|
+# [inline (always)]
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+pub fn rb_slp_clk_dvp (& self) -> RB_SLP_CLK_DVP_R { RB_SLP_CLK_DVP_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - sleep SPI0 clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_spi0 (& mut self) -> RB_SLP_CLK_SPI0_W { RB_SLP_CLK_SPI0_W { w : self } } # [doc = "Bit 1 - sleep SPI1 clock"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_slp_clk_spi1 (& mut self) -> RB_SLP_CLK_SPI1_W { RB_SLP_CLK_SPI1_W { w : self } } # [doc = "Bit 2 - sleep EMMC clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_emmc (& mut self) -> RB_SLP_CLK_EMMC_W { RB_SLP_CLK_EMMC_W { w : self } } # [doc = "Bit 3 - sleep HSPI clock"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_slp_clk_hspi (& mut self) -> RB_SLP_CLK_HSPI_W { RB_SLP_CLK_HSPI_W { w : self } } # [doc = "Bit 4 - sleep USBHS clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_usbhs (& mut self) -> RB_SLP_CLK_USBHS_W { RB_SLP_CLK_USBHS_W { w : self } } # [doc = "Bit 5 - sleep USBSS clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_usbss (& mut self) -> RB_SLP_CLK_USBSS_W { RB_SLP_CLK_USBSS_W { w : self } } # [doc = "Bit 6 - sleep SERD clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_serd (& mut self) -> RB_SLP_CLK_SERD_W { RB_SLP_CLK_SERD_W { w : self } } # [doc = "Bit 7 - sleep DVP clock"]
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|
|
+# [inline (always)]
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|
+pub fn rb_slp_clk_dvp (& mut self) -> RB_SLP_CLK_DVP_W { RB_SLP_CLK_DVP_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "sleep clock off control byte 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_clk_off1](index.html) module"]
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+pub struct R8_SLP_CLK_OFF1_SPEC ; impl crate :: RegisterSpec for R8_SLP_CLK_OFF1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_clk_off1::R](R) reader structure"]
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+impl crate :: Readable for R8_SLP_CLK_OFF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_clk_off1::W](W) writer structure"]
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+impl crate :: Writable for R8_SLP_CLK_OFF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_CLK_OFF1 to value 0"]
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|
+impl crate :: Resettable for R8_SLP_CLK_OFF1_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_WAKE_CTRL register accessor: an alias for `Reg<R8_SLP_WAKE_CTRL_SPEC>`"]
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+pub type R8_SLP_WAKE_CTRL = crate :: Reg < r8_slp_wake_ctrl :: R8_SLP_WAKE_CTRL_SPEC > ; # [doc = "wake control"]
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|
+pub mod r8_slp_wake_ctrl { # [doc = "Register `R8_SLP_WAKE_CTRL` reader"]
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|
|
+pub struct R (crate :: R < R8_SLP_WAKE_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_WAKE_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_WAKE_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SLP_WAKE_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_WAKE_CTRL` writer"]
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|
+pub struct W (crate :: W < R8_SLP_WAKE_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_WAKE_CTRL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_WAKE_CTRL_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_SLP_WAKE_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_USBHS_WAKE` reader - enable USBHS waking"]
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|
|
+pub struct RB_SLP_USBHS_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBHS_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBHS_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBHS_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBHS_WAKE` writer - enable USBHS waking"]
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|
|
+pub struct RB_SLP_USBHS_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBHS_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SLP_USBSS_WAKE` reader - enable USBSS waking"]
|
|
|
+pub struct RB_SLP_USBSS_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBSS_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBSS_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBSS_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBSS_WAKE` writer - enable USBSS waking"]
|
|
|
+pub struct RB_SLP_USBSS_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBSS_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SLP_CLK_ETH` reader - sleep ETH clock"]
|
|
|
+pub struct RB_SLP_CLK_ETH_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_ETH_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_ETH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_ETH_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_ETH` writer - sleep ETH clock"]
|
|
|
+pub struct RB_SLP_CLK_ETH_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_ETH_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SLP_CLK_ECDC` reader - sleep ECDC clock"]
|
|
|
+pub struct RB_SLP_CLK_ECDC_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_CLK_ECDC_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_CLK_ECDC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_CLK_ECDC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_CLK_ECDC` writer - sleep ECDC clock"]
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|
|
+pub struct RB_SLP_CLK_ECDC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_CLK_ECDC_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SLP_GPIO_WAKE` reader - enable GPIO waking"]
|
|
|
+pub struct RB_SLP_GPIO_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_GPIO_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_GPIO_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_GPIO_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_GPIO_WAKE` writer - enable GPIO waking"]
|
|
|
+pub struct RB_SLP_GPIO_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_GPIO_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SLP_ETH_WAKE` reader - enable Eth waking"]
|
|
|
+pub struct RB_SLP_ETH_WAKE_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_ETH_WAKE_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_ETH_WAKE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_ETH_WAKE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_ETH_WAKE` writer - enable Eth waking"]
|
|
|
+pub struct RB_SLP_ETH_WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_ETH_WAKE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - enable USBHS waking"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_slp_usbhs_wake (& self) -> RB_SLP_USBHS_WAKE_R { RB_SLP_USBHS_WAKE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable USBSS waking"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_slp_usbss_wake (& self) -> RB_SLP_USBSS_WAKE_R { RB_SLP_USBSS_WAKE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - sleep ETH clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_eth (& self) -> RB_SLP_CLK_ETH_R { RB_SLP_CLK_ETH_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - sleep ECDC clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_ecdc (& self) -> RB_SLP_CLK_ECDC_R { RB_SLP_CLK_ECDC_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable GPIO waking"]
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+# [inline (always)]
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+pub fn rb_slp_gpio_wake (& self) -> RB_SLP_GPIO_WAKE_R { RB_SLP_GPIO_WAKE_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - enable Eth waking"]
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+# [inline (always)]
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+pub fn rb_slp_eth_wake (& self) -> RB_SLP_ETH_WAKE_R { RB_SLP_ETH_WAKE_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable USBHS waking"]
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+# [inline (always)]
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+pub fn rb_slp_usbhs_wake (& mut self) -> RB_SLP_USBHS_WAKE_W { RB_SLP_USBHS_WAKE_W { w : self } } # [doc = "Bit 1 - enable USBSS waking"]
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+# [inline (always)]
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+pub fn rb_slp_usbss_wake (& mut self) -> RB_SLP_USBSS_WAKE_W { RB_SLP_USBSS_WAKE_W { w : self } } # [doc = "Bit 2 - sleep ETH clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_eth (& mut self) -> RB_SLP_CLK_ETH_W { RB_SLP_CLK_ETH_W { w : self } } # [doc = "Bit 3 - sleep ECDC clock"]
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+# [inline (always)]
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+pub fn rb_slp_clk_ecdc (& mut self) -> RB_SLP_CLK_ECDC_W { RB_SLP_CLK_ECDC_W { w : self } } # [doc = "Bit 4 - enable GPIO waking"]
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+# [inline (always)]
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+pub fn rb_slp_gpio_wake (& mut self) -> RB_SLP_GPIO_WAKE_W { RB_SLP_GPIO_WAKE_W { w : self } } # [doc = "Bit 5 - enable Eth waking"]
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+# [inline (always)]
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+pub fn rb_slp_eth_wake (& mut self) -> RB_SLP_ETH_WAKE_W { RB_SLP_ETH_WAKE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "wake control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_wake_ctrl](index.html) module"]
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+pub struct R8_SLP_WAKE_CTRL_SPEC ; impl crate :: RegisterSpec for R8_SLP_WAKE_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_wake_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_SLP_WAKE_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_wake_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_SLP_WAKE_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_WAKE_CTRL to value 0"]
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+impl crate :: Resettable for R8_SLP_WAKE_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SLP_POWER_CTRL register accessor: an alias for `Reg<R8_SLP_POWER_CTRL_SPEC>`"]
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+pub type R8_SLP_POWER_CTRL = crate :: Reg < r8_slp_power_ctrl :: R8_SLP_POWER_CTRL_SPEC > ; # [doc = "power control"]
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+pub mod r8_slp_power_ctrl { # [doc = "Register `R8_SLP_POWER_CTRL` reader"]
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+pub struct R (crate :: R < R8_SLP_POWER_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SLP_POWER_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SLP_POWER_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SLP_POWER_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SLP_POWER_CTRL` writer"]
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+pub struct W (crate :: W < R8_SLP_POWER_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SLP_POWER_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SLP_POWER_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SLP_POWER_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SLP_USBHS_PWRDN` reader - enable USBHS power down"]
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+pub struct RB_SLP_USBHS_PWRDN_R (crate :: FieldReader < bool , bool >) ; impl RB_SLP_USBHS_PWRDN_R { pub (crate) fn new (bits : bool) -> Self { RB_SLP_USBHS_PWRDN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SLP_USBHS_PWRDN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SLP_USBHS_PWRDN` writer - enable USBHS power down"]
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+pub struct RB_SLP_USBHS_PWRDN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SLP_USBHS_PWRDN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - enable USBHS power down"]
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+# [inline (always)]
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+pub fn rb_slp_usbhs_pwrdn (& self) -> RB_SLP_USBHS_PWRDN_R { RB_SLP_USBHS_PWRDN_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable USBHS power down"]
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+# [inline (always)]
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+pub fn rb_slp_usbhs_pwrdn (& mut self) -> RB_SLP_USBHS_PWRDN_W { RB_SLP_USBHS_PWRDN_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "power control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_slp_power_ctrl](index.html) module"]
|
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+pub struct R8_SLP_POWER_CTRL_SPEC ; impl crate :: RegisterSpec for R8_SLP_POWER_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_slp_power_ctrl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SLP_POWER_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_slp_power_ctrl::W](W) writer structure"]
|
|
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+impl crate :: Writable for R8_SLP_POWER_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SLP_POWER_CTRL to value 0"]
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|
|
+impl crate :: Resettable for R8_SLP_POWER_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SERD_ANA_CFG1 register accessor: an alias for `Reg<R16_SERD_ANA_CFG1_SPEC>`"]
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|
|
+pub type R16_SERD_ANA_CFG1 = crate :: Reg < r16_serd_ana_cfg1 :: R16_SERD_ANA_CFG1_SPEC > ; # [doc = "Serdes Analog parameter configuration1"]
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|
|
+pub mod r16_serd_ana_cfg1 { # [doc = "Register `R16_SERD_ANA_CFG1` reader"]
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|
+pub struct R (crate :: R < R16_SERD_ANA_CFG1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SERD_ANA_CFG1_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SERD_ANA_CFG1_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R16_SERD_ANA_CFG1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SERD_ANA_CFG1` writer"]
|
|
|
+pub struct W (crate :: W < R16_SERD_ANA_CFG1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SERD_ANA_CFG1_SPEC > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SERD_ANA_CFG1_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R16_SERD_ANA_CFG1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SERD_PLL_CFG` reader - SerDes PHY internal configuration bit"]
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+pub struct RB_SERD_PLL_CFG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_SERD_PLL_CFG_R { pub (crate) fn new (bits : u8) -> Self { RB_SERD_PLL_CFG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_PLL_CFG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_PLL_CFG` writer - SerDes PHY internal configuration bit"]
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+pub struct RB_SERD_PLL_CFG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_PLL_CFG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u16 & 0xff) ; self . w } } # [doc = "Field `RB_SERD_30M_SEL` reader - SerDes PHY reference clock source seletion"]
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+pub struct RB_SERD_30M_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_SERD_30M_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_SERD_30M_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_30M_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_30M_SEL` writer - SerDes PHY reference clock source seletion"]
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+pub struct RB_SERD_30M_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_30M_SEL_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_SERD_DN_SEL` reader - Enable SerDes PHY GXM test pin"]
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|
+pub struct RB_SERD_DN_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_SERD_DN_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_SERD_DN_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_DN_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_DN_SEL` writer - Enable SerDes PHY GXM test pin"]
|
|
|
+pub struct RB_SERD_DN_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_DN_SEL_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bits 0:7 - SerDes PHY internal configuration bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_pll_cfg (& self) -> RB_SERD_PLL_CFG_R { RB_SERD_PLL_CFG_R :: new ((self . bits & 0xff) as u8) } # [doc = "Bit 8 - SerDes PHY reference clock source seletion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_30m_sel (& self) -> RB_SERD_30M_SEL_R { RB_SERD_30M_SEL_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - Enable SerDes PHY GXM test pin"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_dn_sel (& self) -> RB_SERD_DN_SEL_R { RB_SERD_DN_SEL_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bits 0:7 - SerDes PHY internal configuration bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_pll_cfg (& mut self) -> RB_SERD_PLL_CFG_W { RB_SERD_PLL_CFG_W { w : self } } # [doc = "Bit 8 - SerDes PHY reference clock source seletion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_30m_sel (& mut self) -> RB_SERD_30M_SEL_W { RB_SERD_30M_SEL_W { w : self } } # [doc = "Bit 9 - Enable SerDes PHY GXM test pin"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_dn_sel (& mut self) -> RB_SERD_DN_SEL_W { RB_SERD_DN_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Serdes Analog parameter configuration1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_serd_ana_cfg1](index.html) module"]
|
|
|
+pub struct R16_SERD_ANA_CFG1_SPEC ; impl crate :: RegisterSpec for R16_SERD_ANA_CFG1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_serd_ana_cfg1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_SERD_ANA_CFG1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_serd_ana_cfg1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_SERD_ANA_CFG1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SERD_ANA_CFG1 to value 0x5a"]
|
|
|
+impl crate :: Resettable for R16_SERD_ANA_CFG1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x5a } } } # [doc = "R32_SERD_ANA_CFG2 register accessor: an alias for `Reg<R32_SERD_ANA_CFG2_SPEC>`"]
|
|
|
+pub type R32_SERD_ANA_CFG2 = crate :: Reg < r32_serd_ana_cfg2 :: R32_SERD_ANA_CFG2_SPEC > ; # [doc = "Serdes Analog parameter configuration2"]
|
|
|
+pub mod r32_serd_ana_cfg2 { # [doc = "Register `R32_SERD_ANA_CFG2` reader"]
|
|
|
+pub struct R (crate :: R < R32_SERD_ANA_CFG2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SERD_ANA_CFG2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SERD_ANA_CFG2_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_SERD_ANA_CFG2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SERD_ANA_CFG2` writer"]
|
|
|
+pub struct W (crate :: W < R32_SERD_ANA_CFG2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SERD_ANA_CFG2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SERD_ANA_CFG2_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_SERD_ANA_CFG2_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SERD_TRX_CFG` reader - Tx and RX parameter setting"]
|
|
|
+pub struct RB_SERD_TRX_CFG_R (crate :: FieldReader < u32 , u32 >) ; impl RB_SERD_TRX_CFG_R { pub (crate) fn new (bits : u32) -> Self { RB_SERD_TRX_CFG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SERD_TRX_CFG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SERD_TRX_CFG` writer - Tx and RX parameter setting"]
|
|
|
+pub struct RB_SERD_TRX_CFG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SERD_TRX_CFG_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - Tx and RX parameter setting"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_trx_cfg (& self) -> RB_SERD_TRX_CFG_R { RB_SERD_TRX_CFG_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - Tx and RX parameter setting"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_serd_trx_cfg (& mut self) -> RB_SERD_TRX_CFG_W { RB_SERD_TRX_CFG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Serdes Analog parameter configuration2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_serd_ana_cfg2](index.html) module"]
|
|
|
+pub struct R32_SERD_ANA_CFG2_SPEC ; impl crate :: RegisterSpec for R32_SERD_ANA_CFG2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_serd_ana_cfg2::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_SERD_ANA_CFG2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_serd_ana_cfg2::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_SERD_ANA_CFG2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SERD_ANA_CFG2 to value 0x0042_3015"]
|
|
|
+impl crate :: Resettable for R32_SERD_ANA_CFG2_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x0042_3015 } } } # [doc = "R8_GPIO_INT_FLAG register accessor: an alias for `Reg<R8_GPIO_INT_FLAG_SPEC>`"]
|
|
|
+pub type R8_GPIO_INT_FLAG = crate :: Reg < r8_gpio_int_flag :: R8_GPIO_INT_FLAG_SPEC > ; # [doc = "GPIO interrupt control"]
|
|
|
+pub mod r8_gpio_int_flag { # [doc = "Register `R8_GPIO_INT_FLAG` reader"]
|
|
|
+pub struct R (crate :: R < R8_GPIO_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_GPIO_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_FLAG` writer"]
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+pub struct W (crate :: W < R8_GPIO_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_FLAG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_GPIO_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IF` reader - PA2 pin interrupt flag"]
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+pub struct RB_GPIO_PA2_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IF` writer - PA2 pin interrupt flag"]
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+pub struct RB_GPIO_PA2_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt flag"]
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+# [inline (always)]
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+pub fn rb_gpio_pa2_if (& self) -> RB_GPIO_PA2_IF_R { RB_GPIO_PA2_IF_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt flag"]
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+# [inline (always)]
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+pub fn rb_gpio_pa2_if (& mut self) -> RB_GPIO_PA2_IF_W { RB_GPIO_PA2_IF_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_flag](index.html) module"]
|
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+pub struct R8_GPIO_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_flag::R](R) reader structure"]
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+impl crate :: Readable for R8_GPIO_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_flag::W](W) writer structure"]
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+impl crate :: Writable for R8_GPIO_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_FLAG to value 0"]
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+impl crate :: Resettable for R8_GPIO_INT_FLAG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_ENABLE register accessor: an alias for `Reg<R8_GPIO_INT_ENABLE_SPEC>`"]
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+pub type R8_GPIO_INT_ENABLE = crate :: Reg < r8_gpio_int_enable :: R8_GPIO_INT_ENABLE_SPEC > ; # [doc = "GPIO interrupt enable"]
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+pub mod r8_gpio_int_enable { # [doc = "Register `R8_GPIO_INT_ENABLE` reader"]
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+pub struct R (crate :: R < R8_GPIO_INT_ENABLE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_ENABLE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_ENABLE_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_GPIO_INT_ENABLE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_ENABLE` writer"]
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+pub struct W (crate :: W < R8_GPIO_INT_ENABLE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_ENABLE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_ENABLE_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_GPIO_INT_ENABLE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IE` reader - PA2 pin interrupt enable"]
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+pub struct RB_GPIO_PA2_IE_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IE_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IE` writer - PA2 pin interrupt enable"]
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+pub struct RB_GPIO_PA2_IE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt enable"]
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+# [inline (always)]
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+pub fn rb_gpio_pa2_ie (& self) -> RB_GPIO_PA2_IE_R { RB_GPIO_PA2_IE_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt enable"]
|
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|
+# [inline (always)]
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+pub fn rb_gpio_pa2_ie (& mut self) -> RB_GPIO_PA2_IE_W { RB_GPIO_PA2_IE_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_enable](index.html) module"]
|
|
|
+pub struct R8_GPIO_INT_ENABLE_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_ENABLE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_enable::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_GPIO_INT_ENABLE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_enable::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_GPIO_INT_ENABLE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_ENABLE to value 0"]
|
|
|
+impl crate :: Resettable for R8_GPIO_INT_ENABLE_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_MODE register accessor: an alias for `Reg<R8_GPIO_INT_MODE_SPEC>`"]
|
|
|
+pub type R8_GPIO_INT_MODE = crate :: Reg < r8_gpio_int_mode :: R8_GPIO_INT_MODE_SPEC > ; # [doc = "GPIO interrupt mode"]
|
|
|
+pub mod r8_gpio_int_mode { # [doc = "Register `R8_GPIO_INT_MODE` reader"]
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|
|
+pub struct R (crate :: R < R8_GPIO_INT_MODE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_MODE_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_MODE_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_GPIO_INT_MODE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_MODE` writer"]
|
|
|
+pub struct W (crate :: W < R8_GPIO_INT_MODE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_MODE_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_MODE_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_GPIO_INT_MODE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IM` reader - PA2 pin interrupt mode"]
|
|
|
+pub struct RB_GPIO_PA2_IM_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IM_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IM` writer - PA2 pin interrupt mode"]
|
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+pub struct RB_GPIO_PA2_IM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_gpio_pa2_im (& self) -> RB_GPIO_PA2_IM_R { RB_GPIO_PA2_IM_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt mode"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_gpio_pa2_im (& mut self) -> RB_GPIO_PA2_IM_W { RB_GPIO_PA2_IM_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_mode](index.html) module"]
|
|
|
+pub struct R8_GPIO_INT_MODE_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_MODE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_mode::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_GPIO_INT_MODE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_mode::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_GPIO_INT_MODE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_MODE to value 0"]
|
|
|
+impl crate :: Resettable for R8_GPIO_INT_MODE_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_GPIO_INT_POLAR register accessor: an alias for `Reg<R8_GPIO_INT_POLAR_SPEC>`"]
|
|
|
+pub type R8_GPIO_INT_POLAR = crate :: Reg < r8_gpio_int_polar :: R8_GPIO_INT_POLAR_SPEC > ; # [doc = "GPIO interrupt polarity"]
|
|
|
+pub mod r8_gpio_int_polar { # [doc = "Register `R8_GPIO_INT_POLAR` reader"]
|
|
|
+pub struct R (crate :: R < R8_GPIO_INT_POLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_GPIO_INT_POLAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_GPIO_INT_POLAR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_GPIO_INT_POLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_GPIO_INT_POLAR` writer"]
|
|
|
+pub struct W (crate :: W < R8_GPIO_INT_POLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_GPIO_INT_POLAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_GPIO_INT_POLAR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_GPIO_INT_POLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_GPIO_PA2_IP` reader - PA2 pin interrupt mode"]
|
|
|
+pub struct RB_GPIO_PA2_IP_R (crate :: FieldReader < bool , bool >) ; impl RB_GPIO_PA2_IP_R { pub (crate) fn new (bits : bool) -> Self { RB_GPIO_PA2_IP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_GPIO_PA2_IP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_GPIO_PA2_IP` writer - PA2 pin interrupt mode"]
|
|
|
+pub struct RB_GPIO_PA2_IP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_GPIO_PA2_IP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PA2 pin interrupt mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_gpio_pa2_ip (& self) -> RB_GPIO_PA2_IP_R { RB_GPIO_PA2_IP_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PA2 pin interrupt mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_gpio_pa2_ip (& mut self) -> RB_GPIO_PA2_IP_W { RB_GPIO_PA2_IP_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO interrupt polarity\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_gpio_int_polar](index.html) module"]
|
|
|
+pub struct R8_GPIO_INT_POLAR_SPEC ; impl crate :: RegisterSpec for R8_GPIO_INT_POLAR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_gpio_int_polar::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_GPIO_INT_POLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_gpio_int_polar::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_GPIO_INT_POLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_GPIO_INT_POLAR to value 0"]
|
|
|
+impl crate :: Resettable for R8_GPIO_INT_POLAR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_DIR register accessor: an alias for `Reg<R32_PA_DIR_SPEC>`"]
|
|
|
+pub type R32_PA_DIR = crate :: Reg < r32_pa_dir :: R32_PA_DIR_SPEC > ; # [doc = "GPIO PA I/O direction"]
|
|
|
+pub mod r32_pa_dir { # [doc = "Register `R32_PA_DIR` reader"]
|
|
|
+pub struct R (crate :: R < R32_PA_DIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_DIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_DIR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PA_DIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_DIR` writer"]
|
|
|
+pub struct W (crate :: W < R32_PA_DIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_DIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_DIR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PA_DIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_DIR` reader - GPIO PA I/O direction"]
|
|
|
+pub struct R32_PA_DIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_DIR_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_DIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_DIR` writer - GPIO PA I/O direction"]
|
|
|
+pub struct R32_PA_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_DIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA I/O direction"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_dir (& self) -> R32_PA_DIR_R { R32_PA_DIR_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA I/O direction"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_dir (& mut self) -> R32_PA_DIR_W { R32_PA_DIR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA I/O direction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_dir](index.html) module"]
|
|
|
+pub struct R32_PA_DIR_SPEC ; impl crate :: RegisterSpec for R32_PA_DIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_dir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PA_DIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_dir::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PA_DIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_DIR to value 0"]
|
|
|
+impl crate :: Resettable for R32_PA_DIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PIN register accessor: an alias for `Reg<R32_PA_PIN_SPEC>`"]
|
|
|
+pub type R32_PA_PIN = crate :: Reg < r32_pa_pin :: R32_PA_PIN_SPEC > ; # [doc = "GPIO PA input"]
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+pub mod r32_pa_pin { # [doc = "Register `R32_PA_PIN` reader"]
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+pub struct R (crate :: R < R32_PA_PIN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PIN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PIN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PA_PIN_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_PA_PIN` reader - GPIO PA input"]
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+pub struct R32_PA_PIN_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PIN_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PIN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PIN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:23 - GPIO PA input"]
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+# [inline (always)]
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+pub fn r32_pa_pin (& self) -> R32_PA_PIN_R { R32_PA_PIN_R :: new ((self . bits & 0x00ff_ffff) as u32) } } # [doc = "GPIO PA input\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pin](index.html) module"]
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+pub struct R32_PA_PIN_SPEC ; impl crate :: RegisterSpec for R32_PA_PIN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pin::R](R) reader structure"]
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+impl crate :: Readable for R32_PA_PIN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PA_PIN to value 0"]
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+impl crate :: Resettable for R32_PA_PIN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_OUT register accessor: an alias for `Reg<R32_PA_OUT_SPEC>`"]
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+pub type R32_PA_OUT = crate :: Reg < r32_pa_out :: R32_PA_OUT_SPEC > ; # [doc = "GPIO PA output"]
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+pub mod r32_pa_out { # [doc = "Register `R32_PA_OUT` reader"]
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+pub struct R (crate :: R < R32_PA_OUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_OUT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_OUT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PA_OUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_OUT` writer"]
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+pub struct W (crate :: W < R32_PA_OUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_OUT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_OUT_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PA_OUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_OUT` reader - GPIO PA output"]
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+pub struct R32_PA_OUT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_OUT_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_OUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_OUT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_OUT` writer - GPIO PA output"]
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+pub struct R32_PA_OUT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_OUT_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output"]
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+# [inline (always)]
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+pub fn r32_pa_out (& self) -> R32_PA_OUT_R { R32_PA_OUT_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output"]
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+# [inline (always)]
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+pub fn r32_pa_out (& mut self) -> R32_PA_OUT_W { R32_PA_OUT_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_out](index.html) module"]
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+pub struct R32_PA_OUT_SPEC ; impl crate :: RegisterSpec for R32_PA_OUT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_out::R](R) reader structure"]
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+impl crate :: Readable for R32_PA_OUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_out::W](W) writer structure"]
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+impl crate :: Writable for R32_PA_OUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_OUT to value 0"]
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+impl crate :: Resettable for R32_PA_OUT_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_CLR register accessor: an alias for `Reg<R32_PA_CLR_SPEC>`"]
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+pub type R32_PA_CLR = crate :: Reg < r32_pa_clr :: R32_PA_CLR_SPEC > ; # [doc = "GPIO PA clear output"]
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+pub mod r32_pa_clr { # [doc = "Register `R32_PA_CLR` writer"]
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+pub struct W (crate :: W < R32_PA_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_CLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_CLR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PA_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_CLR` writer - GPIO PA clear output"]
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+pub struct R32_PA_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_CLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl W { # [doc = "Bits 0:23 - GPIO PA clear output"]
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+# [inline (always)]
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+pub fn r32_pa_clr (& mut self) -> R32_PA_CLR_W { R32_PA_CLR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA clear output\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_clr](index.html) module"]
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+pub struct R32_PA_CLR_SPEC ; impl crate :: RegisterSpec for R32_PA_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_pa_clr::W](W) writer structure"]
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+impl crate :: Writable for R32_PA_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_CLR to value 0"]
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+impl crate :: Resettable for R32_PA_CLR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PU register accessor: an alias for `Reg<R32_PA_PU_SPEC>`"]
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+pub type R32_PA_PU = crate :: Reg < r32_pa_pu :: R32_PA_PU_SPEC > ; # [doc = "GPIO PA pullup resistance enable"]
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+pub mod r32_pa_pu { # [doc = "Register `R32_PA_PU` reader"]
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+pub struct R (crate :: R < R32_PA_PU_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PU_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PU_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PA_PU_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_PU` writer"]
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+pub struct W (crate :: W < R32_PA_PU_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_PU_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_PU_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PA_PU_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_PU` reader - GPIO PA pullup resistance enable"]
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+pub struct R32_PA_PU_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PU_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PU_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PU_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_PU` writer - GPIO PA pullup resistance enable"]
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+pub struct R32_PA_PU_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_PU_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA pullup resistance enable"]
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+# [inline (always)]
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+pub fn r32_pa_pu (& self) -> R32_PA_PU_R { R32_PA_PU_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA pullup resistance enable"]
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+# [inline (always)]
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+pub fn r32_pa_pu (& mut self) -> R32_PA_PU_W { R32_PA_PU_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA pullup resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pu](index.html) module"]
|
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+pub struct R32_PA_PU_SPEC ; impl crate :: RegisterSpec for R32_PA_PU_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pu::R](R) reader structure"]
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+impl crate :: Readable for R32_PA_PU_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_pu::W](W) writer structure"]
|
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+impl crate :: Writable for R32_PA_PU_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_PU to value 0"]
|
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+impl crate :: Resettable for R32_PA_PU_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_PD register accessor: an alias for `Reg<R32_PA_PD_SPEC>`"]
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|
+pub type R32_PA_PD = crate :: Reg < r32_pa_pd :: R32_PA_PD_SPEC > ; # [doc = "GPIO PA output open-drain and input pulldown resistance enable"]
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+pub mod r32_pa_pd { # [doc = "Register `R32_PA_PD` reader"]
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+pub struct R (crate :: R < R32_PA_PD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_PD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_PD_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PA_PD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_PD` writer"]
|
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+pub struct W (crate :: W < R32_PA_PD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_PD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_PD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PA_PD_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_PD` reader - GPIO PA output open-drain and input pulldown resistance enable"]
|
|
|
+pub struct R32_PA_PD_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_PD_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_PD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_PD_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_PD` writer - GPIO PA output open-drain and input pulldown resistance enable"]
|
|
|
+pub struct R32_PA_PD_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_PD_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output open-drain and input pulldown resistance enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_pd (& self) -> R32_PA_PD_R { R32_PA_PD_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output open-drain and input pulldown resistance enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_pd (& mut self) -> R32_PA_PD_W { R32_PA_PD_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output open-drain and input pulldown resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_pd](index.html) module"]
|
|
|
+pub struct R32_PA_PD_SPEC ; impl crate :: RegisterSpec for R32_PA_PD_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_pd::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PA_PD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_pd::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PA_PD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_PD to value 0"]
|
|
|
+impl crate :: Resettable for R32_PA_PD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_DRV register accessor: an alias for `Reg<R32_PA_DRV_SPEC>`"]
|
|
|
+pub type R32_PA_DRV = crate :: Reg < r32_pa_drv :: R32_PA_DRV_SPEC > ; # [doc = "GPIO PA driving capability"]
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|
+pub mod r32_pa_drv { # [doc = "Register `R32_PA_DRV` reader"]
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|
|
+pub struct R (crate :: R < R32_PA_DRV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_DRV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_DRV_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PA_DRV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_DRV` writer"]
|
|
|
+pub struct W (crate :: W < R32_PA_DRV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_DRV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_DRV_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PA_DRV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_DRV` reader - GPIO PA driving capability"]
|
|
|
+pub struct R32_PA_DRV_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_DRV_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_DRV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_DRV_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_DRV` writer - GPIO PA driving capability"]
|
|
|
+pub struct R32_PA_DRV_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_DRV_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA driving capability"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_drv (& self) -> R32_PA_DRV_R { R32_PA_DRV_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA driving capability"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_drv (& mut self) -> R32_PA_DRV_W { R32_PA_DRV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA driving capability\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_drv](index.html) module"]
|
|
|
+pub struct R32_PA_DRV_SPEC ; impl crate :: RegisterSpec for R32_PA_DRV_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_drv::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PA_DRV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_drv::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PA_DRV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_DRV to value 0"]
|
|
|
+impl crate :: Resettable for R32_PA_DRV_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PA_SMT register accessor: an alias for `Reg<R32_PA_SMT_SPEC>`"]
|
|
|
+pub type R32_PA_SMT = crate :: Reg < r32_pa_smt :: R32_PA_SMT_SPEC > ; # [doc = "GPIO PA output slew rate and input schmitt trigger"]
|
|
|
+pub mod r32_pa_smt { # [doc = "Register `R32_PA_SMT` reader"]
|
|
|
+pub struct R (crate :: R < R32_PA_SMT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PA_SMT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PA_SMT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PA_SMT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PA_SMT` writer"]
|
|
|
+pub struct W (crate :: W < R32_PA_SMT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PA_SMT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PA_SMT_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R32_PA_SMT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PA_SMT` reader - GPIO PA output slew rate and input schmitt trigger"]
|
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+pub struct R32_PA_SMT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PA_SMT_R { pub (crate) fn new (bits : u32) -> Self { R32_PA_SMT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PA_SMT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PA_SMT` writer - GPIO PA output slew rate and input schmitt trigger"]
|
|
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+pub struct R32_PA_SMT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PA_SMT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
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+# [inline (always)]
|
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:23 - GPIO PA output slew rate and input schmitt trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pa_smt (& self) -> R32_PA_SMT_R { R32_PA_SMT_R :: new ((self . bits & 0x00ff_ffff) as u32) } } impl W { # [doc = "Bits 0:23 - GPIO PA output slew rate and input schmitt trigger"]
|
|
|
+# [inline (always)]
|
|
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+pub fn r32_pa_smt (& mut self) -> R32_PA_SMT_W { R32_PA_SMT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PA output slew rate and input schmitt trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pa_smt](index.html) module"]
|
|
|
+pub struct R32_PA_SMT_SPEC ; impl crate :: RegisterSpec for R32_PA_SMT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pa_smt::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PA_SMT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pa_smt::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PA_SMT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PA_SMT to value 0"]
|
|
|
+impl crate :: Resettable for R32_PA_SMT_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_DIR register accessor: an alias for `Reg<R32_PB_DIR_SPEC>`"]
|
|
|
+pub type R32_PB_DIR = crate :: Reg < r32_pb_dir :: R32_PB_DIR_SPEC > ; # [doc = "GPIO PB I/O direction"]
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+pub mod r32_pb_dir { # [doc = "Register `R32_PB_DIR` reader"]
|
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+pub struct R (crate :: R < R32_PB_DIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_DIR_SPEC > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_DIR_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PB_DIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_DIR` writer"]
|
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+pub struct W (crate :: W < R32_PB_DIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_DIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_DIR_SPEC >> for W { # [inline (always)]
|
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+fn from (writer : crate :: W < R32_PB_DIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_DIR` reader - GPIO PB I/O direction"]
|
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|
+pub struct R32_PB_DIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_DIR_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_DIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_DIR` writer - GPIO PB I/O direction"]
|
|
|
+pub struct R32_PB_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_DIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB I/O direction"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_dir (& self) -> R32_PB_DIR_R { R32_PB_DIR_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB I/O direction"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_pb_dir (& mut self) -> R32_PB_DIR_W { R32_PB_DIR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB I/O direction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_dir](index.html) module"]
|
|
|
+pub struct R32_PB_DIR_SPEC ; impl crate :: RegisterSpec for R32_PB_DIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_dir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_DIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_dir::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PB_DIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_DIR to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_DIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PIN register accessor: an alias for `Reg<R32_PB_PIN_SPEC>`"]
|
|
|
+pub type R32_PB_PIN = crate :: Reg < r32_pb_pin :: R32_PB_PIN_SPEC > ; # [doc = "GPIO PB input"]
|
|
|
+pub mod r32_pb_pin { # [doc = "Register `R32_PB_PIN` reader"]
|
|
|
+pub struct R (crate :: R < R32_PB_PIN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PIN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PIN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PB_PIN_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_PB_PIN` reader - GPIO PB input"]
|
|
|
+pub struct R32_PB_PIN_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PIN_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PIN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PIN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:24 - GPIO PB input"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_pin (& self) -> R32_PB_PIN_R { R32_PB_PIN_R :: new ((self . bits & 0x01ff_ffff) as u32) } } # [doc = "GPIO PB input\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pin](index.html) module"]
|
|
|
+pub struct R32_PB_PIN_SPEC ; impl crate :: RegisterSpec for R32_PB_PIN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pin::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_PIN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PB_PIN to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_PIN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_OUT register accessor: an alias for `Reg<R32_PB_OUT_SPEC>`"]
|
|
|
+pub type R32_PB_OUT = crate :: Reg < r32_pb_out :: R32_PB_OUT_SPEC > ; # [doc = "GPIO PB output"]
|
|
|
+pub mod r32_pb_out { # [doc = "Register `R32_PB_OUT` reader"]
|
|
|
+pub struct R (crate :: R < R32_PB_OUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_OUT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_OUT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PB_OUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_OUT` writer"]
|
|
|
+pub struct W (crate :: W < R32_PB_OUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_OUT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_OUT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PB_OUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_OUT` reader - GPIO PB output"]
|
|
|
+pub struct R32_PB_OUT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_OUT_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_OUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_OUT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_OUT` writer - GPIO PB output"]
|
|
|
+pub struct R32_PB_OUT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_OUT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_out (& self) -> R32_PB_OUT_R { R32_PB_OUT_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_out (& mut self) -> R32_PB_OUT_W { R32_PB_OUT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_out](index.html) module"]
|
|
|
+pub struct R32_PB_OUT_SPEC ; impl crate :: RegisterSpec for R32_PB_OUT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_out::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_OUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_out::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PB_OUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_OUT to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_OUT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_CLR register accessor: an alias for `Reg<R32_PB_CLR_SPEC>`"]
|
|
|
+pub type R32_PB_CLR = crate :: Reg < r32_pb_clr :: R32_PB_CLR_SPEC > ; # [doc = "GPIO PB clear output"]
|
|
|
+pub mod r32_pb_clr { # [doc = "Register `R32_PB_CLR` writer"]
|
|
|
+pub struct W (crate :: W < R32_PB_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_CLR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_CLR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PB_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_CLR` writer - GPIO PB clear output"]
|
|
|
+pub struct R32_PB_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_CLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl W { # [doc = "Bits 0:24 - GPIO PB clear output"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_clr (& mut self) -> R32_PB_CLR_W { R32_PB_CLR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB clear output\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_clr](index.html) module"]
|
|
|
+pub struct R32_PB_CLR_SPEC ; impl crate :: RegisterSpec for R32_PB_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_pb_clr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PB_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_CLR to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_CLR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PU register accessor: an alias for `Reg<R32_PB_PU_SPEC>`"]
|
|
|
+pub type R32_PB_PU = crate :: Reg < r32_pb_pu :: R32_PB_PU_SPEC > ; # [doc = "GPIO PB pullup resistance enable"]
|
|
|
+pub mod r32_pb_pu { # [doc = "Register `R32_PB_PU` reader"]
|
|
|
+pub struct R (crate :: R < R32_PB_PU_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PU_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PU_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PB_PU_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_PU` writer"]
|
|
|
+pub struct W (crate :: W < R32_PB_PU_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_PU_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_PU_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PB_PU_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_PU` reader - GPIO PB pullup resistance enable"]
|
|
|
+pub struct R32_PB_PU_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PU_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PU_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PU_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_PU` writer - GPIO PB pullup resistance enable"]
|
|
|
+pub struct R32_PB_PU_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_PU_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB pullup resistance enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_pu (& self) -> R32_PB_PU_R { R32_PB_PU_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB pullup resistance enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_pu (& mut self) -> R32_PB_PU_W { R32_PB_PU_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB pullup resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pu](index.html) module"]
|
|
|
+pub struct R32_PB_PU_SPEC ; impl crate :: RegisterSpec for R32_PB_PU_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pu::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_PU_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_pu::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PB_PU_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_PU to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_PU_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_PD register accessor: an alias for `Reg<R32_PB_PD_SPEC>`"]
|
|
|
+pub type R32_PB_PD = crate :: Reg < r32_pb_pd :: R32_PB_PD_SPEC > ; # [doc = "GPIO PB output open-drain and input pulldown resistance enable"]
|
|
|
+pub mod r32_pb_pd { # [doc = "Register `R32_PB_PD` reader"]
|
|
|
+pub struct R (crate :: R < R32_PB_PD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_PD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_PD_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PB_PD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_PD` writer"]
|
|
|
+pub struct W (crate :: W < R32_PB_PD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_PD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_PD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PB_PD_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_PD` reader - GPIO PB output open-drain and input pulldown resistance enable"]
|
|
|
+pub struct R32_PB_PD_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_PD_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_PD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_PD_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_PD` writer - GPIO PB output open-drain and input pulldown resistance enable"]
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|
|
+pub struct R32_PB_PD_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_PD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output open-drain and input pulldown resistance enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_pd (& self) -> R32_PB_PD_R { R32_PB_PD_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output open-drain and input pulldown resistance enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn r32_pb_pd (& mut self) -> R32_PB_PD_W { R32_PB_PD_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output open-drain and input pulldown resistance enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_pd](index.html) module"]
|
|
|
+pub struct R32_PB_PD_SPEC ; impl crate :: RegisterSpec for R32_PB_PD_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_pd::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PB_PD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_pd::W](W) writer structure"]
|
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+impl crate :: Writable for R32_PB_PD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_PD to value 0"]
|
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|
+impl crate :: Resettable for R32_PB_PD_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_DRV register accessor: an alias for `Reg<R32_PB_DRV_SPEC>`"]
|
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|
+pub type R32_PB_DRV = crate :: Reg < r32_pb_drv :: R32_PB_DRV_SPEC > ; # [doc = "GPIO PB driving capability"]
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+pub mod r32_pb_drv { # [doc = "Register `R32_PB_DRV` reader"]
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+pub struct R (crate :: R < R32_PB_DRV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_DRV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_DRV_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PB_DRV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_DRV` writer"]
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+pub struct W (crate :: W < R32_PB_DRV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_DRV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_DRV_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PB_DRV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_DRV` reader - GPIO PB driving capability"]
|
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+pub struct R32_PB_DRV_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_DRV_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_DRV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_DRV_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_DRV` writer - GPIO PB driving capability"]
|
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+pub struct R32_PB_DRV_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_DRV_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB driving capability"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_drv (& self) -> R32_PB_DRV_R { R32_PB_DRV_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB driving capability"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_drv (& mut self) -> R32_PB_DRV_W { R32_PB_DRV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB driving capability\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_drv](index.html) module"]
|
|
|
+pub struct R32_PB_DRV_SPEC ; impl crate :: RegisterSpec for R32_PB_DRV_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_drv::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_DRV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_drv::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PB_DRV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_DRV to value 0"]
|
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|
+impl crate :: Resettable for R32_PB_DRV_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PB_SMT register accessor: an alias for `Reg<R32_PB_SMT_SPEC>`"]
|
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|
+pub type R32_PB_SMT = crate :: Reg < r32_pb_smt :: R32_PB_SMT_SPEC > ; # [doc = "GPIO PB output slew rate and input schmitt trigger"]
|
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|
+pub mod r32_pb_smt { # [doc = "Register `R32_PB_SMT` reader"]
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|
+pub struct R (crate :: R < R32_PB_SMT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PB_SMT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PB_SMT_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PB_SMT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PB_SMT` writer"]
|
|
|
+pub struct W (crate :: W < R32_PB_SMT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PB_SMT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PB_SMT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PB_SMT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_PB_SMT` reader - GPIO PB output slew rate and input schmitt trigger"]
|
|
|
+pub struct R32_PB_SMT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_PB_SMT_R { pub (crate) fn new (bits : u32) -> Self { R32_PB_SMT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_PB_SMT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_PB_SMT` writer - GPIO PB output slew rate and input schmitt trigger"]
|
|
|
+pub struct R32_PB_SMT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_PB_SMT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01ff_ffff) | (value as u32 & 0x01ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:24 - GPIO PB output slew rate and input schmitt trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_smt (& self) -> R32_PB_SMT_R { R32_PB_SMT_R :: new ((self . bits & 0x01ff_ffff) as u32) } } impl W { # [doc = "Bits 0:24 - GPIO PB output slew rate and input schmitt trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_pb_smt (& mut self) -> R32_PB_SMT_W { R32_PB_SMT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "GPIO PB output slew rate and input schmitt trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pb_smt](index.html) module"]
|
|
|
+pub struct R32_PB_SMT_SPEC ; impl crate :: RegisterSpec for R32_PB_SMT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pb_smt::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PB_SMT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pb_smt::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PB_SMT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PB_SMT to value 0"]
|
|
|
+impl crate :: Resettable for R32_PB_SMT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PIN_ALTERNATE register accessor: an alias for `Reg<R8_PIN_ALTERNATE_SPEC>`"]
|
|
|
+pub type R8_PIN_ALTERNATE = crate :: Reg < r8_pin_alternate :: R8_PIN_ALTERNATE_SPEC > ; # [doc = "alternate pin control"]
|
|
|
+pub mod r8_pin_alternate { # [doc = "Register `R8_PIN_ALTERNATE` reader"]
|
|
|
+pub struct R (crate :: R < R8_PIN_ALTERNATE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PIN_ALTERNATE_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PIN_ALTERNATE_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_PIN_ALTERNATE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PIN_ALTERNATE` writer"]
|
|
|
+pub struct W (crate :: W < R8_PIN_ALTERNATE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PIN_ALTERNATE_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PIN_ALTERNATE_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_PIN_ALTERNATE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PIN_MII` reader - ETH mii interface selection"]
|
|
|
+pub struct RB_PIN_MII_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_MII_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_MII_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_MII_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_MII` writer - ETH mii interface selection"]
|
|
|
+pub struct RB_PIN_MII_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_MII_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_PIN_TMR1` reader - TMR1 alternate pin enable"]
|
|
|
+pub struct RB_PIN_TMR1_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_TMR1_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_TMR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_TMR1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_TMR1` writer - TMR1 alternate pin enable"]
|
|
|
+pub struct RB_PIN_TMR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_TMR1_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_PIN_TMR2` reader - TMR2 alternate pin enable"]
|
|
|
+pub struct RB_PIN_TMR2_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_TMR2_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_TMR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_TMR2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_TMR2` writer - TMR2 alternate pin enable"]
|
|
|
+pub struct RB_PIN_TMR2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_TMR2_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_PIN_UART0` reader - RXD0/TXD0 alternate pin enable"]
|
|
|
+pub struct RB_PIN_UART0_R (crate :: FieldReader < bool , bool >) ; impl RB_PIN_UART0_R { pub (crate) fn new (bits : bool) -> Self { RB_PIN_UART0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PIN_UART0_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PIN_UART0` writer - RXD0/TXD0 alternate pin enable"]
|
|
|
+pub struct RB_PIN_UART0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PIN_UART0_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - ETH mii interface selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_mii (& self) -> RB_PIN_MII_R { RB_PIN_MII_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - TMR1 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_tmr1 (& self) -> RB_PIN_TMR1_R { RB_PIN_TMR1_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - TMR2 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_tmr2 (& self) -> RB_PIN_TMR2_R { RB_PIN_TMR2_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - RXD0/TXD0 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_uart0 (& self) -> RB_PIN_UART0_R { RB_PIN_UART0_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - ETH mii interface selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_mii (& mut self) -> RB_PIN_MII_W { RB_PIN_MII_W { w : self } } # [doc = "Bit 1 - TMR1 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_tmr1 (& mut self) -> RB_PIN_TMR1_W { RB_PIN_TMR1_W { w : self } } # [doc = "Bit 2 - TMR2 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_tmr2 (& mut self) -> RB_PIN_TMR2_W { RB_PIN_TMR2_W { w : self } } # [doc = "Bit 4 - RXD0/TXD0 alternate pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pin_uart0 (& mut self) -> RB_PIN_UART0_W { RB_PIN_UART0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "alternate pin control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pin_alternate](index.html) module"]
|
|
|
+pub struct R8_PIN_ALTERNATE_SPEC ; impl crate :: RegisterSpec for R8_PIN_ALTERNATE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pin_alternate::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_PIN_ALTERNATE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pin_alternate::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_PIN_ALTERNATE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PIN_ALTERNATE to value 0"]
|
|
|
+impl crate :: Resettable for R8_PIN_ALTERNATE_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR0 register"]
|
|
|
+pub struct TMR0 { _marker : PhantomData < * const () > } unsafe impl Send for TMR0 { } impl TMR0 { # [doc = r"Pointer to the register block"]
|
|
|
+pub const PTR : * const tmr0 :: RegisterBlock = 0x4000_2000 as * const _ ; # [doc = r"Return the pointer to the register block"]
|
|
|
+# [inline (always)]
|
|
|
+pub const fn ptr () -> * const tmr0 :: RegisterBlock { Self :: PTR } } impl Deref for TMR0 { type Target = tmr0 :: RegisterBlock ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR0") . finish () } } # [doc = "TMR0 register"]
|
|
|
+pub mod tmr0 { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - TMR0 mode control"]
|
|
|
+pub r8_tmr0_ctrl_mod : crate :: Reg < r8_tmr0_ctrl_mod :: R8_TMR0_CTRL_MOD_SPEC > , _reserved1 : [u8 ; 0x01]
|
|
|
+, # [doc = "0x02 - TMR0 interrupt enable"]
|
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|
+pub r8_tmr0_inter_en : crate :: Reg < r8_tmr0_inter_en :: R8_TMR0_INTER_EN_SPEC > , _reserved2 : [u8 ; 0x03]
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+, # [doc = "0x06 - TMR0 interrupt flag"]
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+pub r8_tmr0_int_flag : crate :: Reg < r8_tmr0_int_flag :: R8_TMR0_INT_FLAG_SPEC > , # [doc = "0x07 - TMR0 FIFO count status"]
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+pub r8_tmr0_fifo_count : crate :: Reg < r8_tmr0_fifo_count :: R8_TMR0_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR0 current count"]
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+pub r32_tmr0_count : crate :: Reg < r32_tmr0_count :: R32_TMR0_COUNT_SPEC > , # [doc = "0x0c - TMR0 end count value, only low 26 bit"]
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+pub r32_tmr0_cnt_end : crate :: Reg < r32_tmr0_cnt_end :: R32_TMR0_CNT_END_SPEC > , # [doc = "0x10 - TMR0 FIFO register, only low 26 bit"]
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+pub r32_tmr0_fifo : crate :: Reg < r32_tmr0_fifo :: R32_TMR0_FIFO_SPEC > , } # [doc = "R8_TMR0_CTRL_MOD register accessor: an alias for `Reg<R8_TMR0_CTRL_MOD_SPEC>`"]
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+pub type R8_TMR0_CTRL_MOD = crate :: Reg < r8_tmr0_ctrl_mod :: R8_TMR0_CTRL_MOD_SPEC > ; # [doc = "TMR0 mode control"]
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+pub mod r8_tmr0_ctrl_mod { # [doc = "Register `R8_TMR0_CTRL_MOD` reader"]
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+pub struct R (crate :: R < R8_TMR0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_CTRL_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR0_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_CTRL_MOD` writer"]
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+pub struct W (crate :: W < R8_TMR0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_CTRL_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR0_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
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+pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
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+pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
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+pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
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+pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
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+pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
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+pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
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+pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
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+pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
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+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
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+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _ timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _ timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_ctrl_mod](index.html) module"]
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+pub struct R8_TMR0_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR0_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_ctrl_mod::R](R) reader structure"]
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+impl crate :: Readable for R8_TMR0_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_ctrl_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR0_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_CTRL_MOD to value 0x02"]
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+impl crate :: Resettable for R8_TMR0_CTRL_MOD_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR0_INTER_EN register accessor: an alias for `Reg<R8_TMR0_INTER_EN_SPEC>`"]
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+pub type R8_TMR0_INTER_EN = crate :: Reg < r8_tmr0_inter_en :: R8_TMR0_INTER_EN_SPEC > ; # [doc = "TMR0 interrupt enable"]
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+pub mod r8_tmr0_inter_en { # [doc = "Register `R8_TMR0_INTER_EN` reader"]
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+pub struct R (crate :: R < R8_TMR0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_INTER_EN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR0_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_INTER_EN` writer"]
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+pub struct W (crate :: W < R8_TMR0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_INTER_EN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR0_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1/2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1/2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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|
+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_inter_en](index.html) module"]
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+pub struct R8_TMR0_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR0_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_inter_en::R](R) reader structure"]
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+impl crate :: Readable for R8_TMR0_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_inter_en::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR0_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_INTER_EN to value 0"]
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+impl crate :: Resettable for R8_TMR0_INTER_EN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR0_INT_FLAG register accessor: an alias for `Reg<R8_TMR0_INT_FLAG_SPEC>`"]
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+pub type R8_TMR0_INT_FLAG = crate :: Reg < r8_tmr0_int_flag :: R8_TMR0_INT_FLAG_SPEC > ; # [doc = "TMR0 interrupt flag"]
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+pub mod r8_tmr0_int_flag { # [doc = "Register `R8_TMR0_INT_FLAG` reader"]
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+pub struct R (crate :: R < R8_TMR0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_INT_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR0_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR0_INT_FLAG` writer"]
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|
+pub struct W (crate :: W < R8_TMR0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR0_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR0_INT_FLAG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR0_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
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|
+pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
|
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|
+pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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|
+pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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|
|
+pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1/2 DMA completion"]
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|
|
+pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1/2 DMA completion"]
|
|
|
+pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
|
|
|
+pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
|
|
|
+pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1/2 DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1/2 DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_int_flag](index.html) module"]
|
|
|
+pub struct R8_TMR0_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR0_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_int_flag::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR0_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr0_int_flag::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_TMR0_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR0_INT_FLAG to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR0_INT_FLAG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR0_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR0_FIFO_COUNT_SPEC>`"]
|
|
|
+pub type R8_TMR0_FIFO_COUNT = crate :: Reg < r8_tmr0_fifo_count :: R8_TMR0_FIFO_COUNT_SPEC > ; # [doc = "TMR0 FIFO count status"]
|
|
|
+pub mod r8_tmr0_fifo_count { # [doc = "Register `R8_TMR0_FIFO_COUNT` reader"]
|
|
|
+pub struct R (crate :: R < R8_TMR0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR0_FIFO_COUNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR0_FIFO_COUNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_TMR0_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR0_FIFO_COUNT` reader - TMR0 FIFO count status"]
|
|
|
+pub struct R8_TMR0_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR0_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR0_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR0_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR0 FIFO count status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_tmr0_fifo_count (& self) -> R8_TMR0_FIFO_COUNT_R { R8_TMR0_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr0_fifo_count](index.html) module"]
|
|
|
+pub struct R8_TMR0_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR0_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr0_fifo_count::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR0_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR0_FIFO_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR0_FIFO_COUNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_COUNT register accessor: an alias for `Reg<R32_TMR0_COUNT_SPEC>`"]
|
|
|
+pub type R32_TMR0_COUNT = crate :: Reg < r32_tmr0_count :: R32_TMR0_COUNT_SPEC > ; # [doc = "TMR0 current count"]
|
|
|
+pub mod r32_tmr0_count { # [doc = "Register `R32_TMR0_COUNT` reader"]
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+pub struct R (crate :: R < R32_TMR0_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_COUNT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_COUNT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR0_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR0_COUNT` reader - TMR0 current count"]
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+pub struct R32_TMR0_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR0 current count"]
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+# [inline (always)]
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+pub fn r32_tmr0_count (& self) -> R32_TMR0_COUNT_R { R32_TMR0_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR0 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_count](index.html) module"]
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+pub struct R32_TMR0_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR0_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_count::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR0_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR0_COUNT to value 0"]
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+impl crate :: Resettable for R32_TMR0_COUNT_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_CNT_END register accessor: an alias for `Reg<R32_TMR0_CNT_END_SPEC>`"]
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+pub type R32_TMR0_CNT_END = crate :: Reg < r32_tmr0_cnt_end :: R32_TMR0_CNT_END_SPEC > ; # [doc = "TMR0 end count value, only low 26 bit"]
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+pub mod r32_tmr0_cnt_end { # [doc = "Register `R32_TMR0_CNT_END` reader"]
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+pub struct R (crate :: R < R32_TMR0_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_CNT_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_CNT_END_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR0_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR0_CNT_END` writer"]
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+pub struct W (crate :: W < R32_TMR0_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR0_CNT_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR0_CNT_END_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_TMR0_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR0_COUNT` reader - TMR0 current count"]
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+pub struct R32_TMR0_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR0_COUNT` writer - TMR0 current count"]
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+pub struct R32_TMR0_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR0_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR0 current count"]
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+# [inline (always)]
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+pub fn r32_tmr0_count (& self) -> R32_TMR0_COUNT_R { R32_TMR0_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR0 current count"]
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+# [inline (always)]
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+pub fn r32_tmr0_count (& mut self) -> R32_TMR0_COUNT_W { R32_TMR0_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_cnt_end](index.html) module"]
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+pub struct R32_TMR0_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR0_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_cnt_end::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR0_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr0_cnt_end::W](W) writer structure"]
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+impl crate :: Writable for R32_TMR0_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR0_CNT_END to value 0"]
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+impl crate :: Resettable for R32_TMR0_CNT_END_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR0_FIFO register accessor: an alias for `Reg<R32_TMR0_FIFO_SPEC>`"]
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+pub type R32_TMR0_FIFO = crate :: Reg < r32_tmr0_fifo :: R32_TMR0_FIFO_SPEC > ; # [doc = "TMR0 FIFO register, only low 26 bit"]
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+pub mod r32_tmr0_fifo { # [doc = "Register `R32_TMR0_FIFO` reader"]
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+pub struct R (crate :: R < R32_TMR0_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR0_FIFO_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR0_FIFO_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR0_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR0_FIFO` writer"]
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+pub struct W (crate :: W < R32_TMR0_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR0_FIFO_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR0_FIFO_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_TMR0_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR0_FIFO` reader - TMR0 FIFO current count"]
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+pub struct R32_TMR0_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR0_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR0_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR0_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR0_FIFO` writer - TMR0 FIFO current count"]
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+pub struct R32_TMR0_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR0_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR0 FIFO current count"]
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+# [inline (always)]
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+pub fn r32_tmr0_fifo (& self) -> R32_TMR0_FIFO_R { R32_TMR0_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR0 FIFO current count"]
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+# [inline (always)]
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+pub fn r32_tmr0_fifo (& mut self) -> R32_TMR0_FIFO_W { R32_TMR0_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR0 FIFO register, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr0_fifo](index.html) module"]
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+pub struct R32_TMR0_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR0_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr0_fifo::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR0_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr0_fifo::W](W) writer structure"]
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+impl crate :: Writable for R32_TMR0_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR0_FIFO to value 0"]
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+impl crate :: Resettable for R32_TMR0_FIFO_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR1 register"]
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+pub struct TMR1 { _marker : PhantomData < * const () > } unsafe impl Send for TMR1 { } impl TMR1 { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const tmr1 :: RegisterBlock = 0x4000_2400 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const tmr1 :: RegisterBlock { Self :: PTR } } impl Deref for TMR1 { type Target = tmr1 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR1") . finish () } } # [doc = "TMR1 register"]
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+pub mod tmr1 { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - TMR1 mode control"]
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+pub r8_tmr1_ctrl_mod : crate :: Reg < r8_tmr1_ctrl_mod :: R8_TMR1_CTRL_MOD_SPEC > , # [doc = "0x01 - TMR1 DMA control"]
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+pub r8_tmr1_ctrl_dma : crate :: Reg < r8_tmr1_ctrl_dma :: R8_TMR1_CTRL_DMA_SPEC > , # [doc = "0x02 - TMR1 interrupt enable"]
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+pub r8_tmr1_inter_en : crate :: Reg < r8_tmr1_inter_en :: R8_TMR1_INTER_EN_SPEC > , _reserved3 : [u8 ; 0x03]
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+, # [doc = "0x06 - TMR1 interrupt flag"]
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+pub r8_tmr1_int_flag : crate :: Reg < r8_tmr1_int_flag :: R8_TMR1_INT_FLAG_SPEC > , # [doc = "0x07 - TMR1 FIFO count status"]
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+pub r8_tmr1_fifo_count : crate :: Reg < r8_tmr1_fifo_count :: R8_TMR1_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR1 current count"]
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+pub r32_tmr1_count : crate :: Reg < r32_tmr1_count :: R32_TMR1_COUNT_SPEC > , # [doc = "0x0c - TMR1 end count value, only low 26 bit"]
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+pub r32_tmr1_cnt_end : crate :: Reg < r32_tmr1_cnt_end :: R32_TMR1_CNT_END_SPEC > , # [doc = "0x10 - TMR1 FIFO only low 26 bit"]
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+pub r32_tmr1_fifo : crate :: Reg < r32_tmr1_fifo :: R32_TMR1_FIFO_SPEC > , # [doc = "0x14 - TMR1 DMA current address"]
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|
+pub r32_tmr1_dma_now : crate :: Reg < r32_tmr1_dma_now :: R32_TMR1_DMA_NOW_SPEC > , # [doc = "0x18 - TMR1 DMA begin address"]
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+pub r32_tmr1_dma_beg : crate :: Reg < r32_tmr1_dma_beg :: R32_TMR1_DMA_BEG_SPEC > , # [doc = "0x1c - TMR1 DMA end address"]
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|
+pub r32_tmr1_dma_end : crate :: Reg < r32_tmr1_dma_end :: R32_TMR1_DMA_END_SPEC > , } # [doc = "R8_TMR1_CTRL_MOD register accessor: an alias for `Reg<R8_TMR1_CTRL_MOD_SPEC>`"]
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+pub type R8_TMR1_CTRL_MOD = crate :: Reg < r8_tmr1_ctrl_mod :: R8_TMR1_CTRL_MOD_SPEC > ; # [doc = "TMR1 mode control"]
|
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|
+pub mod r8_tmr1_ctrl_mod { # [doc = "Register `R8_TMR1_CTRL_MOD` reader"]
|
|
|
+pub struct R (crate :: R < R8_TMR1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_CTRL_MOD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_CTRL_MOD_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R8_TMR1_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_CTRL_MOD` writer"]
|
|
|
+pub struct W (crate :: W < R8_TMR1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_CTRL_MOD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_CTRL_MOD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_TMR1_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
|
|
|
+pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
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|
+pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
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|
+pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
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|
+pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
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|
|
+pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
|
|
|
+pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
|
|
|
+pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
|
|
|
+pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
|
|
|
+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
|
|
|
+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _ timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _ timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _ timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_ctrl_mod](index.html) module"]
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+pub struct R8_TMR1_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR1_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_ctrl_mod::R](R) reader structure"]
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+impl crate :: Readable for R8_TMR1_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_ctrl_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR1_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_CTRL_MOD to value 0x02"]
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+impl crate :: Resettable for R8_TMR1_CTRL_MOD_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR1_INTER_EN register accessor: an alias for `Reg<R8_TMR1_INTER_EN_SPEC>`"]
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+pub type R8_TMR1_INTER_EN = crate :: Reg < r8_tmr1_inter_en :: R8_TMR1_INTER_EN_SPEC > ; # [doc = "TMR1 interrupt enable"]
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+pub mod r8_tmr1_inter_en { # [doc = "Register `R8_TMR1_INTER_EN` reader"]
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+pub struct R (crate :: R < R8_TMR1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_INTER_EN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR1_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_INTER_EN` writer"]
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+pub struct W (crate :: W < R8_TMR1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_INTER_EN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR1_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1/2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1/2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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|
+# [inline (always)]
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+pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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|
|
+# [inline (always)]
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+pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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|
|
+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
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|
|
+# [inline (always)]
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+pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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|
|
+# [inline (always)]
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|
+pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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|
|
+# [inline (always)]
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|
+pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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|
|
+# [inline (always)]
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|
+pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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|
|
+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1/2 DMA completion"]
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|
|
+# [inline (always)]
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|
+pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_inter_en](index.html) module"]
|
|
|
+pub struct R8_TMR1_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR1_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_inter_en::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR1_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_inter_en::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_TMR1_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_INTER_EN to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR1_INTER_EN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_INT_FLAG register accessor: an alias for `Reg<R8_TMR1_INT_FLAG_SPEC>`"]
|
|
|
+pub type R8_TMR1_INT_FLAG = crate :: Reg < r8_tmr1_int_flag :: R8_TMR1_INT_FLAG_SPEC > ; # [doc = "TMR1 interrupt flag"]
|
|
|
+pub mod r8_tmr1_int_flag { # [doc = "Register `R8_TMR1_INT_FLAG` reader"]
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|
|
+pub struct R (crate :: R < R8_TMR1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_INT_FLAG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_INT_FLAG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_TMR1_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_INT_FLAG` writer"]
|
|
|
+pub struct W (crate :: W < R8_TMR1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_INT_FLAG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_INT_FLAG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_TMR1_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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+pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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+pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1_2 DMA completion"]
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+pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1_2 DMA completion"]
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+pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
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+pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
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+pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
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|
|
+# [inline (always)]
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|
+pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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|
|
+# [inline (always)]
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+pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_int_flag](index.html) module"]
|
|
|
+pub struct R8_TMR1_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR1_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_int_flag::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR1_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_int_flag::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_TMR1_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_INT_FLAG to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR1_INT_FLAG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR1_FIFO_COUNT_SPEC>`"]
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|
|
+pub type R8_TMR1_FIFO_COUNT = crate :: Reg < r8_tmr1_fifo_count :: R8_TMR1_FIFO_COUNT_SPEC > ; # [doc = "TMR1 FIFO count status"]
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|
|
+pub mod r8_tmr1_fifo_count { # [doc = "Register `R8_TMR1_FIFO_COUNT` reader"]
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|
|
+pub struct R (crate :: R < R8_TMR1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_FIFO_COUNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_FIFO_COUNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_TMR1_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR1_FIFO_COUNT` reader - TMR FIFO count status"]
|
|
|
+pub struct R8_TMR1_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR1_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR1_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR1_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR FIFO count status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_tmr1_fifo_count (& self) -> R8_TMR1_FIFO_COUNT_R { R8_TMR1_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR1 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_fifo_count](index.html) module"]
|
|
|
+pub struct R8_TMR1_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR1_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_fifo_count::R](R) reader structure"]
|
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|
+impl crate :: Readable for R8_TMR1_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR1_FIFO_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR1_FIFO_COUNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_COUNT register accessor: an alias for `Reg<R32_TMR1_COUNT_SPEC>`"]
|
|
|
+pub type R32_TMR1_COUNT = crate :: Reg < r32_tmr1_count :: R32_TMR1_COUNT_SPEC > ; # [doc = "TMR1 current count"]
|
|
|
+pub mod r32_tmr1_count { # [doc = "Register `R32_TMR1_COUNT` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR1_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_COUNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_COUNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR1_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR1_COUNT` reader - TMR current count"]
|
|
|
+pub struct R32_TMR1_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr1_count (& self) -> R32_TMR1_COUNT_R { R32_TMR1_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR1 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_count](index.html) module"]
|
|
|
+pub struct R32_TMR1_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR1_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_count::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR1_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR1_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR1_COUNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_CNT_END register accessor: an alias for `Reg<R32_TMR1_CNT_END_SPEC>`"]
|
|
|
+pub type R32_TMR1_CNT_END = crate :: Reg < r32_tmr1_cnt_end :: R32_TMR1_CNT_END_SPEC > ; # [doc = "TMR1 end count value, only low 26 bit"]
|
|
|
+pub mod r32_tmr1_cnt_end { # [doc = "Register `R32_TMR1_CNT_END` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR1_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_CNT_END_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_CNT_END_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR1_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_CNT_END` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR1_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_CNT_END_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_CNT_END_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_TMR1_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR1_CNT_END` reader - TMR current count"]
|
|
|
+pub struct R32_TMR1_CNT_END_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_CNT_END_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_CNT_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR1_CNT_END` writer - TMR current count"]
|
|
|
+pub struct R32_TMR1_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR1_CNT_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr1_cnt_end (& self) -> R32_TMR1_CNT_END_R { R32_TMR1_CNT_END_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr1_cnt_end (& mut self) -> R32_TMR1_CNT_END_W { R32_TMR1_CNT_END_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_cnt_end](index.html) module"]
|
|
|
+pub struct R32_TMR1_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR1_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_cnt_end::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR1_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_cnt_end::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_TMR1_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_CNT_END to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR1_CNT_END_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_FIFO register accessor: an alias for `Reg<R32_TMR1_FIFO_SPEC>`"]
|
|
|
+pub type R32_TMR1_FIFO = crate :: Reg < r32_tmr1_fifo :: R32_TMR1_FIFO_SPEC > ; # [doc = "TMR1 FIFO only low 26 bit"]
|
|
|
+pub mod r32_tmr1_fifo { # [doc = "Register `R32_TMR1_FIFO` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR1_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_FIFO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_FIFO_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR1_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_FIFO` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR1_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_FIFO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_FIFO_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_TMR1_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR1_FIFO` reader - TMR current count"]
|
|
|
+pub struct R32_TMR1_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR1_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR1_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR1_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR1_FIFO` writer - TMR current count"]
|
|
|
+pub struct R32_TMR1_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR1_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr1_fifo (& self) -> R32_TMR1_FIFO_R { R32_TMR1_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
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+# [inline (always)]
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+pub fn r32_tmr1_fifo (& mut self) -> R32_TMR1_FIFO_W { R32_TMR1_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 FIFO only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_fifo](index.html) module"]
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+pub struct R32_TMR1_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR1_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_fifo::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR1_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_fifo::W](W) writer structure"]
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+impl crate :: Writable for R32_TMR1_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_FIFO to value 0"]
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+impl crate :: Resettable for R32_TMR1_FIFO_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR1_CTRL_DMA register accessor: an alias for `Reg<R8_TMR1_CTRL_DMA_SPEC>`"]
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+pub type R8_TMR1_CTRL_DMA = crate :: Reg < r8_tmr1_ctrl_dma :: R8_TMR1_CTRL_DMA_SPEC > ; # [doc = "TMR1 DMA control"]
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+pub mod r8_tmr1_ctrl_dma { # [doc = "Register `R8_TMR1_CTRL_DMA` reader"]
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+pub struct R (crate :: R < R8_TMR1_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR1_CTRL_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR1_CTRL_DMA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR1_CTRL_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR1_CTRL_DMA` writer"]
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+pub struct W (crate :: W < R8_TMR1_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR1_CTRL_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR1_CTRL_DMA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR1_CTRL_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_DMA_ENABLE` reader - timer1/2 DMA enable"]
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+pub struct RB_TMR_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_ENABLE` writer - timer1/2 DMA enable"]
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+pub struct RB_TMR_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_DMA_LOOP` reader - timer1/2 DMA address loop enable"]
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+pub struct RB_TMR_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_LOOP` writer - timer1/2 DMA address loop enable"]
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+pub struct RB_TMR_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - timer1/2 DMA enable"]
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+# [inline (always)]
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+pub fn rb_tmr_dma_enable (& self) -> RB_TMR_DMA_ENABLE_R { RB_TMR_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - timer1/2 DMA address loop enable"]
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+# [inline (always)]
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+pub fn rb_tmr_dma_loop (& self) -> RB_TMR_DMA_LOOP_R { RB_TMR_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - timer1/2 DMA enable"]
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+# [inline (always)]
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+pub fn rb_tmr_dma_enable (& mut self) -> RB_TMR_DMA_ENABLE_W { RB_TMR_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - timer1/2 DMA address loop enable"]
|
|
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+# [inline (always)]
|
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+pub fn rb_tmr_dma_loop (& mut self) -> RB_TMR_DMA_LOOP_W { RB_TMR_DMA_LOOP_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr1_ctrl_dma](index.html) module"]
|
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+pub struct R8_TMR1_CTRL_DMA_SPEC ; impl crate :: RegisterSpec for R8_TMR1_CTRL_DMA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr1_ctrl_dma::R](R) reader structure"]
|
|
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+impl crate :: Readable for R8_TMR1_CTRL_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr1_ctrl_dma::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR1_CTRL_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR1_CTRL_DMA to value 0"]
|
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+impl crate :: Resettable for R8_TMR1_CTRL_DMA_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_NOW register accessor: an alias for `Reg<R32_TMR1_DMA_NOW_SPEC>`"]
|
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+pub type R32_TMR1_DMA_NOW = crate :: Reg < r32_tmr1_dma_now :: R32_TMR1_DMA_NOW_SPEC > ; # [doc = "TMR1 DMA current address"]
|
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+pub mod r32_tmr1_dma_now { # [doc = "Register `R32_TMR1_DMA_NOW` reader"]
|
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+pub struct R (crate :: R < R32_TMR1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_NOW_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_TMR1_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_NOW` writer"]
|
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+pub struct W (crate :: W < R32_TMR1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_NOW_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R32_TMR1_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_NOW` reader - TMR DMA current address"]
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|
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+pub struct R16_TMR1_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_NOW` writer - TMR DMA current address"]
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+pub struct R16_TMR1_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR DMA current address"]
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|
+# [inline (always)]
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+pub fn r16_tmr1_dma_now (& self) -> R16_TMR1_DMA_NOW_R { R16_TMR1_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR DMA current address"]
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+# [inline (always)]
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+pub fn r16_tmr1_dma_now (& mut self) -> R16_TMR1_DMA_NOW_W { R16_TMR1_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_now](index.html) module"]
|
|
|
+pub struct R32_TMR1_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_now::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR1_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_now::W](W) writer structure"]
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|
|
+impl crate :: Writable for R32_TMR1_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_NOW to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR1_DMA_NOW_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_BEG register accessor: an alias for `Reg<R32_TMR1_DMA_BEG_SPEC>`"]
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|
|
+pub type R32_TMR1_DMA_BEG = crate :: Reg < r32_tmr1_dma_beg :: R32_TMR1_DMA_BEG_SPEC > ; # [doc = "TMR1 DMA begin address"]
|
|
|
+pub mod r32_tmr1_dma_beg { # [doc = "Register `R32_TMR1_DMA_BEG` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_BEG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_BEG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR1_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_BEG` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_BEG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_BEG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_TMR1_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_BEG` reader - TMR1 DMA begin address"]
|
|
|
+pub struct R16_TMR1_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_BEG` writer - TMR1 DMA begin address"]
|
|
|
+pub struct R16_TMR1_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR1 DMA begin address"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r16_tmr1_dma_beg (& self) -> R16_TMR1_DMA_BEG_R { R16_TMR1_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR1 DMA begin address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_tmr1_dma_beg (& mut self) -> R16_TMR1_DMA_BEG_W { R16_TMR1_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_beg](index.html) module"]
|
|
|
+pub struct R32_TMR1_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_beg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR1_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_beg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_TMR1_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_BEG to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR1_DMA_BEG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR1_DMA_END register accessor: an alias for `Reg<R32_TMR1_DMA_END_SPEC>`"]
|
|
|
+pub type R32_TMR1_DMA_END = crate :: Reg < r32_tmr1_dma_end :: R32_TMR1_DMA_END_SPEC > ; # [doc = "TMR1 DMA end address"]
|
|
|
+pub mod r32_tmr1_dma_end { # [doc = "Register `R32_TMR1_DMA_END` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR1_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR1_DMA_END_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR1_DMA_END_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR1_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR1_DMA_END` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR1_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR1_DMA_END_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR1_DMA_END_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_TMR1_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR1_DMA_END` reader - TMR1 DMA end address"]
|
|
|
+pub struct R16_TMR1_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR1_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR1_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR1_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR1_DMA_END` writer - TMR1 DMA end address"]
|
|
|
+pub struct R16_TMR1_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR1_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR1 DMA end address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_tmr1_dma_end (& self) -> R16_TMR1_DMA_END_R { R16_TMR1_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR1 DMA end address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_tmr1_dma_end (& mut self) -> R16_TMR1_DMA_END_W { R16_TMR1_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR1 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr1_dma_end](index.html) module"]
|
|
|
+pub struct R32_TMR1_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_TMR1_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr1_dma_end::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR1_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr1_dma_end::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_TMR1_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR1_DMA_END to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR1_DMA_END_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "TMR2 register"]
|
|
|
+pub struct TMR2 { _marker : PhantomData < * const () > } unsafe impl Send for TMR2 { } impl TMR2 { # [doc = r"Pointer to the register block"]
|
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+pub const PTR : * const tmr2 :: RegisterBlock = 0x4000_2800 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const tmr2 :: RegisterBlock { Self :: PTR } } impl Deref for TMR2 { type Target = tmr2 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for TMR2 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("TMR2") . finish () } } # [doc = "TMR2 register"]
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+pub mod tmr2 { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - TMR2 mode control"]
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+pub r8_tmr2_ctrl_mod : crate :: Reg < r8_tmr2_ctrl_mod :: R8_TMR2_CTRL_MOD_SPEC > , # [doc = "0x01 - TMR2 DMA control"]
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+pub r8_tmr2_ctrl_dma : crate :: Reg < r8_tmr2_ctrl_dma :: R8_TMR2_CTRL_DMA_SPEC > , # [doc = "0x02 - TMR2 interrupt enable"]
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+pub r8_tmr2_inter_en : crate :: Reg < r8_tmr2_inter_en :: R8_TMR2_INTER_EN_SPEC > , _reserved3 : [u8 ; 0x03]
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+, # [doc = "0x06 - TMR2 interrupt flag"]
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+pub r8_tmr2_int_flag : crate :: Reg < r8_tmr2_int_flag :: R8_TMR2_INT_FLAG_SPEC > , # [doc = "0x07 - TMR2 FIFO count status"]
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+pub r8_tmr2_fifo_count : crate :: Reg < r8_tmr2_fifo_count :: R8_TMR2_FIFO_COUNT_SPEC > , # [doc = "0x08 - TMR2 current count"]
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+pub r32_tmr2_count : crate :: Reg < r32_tmr2_count :: R32_TMR2_COUNT_SPEC > , # [doc = "0x0c - TMR2 end count value, only low 26 bit"]
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+pub r32_tmr2_cnt_end : crate :: Reg < r32_tmr2_cnt_end :: R32_TMR2_CNT_END_SPEC > , # [doc = "0x10 - TMR2 end count value, only low 26 bit"]
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+pub r32_tmr2_fifo : crate :: Reg < r32_tmr2_fifo :: R32_TMR2_FIFO_SPEC > , # [doc = "0x14 - TMR2 DMA current address"]
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+pub r32_tmr2_dma_now : crate :: Reg < r32_tmr2_dma_now :: R32_TMR2_DMA_NOW_SPEC > , # [doc = "0x18 - TMR2 DMA begin address"]
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+pub r32_tmr2_dma_beg : crate :: Reg < r32_tmr2_dma_beg :: R32_TMR2_DMA_BEG_SPEC > , # [doc = "0x1c - TMR2 DMA end address"]
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+pub r32_tmr2_dma_end : crate :: Reg < r32_tmr2_dma_end :: R32_TMR2_DMA_END_SPEC > , } # [doc = "R8_TMR2_CTRL_MOD register accessor: an alias for `Reg<R8_TMR2_CTRL_MOD_SPEC>`"]
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+pub type R8_TMR2_CTRL_MOD = crate :: Reg < r8_tmr2_ctrl_mod :: R8_TMR2_CTRL_MOD_SPEC > ; # [doc = "TMR2 mode control"]
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+pub mod r8_tmr2_ctrl_mod { # [doc = "Register `R8_TMR2_CTRL_MOD` reader"]
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+pub struct R (crate :: R < R8_TMR2_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_CTRL_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR2_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_CTRL_MOD` writer"]
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+pub struct W (crate :: W < R8_TMR2_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_CTRL_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR2_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_MODE_IN` reader - timer in mode"]
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+pub struct RB_TMR_MODE_IN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_MODE_IN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_MODE_IN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_MODE_IN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_MODE_IN` writer - timer in mode"]
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+pub struct RB_TMR_MODE_IN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_MODE_IN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_ALL_CLEAR` reader - force clear timer FIFO and count"]
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+pub struct RB_TMR_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_ALL_CLEAR` writer - force clear timer FIFO and count"]
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+pub struct RB_TMR_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_COUNT_EN` reader - timer count enable"]
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+pub struct RB_TMR_COUNT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_COUNT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_COUNT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_COUNT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_COUNT_EN` writer - timer count enable"]
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+pub struct RB_TMR_COUNT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_COUNT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_OUT_EN` reader - timer output enable"]
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+pub struct RB_TMR_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_EN` writer - timer output enable"]
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+pub struct RB_TMR_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` reader - timer PWM output polarity _ Count sub-mode"]
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+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT` writer - timer PWM output polarity _ Count sub-mode"]
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+pub struct RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` reader - timer PWM repeat mode _timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { pub (crate) fn new (bits : u8) -> Self { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE` writer - timer PWM repeat mode _timer capture edge mode"]
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+pub struct RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& self) -> RB_TMR_MODE_IN_R { RB_TMR_MODE_IN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& self) -> RB_TMR_ALL_CLEAR_R { RB_TMR_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& self) -> RB_TMR_COUNT_EN_R { RB_TMR_COUNT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& self) -> RB_TMR_OUT_EN_R { RB_TMR_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - timer PWM repeat mode _timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - timer in mode"]
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+# [inline (always)]
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+pub fn rb_tmr_mode_in (& mut self) -> RB_TMR_MODE_IN_W { RB_TMR_MODE_IN_W { w : self } } # [doc = "Bit 1 - force clear timer FIFO and count"]
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+# [inline (always)]
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+pub fn rb_tmr_all_clear (& mut self) -> RB_TMR_ALL_CLEAR_W { RB_TMR_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - timer count enable"]
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+# [inline (always)]
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+pub fn rb_tmr_count_en (& mut self) -> RB_TMR_COUNT_EN_W { RB_TMR_COUNT_EN_W { w : self } } # [doc = "Bit 3 - timer output enable"]
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+# [inline (always)]
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+pub fn rb_tmr_out_en (& mut self) -> RB_TMR_OUT_EN_W { RB_TMR_OUT_EN_W { w : self } } # [doc = "Bit 4 - timer PWM output polarity _ Count sub-mode"]
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+# [inline (always)]
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+pub fn rb_tmr_out_polar_rb_tmr_cap_count (& mut self) -> RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W { w : self } } # [doc = "Bits 6:7 - timer PWM repeat mode _timer capture edge mode"]
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+# [inline (always)]
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+pub fn rb_tmr_pwm_repeat_rb_tmr_cap_edge (& mut self) -> RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_ctrl_mod](index.html) module"]
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+pub struct R8_TMR2_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_TMR2_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_ctrl_mod::R](R) reader structure"]
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+impl crate :: Readable for R8_TMR2_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_ctrl_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR2_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_CTRL_MOD to value 0x02"]
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+impl crate :: Resettable for R8_TMR2_CTRL_MOD_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_TMR2_INTER_EN register accessor: an alias for `Reg<R8_TMR2_INTER_EN_SPEC>`"]
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+pub type R8_TMR2_INTER_EN = crate :: Reg < r8_tmr2_inter_en :: R8_TMR2_INTER_EN_SPEC > ; # [doc = "TMR2 interrupt enable"]
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+pub mod r8_tmr2_inter_en { # [doc = "Register `R8_TMR2_INTER_EN` reader"]
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+pub struct R (crate :: R < R8_TMR2_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_INTER_EN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR2_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_INTER_EN` writer"]
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+pub struct W (crate :: W < R8_TMR2_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_INTER_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_INTER_EN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR2_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IE_CYC_END` reader - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_CYC_END` writer - enable interrupt for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IE_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IE_DATA_ACT` reader - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DATA_ACT` writer - enable interrupt for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IE_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_HF` reader - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_HF` writer - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+pub struct RB_TMR_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IE_DMA_END` reader - enable interrupt for timer1_2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_DMA_END` writer - enable interrupt for timer1_2 DMA completion"]
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+pub struct RB_TMR_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IE_FIFO_OV` reader - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IE_FIFO_OV` writer - enable interrupt for timer FIFO overflow"]
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+pub struct RB_TMR_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_cyc_end (& self) -> RB_TMR_IE_CYC_END_R { RB_TMR_IE_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_data_act (& self) -> RB_TMR_IE_DATA_ACT_R { RB_TMR_IE_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& self) -> RB_TMR_IE_FIFO_HF_R { RB_TMR_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for timer1_2 DMA completion"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_dma_end (& self) -> RB_TMR_IE_DMA_END_R { RB_TMR_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_ov (& self) -> RB_TMR_IE_FIFO_OV_R { RB_TMR_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for timer capture count timeout or PWM cycle end"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_cyc_end (& mut self) -> RB_TMR_IE_CYC_END_W { RB_TMR_IE_CYC_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for timer capture input action or PWM trigger"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_data_act (& mut self) -> RB_TMR_IE_DATA_ACT_W { RB_TMR_IE_DATA_ACT_W { w : self } } # [doc = "Bit 2 - enable interrupt for timer FIFO half (capture fifo >=4 or PWM fifo lower than3)"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_hf (& mut self) -> RB_TMR_IE_FIFO_HF_W { RB_TMR_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for timer1_2 DMA completion"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_dma_end (& mut self) -> RB_TMR_IE_DMA_END_W { RB_TMR_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for timer FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_tmr_ie_fifo_ov (& mut self) -> RB_TMR_IE_FIFO_OV_W { RB_TMR_IE_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_inter_en](index.html) module"]
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+pub struct R8_TMR2_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_TMR2_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_inter_en::R](R) reader structure"]
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+impl crate :: Readable for R8_TMR2_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_inter_en::W](W) writer structure"]
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+impl crate :: Writable for R8_TMR2_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_INTER_EN to value 0"]
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+impl crate :: Resettable for R8_TMR2_INTER_EN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_INT_FLAG register accessor: an alias for `Reg<R8_TMR2_INT_FLAG_SPEC>`"]
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+pub type R8_TMR2_INT_FLAG = crate :: Reg < r8_tmr2_int_flag :: R8_TMR2_INT_FLAG_SPEC > ; # [doc = "TMR2 interrupt flag"]
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|
+pub mod r8_tmr2_int_flag { # [doc = "Register `R8_TMR2_INT_FLAG` reader"]
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+pub struct R (crate :: R < R8_TMR2_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_INT_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_TMR2_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_INT_FLAG` writer"]
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|
+pub struct W (crate :: W < R8_TMR2_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_INT_FLAG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_TMR2_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_IF_CYC_END` reader - interrupt flag for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IF_CYC_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_CYC_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_CYC_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_CYC_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_CYC_END` writer - interrupt flag for timer capture count timeout or PWM cycle end"]
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+pub struct RB_TMR_IF_CYC_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_CYC_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_IF_DATA_ACT` reader - interrupt flag for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IF_DATA_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DATA_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DATA_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DATA_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DATA_ACT` writer - interrupt flag for timer capture input action or PWM trigger"]
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+pub struct RB_TMR_IF_DATA_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DATA_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_HF` reader - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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|
|
+pub struct RB_TMR_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_HF` writer - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
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|
|
+pub struct RB_TMR_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_TMR_IF_DMA_END` reader - interrupt flag for timer1_2 DMA completion"]
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|
|
+pub struct RB_TMR_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_DMA_END` writer - interrupt flag for timer1_2 DMA completion"]
|
|
|
+pub struct RB_TMR_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_TMR_IF_FIFO_OV` reader - interrupt flag for timer FIFO overflow"]
|
|
|
+pub struct RB_TMR_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_IF_FIFO_OV` writer - interrupt flag for timer FIFO overflow"]
|
|
|
+pub struct RB_TMR_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_cyc_end (& self) -> RB_TMR_IF_CYC_END_R { RB_TMR_IF_CYC_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_data_act (& self) -> RB_TMR_IF_DATA_ACT_R { RB_TMR_IF_DATA_ACT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_hf (& self) -> RB_TMR_IF_FIFO_HF_R { RB_TMR_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_dma_end (& self) -> RB_TMR_IF_DMA_END_R { RB_TMR_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& self) -> RB_TMR_IF_FIFO_OV_R { RB_TMR_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for timer capture count timeout or PWM cycle end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_cyc_end (& mut self) -> RB_TMR_IF_CYC_END_W { RB_TMR_IF_CYC_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for timer capture input action or PWM trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_data_act (& mut self) -> RB_TMR_IF_DATA_ACT_W { RB_TMR_IF_DATA_ACT_W { w : self } } # [doc = "Bit 2 - interrupt flag for timer FIFO half (capture fifo >=4 or PWM fifo lower than 3)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_hf (& mut self) -> RB_TMR_IF_FIFO_HF_W { RB_TMR_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for timer1_2 DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_dma_end (& mut self) -> RB_TMR_IF_DMA_END_W { RB_TMR_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for timer FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_if_fifo_ov (& mut self) -> RB_TMR_IF_FIFO_OV_W { RB_TMR_IF_FIFO_OV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_int_flag](index.html) module"]
|
|
|
+pub struct R8_TMR2_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_TMR2_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_int_flag::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR2_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_int_flag::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_TMR2_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_INT_FLAG to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR2_INT_FLAG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_FIFO_COUNT register accessor: an alias for `Reg<R8_TMR2_FIFO_COUNT_SPEC>`"]
|
|
|
+pub type R8_TMR2_FIFO_COUNT = crate :: Reg < r8_tmr2_fifo_count :: R8_TMR2_FIFO_COUNT_SPEC > ; # [doc = "TMR2 FIFO count status"]
|
|
|
+pub mod r8_tmr2_fifo_count { # [doc = "Register `R8_TMR2_FIFO_COUNT` reader"]
|
|
|
+pub struct R (crate :: R < R8_TMR2_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_FIFO_COUNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_FIFO_COUNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_TMR2_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_TMR2_FIFO_COUNT` reader - TMR FIFO count status"]
|
|
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+pub struct R8_TMR2_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_TMR2_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_TMR2_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_TMR2_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - TMR FIFO count status"]
|
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+# [inline (always)]
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+pub fn r8_tmr2_fifo_count (& self) -> R8_TMR2_FIFO_COUNT_R { R8_TMR2_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } # [doc = "TMR2 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_fifo_count](index.html) module"]
|
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+pub struct R8_TMR2_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_TMR2_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_fifo_count::R](R) reader structure"]
|
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+impl crate :: Readable for R8_TMR2_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_TMR2_FIFO_COUNT to value 0"]
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+impl crate :: Resettable for R8_TMR2_FIFO_COUNT_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_COUNT register accessor: an alias for `Reg<R32_TMR2_COUNT_SPEC>`"]
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+pub type R32_TMR2_COUNT = crate :: Reg < r32_tmr2_count :: R32_TMR2_COUNT_SPEC > ; # [doc = "TMR2 current count"]
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+pub mod r32_tmr2_count { # [doc = "Register `R32_TMR2_COUNT` reader"]
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|
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+pub struct R (crate :: R < R32_TMR2_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_COUNT_SPEC > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_COUNT_SPEC >> for R { # [inline (always)]
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|
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+fn from (reader : crate :: R < R32_TMR2_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_TMR2_COUNT` reader - TMR current count"]
|
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+pub struct R32_TMR2_COUNT_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_COUNT_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_COUNT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
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+# [inline (always)]
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+pub fn r32_tmr2_count (& self) -> R32_TMR2_COUNT_R { R32_TMR2_COUNT_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "TMR2 current count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_count](index.html) module"]
|
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+pub struct R32_TMR2_COUNT_SPEC ; impl crate :: RegisterSpec for R32_TMR2_COUNT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_count::R](R) reader structure"]
|
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+impl crate :: Readable for R32_TMR2_COUNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_TMR2_COUNT to value 0"]
|
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+impl crate :: Resettable for R32_TMR2_COUNT_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_CNT_END register accessor: an alias for `Reg<R32_TMR2_CNT_END_SPEC>`"]
|
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|
+pub type R32_TMR2_CNT_END = crate :: Reg < r32_tmr2_cnt_end :: R32_TMR2_CNT_END_SPEC > ; # [doc = "TMR2 end count value, only low 26 bit"]
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+pub mod r32_tmr2_cnt_end { # [doc = "Register `R32_TMR2_CNT_END` reader"]
|
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+pub struct R (crate :: R < R32_TMR2_CNT_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_CNT_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_CNT_END_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR2_CNT_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_CNT_END` writer"]
|
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+pub struct W (crate :: W < R32_TMR2_CNT_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_CNT_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_CNT_END_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_TMR2_CNT_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR2_CNT_END` reader - TMR current count"]
|
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+pub struct R32_TMR2_CNT_END_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_CNT_END_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_CNT_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR2_CNT_END` writer - TMR current count"]
|
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+pub struct R32_TMR2_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR2_CNT_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
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+pub fn r32_tmr2_cnt_end (& self) -> R32_TMR2_CNT_END_R { R32_TMR2_CNT_END_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr2_cnt_end (& mut self) -> R32_TMR2_CNT_END_W { R32_TMR2_CNT_END_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_cnt_end](index.html) module"]
|
|
|
+pub struct R32_TMR2_CNT_END_SPEC ; impl crate :: RegisterSpec for R32_TMR2_CNT_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_cnt_end::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR2_CNT_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_cnt_end::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_TMR2_CNT_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_CNT_END to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR2_CNT_END_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_FIFO register accessor: an alias for `Reg<R32_TMR2_FIFO_SPEC>`"]
|
|
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+pub type R32_TMR2_FIFO = crate :: Reg < r32_tmr2_fifo :: R32_TMR2_FIFO_SPEC > ; # [doc = "TMR2 end count value, only low 26 bit"]
|
|
|
+pub mod r32_tmr2_fifo { # [doc = "Register `R32_TMR2_FIFO` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR2_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_FIFO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_FIFO_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR2_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_FIFO` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR2_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_FIFO_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_FIFO_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R32_TMR2_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_TMR2_FIFO` reader - TMR current count"]
|
|
|
+pub struct R32_TMR2_FIFO_R (crate :: FieldReader < u32 , u32 >) ; impl R32_TMR2_FIFO_R { pub (crate) fn new (bits : u32) -> Self { R32_TMR2_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_TMR2_FIFO_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_TMR2_FIFO` writer - TMR current count"]
|
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|
+pub struct R32_TMR2_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R32_TMR2_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_tmr2_fifo (& self) -> R32_TMR2_FIFO_R { R32_TMR2_FIFO_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - TMR current count"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_tmr2_fifo (& mut self) -> R32_TMR2_FIFO_W { R32_TMR2_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 end count value, only low 26 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_fifo](index.html) module"]
|
|
|
+pub struct R32_TMR2_FIFO_SPEC ; impl crate :: RegisterSpec for R32_TMR2_FIFO_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_fifo::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_TMR2_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_fifo::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_TMR2_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_FIFO to value 0"]
|
|
|
+impl crate :: Resettable for R32_TMR2_FIFO_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_TMR2_CTRL_DMA register accessor: an alias for `Reg<R8_TMR2_CTRL_DMA_SPEC>`"]
|
|
|
+pub type R8_TMR2_CTRL_DMA = crate :: Reg < r8_tmr2_ctrl_dma :: R8_TMR2_CTRL_DMA_SPEC > ; # [doc = "TMR2 DMA control"]
|
|
|
+pub mod r8_tmr2_ctrl_dma { # [doc = "Register `R8_TMR2_CTRL_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R8_TMR2_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_TMR2_CTRL_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_TMR2_CTRL_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_TMR2_CTRL_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_TMR2_CTRL_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R8_TMR2_CTRL_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_TMR2_CTRL_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_TMR2_CTRL_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_TMR2_CTRL_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_TMR_DMA_ENABLE` reader - timer1_2 DMA enable"]
|
|
|
+pub struct RB_TMR_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_ENABLE` writer - timer1_2 DMA enable"]
|
|
|
+pub struct RB_TMR_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_TMR_DMA_LOOP` reader - timer1_2 DMA address loop enable"]
|
|
|
+pub struct RB_TMR_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_TMR_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_TMR_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_TMR_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_TMR_DMA_LOOP` writer - timer1_2 DMA address loop enable"]
|
|
|
+pub struct RB_TMR_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_TMR_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - timer1_2 DMA enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_dma_enable (& self) -> RB_TMR_DMA_ENABLE_R { RB_TMR_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - timer1_2 DMA address loop enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_dma_loop (& self) -> RB_TMR_DMA_LOOP_R { RB_TMR_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - timer1_2 DMA enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_dma_enable (& mut self) -> RB_TMR_DMA_ENABLE_W { RB_TMR_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - timer1_2 DMA address loop enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_tmr_dma_loop (& mut self) -> RB_TMR_DMA_LOOP_W { RB_TMR_DMA_LOOP_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_tmr2_ctrl_dma](index.html) module"]
|
|
|
+pub struct R8_TMR2_CTRL_DMA_SPEC ; impl crate :: RegisterSpec for R8_TMR2_CTRL_DMA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_tmr2_ctrl_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_TMR2_CTRL_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_tmr2_ctrl_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_TMR2_CTRL_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_TMR2_CTRL_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R8_TMR2_CTRL_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_NOW register accessor: an alias for `Reg<R32_TMR2_DMA_NOW_SPEC>`"]
|
|
|
+pub type R32_TMR2_DMA_NOW = crate :: Reg < r32_tmr2_dma_now :: R32_TMR2_DMA_NOW_SPEC > ; # [doc = "TMR2 DMA current address"]
|
|
|
+pub mod r32_tmr2_dma_now { # [doc = "Register `R32_TMR2_DMA_NOW` reader"]
|
|
|
+pub struct R (crate :: R < R32_TMR2_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_NOW_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_NOW_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_TMR2_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_NOW` writer"]
|
|
|
+pub struct W (crate :: W < R32_TMR2_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_NOW_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_NOW_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_TMR2_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_NOW` reader - TMR DMA current address"]
|
|
|
+pub struct R16_TMR2_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_NOW` writer - TMR DMA current address"]
|
|
|
+pub struct R16_TMR2_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR DMA current address"]
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+# [inline (always)]
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+pub fn r16_tmr2_dma_now (& self) -> R16_TMR2_DMA_NOW_R { R16_TMR2_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR DMA current address"]
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+# [inline (always)]
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+pub fn r16_tmr2_dma_now (& mut self) -> R16_TMR2_DMA_NOW_W { R16_TMR2_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_now](index.html) module"]
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+pub struct R32_TMR2_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_now::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR2_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_now::W](W) writer structure"]
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+impl crate :: Writable for R32_TMR2_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_NOW to value 0"]
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+impl crate :: Resettable for R32_TMR2_DMA_NOW_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_BEG register accessor: an alias for `Reg<R32_TMR2_DMA_BEG_SPEC>`"]
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+pub type R32_TMR2_DMA_BEG = crate :: Reg < r32_tmr2_dma_beg :: R32_TMR2_DMA_BEG_SPEC > ; # [doc = "TMR2 DMA begin address"]
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+pub mod r32_tmr2_dma_beg { # [doc = "Register `R32_TMR2_DMA_BEG` reader"]
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+pub struct R (crate :: R < R32_TMR2_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_BEG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR2_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_BEG` writer"]
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+pub struct W (crate :: W < R32_TMR2_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_BEG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_TMR2_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_BEG` reader - TMR2 DMA begin address"]
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+pub struct R16_TMR2_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_BEG` writer - TMR2 DMA begin address"]
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+pub struct R16_TMR2_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
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+# [inline (always)]
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+pub fn r16_tmr2_dma_beg (& self) -> R16_TMR2_DMA_BEG_R { R16_TMR2_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
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+# [inline (always)]
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+pub fn r16_tmr2_dma_beg (& mut self) -> R16_TMR2_DMA_BEG_W { R16_TMR2_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_beg](index.html) module"]
|
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+pub struct R32_TMR2_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_beg::R](R) reader structure"]
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+impl crate :: Readable for R32_TMR2_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_beg::W](W) writer structure"]
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+impl crate :: Writable for R32_TMR2_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_BEG to value 0"]
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+impl crate :: Resettable for R32_TMR2_DMA_BEG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_TMR2_DMA_END register accessor: an alias for `Reg<R32_TMR2_DMA_END_SPEC>`"]
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+pub type R32_TMR2_DMA_END = crate :: Reg < r32_tmr2_dma_end :: R32_TMR2_DMA_END_SPEC > ; # [doc = "TMR2 DMA end address"]
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+pub mod r32_tmr2_dma_end { # [doc = "Register `R32_TMR2_DMA_END` reader"]
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+pub struct R (crate :: R < R32_TMR2_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_TMR2_DMA_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_TMR2_DMA_END_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_TMR2_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_TMR2_DMA_END` writer"]
|
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+pub struct W (crate :: W < R32_TMR2_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_TMR2_DMA_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_TMR2_DMA_END_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_TMR2_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_TMR2_DMA_END` reader - TMR2 DMA begin address"]
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+pub struct R16_TMR2_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_TMR2_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_TMR2_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_TMR2_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_TMR2_DMA_END` writer - TMR2 DMA begin address"]
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+pub struct R16_TMR2_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_TMR2_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
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|
+# [inline (always)]
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+pub fn r16_tmr2_dma_end (& self) -> R16_TMR2_DMA_END_R { R16_TMR2_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - TMR2 DMA begin address"]
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+# [inline (always)]
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+pub fn r16_tmr2_dma_end (& mut self) -> R16_TMR2_DMA_END_W { R16_TMR2_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "TMR2 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_tmr2_dma_end](index.html) module"]
|
|
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+pub struct R32_TMR2_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_TMR2_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_tmr2_dma_end::R](R) reader structure"]
|
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+impl crate :: Readable for R32_TMR2_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_tmr2_dma_end::W](W) writer structure"]
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|
+impl crate :: Writable for R32_TMR2_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_TMR2_DMA_END to value 0"]
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|
+impl crate :: Resettable for R32_TMR2_DMA_END_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART0 register"]
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+pub struct UART0 { _marker : PhantomData < * const () > } unsafe impl Send for UART0 { } impl UART0 { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const uart0 :: RegisterBlock = 0x4000_3000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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|
+pub const fn ptr () -> * const uart0 :: RegisterBlock { Self :: PTR } } impl Deref for UART0 { type Target = uart0 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART0") . finish () } } # [doc = "UART0 register"]
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+pub mod uart0 { # [doc = r"Register block"]
|
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|
+# [repr (C)]
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|
+pub struct RegisterBlock { # [doc = "0x00 - UART0 modem control"]
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|
+pub r8_uart0_mcr : crate :: Reg < r8_uart0_mcr :: R8_UART0_MCR_SPEC > , # [doc = "0x01 - UART0 interrupt enable"]
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|
+pub r8_uart0_ier : crate :: Reg < r8_uart0_ier :: R8_UART0_IER_SPEC > , # [doc = "0x02 - UART0 FIFO control"]
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|
+pub r8_uart0_fcr : crate :: Reg < r8_uart0_fcr :: R8_UART0_FCR_SPEC > , # [doc = "0x03 - UART0 line control"]
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|
+pub r8_uart0_lcr : crate :: Reg < r8_uart0_lcr :: R8_UART0_LCR_SPEC > , # [doc = "0x04 - UART0 interrupt identification"]
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|
+pub r8_uart0_iir : crate :: Reg < r8_uart0_iir :: R8_UART0_IIR_SPEC > , # [doc = "0x05 - UART0 line status"]
|
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|
+pub r8_uart0_lsr : crate :: Reg < r8_uart0_lsr :: R8_UART0_LSR_SPEC > , # [doc = "0x06 - UART0 modem status"]
|
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|
+pub r8_uart0_msr : crate :: Reg < r8_uart0_msr :: R8_UART0_MSR_SPEC > , _reserved7 : [u8 ; 0x01]
|
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|
+, # [doc = "0x08 - UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte"]
|
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|
+pub r8_uart0_rbr_r8_uart0_thr : crate :: Reg < r8_uart0_rbr_r8_uart0_thr :: R8_UART0_RBR_R8_UART0_THR_SPEC > , _reserved8 : [u8 ; 0x01]
|
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|
+, # [doc = "0x0a - UART0 receiver FIFO count"]
|
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|
+pub r8_uart0_rfc : crate :: Reg < r8_uart0_rfc :: R8_UART0_RFC_SPEC > , # [doc = "0x0b - UART0 transmitter FIFO count"]
|
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|
+pub r8_uart0_tfc : crate :: Reg < r8_uart0_tfc :: R8_UART0_TFC_SPEC > , # [doc = "0x0c - UART0 divisor latch"]
|
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|
+pub r16_uart0_dl : crate :: Reg < r16_uart0_dl :: R16_UART0_DL_SPEC > , # [doc = "0x0e - UART0 pre-divisor latch byte"]
|
|
|
+pub r8_uart0_div : crate :: Reg < r8_uart0_div :: R8_UART0_DIV_SPEC > , # [doc = "0x0f - UART0 slave address"]
|
|
|
+pub r8_uart0_adr : crate :: Reg < r8_uart0_adr :: R8_UART0_ADR_SPEC > , } # [doc = "R8_UART0_MCR register accessor: an alias for `Reg<R8_UART0_MCR_SPEC>`"]
|
|
|
+pub type R8_UART0_MCR = crate :: Reg < r8_uart0_mcr :: R8_UART0_MCR_SPEC > ; # [doc = "UART0 modem control"]
|
|
|
+pub mod r8_uart0_mcr { # [doc = "Register `R8_UART0_MCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART0_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_MCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_MCR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART0_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_MCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART0_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_MCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_MCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART0_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_DTR` reader - UART0 control DTR"]
|
|
|
+pub struct RB_MCR_DTR_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_DTR_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_DTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_DTR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_DTR` writer - UART0 control DTR"]
|
|
|
+pub struct RB_MCR_DTR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_DTR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_MCR_RTS` reader - UART0 control RTS"]
|
|
|
+pub struct RB_MCR_RTS_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_RTS_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_RTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_RTS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_RTS` writer - UART0 control RTS"]
|
|
|
+pub struct RB_MCR_RTS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_RTS_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_MCR_OUT1` reader - UART0 control OUT1"]
|
|
|
+pub struct RB_MCR_OUT1_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT1_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT1_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT1` writer - UART0 control OUT1"]
|
|
|
+pub struct RB_MCR_OUT1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT1_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
|
|
|
+pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
|
|
|
+pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_MCR_LOOP` reader - UART0 enable local loop back"]
|
|
|
+pub struct RB_MCR_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_LOOP` writer - UART0 enable local loop back"]
|
|
|
+pub struct RB_MCR_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_MCR_AU_FLOW_EN` reader - UART0 enable autoflow control"]
|
|
|
+pub struct RB_MCR_AU_FLOW_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_AU_FLOW_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_AU_FLOW_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_AU_FLOW_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_AU_FLOW_EN` writer - UART0 enable autoflow control"]
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|
|
+pub struct RB_MCR_AU_FLOW_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_AU_FLOW_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_MCR_TNOW` reader - UART0 enable TNOW output on DTR pin"]
|
|
|
+pub struct RB_MCR_TNOW_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_TNOW_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_TNOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_TNOW_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_TNOW` writer - UART0 enable TNOW output on DTR pin"]
|
|
|
+pub struct RB_MCR_TNOW_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_TNOW_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_MCR_HALF` reader - UART0 enable half-duplex"]
|
|
|
+pub struct RB_MCR_HALF_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_HALF_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_HALF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_HALF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_HALF` writer - UART0 enable half-duplex"]
|
|
|
+pub struct RB_MCR_HALF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_HALF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART0 control DTR"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_dtr (& self) -> RB_MCR_DTR_R { RB_MCR_DTR_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART0 control RTS"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_rts (& self) -> RB_MCR_RTS_R { RB_MCR_RTS_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART0 control OUT1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out1 (& self) -> RB_MCR_OUT1_R { RB_MCR_OUT1_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART control OUT2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 enable local loop back"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_loop (& self) -> RB_MCR_LOOP_R { RB_MCR_LOOP_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 enable autoflow control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_au_flow_en (& self) -> RB_MCR_AU_FLOW_EN_R { RB_MCR_AU_FLOW_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART0 enable TNOW output on DTR pin"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_tnow (& self) -> RB_MCR_TNOW_R { RB_MCR_TNOW_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART0 enable half-duplex"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_half (& self) -> RB_MCR_HALF_R { RB_MCR_HALF_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART0 control DTR"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_dtr (& mut self) -> RB_MCR_DTR_W { RB_MCR_DTR_W { w : self } } # [doc = "Bit 1 - UART0 control RTS"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_rts (& mut self) -> RB_MCR_RTS_W { RB_MCR_RTS_W { w : self } } # [doc = "Bit 2 - UART0 control OUT1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out1 (& mut self) -> RB_MCR_OUT1_W { RB_MCR_OUT1_W { w : self } } # [doc = "Bit 3 - UART control OUT2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Bit 4 - UART0 enable local loop back"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_loop (& mut self) -> RB_MCR_LOOP_W { RB_MCR_LOOP_W { w : self } } # [doc = "Bit 5 - UART0 enable autoflow control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_au_flow_en (& mut self) -> RB_MCR_AU_FLOW_EN_W { RB_MCR_AU_FLOW_EN_W { w : self } } # [doc = "Bit 6 - UART0 enable TNOW output on DTR pin"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_tnow (& mut self) -> RB_MCR_TNOW_W { RB_MCR_TNOW_W { w : self } } # [doc = "Bit 7 - UART0 enable half-duplex"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_half (& mut self) -> RB_MCR_HALF_W { RB_MCR_HALF_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_mcr](index.html) module"]
|
|
|
+pub struct R8_UART0_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_mcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART0_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_mcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART0_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_MCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART0_MCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_IER register accessor: an alias for `Reg<R8_UART0_IER_SPEC>`"]
|
|
|
+pub type R8_UART0_IER = crate :: Reg < r8_uart0_ier :: R8_UART0_IER_SPEC > ; # [doc = "UART0 interrupt enable"]
|
|
|
+pub mod r8_uart0_ier { # [doc = "Register `R8_UART0_IER` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART0_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_IER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_IER_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART0_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_IER` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART0_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_IER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_IER_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART0_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
|
|
|
+pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
|
|
|
+pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
|
|
|
+pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
|
|
|
+pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
|
|
|
+pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
|
|
|
+pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_MODEM_CHG` reader - UART0 interrupt enable for modem status change"]
|
|
|
+pub struct RB_IER_MODEM_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_MODEM_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_MODEM_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_MODEM_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_MODEM_CHG` writer - UART0 interrupt enable for modem status change"]
|
|
|
+pub struct RB_IER_MODEM_CHG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_MODEM_CHG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_IER_DTR_EN` reader - UART0 DTR/TNOW output pin enable"]
|
|
|
+pub struct RB_IER_DTR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_DTR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_DTR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_DTR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_DTR_EN` writer - UART0 DTR/TNOW output pin enable"]
|
|
|
+pub struct RB_IER_DTR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_DTR_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_IER_RTS_EN` reader - UART0 RTS output pin enable"]
|
|
|
+pub struct RB_IER_RTS_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RTS_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RTS_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RTS_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RTS_EN` writer - UART0 RTS output pin enable"]
|
|
|
+pub struct RB_IER_RTS_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RTS_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
|
|
|
+pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
|
|
|
+pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
|
|
|
+pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
|
|
|
+pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
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+# [inline (always)]
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+pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
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+# [inline (always)]
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+pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART0 interrupt enable for modem status change"]
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+# [inline (always)]
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+pub fn rb_ier_modem_chg (& self) -> RB_IER_MODEM_CHG_R { RB_IER_MODEM_CHG_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 DTR/TNOW output pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_dtr_en (& self) -> RB_IER_DTR_EN_R { RB_IER_DTR_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 RTS output pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_rts_en (& self) -> RB_IER_RTS_EN_R { RB_IER_RTS_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
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+# [inline (always)]
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+pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
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+# [inline (always)]
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+pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
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+# [inline (always)]
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+pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 3 - UART0 interrupt enable for modem status change"]
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+# [inline (always)]
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+pub fn rb_ier_modem_chg (& mut self) -> RB_IER_MODEM_CHG_W { RB_IER_MODEM_CHG_W { w : self } } # [doc = "Bit 4 - UART0 DTR/TNOW output pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_dtr_en (& mut self) -> RB_IER_DTR_EN_W { RB_IER_DTR_EN_W { w : self } } # [doc = "Bit 5 - UART0 RTS output pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_rts_en (& mut self) -> RB_IER_RTS_EN_W { RB_IER_RTS_EN_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_ier](index.html) module"]
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+pub struct R8_UART0_IER_SPEC ; impl crate :: RegisterSpec for R8_UART0_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_ier::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_ier::W](W) writer structure"]
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+impl crate :: Writable for R8_UART0_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_IER to value 0"]
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+impl crate :: Resettable for R8_UART0_IER_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_FCR register accessor: an alias for `Reg<R8_UART0_FCR_SPEC>`"]
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+pub type R8_UART0_FCR = crate :: Reg < r8_uart0_fcr :: R8_UART0_FCR_SPEC > ; # [doc = "UART0 FIFO control"]
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+pub mod r8_uart0_fcr { # [doc = "Register `R8_UART0_FCR` reader"]
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+pub struct R (crate :: R < R8_UART0_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_FCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_FCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART0_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_FCR` writer"]
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+pub struct W (crate :: W < R8_UART0_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_FCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_FCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART0_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
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+pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
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+pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
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+pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
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+pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
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|
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+pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
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|
+pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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|
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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|
|
+# [inline (always)]
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+pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
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|
|
+# [inline (always)]
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|
+pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
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|
|
+# [inline (always)]
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+pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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|
|
+# [inline (always)]
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|
+pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_fcr](index.html) module"]
|
|
|
+pub struct R8_UART0_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_fcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART0_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_fcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART0_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_FCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART0_FCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_LCR register accessor: an alias for `Reg<R8_UART0_LCR_SPEC>`"]
|
|
|
+pub type R8_UART0_LCR = crate :: Reg < r8_uart0_lcr :: R8_UART0_LCR_SPEC > ; # [doc = "UART0 line control"]
|
|
|
+pub mod r8_uart0_lcr { # [doc = "Register `R8_UART0_LCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART0_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_LCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_LCR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART0_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_LCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART0_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_LCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_LCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART0_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
|
|
|
+pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
|
|
|
+pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
|
|
|
+pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
|
|
|
+pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
|
|
|
+pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
|
|
|
+pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
|
|
|
+pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
|
|
|
+pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
|
|
|
+pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
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+pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _UART general purpose bit"]
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+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _UART general purpose bit"]
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|
+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _UART general purpose bit"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _UART general purpose bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_lcr](index.html) module"]
|
|
|
+pub struct R8_UART0_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART0_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_lcr::R](R) reader structure"]
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|
+impl crate :: Readable for R8_UART0_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_lcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART0_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_LCR to value 0"]
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|
|
+impl crate :: Resettable for R8_UART0_LCR_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_IIR register accessor: an alias for `Reg<R8_UART0_IIR_SPEC>`"]
|
|
|
+pub type R8_UART0_IIR = crate :: Reg < r8_uart0_iir :: R8_UART0_IIR_SPEC > ; # [doc = "UART0 interrupt identification"]
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|
|
+pub mod r8_uart0_iir { # [doc = "Register `R8_UART0_IIR` reader"]
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|
|
+pub struct R (crate :: R < R8_UART0_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_IIR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_IIR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART0_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
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|
|
+pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
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|
|
+pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
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|
|
+pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART0 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_iir](index.html) module"]
|
|
|
+pub struct R8_UART0_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART0_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_iir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART0_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_IIR to value 0x01"]
|
|
|
+impl crate :: Resettable for R8_UART0_IIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART0_LSR register accessor: an alias for `Reg<R8_UART0_LSR_SPEC>`"]
|
|
|
+pub type R8_UART0_LSR = crate :: Reg < r8_uart0_lsr :: R8_UART0_LSR_SPEC > ; # [doc = "UART0 line status"]
|
|
|
+pub mod r8_uart0_lsr { # [doc = "Register `R8_UART0_LSR` reader"]
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|
+pub struct R (crate :: R < R8_UART0_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_LSR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_LSR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART0_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
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|
|
+pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
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|
|
+pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
|
|
|
+pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
|
|
|
+pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
|
|
|
+pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
|
|
|
+pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
|
|
|
+pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
|
|
|
+pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART0 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_lsr](index.html) module"]
|
|
|
+pub struct R8_UART0_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART0_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_lsr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART0_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_LSR to value 0xc0"]
|
|
|
+impl crate :: Resettable for R8_UART0_LSR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART0_MSR register accessor: an alias for `Reg<R8_UART0_MSR_SPEC>`"]
|
|
|
+pub type R8_UART0_MSR = crate :: Reg < r8_uart0_msr :: R8_UART0_MSR_SPEC > ; # [doc = "UART0 modem status"]
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|
|
+pub mod r8_uart0_msr { # [doc = "Register `R8_UART0_MSR` reader"]
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|
|
+pub struct R (crate :: R < R8_UART0_MSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_MSR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_MSR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART0_MSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_MSR_CTS_CHG` reader - UART0 CTS changed status, high action"]
|
|
|
+pub struct RB_MSR_CTS_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_CTS_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_CTS_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_CTS_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DSR_CHG` reader - UART0 DSR changed status, high action"]
|
|
|
+pub struct RB_MSR_DSR_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DSR_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DSR_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DSR_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_RI_CHG` reader - UART0 RI changed status, high action"]
|
|
|
+pub struct RB_MSR_RI_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_RI_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_RI_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_RI_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DCD_CHG` reader - UART0 DCD changed status, high action"]
|
|
|
+pub struct RB_MSR_DCD_CHG_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DCD_CHG_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DCD_CHG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DCD_CHG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_CTS` reader - UART0 CTS action status"]
|
|
|
+pub struct RB_MSR_CTS_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_CTS_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_CTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_CTS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DSR` reader - UART0 DSR action status"]
|
|
|
+pub struct RB_MSR_DSR_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DSR_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DSR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_RI` reader - UART0 RI action status"]
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+pub struct RB_MSR_RI_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_RI_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_RI_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_RI_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MSR_DCD` reader - UART0 DCD action status"]
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+pub struct RB_MSR_DCD_R (crate :: FieldReader < bool , bool >) ; impl RB_MSR_DCD_R { pub (crate) fn new (bits : bool) -> Self { RB_MSR_DCD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MSR_DCD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART0 CTS changed status, high action"]
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+# [inline (always)]
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+pub fn rb_msr_cts_chg (& self) -> RB_MSR_CTS_CHG_R { RB_MSR_CTS_CHG_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART0 DSR changed status, high action"]
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+# [inline (always)]
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+pub fn rb_msr_dsr_chg (& self) -> RB_MSR_DSR_CHG_R { RB_MSR_DSR_CHG_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART0 RI changed status, high action"]
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+# [inline (always)]
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+pub fn rb_msr_ri_chg (& self) -> RB_MSR_RI_CHG_R { RB_MSR_RI_CHG_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART0 DCD changed status, high action"]
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+# [inline (always)]
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+pub fn rb_msr_dcd_chg (& self) -> RB_MSR_DCD_CHG_R { RB_MSR_DCD_CHG_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART0 CTS action status"]
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+# [inline (always)]
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+pub fn rb_msr_cts (& self) -> RB_MSR_CTS_R { RB_MSR_CTS_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART0 DSR action status"]
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+# [inline (always)]
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+pub fn rb_msr_dsr (& self) -> RB_MSR_DSR_R { RB_MSR_DSR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART0 RI action status"]
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+# [inline (always)]
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+pub fn rb_msr_ri (& self) -> RB_MSR_RI_R { RB_MSR_RI_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART0 DCD action status"]
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+# [inline (always)]
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+pub fn rb_msr_dcd (& self) -> RB_MSR_DCD_R { RB_MSR_DCD_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART0 modem status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_msr](index.html) module"]
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+pub struct R8_UART0_MSR_SPEC ; impl crate :: RegisterSpec for R8_UART0_MSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_msr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_MSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_MSR to value 0"]
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+impl crate :: Resettable for R8_UART0_MSR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_RBR_R8_UART0_THR register accessor: an alias for `Reg<R8_UART0_RBR_R8_UART0_THR_SPEC>`"]
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+pub type R8_UART0_RBR_R8_UART0_THR = crate :: Reg < r8_uart0_rbr_r8_uart0_thr :: R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [doc = "UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte"]
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+pub mod r8_uart0_rbr_r8_uart0_thr { # [doc = "Register `R8_UART0_RBR_R8_UART0_THR` reader"]
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+pub struct R (crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART0_RBR_R8_UART0_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_RBR_R8_UART0_THR` writer"]
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+pub struct W (crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART0_RBR_R8_UART0_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_RBR_R8_UART0_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART0_RBR_R8_UART0_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_RBR_R8_UART0_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_RBR_R8_UART0_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_RBR_R8_UART0_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_RBR_R8_UART0_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART0_RBR_R8_UART0_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_RBR_R8_UART0_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart0_rbr_r8_uart0_thr (& self) -> R8_UART0_RBR_R8_UART0_THR_R { R8_UART0_RBR_R8_UART0_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart0_rbr_r8_uart0_thr (& mut self) -> R8_UART0_RBR_R8_UART0_THR_W { R8_UART0_RBR_R8_UART0_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 receiver buffer, receiving byte _ UART0 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_rbr_r8_uart0_thr](index.html) module"]
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+pub struct R8_UART0_RBR_R8_UART0_THR_SPEC ; impl crate :: RegisterSpec for R8_UART0_RBR_R8_UART0_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_rbr_r8_uart0_thr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_RBR_R8_UART0_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_rbr_r8_uart0_thr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART0_RBR_R8_UART0_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_RBR_R8_UART0_THR to value 0"]
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+impl crate :: Resettable for R8_UART0_RBR_R8_UART0_THR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_RFC register accessor: an alias for `Reg<R8_UART0_RFC_SPEC>`"]
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+pub type R8_UART0_RFC = crate :: Reg < r8_uart0_rfc :: R8_UART0_RFC_SPEC > ; # [doc = "UART0 receiver FIFO count"]
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+pub mod r8_uart0_rfc { # [doc = "Register `R8_UART0_RFC` reader"]
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+pub struct R (crate :: R < R8_UART0_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_RFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_RFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART0_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART_RFC` reader - UART receiver FIFO count"]
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+pub struct R8_UART_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart_rfc (& self) -> R8_UART_RFC_R { R8_UART_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART0 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_rfc](index.html) module"]
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+pub struct R8_UART0_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART0_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_rfc::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_RFC to value 0"]
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+impl crate :: Resettable for R8_UART0_RFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_TFC register accessor: an alias for `Reg<R8_UART0_TFC_SPEC>`"]
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+pub type R8_UART0_TFC = crate :: Reg < r8_uart0_tfc :: R8_UART0_TFC_SPEC > ; # [doc = "UART0 transmitter FIFO count"]
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+pub mod r8_uart0_tfc { # [doc = "Register `R8_UART0_TFC` reader"]
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+pub struct R (crate :: R < R8_UART0_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_TFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_TFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART0_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART0_TFC` reader - UART transmitter FIFO count"]
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+pub struct R8_UART0_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart0_tfc (& self) -> R8_UART0_TFC_R { R8_UART0_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART0 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_tfc](index.html) module"]
|
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+pub struct R8_UART0_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART0_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_tfc::R](R) reader structure"]
|
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+impl crate :: Readable for R8_UART0_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART0_TFC to value 0"]
|
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|
+impl crate :: Resettable for R8_UART0_TFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART0_DL register accessor: an alias for `Reg<R16_UART0_DL_SPEC>`"]
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+pub type R16_UART0_DL = crate :: Reg < r16_uart0_dl :: R16_UART0_DL_SPEC > ; # [doc = "UART0 divisor latch"]
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+pub mod r16_uart0_dl { # [doc = "Register `R16_UART0_DL` reader"]
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+pub struct R (crate :: R < R16_UART0_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART0_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART0_DL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UART0_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART0_DL` writer"]
|
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+pub struct W (crate :: W < R16_UART0_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART0_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART0_DL_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R16_UART0_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART0_DL` reader - UART divisor latch"]
|
|
|
+pub struct R16_UART0_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART0_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART0_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART0_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART0_DL` writer - UART divisor latch"]
|
|
|
+pub struct R16_UART0_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART0_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
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|
|
+# [inline (always)]
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+pub fn r16_uart0_dl (& self) -> R16_UART0_DL_R { R16_UART0_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
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|
|
+# [inline (always)]
|
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|
+pub fn r16_uart0_dl (& mut self) -> R16_UART0_DL_W { R16_UART0_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart0_dl](index.html) module"]
|
|
|
+pub struct R16_UART0_DL_SPEC ; impl crate :: RegisterSpec for R16_UART0_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart0_dl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UART0_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart0_dl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UART0_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART0_DL to value 0"]
|
|
|
+impl crate :: Resettable for R16_UART0_DL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_DIV register accessor: an alias for `Reg<R8_UART0_DIV_SPEC>`"]
|
|
|
+pub type R8_UART0_DIV = crate :: Reg < r8_uart0_div :: R8_UART0_DIV_SPEC > ; # [doc = "UART0 pre-divisor latch byte"]
|
|
|
+pub mod r8_uart0_div { # [doc = "Register `R8_UART0_DIV` reader"]
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|
|
+pub struct R (crate :: R < R8_UART0_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_DIV_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_DIV_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART0_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_DIV` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART0_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_DIV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_DIV_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART0_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_ADR` reader - UART pre-divisor latch byte"]
|
|
|
+pub struct R8_UART0_ADR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_ADR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_ADR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_ADR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_ADR` writer - UART pre-divisor latch byte"]
|
|
|
+pub struct R8_UART0_ADR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_ADR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_uart0_adr (& self) -> R8_UART0_ADR_R { R8_UART0_ADR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r8_uart0_adr (& mut self) -> R8_UART0_ADR_W { R8_UART0_ADR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_div](index.html) module"]
|
|
|
+pub struct R8_UART0_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART0_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_div::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_div::W](W) writer structure"]
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+impl crate :: Writable for R8_UART0_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_DIV to value 0"]
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+impl crate :: Resettable for R8_UART0_DIV_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART0_ADR register accessor: an alias for `Reg<R8_UART0_ADR_SPEC>`"]
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+pub type R8_UART0_ADR = crate :: Reg < r8_uart0_adr :: R8_UART0_ADR_SPEC > ; # [doc = "UART0 slave address"]
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+pub mod r8_uart0_adr { # [doc = "Register `R8_UART0_ADR` reader"]
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+pub struct R (crate :: R < R8_UART0_ADR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART0_ADR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART0_ADR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART0_ADR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART0_ADR` writer"]
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+pub struct W (crate :: W < R8_UART0_ADR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART0_ADR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART0_ADR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART0_ADR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART0_ADR` reader - UART0 slave address"]
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+pub struct R8_UART0_ADR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART0_ADR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART0_ADR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART0_ADR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART0_ADR` writer - UART0 slave address"]
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+pub struct R8_UART0_ADR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART0_ADR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART0 slave address"]
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+# [inline (always)]
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+pub fn r8_uart0_adr (& self) -> R8_UART0_ADR_R { R8_UART0_ADR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART0 slave address"]
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+# [inline (always)]
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+pub fn r8_uart0_adr (& mut self) -> R8_UART0_ADR_W { R8_UART0_ADR_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART0 slave address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart0_adr](index.html) module"]
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+pub struct R8_UART0_ADR_SPEC ; impl crate :: RegisterSpec for R8_UART0_ADR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart0_adr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART0_ADR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart0_adr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART0_ADR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART0_ADR to value 0xff"]
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+impl crate :: Resettable for R8_UART0_ADR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0xff } } } } # [doc = "UART1 register"]
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+pub struct UART1 { _marker : PhantomData < * const () > } unsafe impl Send for UART1 { } impl UART1 { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const uart1 :: RegisterBlock = 0x4000_3400 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const uart1 :: RegisterBlock { Self :: PTR } } impl Deref for UART1 { type Target = uart1 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART1") . finish () } } # [doc = "UART1 register"]
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+pub mod uart1 { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - UART1 modem control"]
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+pub r8_uart1_mcr : crate :: Reg < r8_uart1_mcr :: R8_UART1_MCR_SPEC > , # [doc = "0x01 - UART1 interrupt enable"]
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+pub r8_uart1_ier : crate :: Reg < r8_uart1_ier :: R8_UART1_IER_SPEC > , # [doc = "0x02 - UART1 FIFO control"]
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+pub r8_uart1_fcr : crate :: Reg < r8_uart1_fcr :: R8_UART1_FCR_SPEC > , # [doc = "0x03 - UART1 line control"]
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+pub r8_uart1_lcr : crate :: Reg < r8_uart1_lcr :: R8_UART1_LCR_SPEC > , # [doc = "0x04 - UART1 interrupt identification"]
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+pub r8_uart1_iir : crate :: Reg < r8_uart1_iir :: R8_UART1_IIR_SPEC > , # [doc = "0x05 - UART1 line status"]
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|
+pub r8_uart1_lsr : crate :: Reg < r8_uart1_lsr :: R8_UART1_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
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+, # [doc = "0x08 - UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte"]
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+pub r8_uart1_rbr_r8_uart1_thr : crate :: Reg < r8_uart1_rbr_r8_uart1_thr :: R8_UART1_RBR_R8_UART1_THR_SPEC > , _reserved7 : [u8 ; 0x01]
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+, # [doc = "0x0a - UART1 receiver FIFO count"]
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+pub r8_uart1_rfc : crate :: Reg < r8_uart1_rfc :: R8_UART1_RFC_SPEC > , # [doc = "0x0b - UART1 transmitter FIFO count"]
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+pub r8_uart1_tfc : crate :: Reg < r8_uart1_tfc :: R8_UART1_TFC_SPEC > , # [doc = "0x0c - UART1 divisor latch"]
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|
+pub r16_uart1_dl : crate :: Reg < r16_uart1_dl :: R16_UART1_DL_SPEC > , # [doc = "0x0e - UART1 pre-divisor latch byte"]
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+pub r8_uart1_div : crate :: Reg < r8_uart1_div :: R8_UART1_DIV_SPEC > , } # [doc = "R8_UART1_MCR register accessor: an alias for `Reg<R8_UART1_MCR_SPEC>`"]
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|
+pub type R8_UART1_MCR = crate :: Reg < r8_uart1_mcr :: R8_UART1_MCR_SPEC > ; # [doc = "UART1 modem control"]
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|
+pub mod r8_uart1_mcr { # [doc = "Register `R8_UART1_MCR` reader"]
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|
|
+pub struct R (crate :: R < R8_UART1_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_MCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_MCR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART1_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_MCR` writer"]
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|
|
+pub struct W (crate :: W < R8_UART1_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_MCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_MCR_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_UART1_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART1 control OUT2"]
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|
+pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART1 control OUT2"]
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|
|
+pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART1 control OUT2"]
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|
+# [inline (always)]
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|
+pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART1 control OUT2"]
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|
|
+# [inline (always)]
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|
+pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_mcr](index.html) module"]
|
|
|
+pub struct R8_UART1_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_mcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART1_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_mcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART1_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_MCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART1_MCR_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_IER register accessor: an alias for `Reg<R8_UART1_IER_SPEC>`"]
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|
|
+pub type R8_UART1_IER = crate :: Reg < r8_uart1_ier :: R8_UART1_IER_SPEC > ; # [doc = "UART1 interrupt enable"]
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|
+pub mod r8_uart1_ier { # [doc = "Register `R8_UART1_IER` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART1_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_IER_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_IER_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART1_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_IER` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART1_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_IER_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_IER_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_UART1_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
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|
|
+pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
|
|
|
+pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
|
|
|
+pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
|
|
|
+pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
|
|
|
+pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
|
|
|
+pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
|
|
|
+pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
|
|
|
+pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
|
|
|
+pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
|
|
|
+pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
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+# [inline (always)]
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+pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
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+# [inline (always)]
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+pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
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+# [inline (always)]
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+pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_ier](index.html) module"]
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+pub struct R8_UART1_IER_SPEC ; impl crate :: RegisterSpec for R8_UART1_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_ier::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_ier::W](W) writer structure"]
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+impl crate :: Writable for R8_UART1_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_IER to value 0"]
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+impl crate :: Resettable for R8_UART1_IER_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_FCR register accessor: an alias for `Reg<R8_UART1_FCR_SPEC>`"]
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+pub type R8_UART1_FCR = crate :: Reg < r8_uart1_fcr :: R8_UART1_FCR_SPEC > ; # [doc = "UART1 FIFO control"]
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+pub mod r8_uart1_fcr { # [doc = "Register `R8_UART1_FCR` reader"]
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+pub struct R (crate :: R < R8_UART1_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_FCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_FCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_FCR` writer"]
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+pub struct W (crate :: W < R8_UART1_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_FCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_FCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART1_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
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+pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
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+pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
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+pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
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+pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
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+pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
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+pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
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|
+# [inline (always)]
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+pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_fcr](index.html) module"]
|
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+pub struct R8_UART1_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_fcr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_fcr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART1_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_FCR to value 0"]
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+impl crate :: Resettable for R8_UART1_FCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_LCR register accessor: an alias for `Reg<R8_UART1_LCR_SPEC>`"]
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+pub type R8_UART1_LCR = crate :: Reg < r8_uart1_lcr :: R8_UART1_LCR_SPEC > ; # [doc = "UART1 line control"]
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+pub mod r8_uart1_lcr { # [doc = "Register `R8_UART1_LCR` reader"]
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+pub struct R (crate :: R < R8_UART1_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_LCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_LCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_LCR` writer"]
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+pub struct W (crate :: W < R8_UART1_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_LCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_LCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART1_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
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+pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
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+pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
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|
+pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
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|
+pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
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+pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
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|
+pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
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|
+pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
|
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|
+pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
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|
|
+pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
|
|
|
+pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _ UART general purpose bit"]
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|
|
+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _ UART general purpose bit"]
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|
|
+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
|
|
|
+# [inline (always)]
|
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|
+pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
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+# [inline (always)]
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+pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
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+# [inline (always)]
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+pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
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+# [inline (always)]
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+pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
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+# [inline (always)]
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+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
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+# [inline (always)]
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+pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
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+# [inline (always)]
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+pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
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+# [inline (always)]
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+pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
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+# [inline (always)]
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+pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
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+# [inline (always)]
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+pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
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+# [inline (always)]
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+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_lcr](index.html) module"]
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+pub struct R8_UART1_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART1_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_lcr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_lcr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART1_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_LCR to value 0"]
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+impl crate :: Resettable for R8_UART1_LCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_IIR register accessor: an alias for `Reg<R8_UART1_IIR_SPEC>`"]
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+pub type R8_UART1_IIR = crate :: Reg < r8_uart1_iir :: R8_UART1_IIR_SPEC > ; # [doc = "UART1 interrupt identification"]
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+pub mod r8_uart1_iir { # [doc = "Register `R8_UART1_IIR` reader"]
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+pub struct R (crate :: R < R8_UART1_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_IIR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_IIR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
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+pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
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+pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
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+pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
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+# [inline (always)]
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+pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
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+# [inline (always)]
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+pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
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+# [inline (always)]
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+pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART1 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_iir](index.html) module"]
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+pub struct R8_UART1_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART1_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_iir::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_IIR to value 0x01"]
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+impl crate :: Resettable for R8_UART1_IIR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART1_LSR register accessor: an alias for `Reg<R8_UART1_LSR_SPEC>`"]
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+pub type R8_UART1_LSR = crate :: Reg < r8_uart1_lsr :: R8_UART1_LSR_SPEC > ; # [doc = "UART1 line status"]
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+pub mod r8_uart1_lsr { # [doc = "Register `R8_UART1_LSR` reader"]
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+pub struct R (crate :: R < R8_UART1_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_LSR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_LSR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
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+pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
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+pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
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+pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
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+pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
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+pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
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+pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
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+pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
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+pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
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+# [inline (always)]
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+pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
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+# [inline (always)]
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+pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
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+# [inline (always)]
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+pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
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+# [inline (always)]
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+pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
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+# [inline (always)]
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+pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
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+# [inline (always)]
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+pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
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+# [inline (always)]
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+pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
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+# [inline (always)]
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+pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART1 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_lsr](index.html) module"]
|
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+pub struct R8_UART1_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART1_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_lsr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_LSR to value 0xc0"]
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+impl crate :: Resettable for R8_UART1_LSR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART1_RBR_R8_UART1_THR register accessor: an alias for `Reg<R8_UART1_RBR_R8_UART1_THR_SPEC>`"]
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+pub type R8_UART1_RBR_R8_UART1_THR = crate :: Reg < r8_uart1_rbr_r8_uart1_thr :: R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [doc = "UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte"]
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+pub mod r8_uart1_rbr_r8_uart1_thr { # [doc = "Register `R8_UART1_RBR_R8_UART1_THR` reader"]
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+pub struct R (crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART1_RBR_R8_UART1_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_RBR_R8_UART1_THR` writer"]
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+pub struct W (crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART1_RBR_R8_UART1_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART1_RBR_R8_UART1_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART1_RBR_R8_UART1_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_RBR_R8_UART1_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_RBR_R8_UART1_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_RBR_R8_UART1_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART1_RBR_R8_UART1_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART1_RBR_R8_UART1_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART1_RBR_R8_UART1_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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|
+# [inline (always)]
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+pub fn r8_uart1_rbr_r8_uart1_thr (& self) -> R8_UART1_RBR_R8_UART1_THR_R { R8_UART1_RBR_R8_UART1_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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|
+# [inline (always)]
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|
+pub fn r8_uart1_rbr_r8_uart1_thr (& mut self) -> R8_UART1_RBR_R8_UART1_THR_W { R8_UART1_RBR_R8_UART1_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 receiver buffer, receiving byte _ UART1 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_rbr_r8_uart1_thr](index.html) module"]
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|
+pub struct R8_UART1_RBR_R8_UART1_THR_SPEC ; impl crate :: RegisterSpec for R8_UART1_RBR_R8_UART1_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_rbr_r8_uart1_thr::R](R) reader structure"]
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|
+impl crate :: Readable for R8_UART1_RBR_R8_UART1_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_rbr_r8_uart1_thr::W](W) writer structure"]
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|
+impl crate :: Writable for R8_UART1_RBR_R8_UART1_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_RBR_R8_UART1_THR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART1_RBR_R8_UART1_THR_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_RFC register accessor: an alias for `Reg<R8_UART1_RFC_SPEC>`"]
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|
|
+pub type R8_UART1_RFC = crate :: Reg < r8_uart1_rfc :: R8_UART1_RFC_SPEC > ; # [doc = "UART1 receiver FIFO count"]
|
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|
+pub mod r8_uart1_rfc { # [doc = "Register `R8_UART1_RFC` reader"]
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|
|
+pub struct R (crate :: R < R8_UART1_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_RFC_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_RFC_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART1_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART1_RFC` reader - UART receiver FIFO count"]
|
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|
+pub struct R8_UART1_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart1_rfc (& self) -> R8_UART1_RFC_R { R8_UART1_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART1 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_rfc](index.html) module"]
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+pub struct R8_UART1_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART1_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_rfc::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_RFC to value 0"]
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+impl crate :: Resettable for R8_UART1_RFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_TFC register accessor: an alias for `Reg<R8_UART1_TFC_SPEC>`"]
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+pub type R8_UART1_TFC = crate :: Reg < r8_uart1_tfc :: R8_UART1_TFC_SPEC > ; # [doc = "UART1 transmitter FIFO count"]
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+pub mod r8_uart1_tfc { # [doc = "Register `R8_UART1_TFC` reader"]
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+pub struct R (crate :: R < R8_UART1_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_TFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_TFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART1_TFC` reader - UART transmitter FIFO count"]
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+pub struct R8_UART1_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart1_tfc (& self) -> R8_UART1_TFC_R { R8_UART1_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART1 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_tfc](index.html) module"]
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+pub struct R8_UART1_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART1_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_tfc::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART1_TFC to value 0"]
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+impl crate :: Resettable for R8_UART1_TFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART1_DL register accessor: an alias for `Reg<R16_UART1_DL_SPEC>`"]
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+pub type R16_UART1_DL = crate :: Reg < r16_uart1_dl :: R16_UART1_DL_SPEC > ; # [doc = "UART1 divisor latch"]
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+pub mod r16_uart1_dl { # [doc = "Register `R16_UART1_DL` reader"]
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+pub struct R (crate :: R < R16_UART1_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART1_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART1_DL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UART1_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART1_DL` writer"]
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+pub struct W (crate :: W < R16_UART1_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART1_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART1_DL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UART1_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART1_DL` reader - UART divisor latch"]
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+pub struct R16_UART1_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART1_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART1_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART1_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART1_DL` writer - UART divisor latch"]
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+pub struct R16_UART1_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART1_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
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+# [inline (always)]
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+pub fn r16_uart1_dl (& self) -> R16_UART1_DL_R { R16_UART1_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
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|
+# [inline (always)]
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+pub fn r16_uart1_dl (& mut self) -> R16_UART1_DL_W { R16_UART1_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart1_dl](index.html) module"]
|
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+pub struct R16_UART1_DL_SPEC ; impl crate :: RegisterSpec for R16_UART1_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart1_dl::R](R) reader structure"]
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+impl crate :: Readable for R16_UART1_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart1_dl::W](W) writer structure"]
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+impl crate :: Writable for R16_UART1_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART1_DL to value 0"]
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+impl crate :: Resettable for R16_UART1_DL_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART1_DIV register accessor: an alias for `Reg<R8_UART1_DIV_SPEC>`"]
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+pub type R8_UART1_DIV = crate :: Reg < r8_uart1_div :: R8_UART1_DIV_SPEC > ; # [doc = "UART1 pre-divisor latch byte"]
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+pub mod r8_uart1_div { # [doc = "Register `R8_UART1_DIV` reader"]
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+pub struct R (crate :: R < R8_UART1_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART1_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART1_DIV_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART1_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART1_DIV` writer"]
|
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|
+pub struct W (crate :: W < R8_UART1_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART1_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART1_DIV_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART1_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART1_DIV` reader - UART pre-divisor latch byte"]
|
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|
+pub struct R8_UART1_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART1_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART1_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART1_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART1_DIV` writer - UART pre-divisor latch byte"]
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+pub struct R8_UART1_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART1_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
|
|
|
+# [inline (always)]
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|
+pub fn r8_uart1_div (& self) -> R8_UART1_DIV_R { R8_UART1_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
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|
|
+# [inline (always)]
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+pub fn r8_uart1_div (& mut self) -> R8_UART1_DIV_W { R8_UART1_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART1 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart1_div](index.html) module"]
|
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|
+pub struct R8_UART1_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART1_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart1_div::R](R) reader structure"]
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+impl crate :: Readable for R8_UART1_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart1_div::W](W) writer structure"]
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+impl crate :: Writable for R8_UART1_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART1_DIV to value 0"]
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|
+impl crate :: Resettable for R8_UART1_DIV_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART2 register"]
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+pub struct UART2 { _marker : PhantomData < * const () > } unsafe impl Send for UART2 { } impl UART2 { # [doc = r"Pointer to the register block"]
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|
+pub const PTR : * const uart2 :: RegisterBlock = 0x4000_3800 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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|
+pub const fn ptr () -> * const uart2 :: RegisterBlock { Self :: PTR } } impl Deref for UART2 { type Target = uart2 :: RegisterBlock ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART2 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART2") . finish () } } # [doc = "UART2 register"]
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+pub mod uart2 { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - UART2 modem control"]
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|
+pub r8_uart2_mcr : crate :: Reg < r8_uart2_mcr :: R8_UART2_MCR_SPEC > , # [doc = "0x01 - UART2 interrupt enable"]
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+pub r8_uart2_ier : crate :: Reg < r8_uart2_ier :: R8_UART2_IER_SPEC > , # [doc = "0x02 - UART2 FIFO control"]
|
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|
+pub r8_uart2_fcr : crate :: Reg < r8_uart2_fcr :: R8_UART2_FCR_SPEC > , # [doc = "0x03 - UART2 line control"]
|
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|
+pub r8_uart2_lcr : crate :: Reg < r8_uart2_lcr :: R8_UART2_LCR_SPEC > , # [doc = "0x04 - UART2 interrupt identification"]
|
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|
+pub r8_uart2_iir : crate :: Reg < r8_uart2_iir :: R8_UART2_IIR_SPEC > , # [doc = "0x05 - UART2 line status"]
|
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|
+pub r8_uart2_lsr : crate :: Reg < r8_uart2_lsr :: R8_UART2_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
|
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+, # [doc = "0x08 - UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte"]
|
|
|
+pub r8_uart2_rbr_r8_uart2_thr : crate :: Reg < r8_uart2_rbr_r8_uart2_thr :: R8_UART2_RBR_R8_UART2_THR_SPEC > , _reserved7 : [u8 ; 0x01]
|
|
|
+, # [doc = "0x0a - UART2 receiver FIFO count"]
|
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|
+pub r8_uart2_rfc : crate :: Reg < r8_uart2_rfc :: R8_UART2_RFC_SPEC > , # [doc = "0x0b - UART2 transmitter FIFO count"]
|
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|
+pub r8_uart2_tfc : crate :: Reg < r8_uart2_tfc :: R8_UART2_TFC_SPEC > , # [doc = "0x0c - UART2 divisor latch"]
|
|
|
+pub r16_uart2_dl : crate :: Reg < r16_uart2_dl :: R16_UART2_DL_SPEC > , # [doc = "0x0e - UART2 pre-divisor latch byte"]
|
|
|
+pub r8_uart2_div : crate :: Reg < r8_uart2_div :: R8_UART2_DIV_SPEC > , } # [doc = "R8_UART2_MCR register accessor: an alias for `Reg<R8_UART2_MCR_SPEC>`"]
|
|
|
+pub type R8_UART2_MCR = crate :: Reg < r8_uart2_mcr :: R8_UART2_MCR_SPEC > ; # [doc = "UART2 modem control"]
|
|
|
+pub mod r8_uart2_mcr { # [doc = "Register `R8_UART2_MCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART2_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_MCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_MCR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART2_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_MCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART2_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_MCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_MCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART2_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
|
|
|
+pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
|
|
|
+pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART control OUT2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART control OUT2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_mcr](index.html) module"]
|
|
|
+pub struct R8_UART2_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_mcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART2_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_mcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART2_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_MCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART2_MCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_IER register accessor: an alias for `Reg<R8_UART2_IER_SPEC>`"]
|
|
|
+pub type R8_UART2_IER = crate :: Reg < r8_uart2_ier :: R8_UART2_IER_SPEC > ; # [doc = "UART2 interrupt enable"]
|
|
|
+pub mod r8_uart2_ier { # [doc = "Register `R8_UART2_IER` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART2_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_IER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_IER_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART2_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_IER` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART2_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_IER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_IER_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART2_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
|
|
|
+pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
|
|
|
+pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
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|
|
+pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
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+pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
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+pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
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+pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
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|
|
+pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
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|
|
+pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
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|
|
+pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
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|
|
+pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_ier](index.html) module"]
|
|
|
+pub struct R8_UART2_IER_SPEC ; impl crate :: RegisterSpec for R8_UART2_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_ier::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART2_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_ier::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART2_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_IER to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART2_IER_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_FCR register accessor: an alias for `Reg<R8_UART2_FCR_SPEC>`"]
|
|
|
+pub type R8_UART2_FCR = crate :: Reg < r8_uart2_fcr :: R8_UART2_FCR_SPEC > ; # [doc = "UART2 FIFO control"]
|
|
|
+pub mod r8_uart2_fcr { # [doc = "Register `R8_UART2_FCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART2_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_FCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_FCR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART2_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_FCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART2_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_FCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_FCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART2_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
|
|
|
+pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
|
|
|
+pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
|
|
|
+pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
|
|
|
+pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_fcr](index.html) module"]
|
|
|
+pub struct R8_UART2_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_fcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART2_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_fcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART2_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_FCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART2_FCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_LCR register accessor: an alias for `Reg<R8_UART2_LCR_SPEC>`"]
|
|
|
+pub type R8_UART2_LCR = crate :: Reg < r8_uart2_lcr :: R8_UART2_LCR_SPEC > ; # [doc = "UART2 line control"]
|
|
|
+pub mod r8_uart2_lcr { # [doc = "Register `R8_UART2_LCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART2_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_LCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_LCR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART2_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_LCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART2_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_LCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_LCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART2_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
|
|
|
+pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
|
|
|
+pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
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+pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
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+pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
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+pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
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+pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
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+pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
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+pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
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+pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
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+pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit _ UART general purpose bit"]
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+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit _ UART general purpose bit"]
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|
+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
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|
+# [inline (always)]
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+pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
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+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit _ UART general purpose bit"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_lcr](index.html) module"]
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+pub struct R8_UART2_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART2_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_lcr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART2_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_lcr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART2_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_LCR to value 0"]
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+impl crate :: Resettable for R8_UART2_LCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_IIR register accessor: an alias for `Reg<R8_UART2_IIR_SPEC>`"]
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+pub type R8_UART2_IIR = crate :: Reg < r8_uart2_iir :: R8_UART2_IIR_SPEC > ; # [doc = "UART2 interrupt identification"]
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+pub mod r8_uart2_iir { # [doc = "Register `R8_UART2_IIR` reader"]
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+pub struct R (crate :: R < R8_UART2_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_IIR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_IIR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART2_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
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+pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
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+pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
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+pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
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|
+# [inline (always)]
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|
+pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
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|
|
+# [inline (always)]
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+pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
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|
|
+# [inline (always)]
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|
+pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART2 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_iir](index.html) module"]
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|
|
+pub struct R8_UART2_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART2_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_iir::R](R) reader structure"]
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|
+impl crate :: Readable for R8_UART2_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_IIR to value 0x01"]
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|
|
+impl crate :: Resettable for R8_UART2_IIR_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART2_LSR register accessor: an alias for `Reg<R8_UART2_LSR_SPEC>`"]
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|
|
+pub type R8_UART2_LSR = crate :: Reg < r8_uart2_lsr :: R8_UART2_LSR_SPEC > ; # [doc = "UART2 line status"]
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|
|
+pub mod r8_uart2_lsr { # [doc = "Register `R8_UART2_LSR` reader"]
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|
+pub struct R (crate :: R < R8_UART2_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_LSR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_LSR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART2_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
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|
|
+pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
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|
|
+pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
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|
|
+pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
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|
|
+pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
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|
|
+pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
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|
|
+pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
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|
|
+pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
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|
|
+pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART2 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_lsr](index.html) module"]
|
|
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+pub struct R8_UART2_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART2_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_lsr::R](R) reader structure"]
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|
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+impl crate :: Readable for R8_UART2_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_LSR to value 0xc0"]
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+impl crate :: Resettable for R8_UART2_LSR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART2_RBR_R8_UART2_THR register accessor: an alias for `Reg<R8_UART2_RBR_R8_UART2_THR_SPEC>`"]
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+pub type R8_UART2_RBR_R8_UART2_THR = crate :: Reg < r8_uart2_rbr_r8_uart2_thr :: R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [doc = "UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte"]
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+pub mod r8_uart2_rbr_r8_uart2_thr { # [doc = "Register `R8_UART2_RBR_R8_UART2_THR` reader"]
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+pub struct R (crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >> for R { # [inline (always)]
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|
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+fn from (reader : crate :: R < R8_UART2_RBR_R8_UART2_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_RBR_R8_UART2_THR` writer"]
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+pub struct W (crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART2_RBR_R8_UART2_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART_RBR_R8_UART_THR` reader - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART_RBR_R8_UART_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART_RBR_R8_UART_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART_RBR_R8_UART_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART_RBR_R8_UART_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART_RBR_R8_UART_THR` writer - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART_RBR_R8_UART_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART_RBR_R8_UART_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart_rbr_r8_uart_thr (& self) -> R8_UART_RBR_R8_UART_THR_R { R8_UART_RBR_R8_UART_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte_ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart_rbr_r8_uart_thr (& mut self) -> R8_UART_RBR_R8_UART_THR_W { R8_UART_RBR_R8_UART_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 receiver buffer, receiving byte _ UART2 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_rbr_r8_uart2_thr](index.html) module"]
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+pub struct R8_UART2_RBR_R8_UART2_THR_SPEC ; impl crate :: RegisterSpec for R8_UART2_RBR_R8_UART2_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_rbr_r8_uart2_thr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART2_RBR_R8_UART2_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_rbr_r8_uart2_thr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART2_RBR_R8_UART2_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_RBR_R8_UART2_THR to value 0"]
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+impl crate :: Resettable for R8_UART2_RBR_R8_UART2_THR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_RFC register accessor: an alias for `Reg<R8_UART2_RFC_SPEC>`"]
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+pub type R8_UART2_RFC = crate :: Reg < r8_uart2_rfc :: R8_UART2_RFC_SPEC > ; # [doc = "UART2 receiver FIFO count"]
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+pub mod r8_uart2_rfc { # [doc = "Register `R8_UART2_RFC` reader"]
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+pub struct R (crate :: R < R8_UART2_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_RFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_RFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART2_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART2_RFC` reader - UART receiver FIFO count"]
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+pub struct R8_UART2_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart2_rfc (& self) -> R8_UART2_RFC_R { R8_UART2_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART2 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_rfc](index.html) module"]
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+pub struct R8_UART2_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART2_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_rfc::R](R) reader structure"]
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+impl crate :: Readable for R8_UART2_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_RFC to value 0"]
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+impl crate :: Resettable for R8_UART2_RFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_TFC register accessor: an alias for `Reg<R8_UART2_TFC_SPEC>`"]
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+pub type R8_UART2_TFC = crate :: Reg < r8_uart2_tfc :: R8_UART2_TFC_SPEC > ; # [doc = "UART2 transmitter FIFO count"]
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+pub mod r8_uart2_tfc { # [doc = "Register `R8_UART2_TFC` reader"]
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+pub struct R (crate :: R < R8_UART2_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_TFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_TFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART2_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART2_TFC` reader - UART transmitter FIFO count"]
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+pub struct R8_UART2_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
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|
+# [inline (always)]
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+pub fn r8_uart2_tfc (& self) -> R8_UART2_TFC_R { R8_UART2_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART2 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_tfc](index.html) module"]
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+pub struct R8_UART2_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART2_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_tfc::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART2_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART2_TFC to value 0"]
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+impl crate :: Resettable for R8_UART2_TFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART2_DL register accessor: an alias for `Reg<R16_UART2_DL_SPEC>`"]
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+pub type R16_UART2_DL = crate :: Reg < r16_uart2_dl :: R16_UART2_DL_SPEC > ; # [doc = "UART2 divisor latch"]
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+pub mod r16_uart2_dl { # [doc = "Register `R16_UART2_DL` reader"]
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+pub struct R (crate :: R < R16_UART2_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART2_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART2_DL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UART2_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART2_DL` writer"]
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+pub struct W (crate :: W < R16_UART2_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART2_DL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART2_DL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UART2_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART2_DL` reader - UART divisor latch"]
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+pub struct R16_UART2_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART2_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART2_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART2_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART2_DL` writer - UART divisor latch"]
|
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|
+pub struct R16_UART2_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART2_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
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|
|
+# [inline (always)]
|
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+pub fn r16_uart2_dl (& self) -> R16_UART2_DL_R { R16_UART2_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r16_uart2_dl (& mut self) -> R16_UART2_DL_W { R16_UART2_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart2_dl](index.html) module"]
|
|
|
+pub struct R16_UART2_DL_SPEC ; impl crate :: RegisterSpec for R16_UART2_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart2_dl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UART2_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart2_dl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UART2_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART2_DL to value 0"]
|
|
|
+impl crate :: Resettable for R16_UART2_DL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART2_DIV register accessor: an alias for `Reg<R8_UART2_DIV_SPEC>`"]
|
|
|
+pub type R8_UART2_DIV = crate :: Reg < r8_uart2_div :: R8_UART2_DIV_SPEC > ; # [doc = "UART2 pre-divisor latch byte"]
|
|
|
+pub mod r8_uart2_div { # [doc = "Register `R8_UART2_DIV` reader"]
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|
|
+pub struct R (crate :: R < R8_UART2_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART2_DIV_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART2_DIV_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_UART2_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART2_DIV` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART2_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART2_DIV_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART2_DIV_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_UART2_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART2_DIV` reader - UART pre-divisor latch byte"]
|
|
|
+pub struct R8_UART2_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART2_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART2_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART2_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART2_DIV` writer - UART pre-divisor latch byte"]
|
|
|
+pub struct R8_UART2_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART2_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
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|
|
+# [inline (always)]
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|
+pub fn r8_uart2_div (& self) -> R8_UART2_DIV_R { R8_UART2_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r8_uart2_div (& mut self) -> R8_UART2_DIV_W { R8_UART2_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART2 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_div](index.html) module"]
|
|
|
+pub struct R8_UART2_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART2_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart2_div::R](R) reader structure"]
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|
|
+impl crate :: Readable for R8_UART2_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart2_div::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART2_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART2_DIV to value 0"]
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|
|
+impl crate :: Resettable for R8_UART2_DIV_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "UART3 register"]
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|
|
+pub struct UART3 { _marker : PhantomData < * const () > } unsafe impl Send for UART3 { } impl UART3 { # [doc = r"Pointer to the register block"]
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|
+pub const PTR : * const uart3 :: RegisterBlock = 0x4000_3c00 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
|
+# [inline (always)]
|
|
|
+pub const fn ptr () -> * const uart3 :: RegisterBlock { Self :: PTR } } impl Deref for UART3 { type Target = uart3 :: RegisterBlock ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for UART3 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("UART3") . finish () } } # [doc = "UART3 register"]
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|
|
+pub mod uart3 { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - UART3 modem control"]
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|
|
+pub r8_uart3_mcr : crate :: Reg < r8_uart3_mcr :: R8_UART3_MCR_SPEC > , # [doc = "0x01 - UART3 interrupt enable"]
|
|
|
+pub r8_uart3_ier : crate :: Reg < r8_uart3_ier :: R8_UART3_IER_SPEC > , # [doc = "0x02 - UART3 FIFO control"]
|
|
|
+pub r8_uart3_fcr : crate :: Reg < r8_uart3_fcr :: R8_UART3_FCR_SPEC > , # [doc = "0x03 - UART3 line control"]
|
|
|
+pub r8_uart3_lcr : crate :: Reg < r8_uart3_lcr :: R8_UART3_LCR_SPEC > , # [doc = "0x04 - UART3 interrupt identification"]
|
|
|
+pub r8_uart3_iir : crate :: Reg < r8_uart3_iir :: R8_UART3_IIR_SPEC > , # [doc = "0x05 - UART3 line status"]
|
|
|
+pub r8_uart3_lsr : crate :: Reg < r8_uart3_lsr :: R8_UART3_LSR_SPEC > , _reserved6 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x08 - UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte"]
|
|
|
+pub r8_uart3_rbr_r8_uart3_thr : crate :: Reg < r8_uart3_rbr_r8_uart3_thr :: R8_UART3_RBR_R8_UART3_THR_SPEC > , _reserved7 : [u8 ; 0x01]
|
|
|
+, # [doc = "0x0a - UART3 receiver FIFO count"]
|
|
|
+pub r8_uart3_rfc : crate :: Reg < r8_uart3_rfc :: R8_UART3_RFC_SPEC > , # [doc = "0x0b - UART3 transmitter FIFO count"]
|
|
|
+pub r8_uart3_tfc : crate :: Reg < r8_uart3_tfc :: R8_UART3_TFC_SPEC > , # [doc = "0x0c - UART3 divisor latch"]
|
|
|
+pub r16_uart3_dl : crate :: Reg < r16_uart3_dl :: R16_UART3_DL_SPEC > , # [doc = "0x0e - UART3 pre-divisor latch byte"]
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+pub r8_uart3_div : crate :: Reg < r8_uart3_div :: R8_UART3_DIV_SPEC > , } # [doc = "R8_UART3_MCR register accessor: an alias for `Reg<R8_UART3_MCR_SPEC>`"]
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+pub type R8_UART3_MCR = crate :: Reg < r8_uart3_mcr :: R8_UART3_MCR_SPEC > ; # [doc = "UART3 modem control"]
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+pub mod r8_uart3_mcr { # [doc = "Register `R8_UART3_MCR` reader"]
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+pub struct R (crate :: R < R8_UART3_MCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_MCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_MCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_MCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_MCR` writer"]
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+pub struct W (crate :: W < R8_UART3_MCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_MCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_MCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART3_MCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_MCR_OUT2` reader - UART control OUT2"]
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+pub struct RB_MCR_OUT2_R (crate :: FieldReader < bool , bool >) ; impl RB_MCR_OUT2_R { pub (crate) fn new (bits : bool) -> Self { RB_MCR_OUT2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_MCR_OUT2_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_MCR_OUT2` writer - UART control OUT2"]
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+pub struct RB_MCR_OUT2_W < 'a > { w : & 'a mut W , } impl < 'a > RB_MCR_OUT2_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 3 - UART control OUT2"]
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+# [inline (always)]
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+pub fn rb_mcr_out2 (& self) -> RB_MCR_OUT2_R { RB_MCR_OUT2_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 3 - UART control OUT2"]
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+# [inline (always)]
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+pub fn rb_mcr_out2 (& mut self) -> RB_MCR_OUT2_W { RB_MCR_OUT2_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 modem control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_mcr](index.html) module"]
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+pub struct R8_UART3_MCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_MCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_mcr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_MCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_mcr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART3_MCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_MCR to value 0"]
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+impl crate :: Resettable for R8_UART3_MCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_IER register accessor: an alias for `Reg<R8_UART3_IER_SPEC>`"]
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+pub type R8_UART3_IER = crate :: Reg < r8_uart3_ier :: R8_UART3_IER_SPEC > ; # [doc = "UART3 interrupt enable"]
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+pub mod r8_uart3_ier { # [doc = "Register `R8_UART3_IER` reader"]
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+pub struct R (crate :: R < R8_UART3_IER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_IER_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_IER_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_IER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_IER` writer"]
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+pub struct W (crate :: W < R8_UART3_IER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_IER_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_IER_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART3_IER_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
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+pub struct RB_IER_RECV_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RECV_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RECV_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RECV_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
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+pub struct RB_IER_RECV_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RECV_RDY_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
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+pub struct RB_IER_THR_EMPTY_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_THR_EMPTY_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_THR_EMPTY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_THR_EMPTY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
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+pub struct RB_IER_THR_EMPTY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_THR_EMPTY_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
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+pub struct RB_IER_LINE_STAT_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_LINE_STAT_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_LINE_STAT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_LINE_STAT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
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+pub struct RB_IER_LINE_STAT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_LINE_STAT_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
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+pub struct RB_IER_TXD_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_TXD_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_TXD_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_TXD_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
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|
+pub struct RB_IER_TXD_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_TXD_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
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|
+pub struct RB_IER_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_IER_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_IER_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IER_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
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|
+pub struct RB_IER_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_IER_RESET_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_ier_recv_rdy (& self) -> RB_IER_RECV_RDY_R { RB_IER_RECV_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
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|
|
+# [inline (always)]
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|
+pub fn rb_ier_thr_empty (& self) -> RB_IER_THR_EMPTY_R { RB_IER_THR_EMPTY_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_ier_line_stat (& self) -> RB_IER_LINE_STAT_R { RB_IER_LINE_STAT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 6 - UART TXD pin enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_ier_txd_en (& self) -> RB_IER_TXD_EN_R { RB_IER_TXD_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
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|
|
+# [inline (always)]
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|
+pub fn rb_ier_reset (& self) -> RB_IER_RESET_R { RB_IER_RESET_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - UART interrupt enable for receiver data ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_recv_rdy (& mut self) -> RB_IER_RECV_RDY_W { RB_IER_RECV_RDY_W { w : self } } # [doc = "Bit 1 - UART interrupt enable for THR empty"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_thr_empty (& mut self) -> RB_IER_THR_EMPTY_W { RB_IER_THR_EMPTY_W { w : self } } # [doc = "Bit 2 - UART interrupt enable for receiver line status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_line_stat (& mut self) -> RB_IER_LINE_STAT_W { RB_IER_LINE_STAT_W { w : self } } # [doc = "Bit 6 - UART TXD pin enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_txd_en (& mut self) -> RB_IER_TXD_EN_W { RB_IER_TXD_EN_W { w : self } } # [doc = "Bit 7 - UART software reset control, high action, auto clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ier_reset (& mut self) -> RB_IER_RESET_W { RB_IER_RESET_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_ier](index.html) module"]
|
|
|
+pub struct R8_UART3_IER_SPEC ; impl crate :: RegisterSpec for R8_UART3_IER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_ier::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART3_IER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_ier::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UART3_IER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_IER to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART3_IER_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_FCR register accessor: an alias for `Reg<R8_UART3_FCR_SPEC>`"]
|
|
|
+pub type R8_UART3_FCR = crate :: Reg < r8_uart3_fcr :: R8_UART3_FCR_SPEC > ; # [doc = "UART3 FIFO control"]
|
|
|
+pub mod r8_uart3_fcr { # [doc = "Register `R8_UART3_FCR` reader"]
|
|
|
+pub struct R (crate :: R < R8_UART3_FCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_FCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_FCR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UART3_FCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_FCR` writer"]
|
|
|
+pub struct W (crate :: W < R8_UART3_FCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_FCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_FCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UART3_FCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_FCR_FIFO_EN` reader - UART FIFO enable"]
|
|
|
+pub struct RB_FCR_FIFO_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_FIFO_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_FIFO_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_EN` writer - UART FIFO enable"]
|
|
|
+pub struct RB_FCR_FIFO_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` reader - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_RX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_RX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_RX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_RX_FIFO_CLR` writer - clear UART receiver FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_RX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_RX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` reader - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_FCR_TX_FIFO_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_FCR_TX_FIFO_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_TX_FIFO_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_TX_FIFO_CLR` writer - clear UART transmitter FIFO, high action, auto clear"]
|
|
|
+pub struct RB_FCR_TX_FIFO_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_TX_FIFO_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_FCR_FIFO_TRIG` reader - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_R (crate :: FieldReader < u8 , u8 >) ; impl RB_FCR_FIFO_TRIG_R { pub (crate) fn new (bits : u8) -> Self { RB_FCR_FIFO_TRIG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_FCR_FIFO_TRIG_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_FCR_FIFO_TRIG` writer - UART receiver FIFO trigger level"]
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+pub struct RB_FCR_FIFO_TRIG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_FCR_FIFO_TRIG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u8 & 0x03) << 6) ; self . w } } impl R { # [doc = "Bit 0 - UART FIFO enable"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_en (& self) -> RB_FCR_FIFO_EN_R { RB_FCR_FIFO_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_rx_fifo_clr (& self) -> RB_FCR_RX_FIFO_CLR_R { RB_FCR_RX_FIFO_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_tx_fifo_clr (& self) -> RB_FCR_TX_FIFO_CLR_R { RB_FCR_TX_FIFO_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_trig (& self) -> RB_FCR_FIFO_TRIG_R { RB_FCR_FIFO_TRIG_R :: new (((self . bits >> 6) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - UART FIFO enable"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_en (& mut self) -> RB_FCR_FIFO_EN_W { RB_FCR_FIFO_EN_W { w : self } } # [doc = "Bit 1 - clear UART receiver FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_rx_fifo_clr (& mut self) -> RB_FCR_RX_FIFO_CLR_W { RB_FCR_RX_FIFO_CLR_W { w : self } } # [doc = "Bit 2 - clear UART transmitter FIFO, high action, auto clear"]
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+# [inline (always)]
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+pub fn rb_fcr_tx_fifo_clr (& mut self) -> RB_FCR_TX_FIFO_CLR_W { RB_FCR_TX_FIFO_CLR_W { w : self } } # [doc = "Bits 6:7 - UART receiver FIFO trigger level"]
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+# [inline (always)]
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+pub fn rb_fcr_fifo_trig (& mut self) -> RB_FCR_FIFO_TRIG_W { RB_FCR_FIFO_TRIG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_fcr](index.html) module"]
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+pub struct R8_UART3_FCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_FCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_fcr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_FCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_fcr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART3_FCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_FCR to value 0"]
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+impl crate :: Resettable for R8_UART3_FCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_LCR register accessor: an alias for `Reg<R8_UART3_LCR_SPEC>`"]
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+pub type R8_UART3_LCR = crate :: Reg < r8_uart3_lcr :: R8_UART3_LCR_SPEC > ; # [doc = "UART3 line control"]
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+pub mod r8_uart3_lcr { # [doc = "Register `R8_UART3_LCR` reader"]
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+pub struct R (crate :: R < R8_UART3_LCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_LCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_LCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_LCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_LCR` writer"]
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+pub struct W (crate :: W < R8_UART3_LCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_LCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_LCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART3_LCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_LCR_WORD_SZ` reader - UART word bit length"]
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+pub struct RB_LCR_WORD_SZ_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_WORD_SZ_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_WORD_SZ_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_WORD_SZ_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_WORD_SZ` writer - UART word bit length"]
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+pub struct RB_LCR_WORD_SZ_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_WORD_SZ_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_LCR_STOP_BIT` reader - UART stop bit length"]
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+pub struct RB_LCR_STOP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_STOP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_STOP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_STOP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_STOP_BIT` writer - UART stop bit length"]
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+pub struct RB_LCR_STOP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_STOP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_LCR_PAR_EN` reader - UART parity enable"]
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+pub struct RB_LCR_PAR_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_PAR_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_PAR_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_EN` writer - UART parity enable"]
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+pub struct RB_LCR_PAR_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_LCR_PAR_MOD` reader - UART parity mode"]
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+pub struct RB_LCR_PAR_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_LCR_PAR_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_LCR_PAR_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_PAR_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_PAR_MOD` writer - UART parity mode"]
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+pub struct RB_LCR_PAR_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_PAR_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_LCR_BREAK_EN` reader - UART break control enable"]
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+pub struct RB_LCR_BREAK_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_BREAK_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_BREAK_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_BREAK_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_BREAK_EN` writer - UART break control enable"]
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+pub struct RB_LCR_BREAK_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_BREAK_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` reader - UART reserved bit and UART general purpose bit"]
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+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader < bool , bool >) ; impl RB_LCR_DLAB_RB_LCR_GP_BIT_R { pub (crate) fn new (bits : bool) -> Self { RB_LCR_DLAB_RB_LCR_GP_BIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LCR_DLAB_RB_LCR_GP_BIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LCR_DLAB_RB_LCR_GP_BIT` writer - UART reserved bit and UART general purpose bit"]
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|
+pub struct RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_LCR_DLAB_RB_LCR_GP_BIT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bits 0:1 - UART word bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_word_sz (& self) -> RB_LCR_WORD_SZ_R { RB_LCR_WORD_SZ_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - UART stop bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& self) -> RB_LCR_STOP_BIT_R { RB_LCR_STOP_BIT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART parity enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_en (& self) -> RB_LCR_PAR_EN_R { RB_LCR_PAR_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - UART parity mode"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& self) -> RB_LCR_PAR_MOD_R { RB_LCR_PAR_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - UART break control enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& self) -> RB_LCR_BREAK_EN_R { RB_LCR_BREAK_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - UART reserved bit and UART general purpose bit"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_R { RB_LCR_DLAB_RB_LCR_GP_BIT_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - UART word bit length"]
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|
|
+# [inline (always)]
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+pub fn rb_lcr_word_sz (& mut self) -> RB_LCR_WORD_SZ_W { RB_LCR_WORD_SZ_W { w : self } } # [doc = "Bit 2 - UART stop bit length"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_stop_bit (& mut self) -> RB_LCR_STOP_BIT_W { RB_LCR_STOP_BIT_W { w : self } } # [doc = "Bit 3 - UART parity enable"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_lcr_par_en (& mut self) -> RB_LCR_PAR_EN_W { RB_LCR_PAR_EN_W { w : self } } # [doc = "Bits 4:5 - UART parity mode"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_par_mod (& mut self) -> RB_LCR_PAR_MOD_W { RB_LCR_PAR_MOD_W { w : self } } # [doc = "Bit 6 - UART break control enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_break_en (& mut self) -> RB_LCR_BREAK_EN_W { RB_LCR_BREAK_EN_W { w : self } } # [doc = "Bit 7 - UART reserved bit and UART general purpose bit"]
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|
|
+# [inline (always)]
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|
+pub fn rb_lcr_dlab_rb_lcr_gp_bit (& mut self) -> RB_LCR_DLAB_RB_LCR_GP_BIT_W { RB_LCR_DLAB_RB_LCR_GP_BIT_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 line control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_lcr](index.html) module"]
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|
|
+pub struct R8_UART3_LCR_SPEC ; impl crate :: RegisterSpec for R8_UART3_LCR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_lcr::R](R) reader structure"]
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|
|
+impl crate :: Readable for R8_UART3_LCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_lcr::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_UART3_LCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_LCR to value 0"]
|
|
|
+impl crate :: Resettable for R8_UART3_LCR_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_IIR register accessor: an alias for `Reg<R8_UART3_IIR_SPEC>`"]
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|
|
+pub type R8_UART3_IIR = crate :: Reg < r8_uart3_iir :: R8_UART3_IIR_SPEC > ; # [doc = "UART3 interrupt identification"]
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|
+pub mod r8_uart3_iir { # [doc = "Register `R8_UART3_IIR` reader"]
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|
|
+pub struct R (crate :: R < R8_UART3_IIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_IIR_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_IIR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UART3_IIR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_IIR_NO_INT` reader - UART no interrupt flag"]
|
|
|
+pub struct RB_IIR_NO_INT_R (crate :: FieldReader < bool , bool >) ; impl RB_IIR_NO_INT_R { pub (crate) fn new (bits : bool) -> Self { RB_IIR_NO_INT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_NO_INT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_INT_MASK` reader - UART interrupt flag bit mask"]
|
|
|
+pub struct RB_IIR_INT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_INT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_INT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_INT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_IIR_FIFO_ID` reader - UART FIFO enabled flag"]
|
|
|
+pub struct RB_IIR_FIFO_ID_R (crate :: FieldReader < u8 , u8 >) ; impl RB_IIR_FIFO_ID_R { pub (crate) fn new (bits : u8) -> Self { RB_IIR_FIFO_ID_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_IIR_FIFO_ID_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART no interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_iir_no_int (& self) -> RB_IIR_NO_INT_R { RB_IIR_NO_INT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 1:3 - UART interrupt flag bit mask"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_iir_int_mask (& self) -> RB_IIR_INT_MASK_R { RB_IIR_INT_MASK_R :: new (((self . bits >> 1) & 0x07) as u8) } # [doc = "Bits 6:7 - UART FIFO enabled flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_iir_fifo_id (& self) -> RB_IIR_FIFO_ID_R { RB_IIR_FIFO_ID_R :: new (((self . bits >> 6) & 0x03) as u8) } } # [doc = "UART3 interrupt identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_iir](index.html) module"]
|
|
|
+pub struct R8_UART3_IIR_SPEC ; impl crate :: RegisterSpec for R8_UART3_IIR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_iir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UART3_IIR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_IIR to value 0x01"]
|
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+impl crate :: Resettable for R8_UART3_IIR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x01 } } } # [doc = "R8_UART3_LSR register accessor: an alias for `Reg<R8_UART3_LSR_SPEC>`"]
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+pub type R8_UART3_LSR = crate :: Reg < r8_uart3_lsr :: R8_UART3_LSR_SPEC > ; # [doc = "UART3 line status"]
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+pub mod r8_uart3_lsr { # [doc = "Register `R8_UART3_LSR` reader"]
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+pub struct R (crate :: R < R8_UART3_LSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_LSR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_LSR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_LSR_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_LSR_DATA_RDY` reader - UART receiver fifo data ready status"]
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+pub struct RB_LSR_DATA_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_DATA_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_DATA_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_DATA_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_OVER_ERR` reader - UART receiver overrun error"]
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+pub struct RB_LSR_OVER_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_OVER_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_OVER_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_OVER_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_PAR_ERR` reader - UART receiver frame error"]
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+pub struct RB_LSR_PAR_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_PAR_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_PAR_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_PAR_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_FRAME_ERR` reader - UART receiver frame error"]
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+pub struct RB_LSR_FRAME_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_FRAME_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_FRAME_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_FRAME_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_BREAK_ERR` reader - UART receiver break error"]
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+pub struct RB_LSR_BREAK_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_BREAK_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_BREAK_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_BREAK_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_FIFO_EMP` reader - UART transmitter fifo empty status"]
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+pub struct RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_FIFO_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_FIFO_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_FIFO_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_TX_ALL_EMP` reader - UART transmitter all empty status"]
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+pub struct RB_LSR_TX_ALL_EMP_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_TX_ALL_EMP_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_TX_ALL_EMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_TX_ALL_EMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_LSR_ERR_RX_FIFO` reader - indicate error in UART receiver fifo"]
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+pub struct RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader < bool , bool >) ; impl RB_LSR_ERR_RX_FIFO_R { pub (crate) fn new (bits : bool) -> Self { RB_LSR_ERR_RX_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_LSR_ERR_RX_FIFO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - UART receiver fifo data ready status"]
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+# [inline (always)]
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+pub fn rb_lsr_data_rdy (& self) -> RB_LSR_DATA_RDY_R { RB_LSR_DATA_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - UART receiver overrun error"]
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+# [inline (always)]
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+pub fn rb_lsr_over_err (& self) -> RB_LSR_OVER_ERR_R { RB_LSR_OVER_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - UART receiver frame error"]
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+# [inline (always)]
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+pub fn rb_lsr_par_err (& self) -> RB_LSR_PAR_ERR_R { RB_LSR_PAR_ERR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - UART receiver frame error"]
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+# [inline (always)]
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+pub fn rb_lsr_frame_err (& self) -> RB_LSR_FRAME_ERR_R { RB_LSR_FRAME_ERR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - UART receiver break error"]
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+# [inline (always)]
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+pub fn rb_lsr_break_err (& self) -> RB_LSR_BREAK_ERR_R { RB_LSR_BREAK_ERR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - UART transmitter fifo empty status"]
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+# [inline (always)]
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+pub fn rb_lsr_tx_fifo_emp (& self) -> RB_LSR_TX_FIFO_EMP_R { RB_LSR_TX_FIFO_EMP_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - UART transmitter all empty status"]
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+# [inline (always)]
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+pub fn rb_lsr_tx_all_emp (& self) -> RB_LSR_TX_ALL_EMP_R { RB_LSR_TX_ALL_EMP_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - indicate error in UART receiver fifo"]
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+# [inline (always)]
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+pub fn rb_lsr_err_rx_fifo (& self) -> RB_LSR_ERR_RX_FIFO_R { RB_LSR_ERR_RX_FIFO_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "UART3 line status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_lsr](index.html) module"]
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+pub struct R8_UART3_LSR_SPEC ; impl crate :: RegisterSpec for R8_UART3_LSR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_lsr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_LSR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_LSR to value 0xc0"]
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+impl crate :: Resettable for R8_UART3_LSR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0xc0 } } } # [doc = "R8_UART3_RBR_R8_UART3_THR register accessor: an alias for `Reg<R8_UART3_RBR_R8_UART3_THR_SPEC>`"]
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+pub type R8_UART3_RBR_R8_UART3_THR = crate :: Reg < r8_uart3_rbr_r8_uart3_thr :: R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [doc = "UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte"]
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+pub mod r8_uart3_rbr_r8_uart3_thr { # [doc = "Register `R8_UART3_RBR_R8_UART3_THR` reader"]
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+pub struct R (crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_RBR_R8_UART3_THR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_RBR_R8_UART3_THR` writer"]
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+pub struct W (crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART3_RBR_R8_UART3_THR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART3_RBR_R8_UART3_THR` reader - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART3_RBR_R8_UART3_THR_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_RBR_R8_UART3_THR_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_RBR_R8_UART3_THR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_RBR_R8_UART3_THR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART3_RBR_R8_UART3_THR` writer - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
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+pub struct R8_UART3_RBR_R8_UART3_THR_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART3_RBR_R8_UART3_THR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart3_rbr_r8_uart3_thr (& self) -> R8_UART3_RBR_R8_UART3_THR_R { R8_UART3_RBR_R8_UART3_THR_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART receiver buffer, receiving byte _ UART transmitter holding, transmittal byte"]
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+# [inline (always)]
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+pub fn r8_uart3_rbr_r8_uart3_thr (& mut self) -> R8_UART3_RBR_R8_UART3_THR_W { R8_UART3_RBR_R8_UART3_THR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 receiver buffer, receiving byte _ UART3 transmitter holding, transmittal byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_rbr_r8_uart3_thr](index.html) module"]
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+pub struct R8_UART3_RBR_R8_UART3_THR_SPEC ; impl crate :: RegisterSpec for R8_UART3_RBR_R8_UART3_THR_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_rbr_r8_uart3_thr::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_RBR_R8_UART3_THR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_rbr_r8_uart3_thr::W](W) writer structure"]
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+impl crate :: Writable for R8_UART3_RBR_R8_UART3_THR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_RBR_R8_UART3_THR to value 0"]
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+impl crate :: Resettable for R8_UART3_RBR_R8_UART3_THR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_RFC register accessor: an alias for `Reg<R8_UART3_RFC_SPEC>`"]
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+pub type R8_UART3_RFC = crate :: Reg < r8_uart3_rfc :: R8_UART3_RFC_SPEC > ; # [doc = "UART3 receiver FIFO count"]
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+pub mod r8_uart3_rfc { # [doc = "Register `R8_UART3_RFC` reader"]
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+pub struct R (crate :: R < R8_UART3_RFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_RFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_RFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_RFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART3_RFC` reader - UART receiver FIFO count"]
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+pub struct R8_UART3_RFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_RFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_RFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_RFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART receiver FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart3_rfc (& self) -> R8_UART3_RFC_R { R8_UART3_RFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART3 receiver FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_rfc](index.html) module"]
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+pub struct R8_UART3_RFC_SPEC ; impl crate :: RegisterSpec for R8_UART3_RFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_rfc::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_RFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_RFC to value 0"]
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+impl crate :: Resettable for R8_UART3_RFC_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_TFC register accessor: an alias for `Reg<R8_UART3_TFC_SPEC>`"]
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+pub type R8_UART3_TFC = crate :: Reg < r8_uart3_tfc :: R8_UART3_TFC_SPEC > ; # [doc = "UART3 transmitter FIFO count"]
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+pub mod r8_uart3_tfc { # [doc = "Register `R8_UART3_TFC` reader"]
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+pub struct R (crate :: R < R8_UART3_TFC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_TFC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_TFC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_TFC_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_UART3_TFC` reader - UART transmitter FIFO count"]
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+pub struct R8_UART3_TFC_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_TFC_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_TFC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_TFC_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - UART transmitter FIFO count"]
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+# [inline (always)]
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+pub fn r8_uart3_tfc (& self) -> R8_UART3_TFC_R { R8_UART3_TFC_R :: new ((self . bits & 0xff) as u8) } } # [doc = "UART3 transmitter FIFO count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_tfc](index.html) module"]
|
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+pub struct R8_UART3_TFC_SPEC ; impl crate :: RegisterSpec for R8_UART3_TFC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_tfc::R](R) reader structure"]
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|
+impl crate :: Readable for R8_UART3_TFC_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_UART3_TFC to value 0"]
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|
+impl crate :: Resettable for R8_UART3_TFC_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UART3_DL register accessor: an alias for `Reg<R16_UART3_DL_SPEC>`"]
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|
+pub type R16_UART3_DL = crate :: Reg < r16_uart3_dl :: R16_UART3_DL_SPEC > ; # [doc = "UART3 divisor latch"]
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+pub mod r16_uart3_dl { # [doc = "Register `R16_UART3_DL` reader"]
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|
+pub struct R (crate :: R < R16_UART3_DL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UART3_DL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UART3_DL_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R16_UART3_DL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UART3_DL` writer"]
|
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|
+pub struct W (crate :: W < R16_UART3_DL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UART3_DL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UART3_DL_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R16_UART3_DL_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_UART3_DL` reader - UART divisor latch"]
|
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|
+pub struct R16_UART3_DL_R (crate :: FieldReader < u16 , u16 >) ; impl R16_UART3_DL_R { pub (crate) fn new (bits : u16) -> Self { R16_UART3_DL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_UART3_DL_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_UART3_DL` writer - UART divisor latch"]
|
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|
+pub struct R16_UART3_DL_W < 'a > { w : & 'a mut W , } impl < 'a > R16_UART3_DL_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - UART divisor latch"]
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|
+# [inline (always)]
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|
+pub fn r16_uart3_dl (& self) -> R16_UART3_DL_R { R16_UART3_DL_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - UART divisor latch"]
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|
|
+# [inline (always)]
|
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|
+pub fn r16_uart3_dl (& mut self) -> R16_UART3_DL_W { R16_UART3_DL_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 divisor latch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uart3_dl](index.html) module"]
|
|
|
+pub struct R16_UART3_DL_SPEC ; impl crate :: RegisterSpec for R16_UART3_DL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uart3_dl::R](R) reader structure"]
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|
+impl crate :: Readable for R16_UART3_DL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uart3_dl::W](W) writer structure"]
|
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|
+impl crate :: Writable for R16_UART3_DL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UART3_DL to value 0"]
|
|
|
+impl crate :: Resettable for R16_UART3_DL_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UART3_DIV register accessor: an alias for `Reg<R8_UART3_DIV_SPEC>`"]
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+pub type R8_UART3_DIV = crate :: Reg < r8_uart3_div :: R8_UART3_DIV_SPEC > ; # [doc = "UART3 pre-divisor latch byte"]
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+pub mod r8_uart3_div { # [doc = "Register `R8_UART3_DIV` reader"]
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+pub struct R (crate :: R < R8_UART3_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UART3_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UART3_DIV_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UART3_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UART3_DIV` writer"]
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+pub struct W (crate :: W < R8_UART3_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UART3_DIV_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UART3_DIV_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UART3_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_UART3_DIV` reader - UART pre-divisor latch byte"]
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+pub struct R8_UART3_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_UART3_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_UART3_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_UART3_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_UART3_DIV` writer - UART pre-divisor latch byte"]
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+pub struct R8_UART3_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_UART3_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
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+# [inline (always)]
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+pub fn r8_uart3_div (& self) -> R8_UART3_DIV_R { R8_UART3_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - UART pre-divisor latch byte"]
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+# [inline (always)]
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+pub fn r8_uart3_div (& mut self) -> R8_UART3_DIV_W { R8_UART3_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "UART3 pre-divisor latch byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart3_div](index.html) module"]
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+pub struct R8_UART3_DIV_SPEC ; impl crate :: RegisterSpec for R8_UART3_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uart3_div::R](R) reader structure"]
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+impl crate :: Readable for R8_UART3_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uart3_div::W](W) writer structure"]
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+impl crate :: Writable for R8_UART3_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UART3_DIV to value 0"]
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+impl crate :: Resettable for R8_UART3_DIV_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "SPI0 register"]
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+pub struct SPI0 { _marker : PhantomData < * const () > } unsafe impl Send for SPI0 { } impl SPI0 { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const spi0 :: RegisterBlock = 0x4000_4000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const spi0 :: RegisterBlock { Self :: PTR } } impl Deref for SPI0 { type Target = spi0 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SPI0 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SPI0") . finish () } } # [doc = "SPI0 register"]
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+pub mod spi0 { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - SPI0 mode control"]
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+pub r8_spi0_ctrl_mod : crate :: Reg < r8_spi0_ctrl_mod :: R8_SPI0_CTRL_MOD_SPEC > , # [doc = "0x01 - SPI0 configuration control"]
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+pub r8_spi0_ctrl_cfg : crate :: Reg < r8_spi0_ctrl_cfg :: R8_SPI0_CTRL_CFG_SPEC > , # [doc = "0x02 - SPI0 interrupt enable"]
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+pub r8_spi0_inter_en : crate :: Reg < r8_spi0_inter_en :: R8_SPI0_INTER_EN_SPEC > , # [doc = "0x03 - SPI0 master clock divisor_ SPI0 slave preset value"]
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+pub r8_spi0_clock_div_r8_spi0_slave_pre : crate :: Reg < r8_spi0_clock_div_r8_spi0_slave_pre :: R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > , # [doc = "0x04 - SPI0 data buffer"]
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+pub r8_spi0_buffer : crate :: Reg < r8_spi0_buffer :: R8_SPI0_BUFFER_SPEC > , # [doc = "0x05 - SPI0 work flag"]
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+pub r8_spi0_run_flag : crate :: Reg < r8_spi0_run_flag :: R8_SPI0_RUN_FLAG_SPEC > , # [doc = "0x06 - SPI0 interrupt flag"]
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+pub r8_spi0_int_flag : crate :: Reg < r8_spi0_int_flag :: R8_SPI0_INT_FLAG_SPEC > , # [doc = "0x07 - SPI0 FIFO count status"]
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+pub r8_spi0_fifo_count : crate :: Reg < r8_spi0_fifo_count :: R8_SPI0_FIFO_COUNT_SPEC > , _reserved8 : [u8 ; 0x04]
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+, # [doc = "0x0c - SPI0 total byte count, only low 12 bit"]
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+pub r16_spi0_total_cnt : crate :: Reg < r16_spi0_total_cnt :: R16_SPI0_TOTAL_CNT_SPEC > , _reserved9 : [u8 ; 0x02]
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+, # [doc = "0x10 - SPI0 FIFO register"]
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+pub r8_spi0_fifo : crate :: Reg < r8_spi0_fifo :: R8_SPI0_FIFO_SPEC > , _reserved10 : [u8 ; 0x02]
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+, # [doc = "0x13 - SPI0 FIFO count status"]
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+pub r8_spi0_fifo_count1 : crate :: Reg < r8_spi0_fifo_count1 :: R8_SPI0_FIFO_COUNT1_SPEC > , # [doc = "0x14 - SPI0 DMA current address"]
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+pub r32_spi0_dma_now : crate :: Reg < r32_spi0_dma_now :: R32_SPI0_DMA_NOW_SPEC > , # [doc = "0x18 - SPI0 DMA begin address"]
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+pub r32_spi0_dma_beg : crate :: Reg < r32_spi0_dma_beg :: R32_SPI0_DMA_BEG_SPEC > , # [doc = "0x1c - SPI0 DMA end address"]
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+pub r32_spi0_dma_end : crate :: Reg < r32_spi0_dma_end :: R32_SPI0_DMA_END_SPEC > , } # [doc = "R8_SPI0_CTRL_MOD register accessor: an alias for `Reg<R8_SPI0_CTRL_MOD_SPEC>`"]
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+pub type R8_SPI0_CTRL_MOD = crate :: Reg < r8_spi0_ctrl_mod :: R8_SPI0_CTRL_MOD_SPEC > ; # [doc = "SPI0 mode control"]
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+pub mod r8_spi0_ctrl_mod { # [doc = "Register `R8_SPI0_CTRL_MOD` reader"]
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+pub struct R (crate :: R < R8_SPI0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CTRL_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CTRL_MOD` writer"]
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+pub struct W (crate :: W < R8_SPI0_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CTRL_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_MODE_SLAVE` reader - SPI slave mode"]
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+pub struct RB_SPI_MODE_SLAVE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MODE_SLAVE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MODE_SLAVE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MODE_SLAVE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MODE_SLAVE` writer - SPI slave mode"]
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+pub struct RB_SPI_MODE_SLAVE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MODE_SLAVE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_ALL_CLEAR` reader - force clear SPI FIFO and count"]
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+pub struct RB_SPI_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_ALL_CLEAR` writer - force clear SPI FIFO and count"]
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+pub struct RB_SPI_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_2WIRE_MOD` reader - SPI enable 2 wire mode"]
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+pub struct RB_SPI_2WIRE_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_2WIRE_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_2WIRE_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_2WIRE_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_2WIRE_MOD` writer - SPI enable 2 wire mode"]
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+pub struct RB_SPI_2WIRE_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_2WIRE_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` reader - SPI master clock mode _SPI slave command mode"]
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+pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` writer - SPI master clock mode _SPI slave command mode"]
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+pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_FIFO_DIR` reader - SPI FIFO direction"]
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+pub struct RB_SPI_FIFO_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_DIR` writer - SPI FIFO direction"]
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+pub struct RB_SPI_FIFO_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FIFO_DIR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_SCK_OE` reader - SPI SCK output enable"]
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+pub struct RB_SPI_SCK_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SCK_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SCK_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SCK_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SCK_OE` writer - SPI SCK output enable"]
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+pub struct RB_SPI_SCK_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_SCK_OE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SPI_MOSI_OE` reader - SPI MOSI output enable"]
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+pub struct RB_SPI_MOSI_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MOSI_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MOSI_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MOSI_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MOSI_OE` writer - SPI MOSI output enable"]
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|
+pub struct RB_SPI_MOSI_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MOSI_OE_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_MISO_OE` reader - SPI MISO output enable"]
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|
|
+pub struct RB_SPI_MISO_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MISO_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MISO_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MISO_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MISO_OE` writer - SPI MISO output enable"]
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|
|
+pub struct RB_SPI_MISO_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MISO_OE_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - SPI slave mode"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_spi_mode_slave (& self) -> RB_SPI_MODE_SLAVE_R { RB_SPI_MODE_SLAVE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear SPI FIFO and count"]
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|
+# [inline (always)]
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|
|
+pub fn rb_spi_all_clear (& self) -> RB_SPI_ALL_CLEAR_R { RB_SPI_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SPI enable 2 wire mode"]
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|
+# [inline (always)]
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|
|
+pub fn rb_spi_2wire_mod (& self) -> RB_SPI_2WIRE_MOD_R { RB_SPI_2WIRE_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - SPI master clock mode _SPI slave command mode"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SPI FIFO direction"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_fifo_dir (& self) -> RB_SPI_FIFO_DIR_R { RB_SPI_FIFO_DIR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI SCK output enable"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_sck_oe (& self) -> RB_SPI_SCK_OE_R { RB_SPI_SCK_OE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI MOSI output enable"]
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+# [inline (always)]
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+pub fn rb_spi_mosi_oe (& self) -> RB_SPI_MOSI_OE_R { RB_SPI_MOSI_OE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI MISO output enable"]
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+# [inline (always)]
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+pub fn rb_spi_miso_oe (& self) -> RB_SPI_MISO_OE_R { RB_SPI_MISO_OE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI slave mode"]
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+# [inline (always)]
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+pub fn rb_spi_mode_slave (& mut self) -> RB_SPI_MODE_SLAVE_W { RB_SPI_MODE_SLAVE_W { w : self } } # [doc = "Bit 1 - force clear SPI FIFO and count"]
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+# [inline (always)]
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+pub fn rb_spi_all_clear (& mut self) -> RB_SPI_ALL_CLEAR_W { RB_SPI_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - SPI enable 2 wire mode"]
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+# [inline (always)]
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+pub fn rb_spi_2wire_mod (& mut self) -> RB_SPI_2WIRE_MOD_W { RB_SPI_2WIRE_MOD_W { w : self } } # [doc = "Bit 3 - SPI master clock mode _SPI slave command mode"]
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+# [inline (always)]
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+pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& mut self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { w : self } } # [doc = "Bit 4 - SPI FIFO direction"]
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+# [inline (always)]
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+pub fn rb_spi_fifo_dir (& mut self) -> RB_SPI_FIFO_DIR_W { RB_SPI_FIFO_DIR_W { w : self } } # [doc = "Bit 5 - SPI SCK output enable"]
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+# [inline (always)]
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+pub fn rb_spi_sck_oe (& mut self) -> RB_SPI_SCK_OE_W { RB_SPI_SCK_OE_W { w : self } } # [doc = "Bit 6 - SPI MOSI output enable"]
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+# [inline (always)]
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+pub fn rb_spi_mosi_oe (& mut self) -> RB_SPI_MOSI_OE_W { RB_SPI_MOSI_OE_W { w : self } } # [doc = "Bit 7 - SPI MISO output enable"]
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+# [inline (always)]
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+pub fn rb_spi_miso_oe (& mut self) -> RB_SPI_MISO_OE_W { RB_SPI_MISO_OE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_ctrl_mod](index.html) module"]
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+pub struct R8_SPI0_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_ctrl_mod::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_ctrl_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CTRL_MOD to value 0x02"]
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+impl crate :: Resettable for R8_SPI0_CTRL_MOD_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_SPI0_CTRL_CFG register accessor: an alias for `Reg<R8_SPI0_CTRL_CFG_SPEC>`"]
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+pub type R8_SPI0_CTRL_CFG = crate :: Reg < r8_spi0_ctrl_cfg :: R8_SPI0_CTRL_CFG_SPEC > ; # [doc = "SPI0 configuration control"]
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+pub mod r8_spi0_ctrl_cfg { # [doc = "Register `R8_SPI0_CTRL_CFG` reader"]
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+pub struct R (crate :: R < R8_SPI0_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CTRL_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CTRL_CFG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CTRL_CFG` writer"]
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+pub struct W (crate :: W < R8_SPI0_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CTRL_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CTRL_CFG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_DMA_ENABLE` reader - SPI DMA enable"]
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+pub struct RB_SPI_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_ENABLE` writer - SPI DMA enable"]
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+pub struct RB_SPI_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_DMA_LOOP` reader - SPI DMA address loop enable"]
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+pub struct RB_SPI_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_LOOP` writer - SPI DMA address loop enable"]
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+pub struct RB_SPI_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_AUTO_IF` reader - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
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+pub struct RB_SPI_AUTO_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_AUTO_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_AUTO_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_AUTO_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_AUTO_IF` writer - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
|
+pub struct RB_SPI_AUTO_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_AUTO_IF_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_BIT_ORDER` reader - SPI bit data order"]
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|
|
+pub struct RB_SPI_BIT_ORDER_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_BIT_ORDER_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_BIT_ORDER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_BIT_ORDER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_BIT_ORDER` writer - SPI bit data order"]
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|
|
+pub struct RB_SPI_BIT_ORDER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_BIT_ORDER_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - SPI DMA enable"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_dma_enable (& self) -> RB_SPI_DMA_ENABLE_R { RB_SPI_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - SPI DMA address loop enable"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_dma_loop (& self) -> RB_SPI_DMA_LOOP_R { RB_SPI_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_auto_if (& self) -> RB_SPI_AUTO_IF_R { RB_SPI_AUTO_IF_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI bit data order"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_bit_order (& self) -> RB_SPI_BIT_ORDER_R { RB_SPI_BIT_ORDER_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI DMA enable"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_dma_enable (& mut self) -> RB_SPI_DMA_ENABLE_W { RB_SPI_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - SPI DMA address loop enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_dma_loop (& mut self) -> RB_SPI_DMA_LOOP_W { RB_SPI_DMA_LOOP_W { w : self } } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_auto_if (& mut self) -> RB_SPI_AUTO_IF_W { RB_SPI_AUTO_IF_W { w : self } } # [doc = "Bit 5 - SPI bit data order"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_bit_order (& mut self) -> RB_SPI_BIT_ORDER_W { RB_SPI_BIT_ORDER_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_ctrl_cfg](index.html) module"]
|
|
|
+pub struct R8_SPI0_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_ctrl_cfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI0_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_ctrl_cfg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_SPI0_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CTRL_CFG to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI0_CTRL_CFG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_INTER_EN register accessor: an alias for `Reg<R8_SPI0_INTER_EN_SPEC>`"]
|
|
|
+pub type R8_SPI0_INTER_EN = crate :: Reg < r8_spi0_inter_en :: R8_SPI0_INTER_EN_SPEC > ; # [doc = "SPI0 interrupt enable"]
|
|
|
+pub mod r8_spi0_inter_en { # [doc = "Register `R8_SPI0_INTER_EN` reader"]
|
|
|
+pub struct R (crate :: R < R8_SPI0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_INTER_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_INTER_EN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SPI0_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_INTER_EN` writer"]
|
|
|
+pub struct W (crate :: W < R8_SPI0_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_INTER_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_INTER_EN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_SPI0_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IE_CNT_END` reader - enable interrupt for SPI total byte count end"]
|
|
|
+pub struct RB_SPI_IE_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_CNT_END` writer - enable interrupt for SPI total byte count end"]
|
|
|
+pub struct RB_SPI_IE_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IE_BYTE_END` reader - enable interrupt for SPI byte exchanged"]
|
|
|
+pub struct RB_SPI_IE_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_BYTE_END` writer - enable interrupt for SPI byte exchanged"]
|
|
|
+pub struct RB_SPI_IE_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_HF` reader - enable interrupt for SPI FIFO half"]
|
|
|
+pub struct RB_SPI_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_HF` writer - enable interrupt for SPI FIFO half"]
|
|
|
+pub struct RB_SPI_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IE_DMA_END` reader - enable interrupt for SPI DMA completion"]
|
|
|
+pub struct RB_SPI_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_DMA_END` writer - enable interrupt for SPI DMA completion"]
|
|
|
+pub struct RB_SPI_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_OV` reader - enable interrupt for SPI FIFO overflow"]
|
|
|
+pub struct RB_SPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_OV` writer - enable interrupt for SPI FIFO overflow"]
|
|
|
+pub struct RB_SPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_IE_FST_BYTE` reader - enable interrupt for SPI slave mode first byte received"]
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+pub struct RB_SPI_IE_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FST_BYTE` writer - enable interrupt for SPI slave mode first byte received"]
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+pub struct RB_SPI_IE_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
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+# [inline (always)]
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+pub fn rb_spi_ie_cnt_end (& self) -> RB_SPI_IE_CNT_END_R { RB_SPI_IE_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
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+# [inline (always)]
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+pub fn rb_spi_ie_byte_end (& self) -> RB_SPI_IE_BYTE_END_R { RB_SPI_IE_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fifo_hf (& self) -> RB_SPI_IE_FIFO_HF_R { RB_SPI_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
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+# [inline (always)]
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+pub fn rb_spi_ie_dma_end (& self) -> RB_SPI_IE_DMA_END_R { RB_SPI_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fifo_ov (& self) -> RB_SPI_IE_FIFO_OV_R { RB_SPI_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fst_byte (& self) -> RB_SPI_IE_FST_BYTE_R { RB_SPI_IE_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
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+# [inline (always)]
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+pub fn rb_spi_ie_cnt_end (& mut self) -> RB_SPI_IE_CNT_END_W { RB_SPI_IE_CNT_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
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+# [inline (always)]
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+pub fn rb_spi_ie_byte_end (& mut self) -> RB_SPI_IE_BYTE_END_W { RB_SPI_IE_BYTE_END_W { w : self } } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fifo_hf (& mut self) -> RB_SPI_IE_FIFO_HF_W { RB_SPI_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
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+# [inline (always)]
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+pub fn rb_spi_ie_dma_end (& mut self) -> RB_SPI_IE_DMA_END_W { RB_SPI_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fifo_ov (& mut self) -> RB_SPI_IE_FIFO_OV_W { RB_SPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fst_byte (& mut self) -> RB_SPI_IE_FST_BYTE_W { RB_SPI_IE_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_inter_en](index.html) module"]
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+pub struct R8_SPI0_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_SPI0_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_inter_en::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_inter_en::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_INTER_EN to value 0"]
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+impl crate :: Resettable for R8_SPI0_INTER_EN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE register accessor: an alias for `Reg<R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC>`"]
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+pub type R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE = crate :: Reg < r8_spi0_clock_div_r8_spi0_slave_pre :: R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [doc = "SPI0 master clock divisor_ SPI0 slave preset value"]
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+pub mod r8_spi0_clock_div_r8_spi0_slave_pre { # [doc = "Register `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` reader"]
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+pub struct R (crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` writer"]
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+pub struct W (crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` reader - master clock divisor _ SPI0 slave preset value"]
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+pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE` writer - master clock divisor _ SPI0 slave preset value"]
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+pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - master clock divisor _ SPI0 slave preset value"]
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+# [inline (always)]
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+pub fn r8_spi0_clock_div_r8_spi0_slave_pre (& self) -> R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - master clock divisor _ SPI0 slave preset value"]
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+# [inline (always)]
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+pub fn r8_spi0_clock_div_r8_spi0_slave_pre (& mut self) -> R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W { R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 master clock divisor_ SPI0 slave preset value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_clock_div_r8_spi0_slave_pre](index.html) module"]
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+pub struct R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC ; impl crate :: RegisterSpec for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_clock_div_r8_spi0_slave_pre::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_clock_div_r8_spi0_slave_pre::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE to value 0x10"]
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+impl crate :: Resettable for R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x10 } } } # [doc = "R8_SPI0_BUFFER register accessor: an alias for `Reg<R8_SPI0_BUFFER_SPEC>`"]
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+pub type R8_SPI0_BUFFER = crate :: Reg < r8_spi0_buffer :: R8_SPI0_BUFFER_SPEC > ; # [doc = "SPI0 data buffer"]
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+pub mod r8_spi0_buffer { # [doc = "Register `R8_SPI0_BUFFER` reader"]
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+pub struct R (crate :: R < R8_SPI0_BUFFER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_BUFFER_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_BUFFER_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_BUFFER_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SPI0_BUFFER` reader - SPI data buffer"]
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+pub struct R8_SPI0_BUFFER_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_BUFFER_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_BUFFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_BUFFER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - SPI data buffer"]
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+# [inline (always)]
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+pub fn r8_spi0_buffer (& self) -> R8_SPI0_BUFFER_R { R8_SPI0_BUFFER_R :: new ((self . bits & 0xff) as u8) } } # [doc = "SPI0 data buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_buffer](index.html) module"]
|
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+pub struct R8_SPI0_BUFFER_SPEC ; impl crate :: RegisterSpec for R8_SPI0_BUFFER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_buffer::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_BUFFER_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI0_BUFFER to value 0"]
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|
+impl crate :: Resettable for R8_SPI0_BUFFER_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_RUN_FLAG register accessor: an alias for `Reg<R8_SPI0_RUN_FLAG_SPEC>`"]
|
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|
+pub type R8_SPI0_RUN_FLAG = crate :: Reg < r8_spi0_run_flag :: R8_SPI0_RUN_FLAG_SPEC > ; # [doc = "SPI0 work flag"]
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|
+pub mod r8_spi0_run_flag { # [doc = "Register `R8_SPI0_RUN_FLAG` reader"]
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|
+pub struct R (crate :: R < R8_SPI0_RUN_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_RUN_FLAG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_RUN_FLAG_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_SPI0_RUN_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_SPI_SLV_CMD_ACT` reader - SPI slave command flag"]
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|
|
+pub struct RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CMD_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CMD_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_READY` reader - SPI FIFO ready status"]
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|
+pub struct RB_SPI_FIFO_READY_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_READY_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_READY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_READY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_CS_LOAD` reader - SPI slave chip-select loading status"]
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|
+pub struct RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CS_LOAD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CS_LOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_SELECT` reader - SPI slave selection status"]
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|
+pub struct RB_SPI_SLV_SELECT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_SELECT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_SELECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_SELECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 4 - SPI slave command flag"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_slv_cmd_act (& self) -> RB_SPI_SLV_CMD_ACT_R { RB_SPI_SLV_CMD_ACT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI FIFO ready status"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_fifo_ready (& self) -> RB_SPI_FIFO_READY_R { RB_SPI_FIFO_READY_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI slave chip-select loading status"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_spi_slv_cs_load (& self) -> RB_SPI_SLV_CS_LOAD_R { RB_SPI_SLV_CS_LOAD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI slave selection status"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_slv_select (& self) -> RB_SPI_SLV_SELECT_R { RB_SPI_SLV_SELECT_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "SPI0 work flag\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_run_flag](index.html) module"]
|
|
|
+pub struct R8_SPI0_RUN_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_RUN_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_run_flag::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI0_RUN_FLAG_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI0_RUN_FLAG to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI0_RUN_FLAG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_INT_FLAG register accessor: an alias for `Reg<R8_SPI0_INT_FLAG_SPEC>`"]
|
|
|
+pub type R8_SPI0_INT_FLAG = crate :: Reg < r8_spi0_int_flag :: R8_SPI0_INT_FLAG_SPEC > ; # [doc = "SPI0 interrupt flag"]
|
|
|
+pub mod r8_spi0_int_flag { # [doc = "Register `R8_SPI0_INT_FLAG` reader"]
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|
|
+pub struct R (crate :: R < R8_SPI0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_INT_FLAG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_INT_FLAG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SPI0_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_INT_FLAG` writer"]
|
|
|
+pub struct W (crate :: W < R8_SPI0_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_INT_FLAG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_INT_FLAG_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_SPI0_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IF_CNT_END` reader - interrupt flag for SPI total byte count end"]
|
|
|
+pub struct RB_SPI_IF_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_CNT_END` writer - interrupt flag for SPI total byte count end"]
|
|
|
+pub struct RB_SPI_IF_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IF_BYTE_END` reader - interrupt flag for SPI byte exchanged"]
|
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|
+pub struct RB_SPI_IF_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_BYTE_END` writer - interrupt flag for SPI byte exchanged"]
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+pub struct RB_SPI_IF_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_HF` reader - interrupt flag for SPI FIFO half"]
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+pub struct RB_SPI_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_HF` writer - interrupt flag for SPI FIFO half"]
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+pub struct RB_SPI_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IF_DMA_END` reader - interrupt flag for SPI DMA completion"]
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+pub struct RB_SPI_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_DMA_END` writer - interrupt flag for SPI DMA completion"]
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+pub struct RB_SPI_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_OV` reader - interrupt flag for SPI FIFO overflow"]
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+pub struct RB_SPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_OV` writer - interrupt flag for SPI FIFO overflow"]
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+pub struct RB_SPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_FREE` reader - current SPI free status"]
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+pub struct RB_SPI_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FREE` writer - current SPI free status"]
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+pub struct RB_SPI_FREE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FREE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_IF_FST_BYTE` reader - interrupt flag for SPI slave mode first byte received"]
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+pub struct RB_SPI_IF_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FST_BYTE` writer - interrupt flag for SPI slave mode first byte received"]
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+pub struct RB_SPI_IF_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
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+# [inline (always)]
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+pub fn rb_spi_if_cnt_end (& self) -> RB_SPI_IF_CNT_END_R { RB_SPI_IF_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_byte_end (& self) -> RB_SPI_IF_BYTE_END_R { RB_SPI_IF_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
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+# [inline (always)]
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+pub fn rb_spi_if_fifo_hf (& self) -> RB_SPI_IF_FIFO_HF_R { RB_SPI_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_dma_end (& self) -> RB_SPI_IF_DMA_END_R { RB_SPI_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fifo_ov (& self) -> RB_SPI_IF_FIFO_OV_R { RB_SPI_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - current SPI free status"]
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|
+# [inline (always)]
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+pub fn rb_spi_free (& self) -> RB_SPI_FREE_R { RB_SPI_FREE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_if_fst_byte (& self) -> RB_SPI_IF_FST_BYTE_R { RB_SPI_IF_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_if_cnt_end (& mut self) -> RB_SPI_IF_CNT_END_W { RB_SPI_IF_CNT_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_if_byte_end (& mut self) -> RB_SPI_IF_BYTE_END_W { RB_SPI_IF_BYTE_END_W { w : self } } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_fifo_hf (& mut self) -> RB_SPI_IF_FIFO_HF_W { RB_SPI_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_dma_end (& mut self) -> RB_SPI_IF_DMA_END_W { RB_SPI_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_fifo_ov (& mut self) -> RB_SPI_IF_FIFO_OV_W { RB_SPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 6 - current SPI free status"]
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|
+# [inline (always)]
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+pub fn rb_spi_free (& mut self) -> RB_SPI_FREE_W { RB_SPI_FREE_W { w : self } } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fst_byte (& mut self) -> RB_SPI_IF_FST_BYTE_W { RB_SPI_IF_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_int_flag](index.html) module"]
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+pub struct R8_SPI0_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI0_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_int_flag::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_int_flag::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_INT_FLAG to value 0"]
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+impl crate :: Resettable for R8_SPI0_INT_FLAG_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO_COUNT register accessor: an alias for `Reg<R8_SPI0_FIFO_COUNT_SPEC>`"]
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+pub type R8_SPI0_FIFO_COUNT = crate :: Reg < r8_spi0_fifo_count :: R8_SPI0_FIFO_COUNT_SPEC > ; # [doc = "SPI0 FIFO count status"]
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|
+pub mod r8_spi0_fifo_count { # [doc = "Register `R8_SPI0_FIFO_COUNT` reader"]
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+pub struct R (crate :: R < R8_SPI0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_COUNT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_COUNT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO_COUNT` writer"]
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|
+pub struct W (crate :: W < R8_SPI0_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_COUNT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_COUNT_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_FIFO_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO_COUNT` reader - SPI FIFO count status"]
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+pub struct R8_SPI0_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO_COUNT` writer - SPI FIFO count status"]
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|
|
+pub struct R8_SPI0_FIFO_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count status"]
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|
|
+# [inline (always)]
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|
+pub fn r8_spi0_fifo_count (& self) -> R8_SPI0_FIFO_COUNT_R { R8_SPI0_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count status"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r8_spi0_fifo_count (& mut self) -> R8_SPI0_FIFO_COUNT_W { R8_SPI0_FIFO_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo_count](index.html) module"]
|
|
|
+pub struct R8_SPI0_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo_count::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI0_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo_count::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_SPI0_FIFO_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI0_FIFO_COUNT_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SPI0_TOTAL_CNT register accessor: an alias for `Reg<R16_SPI0_TOTAL_CNT_SPEC>`"]
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|
|
+pub type R16_SPI0_TOTAL_CNT = crate :: Reg < r16_spi0_total_cnt :: R16_SPI0_TOTAL_CNT_SPEC > ; # [doc = "SPI0 total byte count, only low 12 bit"]
|
|
|
+pub mod r16_spi0_total_cnt { # [doc = "Register `R16_SPI0_TOTAL_CNT` reader"]
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|
|
+pub struct R (crate :: R < R16_SPI0_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SPI0_TOTAL_CNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SPI0_TOTAL_CNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_SPI0_TOTAL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SPI0_TOTAL_CNT` writer"]
|
|
|
+pub struct W (crate :: W < R16_SPI0_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SPI0_TOTAL_CNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SPI0_TOTAL_CNT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_SPI0_TOTAL_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_TOTAL_CNT` reader - SPI total byte count, only low 12 bit"]
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|
|
+pub struct R16_SPI0_TOTAL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl R16_SPI0_TOTAL_CNT_R { pub (crate) fn new (bits : u16) -> Self { R16_SPI0_TOTAL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_TOTAL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_TOTAL_CNT` writer - SPI total byte count, only low 12 bit"]
|
|
|
+pub struct R16_SPI0_TOTAL_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_TOTAL_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_spi0_total_cnt (& self) -> R16_SPI0_TOTAL_CNT_R { R16_SPI0_TOTAL_CNT_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_spi0_total_cnt (& mut self) -> R16_SPI0_TOTAL_CNT_W { R16_SPI0_TOTAL_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 total byte count, only low 12 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_spi0_total_cnt](index.html) module"]
|
|
|
+pub struct R16_SPI0_TOTAL_CNT_SPEC ; impl crate :: RegisterSpec for R16_SPI0_TOTAL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_spi0_total_cnt::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_SPI0_TOTAL_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_spi0_total_cnt::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_SPI0_TOTAL_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SPI0_TOTAL_CNT to value 0"]
|
|
|
+impl crate :: Resettable for R16_SPI0_TOTAL_CNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO register accessor: an alias for `Reg<R8_SPI0_FIFO_SPEC>`"]
|
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+pub type R8_SPI0_FIFO = crate :: Reg < r8_spi0_fifo :: R8_SPI0_FIFO_SPEC > ; # [doc = "SPI0 FIFO register"]
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+pub mod r8_spi0_fifo { # [doc = "Register `R8_SPI0_FIFO` reader"]
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+pub struct R (crate :: R < R8_SPI0_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO` writer"]
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+pub struct W (crate :: W < R8_SPI0_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO` reader - SPI FIFO register"]
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+pub struct R8_SPI0_FIFO_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO` writer - SPI FIFO register"]
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+pub struct R8_SPI0_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO register"]
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+# [inline (always)]
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+pub fn r8_spi0_fifo (& self) -> R8_SPI0_FIFO_R { R8_SPI0_FIFO_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO register"]
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+# [inline (always)]
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+pub fn r8_spi0_fifo (& mut self) -> R8_SPI0_FIFO_W { R8_SPI0_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo](index.html) module"]
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+pub struct R8_SPI0_FIFO_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO to value 0"]
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+impl crate :: Resettable for R8_SPI0_FIFO_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI0_FIFO_COUNT1 register accessor: an alias for `Reg<R8_SPI0_FIFO_COUNT1_SPEC>`"]
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+pub type R8_SPI0_FIFO_COUNT1 = crate :: Reg < r8_spi0_fifo_count1 :: R8_SPI0_FIFO_COUNT1_SPEC > ; # [doc = "SPI0 FIFO count status"]
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+pub mod r8_spi0_fifo_count1 { # [doc = "Register `R8_SPI0_FIFO_COUNT1` reader"]
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+pub struct R (crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI0_FIFO_COUNT1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI0_FIFO_COUNT1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI0_FIFO_COUNT1` writer"]
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+pub struct W (crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI0_FIFO_COUNT1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI0_FIFO_COUNT1_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI0_FIFO_COUNT1` reader - SPI FIFO count statu"]
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+pub struct R8_SPI0_FIFO_COUNT1_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI0_FIFO_COUNT1_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI0_FIFO_COUNT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI0_FIFO_COUNT1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI0_FIFO_COUNT1` writer - SPI FIFO count statu"]
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+pub struct R8_SPI0_FIFO_COUNT1_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI0_FIFO_COUNT1_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count statu"]
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+# [inline (always)]
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+pub fn r8_spi0_fifo_count1 (& self) -> R8_SPI0_FIFO_COUNT1_R { R8_SPI0_FIFO_COUNT1_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count statu"]
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+# [inline (always)]
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+pub fn r8_spi0_fifo_count1 (& mut self) -> R8_SPI0_FIFO_COUNT1_W { R8_SPI0_FIFO_COUNT1_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_fifo_count1](index.html) module"]
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+pub struct R8_SPI0_FIFO_COUNT1_SPEC ; impl crate :: RegisterSpec for R8_SPI0_FIFO_COUNT1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi0_fifo_count1::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI0_FIFO_COUNT1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi0_fifo_count1::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI0_FIFO_COUNT1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI0_FIFO_COUNT1 to value 0"]
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+impl crate :: Resettable for R8_SPI0_FIFO_COUNT1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_NOW register accessor: an alias for `Reg<R32_SPI0_DMA_NOW_SPEC>`"]
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+pub type R32_SPI0_DMA_NOW = crate :: Reg < r32_spi0_dma_now :: R32_SPI0_DMA_NOW_SPEC > ; # [doc = "SPI0 DMA current address"]
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+pub mod r32_spi0_dma_now { # [doc = "Register `R32_SPI0_DMA_NOW` reader"]
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+pub struct R (crate :: R < R32_SPI0_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_NOW_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_SPI0_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_NOW` writer"]
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+pub struct W (crate :: W < R32_SPI0_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_NOW_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_SPI0_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_NOW` reader - SPI DMA current address"]
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+pub struct R16_SPI0_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_NOW` writer - SPI DMA current address"]
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+pub struct R16_SPI0_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA current address"]
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+# [inline (always)]
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+pub fn r16_spi0_dma_now (& self) -> R16_SPI0_DMA_NOW_R { R16_SPI0_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA current address"]
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+# [inline (always)]
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+pub fn r16_spi0_dma_now (& mut self) -> R16_SPI0_DMA_NOW_W { R16_SPI0_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_now](index.html) module"]
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+pub struct R32_SPI0_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_now::R](R) reader structure"]
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+impl crate :: Readable for R32_SPI0_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_now::W](W) writer structure"]
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+impl crate :: Writable for R32_SPI0_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_NOW to value 0"]
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+impl crate :: Resettable for R32_SPI0_DMA_NOW_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_BEG register accessor: an alias for `Reg<R32_SPI0_DMA_BEG_SPEC>`"]
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+pub type R32_SPI0_DMA_BEG = crate :: Reg < r32_spi0_dma_beg :: R32_SPI0_DMA_BEG_SPEC > ; # [doc = "SPI0 DMA begin address"]
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+pub mod r32_spi0_dma_beg { # [doc = "Register `R32_SPI0_DMA_BEG` reader"]
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+pub struct R (crate :: R < R32_SPI0_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_BEG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_SPI0_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_BEG` writer"]
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+pub struct W (crate :: W < R32_SPI0_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_BEG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_SPI0_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_BEG` reader - SPI DMA begin address"]
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+pub struct R16_SPI0_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_BEG` writer - SPI DMA begin address"]
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+pub struct R16_SPI0_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA begin address"]
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+# [inline (always)]
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+pub fn r16_spi0_dma_beg (& self) -> R16_SPI0_DMA_BEG_R { R16_SPI0_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA begin address"]
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+# [inline (always)]
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+pub fn r16_spi0_dma_beg (& mut self) -> R16_SPI0_DMA_BEG_W { R16_SPI0_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_beg](index.html) module"]
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+pub struct R32_SPI0_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_beg::R](R) reader structure"]
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+impl crate :: Readable for R32_SPI0_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_beg::W](W) writer structure"]
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+impl crate :: Writable for R32_SPI0_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_BEG to value 0"]
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|
+impl crate :: Resettable for R32_SPI0_DMA_BEG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI0_DMA_END register accessor: an alias for `Reg<R32_SPI0_DMA_END_SPEC>`"]
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+pub type R32_SPI0_DMA_END = crate :: Reg < r32_spi0_dma_end :: R32_SPI0_DMA_END_SPEC > ; # [doc = "SPI0 DMA end address"]
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+pub mod r32_spi0_dma_end { # [doc = "Register `R32_SPI0_DMA_END` reader"]
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|
+pub struct R (crate :: R < R32_SPI0_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI0_DMA_END_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI0_DMA_END_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_SPI0_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI0_DMA_END` writer"]
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+pub struct W (crate :: W < R32_SPI0_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI0_DMA_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI0_DMA_END_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R32_SPI0_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI0_DMA_END` reader - SPI DMA end address"]
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|
+pub struct R16_SPI0_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI0_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI0_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI0_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI0_DMA_END` writer - SPI DMA end address"]
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|
+pub struct R16_SPI0_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI0_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA end address"]
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|
+# [inline (always)]
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|
+pub fn r16_spi0_dma_end (& self) -> R16_SPI0_DMA_END_R { R16_SPI0_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA end address"]
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|
|
+# [inline (always)]
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|
|
+pub fn r16_spi0_dma_end (& mut self) -> R16_SPI0_DMA_END_W { R16_SPI0_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi0_dma_end](index.html) module"]
|
|
|
+pub struct R32_SPI0_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_SPI0_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi0_dma_end::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_SPI0_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi0_dma_end::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_SPI0_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI0_DMA_END to value 0"]
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|
|
+impl crate :: Resettable for R32_SPI0_DMA_END_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "SPI1 register"]
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|
+pub struct SPI1 { _marker : PhantomData < * const () > } unsafe impl Send for SPI1 { } impl SPI1 { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const spi1 :: RegisterBlock = 0x4000_4400 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const spi1 :: RegisterBlock { Self :: PTR } } impl Deref for SPI1 { type Target = spi1 :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SPI1 { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SPI1") . finish () } } # [doc = "SPI1 register"]
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+pub mod spi1 { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - SPI1 mode control"]
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+pub r8_spi1_ctrl_mod : crate :: Reg < r8_spi1_ctrl_mod :: R8_SPI1_CTRL_MOD_SPEC > , # [doc = "0x01 - SPI1 configuration control"]
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+pub r8_spi1_ctrl_cfg : crate :: Reg < r8_spi1_ctrl_cfg :: R8_SPI1_CTRL_CFG_SPEC > , # [doc = "0x02 - SPI1 interrupt enable"]
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+pub r8_spi1_inter_en : crate :: Reg < r8_spi1_inter_en :: R8_SPI1_INTER_EN_SPEC > , # [doc = "0x03 - SPI1 master clock divisor _ SPI1 slave preset value"]
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+pub r8_spi1_clock_div_r8_spi1_slave_pre : crate :: Reg < r8_spi1_clock_div_r8_spi1_slave_pre :: R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > , # [doc = "0x04 - SPI1 data buffer"]
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+pub r8_spi1_buffer : crate :: Reg < r8_spi1_buffer :: R8_SPI1_BUFFER_SPEC > , # [doc = "0x05 - SPI1 work flag"]
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+pub r8_spi1_run_flag : crate :: Reg < r8_spi1_run_flag :: R8_SPI1_RUN_FLAG_SPEC > , # [doc = "0x06 - SPI1 interrupt flag"]
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+pub r8_spi1_int_flag : crate :: Reg < r8_spi1_int_flag :: R8_SPI1_INT_FLAG_SPEC > , # [doc = "0x07 - SPI1 FIFO count status"]
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+pub r8_spi1_fifo_count : crate :: Reg < r8_spi1_fifo_count :: R8_SPI1_FIFO_COUNT_SPEC > , _reserved8 : [u8 ; 0x04]
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+, # [doc = "0x0c - SPI1 total byte count, only low 12 bit"]
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+pub r16_spi1_total_cnt : crate :: Reg < r16_spi1_total_cnt :: R16_SPI1_TOTAL_CNT_SPEC > , _reserved9 : [u8 ; 0x02]
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+, # [doc = "0x10 - SPI1 FIFO register"]
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+pub r8_spi1_fifo : crate :: Reg < r8_spi1_fifo :: R8_SPI1_FIFO_SPEC > , _reserved10 : [u8 ; 0x02]
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+, # [doc = "0x13 - SPI0 FIFO count status"]
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+pub r8_spi1_fifo_count1 : crate :: Reg < r8_spi1_fifo_count1 :: R8_SPI1_FIFO_COUNT1_SPEC > , # [doc = "0x14 - SPI1 DMA current address"]
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+pub r32_spi1_dma_now : crate :: Reg < r32_spi1_dma_now :: R32_SPI1_DMA_NOW_SPEC > , # [doc = "0x18 - SPI1 DMA begin address"]
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+pub r32_spi1_dma_beg : crate :: Reg < r32_spi1_dma_beg :: R32_SPI1_DMA_BEG_SPEC > , # [doc = "0x1c - SPI1 DMA end address"]
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+pub r32_spi1_dma_end : crate :: Reg < r32_spi1_dma_end :: R32_SPI1_DMA_END_SPEC > , } # [doc = "R8_SPI1_CTRL_MOD register accessor: an alias for `Reg<R8_SPI1_CTRL_MOD_SPEC>`"]
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+pub type R8_SPI1_CTRL_MOD = crate :: Reg < r8_spi1_ctrl_mod :: R8_SPI1_CTRL_MOD_SPEC > ; # [doc = "SPI1 mode control"]
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+pub mod r8_spi1_ctrl_mod { # [doc = "Register `R8_SPI1_CTRL_MOD` reader"]
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+pub struct R (crate :: R < R8_SPI1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CTRL_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CTRL_MOD` writer"]
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+pub struct W (crate :: W < R8_SPI1_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CTRL_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CTRL_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI1_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_MODE_SLAVE` reader - SPI slave mode"]
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+pub struct RB_SPI_MODE_SLAVE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MODE_SLAVE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MODE_SLAVE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MODE_SLAVE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MODE_SLAVE` writer - SPI slave mode"]
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+pub struct RB_SPI_MODE_SLAVE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MODE_SLAVE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_ALL_CLEAR` reader - force clear SPI FIFO and count"]
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+pub struct RB_SPI_ALL_CLEAR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_ALL_CLEAR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_ALL_CLEAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_ALL_CLEAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_ALL_CLEAR` writer - force clear SPI FIFO and count"]
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+pub struct RB_SPI_ALL_CLEAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_ALL_CLEAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_2WIRE_MOD` reader - SPI enable 2 wire mode"]
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+pub struct RB_SPI_2WIRE_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_2WIRE_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_2WIRE_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_2WIRE_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_2WIRE_MOD` writer - SPI enable 2 wire mode"]
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+pub struct RB_SPI_2WIRE_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_2WIRE_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` reader - SPI master clock mode _ SPI slave command mode"]
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+pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD` writer - SPI master clock mode _ SPI slave command mode"]
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+pub struct RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_FIFO_DIR` reader - SPI FIFO direction"]
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+pub struct RB_SPI_FIFO_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_DIR` writer - SPI FIFO direction"]
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+pub struct RB_SPI_FIFO_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FIFO_DIR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_SCK_OE` reader - SPI SCK output enable"]
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+pub struct RB_SPI_SCK_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SCK_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SCK_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SCK_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SCK_OE` writer - SPI SCK output enable"]
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+pub struct RB_SPI_SCK_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_SCK_OE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_SPI_MOSI_OE` reader - SPI MOSI output enable"]
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+pub struct RB_SPI_MOSI_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MOSI_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MOSI_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MOSI_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MOSI_OE` writer - SPI MOSI output enable"]
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+pub struct RB_SPI_MOSI_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MOSI_OE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_MISO_OE` reader - SPI MISO output enable"]
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+pub struct RB_SPI_MISO_OE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_MISO_OE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_MISO_OE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_MISO_OE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_MISO_OE` writer - SPI MISO output enable"]
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+pub struct RB_SPI_MISO_OE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_MISO_OE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - SPI slave mode"]
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+# [inline (always)]
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+pub fn rb_spi_mode_slave (& self) -> RB_SPI_MODE_SLAVE_R { RB_SPI_MODE_SLAVE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear SPI FIFO and count"]
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+# [inline (always)]
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+pub fn rb_spi_all_clear (& self) -> RB_SPI_ALL_CLEAR_R { RB_SPI_ALL_CLEAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SPI enable 2 wire mode"]
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+# [inline (always)]
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+pub fn rb_spi_2wire_mod (& self) -> RB_SPI_2WIRE_MOD_R { RB_SPI_2WIRE_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - SPI master clock mode _ SPI slave command mode"]
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+# [inline (always)]
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+pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SPI FIFO direction"]
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+# [inline (always)]
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+pub fn rb_spi_fifo_dir (& self) -> RB_SPI_FIFO_DIR_R { RB_SPI_FIFO_DIR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI SCK output enable"]
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+# [inline (always)]
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+pub fn rb_spi_sck_oe (& self) -> RB_SPI_SCK_OE_R { RB_SPI_SCK_OE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI MOSI output enable"]
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+# [inline (always)]
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+pub fn rb_spi_mosi_oe (& self) -> RB_SPI_MOSI_OE_R { RB_SPI_MOSI_OE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI MISO output enable"]
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+# [inline (always)]
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+pub fn rb_spi_miso_oe (& self) -> RB_SPI_MISO_OE_R { RB_SPI_MISO_OE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI slave mode"]
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+# [inline (always)]
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+pub fn rb_spi_mode_slave (& mut self) -> RB_SPI_MODE_SLAVE_W { RB_SPI_MODE_SLAVE_W { w : self } } # [doc = "Bit 1 - force clear SPI FIFO and count"]
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+# [inline (always)]
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+pub fn rb_spi_all_clear (& mut self) -> RB_SPI_ALL_CLEAR_W { RB_SPI_ALL_CLEAR_W { w : self } } # [doc = "Bit 2 - SPI enable 2 wire mode"]
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+# [inline (always)]
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+pub fn rb_spi_2wire_mod (& mut self) -> RB_SPI_2WIRE_MOD_W { RB_SPI_2WIRE_MOD_W { w : self } } # [doc = "Bit 3 - SPI master clock mode _ SPI slave command mode"]
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+# [inline (always)]
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+pub fn rb_spi_mst_sck_mod_rb_spi_slv_cmd_mod (& mut self) -> RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W { w : self } } # [doc = "Bit 4 - SPI FIFO direction"]
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+# [inline (always)]
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+pub fn rb_spi_fifo_dir (& mut self) -> RB_SPI_FIFO_DIR_W { RB_SPI_FIFO_DIR_W { w : self } } # [doc = "Bit 5 - SPI SCK output enable"]
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|
+# [inline (always)]
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+pub fn rb_spi_sck_oe (& mut self) -> RB_SPI_SCK_OE_W { RB_SPI_SCK_OE_W { w : self } } # [doc = "Bit 6 - SPI MOSI output enable"]
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|
+# [inline (always)]
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+pub fn rb_spi_mosi_oe (& mut self) -> RB_SPI_MOSI_OE_W { RB_SPI_MOSI_OE_W { w : self } } # [doc = "Bit 7 - SPI MISO output enable"]
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|
+# [inline (always)]
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+pub fn rb_spi_miso_oe (& mut self) -> RB_SPI_MISO_OE_W { RB_SPI_MISO_OE_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_ctrl_mod](index.html) module"]
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+pub struct R8_SPI1_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_ctrl_mod::R](R) reader structure"]
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|
+impl crate :: Readable for R8_SPI1_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_ctrl_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI1_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CTRL_MOD to value 0x02"]
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|
+impl crate :: Resettable for R8_SPI1_CTRL_MOD_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0x02 } } } # [doc = "R8_SPI1_CTRL_CFG register accessor: an alias for `Reg<R8_SPI1_CTRL_CFG_SPEC>`"]
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|
+pub type R8_SPI1_CTRL_CFG = crate :: Reg < r8_spi1_ctrl_cfg :: R8_SPI1_CTRL_CFG_SPEC > ; # [doc = "SPI1 configuration control"]
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|
+pub mod r8_spi1_ctrl_cfg { # [doc = "Register `R8_SPI1_CTRL_CFG` reader"]
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|
|
+pub struct R (crate :: R < R8_SPI1_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CTRL_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CTRL_CFG_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_SPI1_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CTRL_CFG` writer"]
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|
+pub struct W (crate :: W < R8_SPI1_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CTRL_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CTRL_CFG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI1_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_DMA_ENABLE` reader - SPI DMA enable"]
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+pub struct RB_SPI_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_ENABLE` writer - SPI DMA enable"]
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+pub struct RB_SPI_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_DMA_LOOP` reader - SPI DMA address loop enable"]
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+pub struct RB_SPI_DMA_LOOP_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_DMA_LOOP_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_DMA_LOOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_DMA_LOOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_DMA_LOOP` writer - SPI DMA address loop enable"]
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+pub struct RB_SPI_DMA_LOOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_DMA_LOOP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_AUTO_IF` reader - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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+pub struct RB_SPI_AUTO_IF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_AUTO_IF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_AUTO_IF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_AUTO_IF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_AUTO_IF` writer - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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+pub struct RB_SPI_AUTO_IF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_AUTO_IF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_BIT_ORDER` reader - SPI bit data order"]
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+pub struct RB_SPI_BIT_ORDER_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_BIT_ORDER_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_BIT_ORDER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_BIT_ORDER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_BIT_ORDER` writer - SPI bit data order"]
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+pub struct RB_SPI_BIT_ORDER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_BIT_ORDER_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 0 - SPI DMA enable"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_dma_enable (& self) -> RB_SPI_DMA_ENABLE_R { RB_SPI_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - SPI DMA address loop enable"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_dma_loop (& self) -> RB_SPI_DMA_LOOP_R { RB_SPI_DMA_LOOP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_auto_if (& self) -> RB_SPI_AUTO_IF_R { RB_SPI_AUTO_IF_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI bit data order"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_bit_order (& self) -> RB_SPI_BIT_ORDER_R { RB_SPI_BIT_ORDER_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - SPI DMA enable"]
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|
|
+# [inline (always)]
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|
+pub fn rb_spi_dma_enable (& mut self) -> RB_SPI_DMA_ENABLE_W { RB_SPI_DMA_ENABLE_W { w : self } } # [doc = "Bit 2 - SPI DMA address loop enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_spi_dma_loop (& mut self) -> RB_SPI_DMA_LOOP_W { RB_SPI_DMA_LOOP_W { w : self } } # [doc = "Bit 4 - enable buffer or FIFO accessing to auto clear RB_SPI_IF_BYTE_END interrupt flag"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_spi_auto_if (& mut self) -> RB_SPI_AUTO_IF_W { RB_SPI_AUTO_IF_W { w : self } } # [doc = "Bit 5 - SPI bit data order"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_spi_bit_order (& mut self) -> RB_SPI_BIT_ORDER_W { RB_SPI_BIT_ORDER_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_ctrl_cfg](index.html) module"]
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|
|
+pub struct R8_SPI1_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_ctrl_cfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI1_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_ctrl_cfg::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_SPI1_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CTRL_CFG to value 0"]
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|
|
+impl crate :: Resettable for R8_SPI1_CTRL_CFG_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_INTER_EN register accessor: an alias for `Reg<R8_SPI1_INTER_EN_SPEC>`"]
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|
|
+pub type R8_SPI1_INTER_EN = crate :: Reg < r8_spi1_inter_en :: R8_SPI1_INTER_EN_SPEC > ; # [doc = "SPI1 interrupt enable"]
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|
|
+pub mod r8_spi1_inter_en { # [doc = "Register `R8_SPI1_INTER_EN` reader"]
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|
|
+pub struct R (crate :: R < R8_SPI1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_INTER_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_INTER_EN_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_SPI1_INTER_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_INTER_EN` writer"]
|
|
|
+pub struct W (crate :: W < R8_SPI1_INTER_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_INTER_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_INTER_EN_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_SPI1_INTER_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IE_CNT_END` reader - enable interrupt for SPI total byte count end"]
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|
|
+pub struct RB_SPI_IE_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_CNT_END` writer - enable interrupt for SPI total byte count end"]
|
|
|
+pub struct RB_SPI_IE_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IE_BYTE_END` reader - enable interrupt for SPI byte exchanged"]
|
|
|
+pub struct RB_SPI_IE_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_BYTE_END` writer - enable interrupt for SPI byte exchanged"]
|
|
|
+pub struct RB_SPI_IE_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_HF` reader - enable interrupt for SPI FIFO half"]
|
|
|
+pub struct RB_SPI_IE_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_HF` writer - enable interrupt for SPI FIFO half"]
|
|
|
+pub struct RB_SPI_IE_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IE_DMA_END` reader - enable interrupt for SPI DMA completion"]
|
|
|
+pub struct RB_SPI_IE_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_DMA_END` writer - enable interrupt for SPI DMA completion"]
|
|
|
+pub struct RB_SPI_IE_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IE_FIFO_OV` reader - enable interrupt for SPI FIFO overflow"]
|
|
|
+pub struct RB_SPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FIFO_OV` writer - enable interrupt for SPI FIFO overflow"]
|
|
|
+pub struct RB_SPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_IE_FST_BYTE` reader - enable interrupt for SPI slave mode first byte received"]
|
|
|
+pub struct RB_SPI_IE_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IE_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IE_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IE_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IE_FST_BYTE` writer - enable interrupt for SPI slave mode first byte received"]
|
|
|
+pub struct RB_SPI_IE_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IE_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_cnt_end (& self) -> RB_SPI_IE_CNT_END_R { RB_SPI_IE_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_byte_end (& self) -> RB_SPI_IE_BYTE_END_R { RB_SPI_IE_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_fifo_hf (& self) -> RB_SPI_IE_FIFO_HF_R { RB_SPI_IE_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_dma_end (& self) -> RB_SPI_IE_DMA_END_R { RB_SPI_IE_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_fifo_ov (& self) -> RB_SPI_IE_FIFO_OV_R { RB_SPI_IE_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_fst_byte (& self) -> RB_SPI_IE_FST_BYTE_R { RB_SPI_IE_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for SPI total byte count end"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_cnt_end (& mut self) -> RB_SPI_IE_CNT_END_W { RB_SPI_IE_CNT_END_W { w : self } } # [doc = "Bit 1 - enable interrupt for SPI byte exchanged"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_byte_end (& mut self) -> RB_SPI_IE_BYTE_END_W { RB_SPI_IE_BYTE_END_W { w : self } } # [doc = "Bit 2 - enable interrupt for SPI FIFO half"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_fifo_hf (& mut self) -> RB_SPI_IE_FIFO_HF_W { RB_SPI_IE_FIFO_HF_W { w : self } } # [doc = "Bit 3 - enable interrupt for SPI DMA completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_dma_end (& mut self) -> RB_SPI_IE_DMA_END_W { RB_SPI_IE_DMA_END_W { w : self } } # [doc = "Bit 4 - enable interrupt for SPI FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_spi_ie_fifo_ov (& mut self) -> RB_SPI_IE_FIFO_OV_W { RB_SPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 7 - enable interrupt for SPI slave mode first byte received"]
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+# [inline (always)]
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+pub fn rb_spi_ie_fst_byte (& mut self) -> RB_SPI_IE_FST_BYTE_W { RB_SPI_IE_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_inter_en](index.html) module"]
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+pub struct R8_SPI1_INTER_EN_SPEC ; impl crate :: RegisterSpec for R8_SPI1_INTER_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_inter_en::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI1_INTER_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_inter_en::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI1_INTER_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_INTER_EN to value 0"]
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+impl crate :: Resettable for R8_SPI1_INTER_EN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE register accessor: an alias for `Reg<R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC>`"]
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+pub type R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE = crate :: Reg < r8_spi1_clock_div_r8_spi1_slave_pre :: R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [doc = "SPI1 master clock divisor _ SPI1 slave preset value"]
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+pub mod r8_spi1_clock_div_r8_spi1_slave_pre { # [doc = "Register `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` reader"]
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+pub struct R (crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` writer"]
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+pub struct W (crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` reader - master clock divisor _ SPI1 slave preset value"]
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+pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE` writer - master clock divisor _ SPI1 slave preset value"]
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+pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - master clock divisor _ SPI1 slave preset value"]
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+# [inline (always)]
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+pub fn r8_spi1_clock_div_r8_spi1_slave_pre (& self) -> R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - master clock divisor _ SPI1 slave preset value"]
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+# [inline (always)]
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+pub fn r8_spi1_clock_div_r8_spi1_slave_pre (& mut self) -> R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W { R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 master clock divisor _ SPI1 slave preset value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_clock_div_r8_spi1_slave_pre](index.html) module"]
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+pub struct R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC ; impl crate :: RegisterSpec for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_clock_div_r8_spi1_slave_pre::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_clock_div_r8_spi1_slave_pre::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE to value 0x10"]
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+impl crate :: Resettable for R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x10 } } } # [doc = "R8_SPI1_BUFFER register accessor: an alias for `Reg<R8_SPI1_BUFFER_SPEC>`"]
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+pub type R8_SPI1_BUFFER = crate :: Reg < r8_spi1_buffer :: R8_SPI1_BUFFER_SPEC > ; # [doc = "SPI1 data buffer"]
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+pub mod r8_spi1_buffer { # [doc = "Register `R8_SPI1_BUFFER` reader"]
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+pub struct R (crate :: R < R8_SPI1_BUFFER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_BUFFER_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_BUFFER_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_BUFFER_SPEC >) -> Self { R (reader) } } # [doc = "Field `R8_SPI1_BUFFER` reader - SPI data buffer"]
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+pub struct R8_SPI1_BUFFER_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_BUFFER_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_BUFFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_BUFFER_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - SPI data buffer"]
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+# [inline (always)]
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+pub fn r8_spi1_buffer (& self) -> R8_SPI1_BUFFER_R { R8_SPI1_BUFFER_R :: new ((self . bits & 0xff) as u8) } } # [doc = "SPI1 data buffer\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_buffer](index.html) module"]
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+pub struct R8_SPI1_BUFFER_SPEC ; impl crate :: RegisterSpec for R8_SPI1_BUFFER_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_buffer::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI1_BUFFER_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI1_BUFFER to value 0"]
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+impl crate :: Resettable for R8_SPI1_BUFFER_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_RUN_FLAG register accessor: an alias for `Reg<R8_SPI1_RUN_FLAG_SPEC>`"]
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+pub type R8_SPI1_RUN_FLAG = crate :: Reg < r8_spi1_run_flag :: R8_SPI1_RUN_FLAG_SPEC > ; # [doc = "SPI1 work flag"]
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+pub mod r8_spi1_run_flag { # [doc = "Register `R8_SPI1_RUN_FLAG` reader"]
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+pub struct R (crate :: R < R8_SPI1_RUN_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_RUN_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_RUN_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_RUN_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_SPI_SLV_CMD_ACT` reader - SPI slave command flag"]
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+pub struct RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CMD_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CMD_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CMD_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FIFO_READY` reader - SPI FIFO ready status"]
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+pub struct RB_SPI_FIFO_READY_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FIFO_READY_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FIFO_READY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FIFO_READY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_CS_LOAD` reader - SPI slave chip-select loading status"]
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+pub struct RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_CS_LOAD_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_CS_LOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_CS_LOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_SLV_SELECT` reader - SPI slave selection status"]
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+pub struct RB_SPI_SLV_SELECT_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_SLV_SELECT_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_SLV_SELECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_SLV_SELECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 4 - SPI slave command flag"]
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+# [inline (always)]
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+pub fn rb_spi_slv_cmd_act (& self) -> RB_SPI_SLV_CMD_ACT_R { RB_SPI_SLV_CMD_ACT_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SPI FIFO ready status"]
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+# [inline (always)]
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+pub fn rb_spi_fifo_ready (& self) -> RB_SPI_FIFO_READY_R { RB_SPI_FIFO_READY_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - SPI slave chip-select loading status"]
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+# [inline (always)]
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+pub fn rb_spi_slv_cs_load (& self) -> RB_SPI_SLV_CS_LOAD_R { RB_SPI_SLV_CS_LOAD_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - SPI slave selection status"]
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+# [inline (always)]
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+pub fn rb_spi_slv_select (& self) -> RB_SPI_SLV_SELECT_R { RB_SPI_SLV_SELECT_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "SPI1 work flag\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_run_flag](index.html) module"]
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+pub struct R8_SPI1_RUN_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_RUN_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_run_flag::R](R) reader structure"]
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+impl crate :: Readable for R8_SPI1_RUN_FLAG_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_SPI1_RUN_FLAG to value 0"]
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+impl crate :: Resettable for R8_SPI1_RUN_FLAG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_INT_FLAG register accessor: an alias for `Reg<R8_SPI1_INT_FLAG_SPEC>`"]
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+pub type R8_SPI1_INT_FLAG = crate :: Reg < r8_spi1_int_flag :: R8_SPI1_INT_FLAG_SPEC > ; # [doc = "SPI1 interrupt flag"]
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+pub mod r8_spi1_int_flag { # [doc = "Register `R8_SPI1_INT_FLAG` reader"]
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+pub struct R (crate :: R < R8_SPI1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_INT_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_INT_FLAG` writer"]
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+pub struct W (crate :: W < R8_SPI1_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_INT_FLAG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI1_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_SPI_IF_CNT_END` reader - interrupt flag for SPI total byte count end"]
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+pub struct RB_SPI_IF_CNT_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_CNT_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_CNT_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_CNT_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_CNT_END` writer - interrupt flag for SPI total byte count end"]
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+pub struct RB_SPI_IF_CNT_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_CNT_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_SPI_IF_BYTE_END` reader - interrupt flag for SPI byte exchanged"]
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+pub struct RB_SPI_IF_BYTE_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_BYTE_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_BYTE_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_BYTE_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_BYTE_END` writer - interrupt flag for SPI byte exchanged"]
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+pub struct RB_SPI_IF_BYTE_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_BYTE_END_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_HF` reader - interrupt flag for SPI FIFO half"]
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+pub struct RB_SPI_IF_FIFO_HF_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_HF_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_HF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_HF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_HF` writer - interrupt flag for SPI FIFO half"]
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+pub struct RB_SPI_IF_FIFO_HF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_HF_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_SPI_IF_DMA_END` reader - interrupt flag for SPI DMA completion"]
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|
+pub struct RB_SPI_IF_DMA_END_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_DMA_END_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_DMA_END_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_DMA_END` writer - interrupt flag for SPI DMA completion"]
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|
+pub struct RB_SPI_IF_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_DMA_END_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_SPI_IF_FIFO_OV` reader - interrupt flag for SPI FIFO overflow"]
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|
+pub struct RB_SPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FIFO_OV` writer - interrupt flag for SPI FIFO overflow"]
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|
+pub struct RB_SPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_SPI_FREE` reader - current SPI free status"]
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+pub struct RB_SPI_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_FREE` writer - current SPI free status"]
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+pub struct RB_SPI_FREE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_FREE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_SPI_IF_FST_BYTE` reader - interrupt flag for SPI slave mode first byte received"]
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+pub struct RB_SPI_IF_FST_BYTE_R (crate :: FieldReader < bool , bool >) ; impl RB_SPI_IF_FST_BYTE_R { pub (crate) fn new (bits : bool) -> Self { RB_SPI_IF_FST_BYTE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_SPI_IF_FST_BYTE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_SPI_IF_FST_BYTE` writer - interrupt flag for SPI slave mode first byte received"]
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+pub struct RB_SPI_IF_FST_BYTE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_SPI_IF_FST_BYTE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
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+# [inline (always)]
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+pub fn rb_spi_if_cnt_end (& self) -> RB_SPI_IF_CNT_END_R { RB_SPI_IF_CNT_END_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
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+# [inline (always)]
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+pub fn rb_spi_if_byte_end (& self) -> RB_SPI_IF_BYTE_END_R { RB_SPI_IF_BYTE_END_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
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+# [inline (always)]
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+pub fn rb_spi_if_fifo_hf (& self) -> RB_SPI_IF_FIFO_HF_R { RB_SPI_IF_FIFO_HF_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_dma_end (& self) -> RB_SPI_IF_DMA_END_R { RB_SPI_IF_DMA_END_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fifo_ov (& self) -> RB_SPI_IF_FIFO_OV_R { RB_SPI_IF_FIFO_OV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - current SPI free status"]
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|
+# [inline (always)]
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+pub fn rb_spi_free (& self) -> RB_SPI_FREE_R { RB_SPI_FREE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
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|
+# [inline (always)]
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+pub fn rb_spi_if_fst_byte (& self) -> RB_SPI_IF_FST_BYTE_R { RB_SPI_IF_FST_BYTE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for SPI total byte count end"]
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+# [inline (always)]
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|
+pub fn rb_spi_if_cnt_end (& mut self) -> RB_SPI_IF_CNT_END_W { RB_SPI_IF_CNT_END_W { w : self } } # [doc = "Bit 1 - interrupt flag for SPI byte exchanged"]
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|
|
+# [inline (always)]
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+pub fn rb_spi_if_byte_end (& mut self) -> RB_SPI_IF_BYTE_END_W { RB_SPI_IF_BYTE_END_W { w : self } } # [doc = "Bit 2 - interrupt flag for SPI FIFO half"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fifo_hf (& mut self) -> RB_SPI_IF_FIFO_HF_W { RB_SPI_IF_FIFO_HF_W { w : self } } # [doc = "Bit 3 - interrupt flag for SPI DMA completion"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_dma_end (& mut self) -> RB_SPI_IF_DMA_END_W { RB_SPI_IF_DMA_END_W { w : self } } # [doc = "Bit 4 - interrupt flag for SPI FIFO overflow"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fifo_ov (& mut self) -> RB_SPI_IF_FIFO_OV_W { RB_SPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 6 - current SPI free status"]
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|
+# [inline (always)]
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+pub fn rb_spi_free (& mut self) -> RB_SPI_FREE_W { RB_SPI_FREE_W { w : self } } # [doc = "Bit 7 - interrupt flag for SPI slave mode first byte received"]
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|
+# [inline (always)]
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|
+pub fn rb_spi_if_fst_byte (& mut self) -> RB_SPI_IF_FST_BYTE_W { RB_SPI_IF_FST_BYTE_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_int_flag](index.html) module"]
|
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|
+pub struct R8_SPI1_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_SPI1_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_int_flag::R](R) reader structure"]
|
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+impl crate :: Readable for R8_SPI1_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_int_flag::W](W) writer structure"]
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|
+impl crate :: Writable for R8_SPI1_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_INT_FLAG to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI1_INT_FLAG_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO_COUNT register accessor: an alias for `Reg<R8_SPI1_FIFO_COUNT_SPEC>`"]
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|
+pub type R8_SPI1_FIFO_COUNT = crate :: Reg < r8_spi1_fifo_count :: R8_SPI1_FIFO_COUNT_SPEC > ; # [doc = "SPI1 FIFO count status"]
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|
+pub mod r8_spi1_fifo_count { # [doc = "Register `R8_SPI1_FIFO_COUNT` reader"]
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|
+pub struct R (crate :: R < R8_SPI1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_COUNT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_COUNT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_SPI1_FIFO_COUNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO_COUNT` writer"]
|
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|
+pub struct W (crate :: W < R8_SPI1_FIFO_COUNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_COUNT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_COUNT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_SPI1_FIFO_COUNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO_COUNT` reader - SPI FIFO count status"]
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|
|
+pub struct R8_SPI1_FIFO_COUNT_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_COUNT_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_COUNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_COUNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO_COUNT` writer - SPI FIFO count status"]
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+pub struct R8_SPI1_FIFO_COUNT_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_COUNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count status"]
|
|
|
+# [inline (always)]
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|
+pub fn r8_spi1_fifo_count (& self) -> R8_SPI1_FIFO_COUNT_R { R8_SPI1_FIFO_COUNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count status"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_spi1_fifo_count (& mut self) -> R8_SPI1_FIFO_COUNT_W { R8_SPI1_FIFO_COUNT_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo_count](index.html) module"]
|
|
|
+pub struct R8_SPI1_FIFO_COUNT_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_COUNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo_count::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI1_FIFO_COUNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo_count::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_SPI1_FIFO_COUNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO_COUNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI1_FIFO_COUNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_SPI1_TOTAL_CNT register accessor: an alias for `Reg<R16_SPI1_TOTAL_CNT_SPEC>`"]
|
|
|
+pub type R16_SPI1_TOTAL_CNT = crate :: Reg < r16_spi1_total_cnt :: R16_SPI1_TOTAL_CNT_SPEC > ; # [doc = "SPI1 total byte count, only low 12 bit"]
|
|
|
+pub mod r16_spi1_total_cnt { # [doc = "Register `R16_SPI1_TOTAL_CNT` reader"]
|
|
|
+pub struct R (crate :: R < R16_SPI1_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_SPI1_TOTAL_CNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_SPI1_TOTAL_CNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_SPI1_TOTAL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_SPI1_TOTAL_CNT` writer"]
|
|
|
+pub struct W (crate :: W < R16_SPI1_TOTAL_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_SPI1_TOTAL_CNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_SPI1_TOTAL_CNT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_SPI1_TOTAL_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_TOTAL_CNT` reader - SPI total byte count, only low 12 bit"]
|
|
|
+pub struct R16_SPI1_TOTAL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl R16_SPI1_TOTAL_CNT_R { pub (crate) fn new (bits : u16) -> Self { R16_SPI1_TOTAL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_TOTAL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_TOTAL_CNT` writer - SPI total byte count, only low 12 bit"]
|
|
|
+pub struct R16_SPI1_TOTAL_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_TOTAL_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_spi1_total_cnt (& self) -> R16_SPI1_TOTAL_CNT_R { R16_SPI1_TOTAL_CNT_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - SPI total byte count, only low 12 bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r16_spi1_total_cnt (& mut self) -> R16_SPI1_TOTAL_CNT_W { R16_SPI1_TOTAL_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 total byte count, only low 12 bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_spi1_total_cnt](index.html) module"]
|
|
|
+pub struct R16_SPI1_TOTAL_CNT_SPEC ; impl crate :: RegisterSpec for R16_SPI1_TOTAL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_spi1_total_cnt::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_SPI1_TOTAL_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_spi1_total_cnt::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_SPI1_TOTAL_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_SPI1_TOTAL_CNT to value 0"]
|
|
|
+impl crate :: Resettable for R16_SPI1_TOTAL_CNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO register accessor: an alias for `Reg<R8_SPI1_FIFO_SPEC>`"]
|
|
|
+pub type R8_SPI1_FIFO = crate :: Reg < r8_spi1_fifo :: R8_SPI1_FIFO_SPEC > ; # [doc = "SPI1 FIFO register"]
|
|
|
+pub mod r8_spi1_fifo { # [doc = "Register `R8_SPI1_FIFO` reader"]
|
|
|
+pub struct R (crate :: R < R8_SPI1_FIFO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SPI1_FIFO_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO` writer"]
|
|
|
+pub struct W (crate :: W < R8_SPI1_FIFO_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_SPI1_FIFO_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO` reader - SPI FIFO register"]
|
|
|
+pub struct R8_SPI1_FIFO_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO` writer - SPI FIFO register"]
|
|
|
+pub struct R8_SPI1_FIFO_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_spi1_fifo (& self) -> R8_SPI1_FIFO_R { R8_SPI1_FIFO_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_spi1_fifo (& mut self) -> R8_SPI1_FIFO_W { R8_SPI1_FIFO_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 FIFO register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo](index.html) module"]
|
|
|
+pub struct R8_SPI1_FIFO_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_SPI1_FIFO_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_SPI1_FIFO_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO to value 0"]
|
|
|
+impl crate :: Resettable for R8_SPI1_FIFO_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_SPI1_FIFO_COUNT1 register accessor: an alias for `Reg<R8_SPI1_FIFO_COUNT1_SPEC>`"]
|
|
|
+pub type R8_SPI1_FIFO_COUNT1 = crate :: Reg < r8_spi1_fifo_count1 :: R8_SPI1_FIFO_COUNT1_SPEC > ; # [doc = "SPI0 FIFO count status"]
|
|
|
+pub mod r8_spi1_fifo_count1 { # [doc = "Register `R8_SPI1_FIFO_COUNT1` reader"]
|
|
|
+pub struct R (crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_SPI1_FIFO_COUNT1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_SPI1_FIFO_COUNT1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_SPI1_FIFO_COUNT1` writer"]
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|
+pub struct W (crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_SPI1_FIFO_COUNT1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_SPI1_FIFO_COUNT1_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_SPI1_FIFO_COUNT1` reader - SPI FIFO count statu"]
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+pub struct R8_SPI1_FIFO_COUNT1_R (crate :: FieldReader < u8 , u8 >) ; impl R8_SPI1_FIFO_COUNT1_R { pub (crate) fn new (bits : u8) -> Self { R8_SPI1_FIFO_COUNT1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_SPI1_FIFO_COUNT1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_SPI1_FIFO_COUNT1` writer - SPI FIFO count statu"]
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+pub struct R8_SPI1_FIFO_COUNT1_W < 'a > { w : & 'a mut W , } impl < 'a > R8_SPI1_FIFO_COUNT1_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - SPI FIFO count statu"]
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+# [inline (always)]
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+pub fn r8_spi1_fifo_count1 (& self) -> R8_SPI1_FIFO_COUNT1_R { R8_SPI1_FIFO_COUNT1_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - SPI FIFO count statu"]
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+# [inline (always)]
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+pub fn r8_spi1_fifo_count1 (& mut self) -> R8_SPI1_FIFO_COUNT1_W { R8_SPI1_FIFO_COUNT1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI0 FIFO count status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi1_fifo_count1](index.html) module"]
|
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+pub struct R8_SPI1_FIFO_COUNT1_SPEC ; impl crate :: RegisterSpec for R8_SPI1_FIFO_COUNT1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_spi1_fifo_count1::R](R) reader structure"]
|
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+impl crate :: Readable for R8_SPI1_FIFO_COUNT1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_spi1_fifo_count1::W](W) writer structure"]
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+impl crate :: Writable for R8_SPI1_FIFO_COUNT1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_SPI1_FIFO_COUNT1 to value 0"]
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+impl crate :: Resettable for R8_SPI1_FIFO_COUNT1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_NOW register accessor: an alias for `Reg<R32_SPI1_DMA_NOW_SPEC>`"]
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+pub type R32_SPI1_DMA_NOW = crate :: Reg < r32_spi1_dma_now :: R32_SPI1_DMA_NOW_SPEC > ; # [doc = "SPI1 DMA current address"]
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+pub mod r32_spi1_dma_now { # [doc = "Register `R32_SPI1_DMA_NOW` reader"]
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+pub struct R (crate :: R < R32_SPI1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_NOW_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_SPI1_DMA_NOW_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_NOW` writer"]
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+pub struct W (crate :: W < R32_SPI1_DMA_NOW_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_NOW_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_NOW_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_SPI1_DMA_NOW_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_NOW` reader - SPI DMA current address"]
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+pub struct R16_SPI1_DMA_NOW_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_NOW_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_NOW_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_NOW_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_NOW` writer - SPI DMA current address"]
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+pub struct R16_SPI1_DMA_NOW_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_NOW_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA current address"]
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+# [inline (always)]
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+pub fn r16_spi1_dma_now (& self) -> R16_SPI1_DMA_NOW_R { R16_SPI1_DMA_NOW_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA current address"]
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+# [inline (always)]
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+pub fn r16_spi1_dma_now (& mut self) -> R16_SPI1_DMA_NOW_W { R16_SPI1_DMA_NOW_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA current address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_now](index.html) module"]
|
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+pub struct R32_SPI1_DMA_NOW_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_NOW_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_now::R](R) reader structure"]
|
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+impl crate :: Readable for R32_SPI1_DMA_NOW_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_now::W](W) writer structure"]
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+impl crate :: Writable for R32_SPI1_DMA_NOW_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_NOW to value 0"]
|
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|
+impl crate :: Resettable for R32_SPI1_DMA_NOW_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_BEG register accessor: an alias for `Reg<R32_SPI1_DMA_BEG_SPEC>`"]
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+pub type R32_SPI1_DMA_BEG = crate :: Reg < r32_spi1_dma_beg :: R32_SPI1_DMA_BEG_SPEC > ; # [doc = "SPI1 DMA begin address"]
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+pub mod r32_spi1_dma_beg { # [doc = "Register `R32_SPI1_DMA_BEG` reader"]
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|
+pub struct R (crate :: R < R32_SPI1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_BEG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_SPI1_DMA_BEG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_BEG` writer"]
|
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+pub struct W (crate :: W < R32_SPI1_DMA_BEG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_BEG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_BEG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_SPI1_DMA_BEG_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_BEG` reader - SPI DMA begin address"]
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|
+pub struct R16_SPI1_DMA_BEG_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_BEG_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_BEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_BEG_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_BEG` writer - SPI DMA begin address"]
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|
+pub struct R16_SPI1_DMA_BEG_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_BEG_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA begin address"]
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|
+# [inline (always)]
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+pub fn r16_spi1_dma_beg (& self) -> R16_SPI1_DMA_BEG_R { R16_SPI1_DMA_BEG_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA begin address"]
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|
|
+# [inline (always)]
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|
+pub fn r16_spi1_dma_beg (& mut self) -> R16_SPI1_DMA_BEG_W { R16_SPI1_DMA_BEG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA begin address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_beg](index.html) module"]
|
|
|
+pub struct R32_SPI1_DMA_BEG_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_BEG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_beg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_SPI1_DMA_BEG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_beg::W](W) writer structure"]
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|
|
+impl crate :: Writable for R32_SPI1_DMA_BEG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_BEG to value 0"]
|
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|
+impl crate :: Resettable for R32_SPI1_DMA_BEG_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_SPI1_DMA_END register accessor: an alias for `Reg<R32_SPI1_DMA_END_SPEC>`"]
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+pub type R32_SPI1_DMA_END = crate :: Reg < r32_spi1_dma_end :: R32_SPI1_DMA_END_SPEC > ; # [doc = "SPI1 DMA end address"]
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|
+pub mod r32_spi1_dma_end { # [doc = "Register `R32_SPI1_DMA_END` reader"]
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|
+pub struct R (crate :: R < R32_SPI1_DMA_END_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_SPI1_DMA_END_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_SPI1_DMA_END_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_SPI1_DMA_END_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_SPI1_DMA_END` writer"]
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|
+pub struct W (crate :: W < R32_SPI1_DMA_END_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_SPI1_DMA_END_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_SPI1_DMA_END_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_SPI1_DMA_END_SPEC >) -> Self { W (writer) } } # [doc = "Field `R16_SPI1_DMA_END` reader - SPI DMA end address"]
|
|
|
+pub struct R16_SPI1_DMA_END_R (crate :: FieldReader < u32 , u32 >) ; impl R16_SPI1_DMA_END_R { pub (crate) fn new (bits : u32) -> Self { R16_SPI1_DMA_END_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R16_SPI1_DMA_END_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R16_SPI1_DMA_END` writer - SPI DMA end address"]
|
|
|
+pub struct R16_SPI1_DMA_END_W < 'a > { w : & 'a mut W , } impl < 'a > R16_SPI1_DMA_END_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0003_ffff) | (value as u32 & 0x0003_ffff) ; self . w } } impl R { # [doc = "Bits 0:17 - SPI DMA end address"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r16_spi1_dma_end (& self) -> R16_SPI1_DMA_END_R { R16_SPI1_DMA_END_R :: new ((self . bits & 0x0003_ffff) as u32) } } impl W { # [doc = "Bits 0:17 - SPI DMA end address"]
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|
|
+# [inline (always)]
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|
|
+pub fn r16_spi1_dma_end (& mut self) -> R16_SPI1_DMA_END_W { R16_SPI1_DMA_END_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SPI1 DMA end address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_spi1_dma_end](index.html) module"]
|
|
|
+pub struct R32_SPI1_DMA_END_SPEC ; impl crate :: RegisterSpec for R32_SPI1_DMA_END_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_spi1_dma_end::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_SPI1_DMA_END_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_spi1_dma_end::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_SPI1_DMA_END_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_SPI1_DMA_END to value 0"]
|
|
|
+impl crate :: Resettable for R32_SPI1_DMA_END_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "PWMX register"]
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|
|
+pub struct PWMX { _marker : PhantomData < * const () > } unsafe impl Send for PWMX { } impl PWMX { # [doc = r"Pointer to the register block"]
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|
|
+pub const PTR : * const pwmx :: RegisterBlock = 0x4000_5000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
|
+# [inline (always)]
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|
|
+pub const fn ptr () -> * const pwmx :: RegisterBlock { Self :: PTR } } impl Deref for PWMX { type Target = pwmx :: RegisterBlock ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for PWMX { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("PWMX") . finish () } } # [doc = "PWMX register"]
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|
|
+pub mod pwmx { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - PWM mode control"]
|
|
|
+pub r8_pwm_ctrl_mod : crate :: Reg < r8_pwm_ctrl_mod :: R8_PWM_CTRL_MOD_SPEC > , # [doc = "0x01 - PWM configuration control"]
|
|
|
+pub r8_pwm_ctrl_cfg : crate :: Reg < r8_pwm_ctrl_cfg :: R8_PWM_CTRL_CFG_SPEC > , # [doc = "0x02 - PWM clock divisor"]
|
|
|
+pub r8_pwm_clock_div : crate :: Reg < r8_pwm_clock_div :: R8_PWM_CLOCK_DIV_SPEC > , _reserved3 : [u8 ; 0x01]
|
|
|
+, # [doc = "0x04 - PWM data holding"]
|
|
|
+pub r8_pwm0_data : crate :: Reg < r8_pwm0_data :: R8_PWM0_DATA_SPEC > , # [doc = "0x05 - PWM1 data holding"]
|
|
|
+pub r8_pwm1_data : crate :: Reg < r8_pwm1_data :: R8_PWM1_DATA_SPEC > , # [doc = "0x06 - PWM2 data holding"]
|
|
|
+pub r8_pwm2_data : crate :: Reg < r8_pwm2_data :: R8_PWM2_DATA_SPEC > , # [doc = "0x07 - PWM3 data holding"]
|
|
|
+pub r8_pwm3_data : crate :: Reg < r8_pwm3_data :: R8_PWM3_DATA_SPEC > , } # [doc = "R8_PWM_CTRL_MOD register accessor: an alias for `Reg<R8_PWM_CTRL_MOD_SPEC>`"]
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|
|
+pub type R8_PWM_CTRL_MOD = crate :: Reg < r8_pwm_ctrl_mod :: R8_PWM_CTRL_MOD_SPEC > ; # [doc = "PWM mode control"]
|
|
|
+pub mod r8_pwm_ctrl_mod { # [doc = "Register `R8_PWM_CTRL_MOD` reader"]
|
|
|
+pub struct R (crate :: R < R8_PWM_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CTRL_MOD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CTRL_MOD_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_PWM_CTRL_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CTRL_MOD` writer"]
|
|
|
+pub struct W (crate :: W < R8_PWM_CTRL_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CTRL_MOD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CTRL_MOD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_PWM_CTRL_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PWM0_OUT_EN` reader - PWM0 output enable"]
|
|
|
+pub struct RB_PWM0_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM0_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM0_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM0_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM0_OUT_EN` writer - PWM0 output enable"]
|
|
|
+pub struct RB_PWM0_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM0_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_PWM1_OUT_EN` reader - PWM1 output enable"]
|
|
|
+pub struct RB_PWM1_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM1_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM1_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM1_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM1_OUT_EN` writer - PWM1 output enable"]
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+pub struct RB_PWM1_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM1_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_PWM2_OUT_EN` reader - PWM2 output enable"]
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+pub struct RB_PWM2_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM2_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM2_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM2_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM2_OUT_EN` writer - PWM2 output enable"]
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+pub struct RB_PWM2_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM2_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_PWM3_OUT_EN` reader - PWM3 output enable"]
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+pub struct RB_PWM3_OUT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM3_OUT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM3_OUT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM3_OUT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM3_OUT_EN` writer - PWM3 output enable"]
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+pub struct RB_PWM3_OUT_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM3_OUT_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_PWM0_POLAR` reader - PWM0 output polarity"]
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+pub struct RB_PWM0_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM0_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM0_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM0_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM0_POLAR` writer - PWM0 output polarity"]
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+pub struct RB_PWM0_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM0_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_PWM1_POLAR` reader - PWM1 output polarity"]
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+pub struct RB_PWM1_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM1_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM1_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM1_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM1_POLAR` writer - PWM1 output polarity"]
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|
+pub struct RB_PWM1_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM1_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_PWM2_POLAR` reader - PWM2 output polarity"]
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|
|
+pub struct RB_PWM2_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM2_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM2_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM2_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM2_POLAR` writer - PWM2 output polarity"]
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|
|
+pub struct RB_PWM2_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM2_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_PWM3_POLAR` reader - PWM3 output polarity"]
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|
|
+pub struct RB_PWM3_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM3_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM3_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM3_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM3_POLAR` writer - PWM3 output polarity"]
|
|
|
+pub struct RB_PWM3_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM3_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - PWM0 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm0_out_en (& self) -> RB_PWM0_OUT_EN_R { RB_PWM0_OUT_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - PWM1 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm1_out_en (& self) -> RB_PWM1_OUT_EN_R { RB_PWM1_OUT_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - PWM2 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm2_out_en (& self) -> RB_PWM2_OUT_EN_R { RB_PWM2_OUT_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - PWM3 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm3_out_en (& self) -> RB_PWM3_OUT_EN_R { RB_PWM3_OUT_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - PWM0 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm0_polar (& self) -> RB_PWM0_POLAR_R { RB_PWM0_POLAR_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - PWM1 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm1_polar (& self) -> RB_PWM1_POLAR_R { RB_PWM1_POLAR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - PWM2 output polarity"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_pwm2_polar (& self) -> RB_PWM2_POLAR_R { RB_PWM2_POLAR_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - PWM3 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm3_polar (& self) -> RB_PWM3_POLAR_R { RB_PWM3_POLAR_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PWM0 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm0_out_en (& mut self) -> RB_PWM0_OUT_EN_W { RB_PWM0_OUT_EN_W { w : self } } # [doc = "Bit 1 - PWM1 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm1_out_en (& mut self) -> RB_PWM1_OUT_EN_W { RB_PWM1_OUT_EN_W { w : self } } # [doc = "Bit 2 - PWM2 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm2_out_en (& mut self) -> RB_PWM2_OUT_EN_W { RB_PWM2_OUT_EN_W { w : self } } # [doc = "Bit 3 - PWM3 output enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm3_out_en (& mut self) -> RB_PWM3_OUT_EN_W { RB_PWM3_OUT_EN_W { w : self } } # [doc = "Bit 4 - PWM0 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm0_polar (& mut self) -> RB_PWM0_POLAR_W { RB_PWM0_POLAR_W { w : self } } # [doc = "Bit 5 - PWM1 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm1_polar (& mut self) -> RB_PWM1_POLAR_W { RB_PWM1_POLAR_W { w : self } } # [doc = "Bit 6 - PWM2 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm2_polar (& mut self) -> RB_PWM2_POLAR_W { RB_PWM2_POLAR_W { w : self } } # [doc = "Bit 7 - PWM3 output polarity"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm3_polar (& mut self) -> RB_PWM3_POLAR_W { RB_PWM3_POLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM mode control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_ctrl_mod](index.html) module"]
|
|
|
+pub struct R8_PWM_CTRL_MOD_SPEC ; impl crate :: RegisterSpec for R8_PWM_CTRL_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_ctrl_mod::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_PWM_CTRL_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_ctrl_mod::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_PWM_CTRL_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CTRL_MOD to value 0"]
|
|
|
+impl crate :: Resettable for R8_PWM_CTRL_MOD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM_CTRL_CFG register accessor: an alias for `Reg<R8_PWM_CTRL_CFG_SPEC>`"]
|
|
|
+pub type R8_PWM_CTRL_CFG = crate :: Reg < r8_pwm_ctrl_cfg :: R8_PWM_CTRL_CFG_SPEC > ; # [doc = "PWM configuration control"]
|
|
|
+pub mod r8_pwm_ctrl_cfg { # [doc = "Register `R8_PWM_CTRL_CFG` reader"]
|
|
|
+pub struct R (crate :: R < R8_PWM_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CTRL_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CTRL_CFG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_PWM_CTRL_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CTRL_CFG` writer"]
|
|
|
+pub struct W (crate :: W < R8_PWM_CTRL_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CTRL_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CTRL_CFG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_PWM_CTRL_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_PWM_CYCLE_SEL` reader - PWM cycle selection"]
|
|
|
+pub struct RB_PWM_CYCLE_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_PWM_CYCLE_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_PWM_CYCLE_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_PWM_CYCLE_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_PWM_CYCLE_SEL` writer - PWM cycle selection"]
|
|
|
+pub struct RB_PWM_CYCLE_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_PWM_CYCLE_SEL_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } impl R { # [doc = "Bit 0 - PWM cycle selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm_cycle_sel (& self) -> RB_PWM_CYCLE_SEL_R { RB_PWM_CYCLE_SEL_R :: new ((self . bits & 0x01) != 0) } } impl W { # [doc = "Bit 0 - PWM cycle selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_pwm_cycle_sel (& mut self) -> RB_PWM_CYCLE_SEL_W { RB_PWM_CYCLE_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM configuration control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_ctrl_cfg](index.html) module"]
|
|
|
+pub struct R8_PWM_CTRL_CFG_SPEC ; impl crate :: RegisterSpec for R8_PWM_CTRL_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_ctrl_cfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_PWM_CTRL_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_ctrl_cfg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_PWM_CTRL_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CTRL_CFG to value 0"]
|
|
|
+impl crate :: Resettable for R8_PWM_CTRL_CFG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM_CLOCK_DIV register accessor: an alias for `Reg<R8_PWM_CLOCK_DIV_SPEC>`"]
|
|
|
+pub type R8_PWM_CLOCK_DIV = crate :: Reg < r8_pwm_clock_div :: R8_PWM_CLOCK_DIV_SPEC > ; # [doc = "PWM clock divisor"]
|
|
|
+pub mod r8_pwm_clock_div { # [doc = "Register `R8_PWM_CLOCK_DIV` reader"]
|
|
|
+pub struct R (crate :: R < R8_PWM_CLOCK_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM_CLOCK_DIV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM_CLOCK_DIV_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_PWM_CLOCK_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM_CLOCK_DIV` writer"]
|
|
|
+pub struct W (crate :: W < R8_PWM_CLOCK_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM_CLOCK_DIV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM_CLOCK_DIV_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_PWM_CLOCK_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM_CLOCK_DIV` reader - PWM clock divisor"]
|
|
|
+pub struct R8_PWM_CLOCK_DIV_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM_CLOCK_DIV_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM_CLOCK_DIV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM_CLOCK_DIV_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM_CLOCK_DIV` writer - PWM clock divisor"]
|
|
|
+pub struct R8_PWM_CLOCK_DIV_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM_CLOCK_DIV_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - PWM clock divisor"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_pwm_clock_div (& self) -> R8_PWM_CLOCK_DIV_R { R8_PWM_CLOCK_DIV_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - PWM clock divisor"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r8_pwm_clock_div (& mut self) -> R8_PWM_CLOCK_DIV_W { R8_PWM_CLOCK_DIV_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM clock divisor\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm_clock_div](index.html) module"]
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+pub struct R8_PWM_CLOCK_DIV_SPEC ; impl crate :: RegisterSpec for R8_PWM_CLOCK_DIV_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm_clock_div::R](R) reader structure"]
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+impl crate :: Readable for R8_PWM_CLOCK_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm_clock_div::W](W) writer structure"]
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+impl crate :: Writable for R8_PWM_CLOCK_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM_CLOCK_DIV to value 0"]
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+impl crate :: Resettable for R8_PWM_CLOCK_DIV_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM0_DATA register accessor: an alias for `Reg<R8_PWM0_DATA_SPEC>`"]
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+pub type R8_PWM0_DATA = crate :: Reg < r8_pwm0_data :: R8_PWM0_DATA_SPEC > ; # [doc = "PWM data holding"]
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+pub mod r8_pwm0_data { # [doc = "Register `R8_PWM0_DATA` reader"]
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+pub struct R (crate :: R < R8_PWM0_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM0_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM0_DATA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_PWM0_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM0_DATA` writer"]
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+pub struct W (crate :: W < R8_PWM0_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM0_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM0_DATA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_PWM0_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM0_DATA` reader - PWM0 data holding"]
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+pub struct R8_PWM0_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM0_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM0_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM0_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM0_DATA` writer - PWM0 data holding"]
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+pub struct R8_PWM0_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM0_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - PWM0 data holding"]
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+# [inline (always)]
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+pub fn r8_pwm0_data (& self) -> R8_PWM0_DATA_R { R8_PWM0_DATA_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - PWM0 data holding"]
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+# [inline (always)]
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+pub fn r8_pwm0_data (& mut self) -> R8_PWM0_DATA_W { R8_PWM0_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm0_data](index.html) module"]
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+pub struct R8_PWM0_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM0_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm0_data::R](R) reader structure"]
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+impl crate :: Readable for R8_PWM0_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm0_data::W](W) writer structure"]
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+impl crate :: Writable for R8_PWM0_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM0_DATA to value 0"]
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+impl crate :: Resettable for R8_PWM0_DATA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM1_DATA register accessor: an alias for `Reg<R8_PWM1_DATA_SPEC>`"]
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+pub type R8_PWM1_DATA = crate :: Reg < r8_pwm1_data :: R8_PWM1_DATA_SPEC > ; # [doc = "PWM1 data holding"]
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+pub mod r8_pwm1_data { # [doc = "Register `R8_PWM1_DATA` reader"]
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+pub struct R (crate :: R < R8_PWM1_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM1_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM1_DATA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_PWM1_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM1_DATA` writer"]
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+pub struct W (crate :: W < R8_PWM1_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM1_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM1_DATA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_PWM1_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM1_DATA` reader - PWM1 data holding"]
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+pub struct R8_PWM1_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM1_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM1_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM1_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM1_DATA` writer - PWM1 data holding"]
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+pub struct R8_PWM1_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM1_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 8)) | ((value as u8 & 0xff) << 8) ; self . w } } impl R { # [doc = "Bits 8:15 - PWM1 data holding"]
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+# [inline (always)]
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+pub fn r8_pwm1_data (& self) -> R8_PWM1_DATA_R { R8_PWM1_DATA_R :: new (((self . bits >> 8) & 0xff) as u8) } } impl W { # [doc = "Bits 8:15 - PWM1 data holding"]
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+# [inline (always)]
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+pub fn r8_pwm1_data (& mut self) -> R8_PWM1_DATA_W { R8_PWM1_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM1 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm1_data](index.html) module"]
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+pub struct R8_PWM1_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM1_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm1_data::R](R) reader structure"]
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+impl crate :: Readable for R8_PWM1_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm1_data::W](W) writer structure"]
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+impl crate :: Writable for R8_PWM1_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM1_DATA to value 0"]
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|
+impl crate :: Resettable for R8_PWM1_DATA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM2_DATA register accessor: an alias for `Reg<R8_PWM2_DATA_SPEC>`"]
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+pub type R8_PWM2_DATA = crate :: Reg < r8_pwm2_data :: R8_PWM2_DATA_SPEC > ; # [doc = "PWM2 data holding"]
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|
+pub mod r8_pwm2_data { # [doc = "Register `R8_PWM2_DATA` reader"]
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+pub struct R (crate :: R < R8_PWM2_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM2_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM2_DATA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_PWM2_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM2_DATA` writer"]
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+pub struct W (crate :: W < R8_PWM2_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM2_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM2_DATA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_PWM2_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM2_DATA` reader - PWM2 data holding"]
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+pub struct R8_PWM2_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM2_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM2_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM2_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM2_DATA` writer - PWM2 data holding"]
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+pub struct R8_PWM2_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM2_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 16)) | ((value as u8 & 0xff) << 16) ; self . w } } impl R { # [doc = "Bits 16:23 - PWM2 data holding"]
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|
+# [inline (always)]
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+pub fn r8_pwm2_data (& self) -> R8_PWM2_DATA_R { R8_PWM2_DATA_R :: new (((self . bits >> 16) & 0xff) as u8) } } impl W { # [doc = "Bits 16:23 - PWM2 data holding"]
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|
+# [inline (always)]
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+pub fn r8_pwm2_data (& mut self) -> R8_PWM2_DATA_W { R8_PWM2_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM2 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm2_data](index.html) module"]
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+pub struct R8_PWM2_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM2_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm2_data::R](R) reader structure"]
|
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|
+impl crate :: Readable for R8_PWM2_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm2_data::W](W) writer structure"]
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|
+impl crate :: Writable for R8_PWM2_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM2_DATA to value 0"]
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|
|
+impl crate :: Resettable for R8_PWM2_DATA_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_PWM3_DATA register accessor: an alias for `Reg<R8_PWM3_DATA_SPEC>`"]
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|
|
+pub type R8_PWM3_DATA = crate :: Reg < r8_pwm3_data :: R8_PWM3_DATA_SPEC > ; # [doc = "PWM3 data holding"]
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|
+pub mod r8_pwm3_data { # [doc = "Register `R8_PWM3_DATA` reader"]
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|
+pub struct R (crate :: R < R8_PWM3_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_PWM3_DATA_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_PWM3_DATA_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_PWM3_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_PWM3_DATA` writer"]
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+pub struct W (crate :: W < R8_PWM3_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_PWM3_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_PWM3_DATA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_PWM3_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `R8_PWM3_DATA` reader - PWM3 data holding"]
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|
+pub struct R8_PWM3_DATA_R (crate :: FieldReader < u8 , u8 >) ; impl R8_PWM3_DATA_R { pub (crate) fn new (bits : u8) -> Self { R8_PWM3_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R8_PWM3_DATA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R8_PWM3_DATA` writer - PWM3 data holding"]
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|
|
+pub struct R8_PWM3_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > R8_PWM3_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u8 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 24:31 - PWM3 data holding"]
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|
+# [inline (always)]
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+pub fn r8_pwm3_data (& self) -> R8_PWM3_DATA_R { R8_PWM3_DATA_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 24:31 - PWM3 data holding"]
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|
+# [inline (always)]
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|
+pub fn r8_pwm3_data (& mut self) -> R8_PWM3_DATA_W { R8_PWM3_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PWM3 data holding\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_pwm3_data](index.html) module"]
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|
+pub struct R8_PWM3_DATA_SPEC ; impl crate :: RegisterSpec for R8_PWM3_DATA_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_pwm3_data::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_PWM3_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_pwm3_data::W](W) writer structure"]
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|
+impl crate :: Writable for R8_PWM3_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_PWM3_DATA to value 0"]
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|
|
+impl crate :: Resettable for R8_PWM3_DATA_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "HSPI register"]
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|
+pub struct HSPI { _marker : PhantomData < * const () > } unsafe impl Send for HSPI { } impl HSPI { # [doc = r"Pointer to the register block"]
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|
+pub const PTR : * const hspi :: RegisterBlock = 0x4000_6000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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|
+pub const fn ptr () -> * const hspi :: RegisterBlock { Self :: PTR } } impl Deref for HSPI { type Target = hspi :: RegisterBlock ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for HSPI { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("HSPI") . finish () } } # [doc = "HSPI register"]
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|
+pub mod hspi { # [doc = r"Register block"]
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|
|
+# [repr (C)]
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|
+pub struct RegisterBlock { # [doc = "0x00 - parallel if tx or rx cfg"]
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|
+pub r8_hspi_cfg : crate :: Reg < r8_hspi_cfg :: R8_HSPI_CFG_SPEC > , # [doc = "0x01 - parallel if tx or rx control"]
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|
+pub r8_hspi_ctrl : crate :: Reg < r8_hspi_ctrl :: R8_HSPI_CTRL_SPEC > , # [doc = "0x02 - parallel if interrupt enable register"]
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|
+pub r8_hspi_int_en : crate :: Reg < r8_hspi_int_en :: R8_HSPI_INT_EN_SPEC > , # [doc = "0x03 - parallel if aux"]
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|
+pub r8_hspi_aux : crate :: Reg < r8_hspi_aux :: R8_HSPI_AUX_SPEC > , # [doc = "0x04 - parallel if dma tx addr0"]
|
|
|
+pub r32_hspi_tx_addr0 : crate :: Reg < r32_hspi_tx_addr0 :: R32_HSPI_TX_ADDR0_SPEC > , # [doc = "0x08 - parallel if dma tx addr1"]
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|
|
+pub r32_hspi_tx_addr1 : crate :: Reg < r32_hspi_tx_addr1 :: R32_HSPI_TX_ADDR1_SPEC > , # [doc = "0x0c - parallel if dma rx addr0"]
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|
|
+pub r32_hspi_rx_addr0 : crate :: Reg < r32_hspi_rx_addr0 :: R32_HSPI_RX_ADDR0_SPEC > , # [doc = "0x10 - parallel if dma rx addr1"]
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|
|
+pub r32_hspi_rx_addr1 : crate :: Reg < r32_hspi_rx_addr1 :: R32_HSPI_RX_ADDR1_SPEC > , # [doc = "0x14 - parallel if dma length0"]
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|
|
+pub r16_hspi_dma_len0 : crate :: Reg < r16_hspi_dma_len0 :: R16_HSPI_DMA_LEN0_SPEC > , # [doc = "0x16 - parallel if receive length0"]
|
|
|
+pub r16_hspi_rx_len0 : crate :: Reg < r16_hspi_rx_len0 :: R16_HSPI_RX_LEN0_SPEC > , # [doc = "0x18 - parallel if dma length1"]
|
|
|
+pub r16_hspi_dma_len1 : crate :: Reg < r16_hspi_dma_len1 :: R16_HSPI_DMA_LEN1_SPEC > , # [doc = "0x1a - parallel if receive length1"]
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|
|
+pub r16_hspi_rx_len1 : crate :: Reg < r16_hspi_rx_len1 :: R16_HSPI_RX_LEN1_SPEC > , # [doc = "0x1c - parallel if tx burst config register"]
|
|
|
+pub r16_hspi_burst_cfg : crate :: Reg < r16_hspi_burst_cfg :: R16_HSPI_BURST_CFG_SPEC > , # [doc = "0x1e - parallel if tx burst count"]
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|
|
+pub r8_hspi_burst_cnt : crate :: Reg < r8_hspi_burst_cnt :: R8_HSPI_BURST_CNT_SPEC > , _reserved14 : [u8 ; 0x01]
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|
|
+, # [doc = "0x20 - parallel if user defined field 0 register"]
|
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+pub r32_hspi_udf0 : crate :: Reg < r32_hspi_udf0 :: R32_HSPI_UDF0_SPEC > , # [doc = "0x24 - parallel if user defined field 1 register"]
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+pub r32_hspi_udf1 : crate :: Reg < r32_hspi_udf1 :: R32_HSPI_UDF1_SPEC > , # [doc = "0x28 - parallel if interrupt flag"]
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+pub r8_hspi_int_flag : crate :: Reg < r8_hspi_int_flag :: R8_HSPI_INT_FLAG_SPEC > , # [doc = "0x29 - parallel rtx status"]
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+pub r8_hspi_rtx_status : crate :: Reg < r8_hspi_rtx_status :: R8_HSPI_RTX_STATUS_SPEC > , # [doc = "0x2a - parallel TX sequence ctrl"]
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+pub r8_hspi_tx_sc : crate :: Reg < r8_hspi_tx_sc :: R8_HSPI_TX_SC_SPEC > , # [doc = "0x2b - parallel RX sequence ctrl"]
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+pub hspi_rx_sc : crate :: Reg < hspi_rx_sc :: HSPI_RX_SC_SPEC > , } # [doc = "R8_HSPI_CFG register accessor: an alias for `Reg<R8_HSPI_CFG_SPEC>`"]
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+pub type R8_HSPI_CFG = crate :: Reg < r8_hspi_cfg :: R8_HSPI_CFG_SPEC > ; # [doc = "parallel if tx or rx cfg"]
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+pub mod r8_hspi_cfg { # [doc = "Register `R8_HSPI_CFG` reader"]
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+pub struct R (crate :: R < R8_HSPI_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_CFG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_HSPI_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_CFG` writer"]
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+pub struct W (crate :: W < R8_HSPI_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_CFG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_CFG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_HSPI_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_MODE` reader - parallel if mode"]
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+pub struct RB_HSPI_MODE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_MODE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_MODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_MODE` writer - parallel if mode"]
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+pub struct RB_HSPI_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_MODE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_DUALDMA` reader - parallel if dualdma mode enable"]
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+pub struct RB_HSPI_DUALDMA_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_DUALDMA_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_DUALDMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DUALDMA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DUALDMA` writer - parallel if dualdma mode enable"]
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+pub struct RB_HSPI_DUALDMA_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DUALDMA_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_MSK_SIZE` reader - parallel if data mode"]
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+pub struct RB_HSPI_MSK_SIZE_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_MSK_SIZE_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_MSK_SIZE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_MSK_SIZE_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_MSK_SIZE` writer - parallel if data mode"]
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+pub struct RB_HSPI_MSK_SIZE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_MSK_SIZE_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 2)) | ((value as u8 & 0x03) << 2) ; self . w } } # [doc = "Field `RB_HSPI_TX_TOG_EN` reader - parallel if tx addr toggle enable"]
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+pub struct RB_HSPI_TX_TOG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TX_TOG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TX_TOG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_TOG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_TOG_EN` writer - parallel if tx addr toggle enable"]
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+pub struct RB_HSPI_TX_TOG_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_TOG_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_HSPI_RX_TOG_EN` reader - parallel if rx addr toggle enable"]
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+pub struct RB_HSPI_RX_TOG_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RX_TOG_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RX_TOG_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_TOG_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_TOG_EN` writer - parallel if rx addr toggle enable"]
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+pub struct RB_HSPI_RX_TOG_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_TOG_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_HSPI_HW_ACK` reader - parallel if tx ack by hardware"]
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+pub struct RB_HSPI_HW_ACK_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_HW_ACK_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_HW_ACK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_HW_ACK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_HW_ACK` writer - parallel if tx ack by hardware"]
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+pub struct RB_HSPI_HW_ACK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_HW_ACK_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - parallel if mode"]
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+# [inline (always)]
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+pub fn rb_hspi_mode (& self) -> RB_HSPI_MODE_R { RB_HSPI_MODE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if dualdma mode enable"]
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+# [inline (always)]
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+pub fn rb_hspi_dualdma (& self) -> RB_HSPI_DUALDMA_R { RB_HSPI_DUALDMA_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bits 2:3 - parallel if data mode"]
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+# [inline (always)]
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+pub fn rb_hspi_msk_size (& self) -> RB_HSPI_MSK_SIZE_R { RB_HSPI_MSK_SIZE_R :: new (((self . bits >> 2) & 0x03) as u8) } # [doc = "Bit 5 - parallel if tx addr toggle enable"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_tog_en (& self) -> RB_HSPI_TX_TOG_EN_R { RB_HSPI_TX_TOG_EN_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - parallel if rx addr toggle enable"]
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+# [inline (always)]
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+pub fn rb_hspi_rx_tog_en (& self) -> RB_HSPI_RX_TOG_EN_R { RB_HSPI_RX_TOG_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - parallel if tx ack by hardware"]
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+# [inline (always)]
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+pub fn rb_hspi_hw_ack (& self) -> RB_HSPI_HW_ACK_R { RB_HSPI_HW_ACK_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if mode"]
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+# [inline (always)]
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+pub fn rb_hspi_mode (& mut self) -> RB_HSPI_MODE_W { RB_HSPI_MODE_W { w : self } } # [doc = "Bit 1 - parallel if dualdma mode enable"]
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+# [inline (always)]
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+pub fn rb_hspi_dualdma (& mut self) -> RB_HSPI_DUALDMA_W { RB_HSPI_DUALDMA_W { w : self } } # [doc = "Bits 2:3 - parallel if data mode"]
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+# [inline (always)]
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+pub fn rb_hspi_msk_size (& mut self) -> RB_HSPI_MSK_SIZE_W { RB_HSPI_MSK_SIZE_W { w : self } } # [doc = "Bit 5 - parallel if tx addr toggle enable"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_tog_en (& mut self) -> RB_HSPI_TX_TOG_EN_W { RB_HSPI_TX_TOG_EN_W { w : self } } # [doc = "Bit 6 - parallel if rx addr toggle enable"]
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+# [inline (always)]
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+pub fn rb_hspi_rx_tog_en (& mut self) -> RB_HSPI_RX_TOG_EN_W { RB_HSPI_RX_TOG_EN_W { w : self } } # [doc = "Bit 7 - parallel if tx ack by hardware"]
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+# [inline (always)]
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+pub fn rb_hspi_hw_ack (& mut self) -> RB_HSPI_HW_ACK_W { RB_HSPI_HW_ACK_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx or rx cfg\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_cfg](index.html) module"]
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+pub struct R8_HSPI_CFG_SPEC ; impl crate :: RegisterSpec for R8_HSPI_CFG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_cfg::R](R) reader structure"]
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+impl crate :: Readable for R8_HSPI_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_cfg::W](W) writer structure"]
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+impl crate :: Writable for R8_HSPI_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_CFG to value 0x82"]
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+impl crate :: Resettable for R8_HSPI_CFG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x82 } } } # [doc = "R8_HSPI_CTRL register accessor: an alias for `Reg<R8_HSPI_CTRL_SPEC>`"]
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+pub type R8_HSPI_CTRL = crate :: Reg < r8_hspi_ctrl :: R8_HSPI_CTRL_SPEC > ; # [doc = "parallel if tx or rx control"]
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+pub mod r8_hspi_ctrl { # [doc = "Register `R8_HSPI_CTRL` reader"]
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+pub struct R (crate :: R < R8_HSPI_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_CTRL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_HSPI_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_CTRL` writer"]
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+pub struct W (crate :: W < R8_HSPI_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_HSPI_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_ENABLE` reader - parallel if enable"]
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+pub struct RB_HSPI_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ENABLE` writer - parallel if enable"]
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+pub struct RB_HSPI_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_DMA_EN` reader - parallel if dma enable"]
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+pub struct RB_HSPI_DMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_DMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_DMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_EN` writer - parallel if dma enable"]
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|
+pub struct RB_HSPI_DMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_SW_ACT` reader - parallel if transmit software trigger"]
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|
|
+pub struct RB_HSPI_SW_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_SW_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_SW_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_SW_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_SW_ACT` writer - parallel if transmit software trigger"]
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|
|
+pub struct RB_HSPI_SW_ACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_SW_ACT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_ALL_CLR` reader - parallel if all clear"]
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|
|
+pub struct RB_HSPI_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ALL_CLR` writer - parallel if all clear"]
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|
|
+pub struct RB_HSPI_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_HSPI_TRX_RST` reader - parallel if tx and rx logic clear, high action"]
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|
|
+pub struct RB_HSPI_TRX_RST_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TRX_RST_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TRX_RST_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TRX_RST_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TRX_RST` writer - parallel if tx and rx logic clear, high action"]
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|
|
+pub struct RB_HSPI_TRX_RST_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TRX_RST_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - parallel if enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_enable (& self) -> RB_HSPI_ENABLE_R { RB_HSPI_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if dma enable"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_dma_en (& self) -> RB_HSPI_DMA_EN_R { RB_HSPI_DMA_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if transmit software trigger"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_sw_act (& self) -> RB_HSPI_SW_ACT_R { RB_HSPI_SW_ACT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - parallel if all clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_all_clr (& self) -> RB_HSPI_ALL_CLR_R { RB_HSPI_ALL_CLR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - parallel if tx and rx logic clear, high action"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_hspi_trx_rst (& self) -> RB_HSPI_TRX_RST_R { RB_HSPI_TRX_RST_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_hspi_enable (& mut self) -> RB_HSPI_ENABLE_W { RB_HSPI_ENABLE_W { w : self } } # [doc = "Bit 1 - parallel if dma enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_dma_en (& mut self) -> RB_HSPI_DMA_EN_W { RB_HSPI_DMA_EN_W { w : self } } # [doc = "Bit 2 - parallel if transmit software trigger"]
|
|
|
+# [inline (always)]
|
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+pub fn rb_hspi_sw_act (& mut self) -> RB_HSPI_SW_ACT_W { RB_HSPI_SW_ACT_W { w : self } } # [doc = "Bit 3 - parallel if all clear"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_all_clr (& mut self) -> RB_HSPI_ALL_CLR_W { RB_HSPI_ALL_CLR_W { w : self } } # [doc = "Bit 4 - parallel if tx and rx logic clear, high action"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_hspi_trx_rst (& mut self) -> RB_HSPI_TRX_RST_W { RB_HSPI_TRX_RST_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx or rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_ctrl](index.html) module"]
|
|
|
+pub struct R8_HSPI_CTRL_SPEC ; impl crate :: RegisterSpec for R8_HSPI_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_ctrl::R](R) reader structure"]
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|
+impl crate :: Readable for R8_HSPI_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_ctrl::W](W) writer structure"]
|
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|
+impl crate :: Writable for R8_HSPI_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_CTRL to value 0x18"]
|
|
|
+impl crate :: Resettable for R8_HSPI_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x18 } } } # [doc = "R8_HSPI_INT_EN register accessor: an alias for `Reg<R8_HSPI_INT_EN_SPEC>`"]
|
|
|
+pub type R8_HSPI_INT_EN = crate :: Reg < r8_hspi_int_en :: R8_HSPI_INT_EN_SPEC > ; # [doc = "parallel if interrupt enable register"]
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|
|
+pub mod r8_hspi_int_en { # [doc = "Register `R8_HSPI_INT_EN` reader"]
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|
|
+pub struct R (crate :: R < R8_HSPI_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_INT_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_INT_EN_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_HSPI_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_INT_EN` writer"]
|
|
|
+pub struct W (crate :: W < R8_HSPI_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_INT_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_INT_EN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_HSPI_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_IE_T_DONE` reader - parallel if transmit done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_T_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_T_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_T_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_T_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_T_DONE` writer - parallel if transmit done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_T_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_T_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_IE_R_DONE` reader - parallel if receive done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_R_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_R_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_R_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_R_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_R_DONE` writer - parallel if receive done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_R_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_R_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_IE_FIFO_OV` reader - parallel if fifo overflow interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_FIFO_OV` writer - parallel if fifo overflow interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_IE_B_DONE` reader - parallel if tx burst done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_B_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IE_B_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IE_B_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IE_B_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IE_B_DONE` writer - parallel if tx burst done interrupt enable"]
|
|
|
+pub struct RB_HSPI_IE_B_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IE_B_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - parallel if transmit done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_t_done (& self) -> RB_HSPI_IE_T_DONE_R { RB_HSPI_IE_T_DONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if receive done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_r_done (& self) -> RB_HSPI_IE_R_DONE_R { RB_HSPI_IE_R_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if fifo overflow interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_fifo_ov (& self) -> RB_HSPI_IE_FIFO_OV_R { RB_HSPI_IE_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - parallel if tx burst done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_b_done (& self) -> RB_HSPI_IE_B_DONE_R { RB_HSPI_IE_B_DONE_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - parallel if transmit done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_t_done (& mut self) -> RB_HSPI_IE_T_DONE_W { RB_HSPI_IE_T_DONE_W { w : self } } # [doc = "Bit 1 - parallel if receive done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_r_done (& mut self) -> RB_HSPI_IE_R_DONE_W { RB_HSPI_IE_R_DONE_W { w : self } } # [doc = "Bit 2 - parallel if fifo overflow interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_fifo_ov (& mut self) -> RB_HSPI_IE_FIFO_OV_W { RB_HSPI_IE_FIFO_OV_W { w : self } } # [doc = "Bit 3 - parallel if tx burst done interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ie_b_done (& mut self) -> RB_HSPI_IE_B_DONE_W { RB_HSPI_IE_B_DONE_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_int_en](index.html) module"]
|
|
|
+pub struct R8_HSPI_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_HSPI_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_int_en::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_HSPI_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_int_en::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_HSPI_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_INT_EN to value 0"]
|
|
|
+impl crate :: Resettable for R8_HSPI_INT_EN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_AUX register accessor: an alias for `Reg<R8_HSPI_AUX_SPEC>`"]
|
|
|
+pub type R8_HSPI_AUX = crate :: Reg < r8_hspi_aux :: R8_HSPI_AUX_SPEC > ; # [doc = "parallel if aux"]
|
|
|
+pub mod r8_hspi_aux { # [doc = "Register `R8_HSPI_AUX` reader"]
|
|
|
+pub struct R (crate :: R < R8_HSPI_AUX_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_AUX_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_AUX_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_HSPI_AUX_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_AUX` writer"]
|
|
|
+pub struct W (crate :: W < R8_HSPI_AUX_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_AUX_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_AUX_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_HSPI_AUX_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TCK_MOD` reader - parallel if tx clk polar control"]
|
|
|
+pub struct RB_HSPI_TCK_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TCK_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TCK_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TCK_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TCK_MOD` writer - parallel if tx clk polar control"]
|
|
|
+pub struct RB_HSPI_TCK_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TCK_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_RCK_MOD` reader - parallel if rx clk polar control"]
|
|
|
+pub struct RB_HSPI_RCK_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RCK_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RCK_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RCK_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RCK_MOD` writer - parallel if rx clk polar control"]
|
|
|
+pub struct RB_HSPI_RCK_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RCK_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_ACK_TX_MOD` reader - parallel if tx ack mode cfg"]
|
|
|
+pub struct RB_HSPI_ACK_TX_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_ACK_TX_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_ACK_TX_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ACK_TX_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ACK_TX_MOD` writer - parallel if tx ack mode cfg"]
|
|
|
+pub struct RB_HSPI_ACK_TX_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ACK_TX_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_ACK_CNT_SEL` reader - delay time of parallel if send ack when receive done"]
|
|
|
+pub struct RB_HSPI_ACK_CNT_SEL_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_ACK_CNT_SEL_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_ACK_CNT_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_ACK_CNT_SEL_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_ACK_CNT_SEL` writer - delay time of parallel if send ack when receive done"]
|
|
|
+pub struct RB_HSPI_ACK_CNT_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_ACK_CNT_SEL_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } impl R { # [doc = "Bit 0 - parallel if tx clk polar control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_tck_mod (& self) -> RB_HSPI_TCK_MOD_R { RB_HSPI_TCK_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - parallel if rx clk polar control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rck_mod (& self) -> RB_HSPI_RCK_MOD_R { RB_HSPI_RCK_MOD_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - parallel if tx ack mode cfg"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_ack_tx_mod (& self) -> RB_HSPI_ACK_TX_MOD_R { RB_HSPI_ACK_TX_MOD_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - delay time of parallel if send ack when receive done"]
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+# [inline (always)]
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+pub fn rb_hspi_ack_cnt_sel (& self) -> RB_HSPI_ACK_CNT_SEL_R { RB_HSPI_ACK_CNT_SEL_R :: new (((self . bits >> 3) & 0x03) as u8) } } impl W { # [doc = "Bit 0 - parallel if tx clk polar control"]
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+# [inline (always)]
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+pub fn rb_hspi_tck_mod (& mut self) -> RB_HSPI_TCK_MOD_W { RB_HSPI_TCK_MOD_W { w : self } } # [doc = "Bit 1 - parallel if rx clk polar control"]
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+# [inline (always)]
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+pub fn rb_hspi_rck_mod (& mut self) -> RB_HSPI_RCK_MOD_W { RB_HSPI_RCK_MOD_W { w : self } } # [doc = "Bit 2 - parallel if tx ack mode cfg"]
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+# [inline (always)]
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+pub fn rb_hspi_ack_tx_mod (& mut self) -> RB_HSPI_ACK_TX_MOD_W { RB_HSPI_ACK_TX_MOD_W { w : self } } # [doc = "Bits 3:4 - delay time of parallel if send ack when receive done"]
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+# [inline (always)]
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+pub fn rb_hspi_ack_cnt_sel (& mut self) -> RB_HSPI_ACK_CNT_SEL_W { RB_HSPI_ACK_CNT_SEL_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if aux\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_aux](index.html) module"]
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+pub struct R8_HSPI_AUX_SPEC ; impl crate :: RegisterSpec for R8_HSPI_AUX_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_aux::R](R) reader structure"]
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+impl crate :: Readable for R8_HSPI_AUX_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_aux::W](W) writer structure"]
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+impl crate :: Writable for R8_HSPI_AUX_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_AUX to value 0"]
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+impl crate :: Resettable for R8_HSPI_AUX_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_TX_ADDR0 register accessor: an alias for `Reg<R32_HSPI_TX_ADDR0_SPEC>`"]
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+pub type R32_HSPI_TX_ADDR0 = crate :: Reg < r32_hspi_tx_addr0 :: R32_HSPI_TX_ADDR0_SPEC > ; # [doc = "parallel if dma tx addr0"]
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+pub mod r32_hspi_tx_addr0 { # [doc = "Register `R32_HSPI_TX_ADDR0` reader"]
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+pub struct R (crate :: R < R32_HSPI_TX_ADDR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_TX_ADDR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_TX_ADDR0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_HSPI_TX_ADDR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_TX_ADDR0` writer"]
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+pub struct W (crate :: W < R32_HSPI_TX_ADDR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_TX_ADDR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_TX_ADDR0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_HSPI_TX_ADDR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_ADDR0` reader - parallel if dma tx addr0"]
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+pub struct RB_HSPI_TX_ADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_TX_ADDR0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_TX_ADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_ADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_ADDR0` writer - parallel if dma tx addr0"]
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+pub struct RB_HSPI_TX_ADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_ADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma tx addr0"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_addr0 (& self) -> RB_HSPI_TX_ADDR0_R { RB_HSPI_TX_ADDR0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma tx addr0"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_addr0 (& mut self) -> RB_HSPI_TX_ADDR0_W { RB_HSPI_TX_ADDR0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma tx addr0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_tx_addr0](index.html) module"]
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+pub struct R32_HSPI_TX_ADDR0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_TX_ADDR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_tx_addr0::R](R) reader structure"]
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+impl crate :: Readable for R32_HSPI_TX_ADDR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_tx_addr0::W](W) writer structure"]
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+impl crate :: Writable for R32_HSPI_TX_ADDR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_TX_ADDR0 to value 0"]
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+impl crate :: Resettable for R32_HSPI_TX_ADDR0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_TX_ADDR1 register accessor: an alias for `Reg<R32_HSPI_TX_ADDR1_SPEC>`"]
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+pub type R32_HSPI_TX_ADDR1 = crate :: Reg < r32_hspi_tx_addr1 :: R32_HSPI_TX_ADDR1_SPEC > ; # [doc = "parallel if dma tx addr1"]
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+pub mod r32_hspi_tx_addr1 { # [doc = "Register `R32_HSPI_TX_ADDR1` reader"]
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+pub struct R (crate :: R < R32_HSPI_TX_ADDR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_TX_ADDR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_TX_ADDR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_HSPI_TX_ADDR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_TX_ADDR1` writer"]
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+pub struct W (crate :: W < R32_HSPI_TX_ADDR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_TX_ADDR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_TX_ADDR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_HSPI_TX_ADDR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_ADDR1` reader - parallel if dma tx addr1"]
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+pub struct RB_HSPI_TX_ADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_TX_ADDR1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_TX_ADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_ADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_ADDR1` writer - parallel if dma tx addr1"]
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+pub struct RB_HSPI_TX_ADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_ADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma tx addr1"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_addr1 (& self) -> RB_HSPI_TX_ADDR1_R { RB_HSPI_TX_ADDR1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma tx addr1"]
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+# [inline (always)]
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+pub fn rb_hspi_tx_addr1 (& mut self) -> RB_HSPI_TX_ADDR1_W { RB_HSPI_TX_ADDR1_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma tx addr1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_tx_addr1](index.html) module"]
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+pub struct R32_HSPI_TX_ADDR1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_TX_ADDR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_tx_addr1::R](R) reader structure"]
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+impl crate :: Readable for R32_HSPI_TX_ADDR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_tx_addr1::W](W) writer structure"]
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+impl crate :: Writable for R32_HSPI_TX_ADDR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_TX_ADDR1 to value 0"]
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+impl crate :: Resettable for R32_HSPI_TX_ADDR1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_RX_ADDR0 register accessor: an alias for `Reg<R32_HSPI_RX_ADDR0_SPEC>`"]
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+pub type R32_HSPI_RX_ADDR0 = crate :: Reg < r32_hspi_rx_addr0 :: R32_HSPI_RX_ADDR0_SPEC > ; # [doc = "parallel if dma rx addr0"]
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+pub mod r32_hspi_rx_addr0 { # [doc = "Register `R32_HSPI_RX_ADDR0` reader"]
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|
+pub struct R (crate :: R < R32_HSPI_RX_ADDR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_RX_ADDR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_RX_ADDR0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_HSPI_RX_ADDR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_RX_ADDR0` writer"]
|
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|
+pub struct W (crate :: W < R32_HSPI_RX_ADDR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_RX_ADDR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_RX_ADDR0_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R32_HSPI_RX_ADDR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_ADDR0` reader - parallel if dma rx addr0"]
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|
|
+pub struct RB_HSPI_RX_ADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_RX_ADDR0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_RX_ADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_ADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_ADDR0` writer - parallel if dma rx addr0"]
|
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|
+pub struct RB_HSPI_RX_ADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_ADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma rx addr0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_addr0 (& self) -> RB_HSPI_RX_ADDR0_R { RB_HSPI_RX_ADDR0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma rx addr0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_addr0 (& mut self) -> RB_HSPI_RX_ADDR0_W { RB_HSPI_RX_ADDR0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma rx addr0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_rx_addr0](index.html) module"]
|
|
|
+pub struct R32_HSPI_RX_ADDR0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_RX_ADDR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_rx_addr0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_HSPI_RX_ADDR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_rx_addr0::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_HSPI_RX_ADDR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_RX_ADDR0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_HSPI_RX_ADDR0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_RX_ADDR1 register accessor: an alias for `Reg<R32_HSPI_RX_ADDR1_SPEC>`"]
|
|
|
+pub type R32_HSPI_RX_ADDR1 = crate :: Reg < r32_hspi_rx_addr1 :: R32_HSPI_RX_ADDR1_SPEC > ; # [doc = "parallel if dma rx addr1"]
|
|
|
+pub mod r32_hspi_rx_addr1 { # [doc = "Register `R32_HSPI_RX_ADDR1` reader"]
|
|
|
+pub struct R (crate :: R < R32_HSPI_RX_ADDR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_RX_ADDR1_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_RX_ADDR1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_HSPI_RX_ADDR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_RX_ADDR1` writer"]
|
|
|
+pub struct W (crate :: W < R32_HSPI_RX_ADDR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_RX_ADDR1_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_RX_ADDR1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_HSPI_RX_ADDR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_ADDR1` reader - parallel if dma rx addr1"]
|
|
|
+pub struct RB_HSPI_RX_ADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_RX_ADDR1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_RX_ADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_ADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_ADDR1` writer - parallel if dma rx addr1"]
|
|
|
+pub struct RB_HSPI_RX_ADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_ADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - parallel if dma rx addr1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_addr1 (& self) -> RB_HSPI_RX_ADDR1_R { RB_HSPI_RX_ADDR1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - parallel if dma rx addr1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_addr1 (& mut self) -> RB_HSPI_RX_ADDR1_W { RB_HSPI_RX_ADDR1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma rx addr1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_rx_addr1](index.html) module"]
|
|
|
+pub struct R32_HSPI_RX_ADDR1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_RX_ADDR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_rx_addr1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_HSPI_RX_ADDR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_rx_addr1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_HSPI_RX_ADDR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_RX_ADDR1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_HSPI_RX_ADDR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_DMA_LEN0 register accessor: an alias for `Reg<R16_HSPI_DMA_LEN0_SPEC>`"]
|
|
|
+pub type R16_HSPI_DMA_LEN0 = crate :: Reg < r16_hspi_dma_len0 :: R16_HSPI_DMA_LEN0_SPEC > ; # [doc = "parallel if dma length0"]
|
|
|
+pub mod r16_hspi_dma_len0 { # [doc = "Register `R16_HSPI_DMA_LEN0` reader"]
|
|
|
+pub struct R (crate :: R < R16_HSPI_DMA_LEN0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_DMA_LEN0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_DMA_LEN0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_HSPI_DMA_LEN0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_DMA_LEN0` writer"]
|
|
|
+pub struct W (crate :: W < R16_HSPI_DMA_LEN0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_DMA_LEN0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_DMA_LEN0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_HSPI_DMA_LEN0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_DMA_LEN0` reader - parallel if dma length0"]
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+pub struct RB_HSPI_DMA_LEN0_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_DMA_LEN0_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_DMA_LEN0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_LEN0_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_LEN0` writer - parallel if dma length0"]
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+pub struct RB_HSPI_DMA_LEN0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_LEN0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length0"]
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+# [inline (always)]
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+pub fn rb_hspi_dma_len0 (& self) -> RB_HSPI_DMA_LEN0_R { RB_HSPI_DMA_LEN0_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length0"]
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+# [inline (always)]
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+pub fn rb_hspi_dma_len0 (& mut self) -> RB_HSPI_DMA_LEN0_W { RB_HSPI_DMA_LEN0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma length0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_dma_len0](index.html) module"]
|
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+pub struct R16_HSPI_DMA_LEN0_SPEC ; impl crate :: RegisterSpec for R16_HSPI_DMA_LEN0_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_dma_len0::R](R) reader structure"]
|
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+impl crate :: Readable for R16_HSPI_DMA_LEN0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_dma_len0::W](W) writer structure"]
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+impl crate :: Writable for R16_HSPI_DMA_LEN0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_DMA_LEN0 to value 0"]
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+impl crate :: Resettable for R16_HSPI_DMA_LEN0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_RX_LEN0 register accessor: an alias for `Reg<R16_HSPI_RX_LEN0_SPEC>`"]
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+pub type R16_HSPI_RX_LEN0 = crate :: Reg < r16_hspi_rx_len0 :: R16_HSPI_RX_LEN0_SPEC > ; # [doc = "parallel if receive length0"]
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+pub mod r16_hspi_rx_len0 { # [doc = "Register `R16_HSPI_RX_LEN0` reader"]
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+pub struct R (crate :: R < R16_HSPI_RX_LEN0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_RX_LEN0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_RX_LEN0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_HSPI_RX_LEN0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_RX_LEN0` writer"]
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+pub struct W (crate :: W < R16_HSPI_RX_LEN0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_RX_LEN0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_RX_LEN0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_HSPI_RX_LEN0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_LEN0` reader - parallel if dma length0"]
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+pub struct RB_HSPI_RX_LEN0_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_RX_LEN0_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_RX_LEN0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_LEN0_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_LEN0` writer - parallel if dma length0"]
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+pub struct RB_HSPI_RX_LEN0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_LEN0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length0"]
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+# [inline (always)]
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+pub fn rb_hspi_rx_len0 (& self) -> RB_HSPI_RX_LEN0_R { RB_HSPI_RX_LEN0_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length0"]
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+# [inline (always)]
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+pub fn rb_hspi_rx_len0 (& mut self) -> RB_HSPI_RX_LEN0_W { RB_HSPI_RX_LEN0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if receive length0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_rx_len0](index.html) module"]
|
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+pub struct R16_HSPI_RX_LEN0_SPEC ; impl crate :: RegisterSpec for R16_HSPI_RX_LEN0_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_rx_len0::R](R) reader structure"]
|
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+impl crate :: Readable for R16_HSPI_RX_LEN0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_rx_len0::W](W) writer structure"]
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+impl crate :: Writable for R16_HSPI_RX_LEN0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_RX_LEN0 to value 0"]
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+impl crate :: Resettable for R16_HSPI_RX_LEN0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_DMA_LEN1 register accessor: an alias for `Reg<R16_HSPI_DMA_LEN1_SPEC>`"]
|
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+pub type R16_HSPI_DMA_LEN1 = crate :: Reg < r16_hspi_dma_len1 :: R16_HSPI_DMA_LEN1_SPEC > ; # [doc = "parallel if dma length1"]
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+pub mod r16_hspi_dma_len1 { # [doc = "Register `R16_HSPI_DMA_LEN1` reader"]
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+pub struct R (crate :: R < R16_HSPI_DMA_LEN1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_DMA_LEN1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_DMA_LEN1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_HSPI_DMA_LEN1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_DMA_LEN1` writer"]
|
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+pub struct W (crate :: W < R16_HSPI_DMA_LEN1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_DMA_LEN1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_DMA_LEN1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_HSPI_DMA_LEN1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_DMA_LEN1` reader - parallel if dma length1"]
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+pub struct RB_HSPI_DMA_LEN1_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_DMA_LEN1_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_DMA_LEN1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_DMA_LEN1_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_DMA_LEN1` writer - parallel if dma length1"]
|
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+pub struct RB_HSPI_DMA_LEN1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_DMA_LEN1_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length1"]
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|
+# [inline (always)]
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+pub fn rb_hspi_dma_len1 (& self) -> RB_HSPI_DMA_LEN1_R { RB_HSPI_DMA_LEN1_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length1"]
|
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+# [inline (always)]
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+pub fn rb_hspi_dma_len1 (& mut self) -> RB_HSPI_DMA_LEN1_W { RB_HSPI_DMA_LEN1_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if dma length1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_dma_len1](index.html) module"]
|
|
|
+pub struct R16_HSPI_DMA_LEN1_SPEC ; impl crate :: RegisterSpec for R16_HSPI_DMA_LEN1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_dma_len1::R](R) reader structure"]
|
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+impl crate :: Readable for R16_HSPI_DMA_LEN1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_dma_len1::W](W) writer structure"]
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+impl crate :: Writable for R16_HSPI_DMA_LEN1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_DMA_LEN1 to value 0"]
|
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|
+impl crate :: Resettable for R16_HSPI_DMA_LEN1_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_RX_LEN1 register accessor: an alias for `Reg<R16_HSPI_RX_LEN1_SPEC>`"]
|
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+pub type R16_HSPI_RX_LEN1 = crate :: Reg < r16_hspi_rx_len1 :: R16_HSPI_RX_LEN1_SPEC > ; # [doc = "parallel if receive length1"]
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|
+pub mod r16_hspi_rx_len1 { # [doc = "Register `R16_HSPI_RX_LEN1` reader"]
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|
+pub struct R (crate :: R < R16_HSPI_RX_LEN1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_RX_LEN1_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_RX_LEN1_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R16_HSPI_RX_LEN1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_RX_LEN1` writer"]
|
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|
+pub struct W (crate :: W < R16_HSPI_RX_LEN1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_RX_LEN1_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_RX_LEN1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_HSPI_RX_LEN1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_LEN1` reader - parallel if dma length1"]
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|
|
+pub struct RB_HSPI_RX_LEN1_R (crate :: FieldReader < u16 , u16 >) ; impl RB_HSPI_RX_LEN1_R { pub (crate) fn new (bits : u16) -> Self { RB_HSPI_RX_LEN1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_LEN1_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_LEN1` writer - parallel if dma length1"]
|
|
|
+pub struct RB_HSPI_RX_LEN1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_LEN1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff) | (value as u16 & 0x0fff) ; self . w } } impl R { # [doc = "Bits 0:11 - parallel if dma length1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_len1 (& self) -> RB_HSPI_RX_LEN1_R { RB_HSPI_RX_LEN1_R :: new ((self . bits & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:11 - parallel if dma length1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_len1 (& mut self) -> RB_HSPI_RX_LEN1_W { RB_HSPI_RX_LEN1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if receive length1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_rx_len1](index.html) module"]
|
|
|
+pub struct R16_HSPI_RX_LEN1_SPEC ; impl crate :: RegisterSpec for R16_HSPI_RX_LEN1_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_rx_len1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_HSPI_RX_LEN1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_rx_len1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_HSPI_RX_LEN1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_RX_LEN1 to value 0"]
|
|
|
+impl crate :: Resettable for R16_HSPI_RX_LEN1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_HSPI_BURST_CFG register accessor: an alias for `Reg<R16_HSPI_BURST_CFG_SPEC>`"]
|
|
|
+pub type R16_HSPI_BURST_CFG = crate :: Reg < r16_hspi_burst_cfg :: R16_HSPI_BURST_CFG_SPEC > ; # [doc = "parallel if tx burst config register"]
|
|
|
+pub mod r16_hspi_burst_cfg { # [doc = "Register `R16_HSPI_BURST_CFG` reader"]
|
|
|
+pub struct R (crate :: R < R16_HSPI_BURST_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_HSPI_BURST_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_HSPI_BURST_CFG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_HSPI_BURST_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_HSPI_BURST_CFG` writer"]
|
|
|
+pub struct W (crate :: W < R16_HSPI_BURST_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_HSPI_BURST_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_HSPI_BURST_CFG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_HSPI_BURST_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_BURST_EN` reader - burst transmit enable"]
|
|
|
+pub struct RB_HSPI_BURST_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_BURST_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_BURST_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_EN` writer - burst transmit enable"]
|
|
|
+pub struct RB_HSPI_BURST_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_BURST_LEN` reader - burst transmit length"]
|
|
|
+pub struct RB_HSPI_BURST_LEN_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_BURST_LEN_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_BURST_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_LEN_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_LEN` writer - burst transmit length"]
|
|
|
+pub struct RB_HSPI_BURST_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 8)) | ((value as u16 & 0xff) << 8) ; self . w } } impl R { # [doc = "Bit 0 - burst transmit enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_burst_en (& self) -> RB_HSPI_BURST_EN_R { RB_HSPI_BURST_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bits 8:15 - burst transmit length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_burst_len (& self) -> RB_HSPI_BURST_LEN_R { RB_HSPI_BURST_LEN_R :: new (((self . bits >> 8) & 0xff) as u8) } } impl W { # [doc = "Bit 0 - burst transmit enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_burst_en (& mut self) -> RB_HSPI_BURST_EN_W { RB_HSPI_BURST_EN_W { w : self } } # [doc = "Bits 8:15 - burst transmit length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_burst_len (& mut self) -> RB_HSPI_BURST_LEN_W { RB_HSPI_BURST_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx burst config register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_hspi_burst_cfg](index.html) module"]
|
|
|
+pub struct R16_HSPI_BURST_CFG_SPEC ; impl crate :: RegisterSpec for R16_HSPI_BURST_CFG_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_hspi_burst_cfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_HSPI_BURST_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_hspi_burst_cfg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_HSPI_BURST_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_HSPI_BURST_CFG to value 0"]
|
|
|
+impl crate :: Resettable for R16_HSPI_BURST_CFG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_BURST_CNT register accessor: an alias for `Reg<R8_HSPI_BURST_CNT_SPEC>`"]
|
|
|
+pub type R8_HSPI_BURST_CNT = crate :: Reg < r8_hspi_burst_cnt :: R8_HSPI_BURST_CNT_SPEC > ; # [doc = "parallel if tx burst count"]
|
|
|
+pub mod r8_hspi_burst_cnt { # [doc = "Register `R8_HSPI_BURST_CNT` reader"]
|
|
|
+pub struct R (crate :: R < R8_HSPI_BURST_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_BURST_CNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_BURST_CNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_HSPI_BURST_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_BURST_CNT` writer"]
|
|
|
+pub struct W (crate :: W < R8_HSPI_BURST_CNT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_BURST_CNT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_BURST_CNT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_HSPI_BURST_CNT_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_BURST_CNT` reader - parallel if tx burst count"]
|
|
|
+pub struct RB_HSPI_BURST_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_BURST_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_BURST_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_BURST_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_BURST_CNT` writer - parallel if tx burst count"]
|
|
|
+pub struct RB_HSPI_BURST_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_BURST_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u8 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - parallel if tx burst count"]
|
|
|
+# [inline (always)]
|
|
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+pub fn rb_hspi_burst_cnt (& self) -> RB_HSPI_BURST_CNT_R { RB_HSPI_BURST_CNT_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - parallel if tx burst count"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_burst_cnt (& mut self) -> RB_HSPI_BURST_CNT_W { RB_HSPI_BURST_CNT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if tx burst count\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_burst_cnt](index.html) module"]
|
|
|
+pub struct R8_HSPI_BURST_CNT_SPEC ; impl crate :: RegisterSpec for R8_HSPI_BURST_CNT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_burst_cnt::R](R) reader structure"]
|
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+impl crate :: Readable for R8_HSPI_BURST_CNT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_burst_cnt::W](W) writer structure"]
|
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+impl crate :: Writable for R8_HSPI_BURST_CNT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_BURST_CNT to value 0"]
|
|
|
+impl crate :: Resettable for R8_HSPI_BURST_CNT_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_UDF0 register accessor: an alias for `Reg<R32_HSPI_UDF0_SPEC>`"]
|
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+pub type R32_HSPI_UDF0 = crate :: Reg < r32_hspi_udf0 :: R32_HSPI_UDF0_SPEC > ; # [doc = "parallel if user defined field 0 register"]
|
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+pub mod r32_hspi_udf0 { # [doc = "Register `R32_HSPI_UDF0` reader"]
|
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|
+pub struct R (crate :: R < R32_HSPI_UDF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_UDF0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_UDF0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_HSPI_UDF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_UDF0` writer"]
|
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+pub struct W (crate :: W < R32_HSPI_UDF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_UDF0_SPEC > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_UDF0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_HSPI_UDF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_UDF0` reader - parallel if user defined field 0 register"]
|
|
|
+pub struct RB_HSPI_UDF0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_UDF0_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_UDF0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_UDF0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_UDF0` writer - parallel if user defined field 0 register"]
|
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|
+pub struct RB_HSPI_UDF0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_UDF0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03ff_ffff) | (value as u32 & 0x03ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:25 - parallel if user defined field 0 register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn rb_hspi_udf0 (& self) -> RB_HSPI_UDF0_R { RB_HSPI_UDF0_R :: new ((self . bits & 0x03ff_ffff) as u32) } } impl W { # [doc = "Bits 0:25 - parallel if user defined field 0 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_udf0 (& mut self) -> RB_HSPI_UDF0_W { RB_HSPI_UDF0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if user defined field 0 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_udf0](index.html) module"]
|
|
|
+pub struct R32_HSPI_UDF0_SPEC ; impl crate :: RegisterSpec for R32_HSPI_UDF0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_udf0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_HSPI_UDF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_udf0::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_HSPI_UDF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_UDF0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_HSPI_UDF0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_HSPI_UDF1 register accessor: an alias for `Reg<R32_HSPI_UDF1_SPEC>`"]
|
|
|
+pub type R32_HSPI_UDF1 = crate :: Reg < r32_hspi_udf1 :: R32_HSPI_UDF1_SPEC > ; # [doc = "parallel if user defined field 1 register"]
|
|
|
+pub mod r32_hspi_udf1 { # [doc = "Register `R32_HSPI_UDF1` reader"]
|
|
|
+pub struct R (crate :: R < R32_HSPI_UDF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_HSPI_UDF1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_HSPI_UDF1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_HSPI_UDF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_HSPI_UDF1` writer"]
|
|
|
+pub struct W (crate :: W < R32_HSPI_UDF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_HSPI_UDF1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_HSPI_UDF1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_HSPI_UDF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_UDF1` reader - parallel if user defined field 1 register"]
|
|
|
+pub struct RB_HSPI_UDF1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_HSPI_UDF1_R { pub (crate) fn new (bits : u32) -> Self { RB_HSPI_UDF1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_UDF1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_UDF1` writer - parallel if user defined field 1 register"]
|
|
|
+pub struct RB_HSPI_UDF1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_UDF1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03ff_ffff) | (value as u32 & 0x03ff_ffff) ; self . w } } impl R { # [doc = "Bits 0:25 - parallel if user defined field 1 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_udf1 (& self) -> RB_HSPI_UDF1_R { RB_HSPI_UDF1_R :: new ((self . bits & 0x03ff_ffff) as u32) } } impl W { # [doc = "Bits 0:25 - parallel if user defined field 1 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_udf1 (& mut self) -> RB_HSPI_UDF1_W { RB_HSPI_UDF1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if user defined field 1 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_hspi_udf1](index.html) module"]
|
|
|
+pub struct R32_HSPI_UDF1_SPEC ; impl crate :: RegisterSpec for R32_HSPI_UDF1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_hspi_udf1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_HSPI_UDF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_hspi_udf1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_HSPI_UDF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_HSPI_UDF1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_HSPI_UDF1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_INT_FLAG register accessor: an alias for `Reg<R8_HSPI_INT_FLAG_SPEC>`"]
|
|
|
+pub type R8_HSPI_INT_FLAG = crate :: Reg < r8_hspi_int_flag :: R8_HSPI_INT_FLAG_SPEC > ; # [doc = "parallel if interrupt flag"]
|
|
|
+pub mod r8_hspi_int_flag { # [doc = "Register `R8_HSPI_INT_FLAG` reader"]
|
|
|
+pub struct R (crate :: R < R8_HSPI_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_INT_FLAG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_INT_FLAG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_HSPI_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_INT_FLAG` writer"]
|
|
|
+pub struct W (crate :: W < R8_HSPI_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_INT_FLAG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_INT_FLAG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_HSPI_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_IF_T_DONE` reader - interrupt flag for parallel if transmit done"]
|
|
|
+pub struct RB_HSPI_IF_T_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_T_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_T_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_T_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_T_DONE` writer - interrupt flag for parallel if transmit done"]
|
|
|
+pub struct RB_HSPI_IF_T_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_T_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_HSPI_IF_R_DONE` reader - interrupt flag for parallel if receive done"]
|
|
|
+pub struct RB_HSPI_IF_R_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_R_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_R_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_R_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_R_DONE` writer - interrupt flag for parallel if receive done"]
|
|
|
+pub struct RB_HSPI_IF_R_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_R_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_IF_FIFO_OV` reader - interrupt flag for parallel if FIFO overflow"]
|
|
|
+pub struct RB_HSPI_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_FIFO_OV` writer - interrupt flag for parallel if FIFO overflow"]
|
|
|
+pub struct RB_HSPI_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_HSPI_IF_B_DONE` reader - interrupt flag for parallel if tx burst done"]
|
|
|
+pub struct RB_HSPI_IF_B_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_IF_B_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_IF_B_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_IF_B_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_IF_B_DONE` writer - interrupt flag for parallel if tx burst done"]
|
|
|
+pub struct RB_HSPI_IF_B_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_IF_B_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for parallel if transmit done"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_if_t_done (& self) -> RB_HSPI_IF_T_DONE_R { RB_HSPI_IF_T_DONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for parallel if receive done"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_if_r_done (& self) -> RB_HSPI_IF_R_DONE_R { RB_HSPI_IF_R_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for parallel if FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_if_fifo_ov (& self) -> RB_HSPI_IF_FIFO_OV_R { RB_HSPI_IF_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for parallel if tx burst done"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_if_b_done (& self) -> RB_HSPI_IF_B_DONE_R { RB_HSPI_IF_B_DONE_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for parallel if transmit done"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_if_t_done (& mut self) -> RB_HSPI_IF_T_DONE_W { RB_HSPI_IF_T_DONE_W { w : self } } # [doc = "Bit 1 - interrupt flag for parallel if receive done"]
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+# [inline (always)]
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|
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+pub fn rb_hspi_if_r_done (& mut self) -> RB_HSPI_IF_R_DONE_W { RB_HSPI_IF_R_DONE_W { w : self } } # [doc = "Bit 2 - interrupt flag for parallel if FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_hspi_if_fifo_ov (& mut self) -> RB_HSPI_IF_FIFO_OV_W { RB_HSPI_IF_FIFO_OV_W { w : self } } # [doc = "Bit 3 - interrupt flag for parallel if tx burst done"]
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|
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+# [inline (always)]
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+pub fn rb_hspi_if_b_done (& mut self) -> RB_HSPI_IF_B_DONE_W { RB_HSPI_IF_B_DONE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel if interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_int_flag](index.html) module"]
|
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+pub struct R8_HSPI_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_HSPI_INT_FLAG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_int_flag::R](R) reader structure"]
|
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+impl crate :: Readable for R8_HSPI_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_int_flag::W](W) writer structure"]
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+impl crate :: Writable for R8_HSPI_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_INT_FLAG to value 0"]
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+impl crate :: Resettable for R8_HSPI_INT_FLAG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_RTX_STATUS register accessor: an alias for `Reg<R8_HSPI_RTX_STATUS_SPEC>`"]
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+pub type R8_HSPI_RTX_STATUS = crate :: Reg < r8_hspi_rtx_status :: R8_HSPI_RTX_STATUS_SPEC > ; # [doc = "parallel rtx status"]
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+pub mod r8_hspi_rtx_status { # [doc = "Register `R8_HSPI_RTX_STATUS` reader"]
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+pub struct R (crate :: R < R8_HSPI_RTX_STATUS_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_RTX_STATUS_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_RTX_STATUS_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_HSPI_RTX_STATUS_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_RTX_STATUS` writer"]
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+pub struct W (crate :: W < R8_HSPI_RTX_STATUS_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_RTX_STATUS_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_RTX_STATUS_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_HSPI_RTX_STATUS_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_CRC_ERR` reader - CRC error occur"]
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+pub struct RB_HSPI_CRC_ERR_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_CRC_ERR_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_CRC_ERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_CRC_ERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_CRC_ERR` writer - CRC error occur"]
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+pub struct RB_HSPI_CRC_ERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_CRC_ERR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_HSPI_NUM_MIS` reader - rx and tx sequence number mismatch"]
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+pub struct RB_HSPI_NUM_MIS_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_NUM_MIS_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_NUM_MIS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_NUM_MIS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_NUM_MIS` writer - rx and tx sequence number mismatch"]
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+pub struct RB_HSPI_NUM_MIS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_NUM_MIS_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 1 - CRC error occur"]
|
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+# [inline (always)]
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+pub fn rb_hspi_crc_err (& self) -> RB_HSPI_CRC_ERR_R { RB_HSPI_CRC_ERR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - rx and tx sequence number mismatch"]
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+# [inline (always)]
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+pub fn rb_hspi_num_mis (& self) -> RB_HSPI_NUM_MIS_R { RB_HSPI_NUM_MIS_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - CRC error occur"]
|
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+# [inline (always)]
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+pub fn rb_hspi_crc_err (& mut self) -> RB_HSPI_CRC_ERR_W { RB_HSPI_CRC_ERR_W { w : self } } # [doc = "Bit 2 - rx and tx sequence number mismatch"]
|
|
|
+# [inline (always)]
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+pub fn rb_hspi_num_mis (& mut self) -> RB_HSPI_NUM_MIS_W { RB_HSPI_NUM_MIS_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel rtx status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_rtx_status](index.html) module"]
|
|
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+pub struct R8_HSPI_RTX_STATUS_SPEC ; impl crate :: RegisterSpec for R8_HSPI_RTX_STATUS_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_rtx_status::R](R) reader structure"]
|
|
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+impl crate :: Readable for R8_HSPI_RTX_STATUS_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_rtx_status::W](W) writer structure"]
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+impl crate :: Writable for R8_HSPI_RTX_STATUS_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_RTX_STATUS to value 0"]
|
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|
+impl crate :: Resettable for R8_HSPI_RTX_STATUS_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_HSPI_TX_SC register accessor: an alias for `Reg<R8_HSPI_TX_SC_SPEC>`"]
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+pub type R8_HSPI_TX_SC = crate :: Reg < r8_hspi_tx_sc :: R8_HSPI_TX_SC_SPEC > ; # [doc = "parallel TX sequence ctrl"]
|
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+pub mod r8_hspi_tx_sc { # [doc = "Register `R8_HSPI_TX_SC` reader"]
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+pub struct R (crate :: R < R8_HSPI_TX_SC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_HSPI_TX_SC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_HSPI_TX_SC_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_HSPI_TX_SC_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_HSPI_TX_SC` writer"]
|
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+pub struct W (crate :: W < R8_HSPI_TX_SC_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_HSPI_TX_SC_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_HSPI_TX_SC_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_HSPI_TX_SC_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_TX_NUM` reader - parallel if tx sequence num"]
|
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|
+pub struct RB_HSPI_TX_NUM_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_TX_NUM_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_TX_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_NUM_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_NUM` writer - parallel if tx sequence num"]
|
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|
+pub struct RB_HSPI_TX_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } # [doc = "Field `RB_HSPI_TX_TOG` reader - parallel if tx addr toggle flag"]
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+pub struct RB_HSPI_TX_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_TX_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_TX_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_TX_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_TX_TOG` writer - parallel if tx addr toggle flag"]
|
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|
+pub struct RB_HSPI_TX_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_TX_TOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bits 0:3 - parallel if tx sequence num"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_tx_num (& self) -> RB_HSPI_TX_NUM_R { RB_HSPI_TX_NUM_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bit 4 - parallel if tx addr toggle flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_tx_tog (& self) -> RB_HSPI_TX_TOG_R { RB_HSPI_TX_TOG_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bits 0:3 - parallel if tx sequence num"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_tx_num (& mut self) -> RB_HSPI_TX_NUM_W { RB_HSPI_TX_NUM_W { w : self } } # [doc = "Bit 4 - parallel if tx addr toggle flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_tx_tog (& mut self) -> RB_HSPI_TX_TOG_W { RB_HSPI_TX_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel TX sequence ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_hspi_tx_sc](index.html) module"]
|
|
|
+pub struct R8_HSPI_TX_SC_SPEC ; impl crate :: RegisterSpec for R8_HSPI_TX_SC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_hspi_tx_sc::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_HSPI_TX_SC_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_hspi_tx_sc::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_HSPI_TX_SC_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_HSPI_TX_SC to value 0"]
|
|
|
+impl crate :: Resettable for R8_HSPI_TX_SC_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "HSPI_RX_SC register accessor: an alias for `Reg<HSPI_RX_SC_SPEC>`"]
|
|
|
+pub type HSPI_RX_SC = crate :: Reg < hspi_rx_sc :: HSPI_RX_SC_SPEC > ; # [doc = "parallel RX sequence ctrl"]
|
|
|
+pub mod hspi_rx_sc { # [doc = "Register `HSPI_RX_SC` reader"]
|
|
|
+pub struct R (crate :: R < HSPI_RX_SC_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < HSPI_RX_SC_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < HSPI_RX_SC_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < HSPI_RX_SC_SPEC >) -> Self { R (reader) } } # [doc = "Register `HSPI_RX_SC` writer"]
|
|
|
+pub struct W (crate :: W < HSPI_RX_SC_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < HSPI_RX_SC_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < HSPI_RX_SC_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < HSPI_RX_SC_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_HSPI_RX_NUM` reader - parallel if rx sequence num"]
|
|
|
+pub struct RB_HSPI_RX_NUM_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HSPI_RX_NUM_R { pub (crate) fn new (bits : u8) -> Self { RB_HSPI_RX_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_NUM_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_NUM` writer - parallel if rx sequence num"]
|
|
|
+pub struct RB_HSPI_RX_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } # [doc = "Field `RB_HSPI_RX_TOG` reader - parallel if rx addr toggle flag"]
|
|
|
+pub struct RB_HSPI_RX_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_HSPI_RX_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_HSPI_RX_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HSPI_RX_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_HSPI_RX_TOG` writer - parallel if rx addr toggle flag"]
|
|
|
+pub struct RB_HSPI_RX_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_HSPI_RX_TOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bits 0:3 - parallel if rx sequence num"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_num (& self) -> RB_HSPI_RX_NUM_R { RB_HSPI_RX_NUM_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bit 4 - parallel if rx addr toggle flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_tog (& self) -> RB_HSPI_RX_TOG_R { RB_HSPI_RX_TOG_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bits 0:3 - parallel if rx sequence num"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_num (& mut self) -> RB_HSPI_RX_NUM_W { RB_HSPI_RX_NUM_W { w : self } } # [doc = "Bit 4 - parallel if rx addr toggle flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_hspi_rx_tog (& mut self) -> RB_HSPI_RX_TOG_W { RB_HSPI_RX_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "parallel RX sequence ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hspi_rx_sc](index.html) module"]
|
|
|
+pub struct HSPI_RX_SC_SPEC ; impl crate :: RegisterSpec for HSPI_RX_SC_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [hspi_rx_sc::R](R) reader structure"]
|
|
|
+impl crate :: Readable for HSPI_RX_SC_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [hspi_rx_sc::W](W) writer structure"]
|
|
|
+impl crate :: Writable for HSPI_RX_SC_SPEC { type Writer = W ; } # [doc = "`reset()` method sets HSPI_RX_SC to value 0"]
|
|
|
+impl crate :: Resettable for HSPI_RX_SC_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "ECDC register"]
|
|
|
+pub struct ECDC { _marker : PhantomData < * const () > } unsafe impl Send for ECDC { } impl ECDC { # [doc = r"Pointer to the register block"]
|
|
|
+pub const PTR : * const ecdc :: RegisterBlock = 0x4000_7000 as * const _ ; # [doc = r"Return the pointer to the register block"]
|
|
|
+# [inline (always)]
|
|
|
+pub const fn ptr () -> * const ecdc :: RegisterBlock { Self :: PTR } } impl Deref for ECDC { type Target = ecdc :: RegisterBlock ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for ECDC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("ECDC") . finish () } } # [doc = "ECDC register"]
|
|
|
+pub mod ecdc { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - ECED AES/SM4 register"]
|
|
|
+pub r16_ecec_ctrl : crate :: Reg < r16_ecec_ctrl :: R16_ECEC_CTRL_SPEC > , # [doc = "0x02 - Interupt enable register"]
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+pub r8_ecdc_int_en : crate :: Reg < r8_ecdc_int_en :: R8_ECDC_INT_EN_SPEC > , _reserved2 : [u8 ; 0x03]
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+, # [doc = "0x06 - Interupt flag register"]
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+pub r8_ecdc_int_fg : crate :: Reg < r8_ecdc_int_fg :: R8_ECDC_INT_FG_SPEC > , _reserved3 : [u8 ; 0x01]
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+, # [doc = "0x08 - User key 224-255 register"]
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+pub r32_ecdc_key_255t224 : crate :: Reg < r32_ecdc_key_255t224 :: R32_ECDC_KEY_255T224_SPEC > , # [doc = "0x0c - User key 192-223 register"]
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+pub r32_ecdc_key_223t192 : crate :: Reg < r32_ecdc_key_223t192 :: R32_ECDC_KEY_223T192_SPEC > , # [doc = "0x10 - User key 160-191 register"]
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+pub r32_ecdc_key_191t160 : crate :: Reg < r32_ecdc_key_191t160 :: R32_ECDC_KEY_191T160_SPEC > , # [doc = "0x14 - User key 128-159 register"]
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+pub r32_ecdc_key_159t128 : crate :: Reg < r32_ecdc_key_159t128 :: R32_ECDC_KEY_159T128_SPEC > , # [doc = "0x18 - User key 96-127 register"]
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+pub r32_ecdc_key_127t96 : crate :: Reg < r32_ecdc_key_127t96 :: R32_ECDC_KEY_127T96_SPEC > , # [doc = "0x1c - User key 64-95 register"]
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+pub r32_ecdc_key_95t64 : crate :: Reg < r32_ecdc_key_95t64 :: R32_ECDC_KEY_95T64_SPEC > , # [doc = "0x20 - User key 32-63 register"]
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+pub r32_ecdc_key_63t32 : crate :: Reg < r32_ecdc_key_63t32 :: R32_ECDC_KEY_63T32_SPEC > , # [doc = "0x24 - User key 0-31 register"]
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+pub r32_ecdc_key_31t0 : crate :: Reg < r32_ecdc_key_31t0 :: R32_ECDC_KEY_31T0_SPEC > , # [doc = "0x28 - CTR mode count 96-127 register"]
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+pub r32_ecdc_iv_127t96 : crate :: Reg < r32_ecdc_iv_127t96 :: R32_ECDC_IV_127T96_SPEC > , # [doc = "0x2c - CTR mode count 64-95 register"]
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+pub r32_ecdc_iv_95t64 : crate :: Reg < r32_ecdc_iv_95t64 :: R32_ECDC_IV_95T64_SPEC > , # [doc = "0x30 - CTR mode count 32-63 register"]
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+pub r32_ecdc_iv_63t32 : crate :: Reg < r32_ecdc_iv_63t32 :: R32_ECDC_IV_63T32_SPEC > , # [doc = "0x34 - CTR mode count 0-31 register"]
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+pub r32_ecdc_iv_31t0 : crate :: Reg < r32_ecdc_iv_31t0 :: R32_ECDC_IV_31T0_SPEC > , _reserved15 : [u8 ; 0x08]
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+, # [doc = "0x40 - Single encryption and decryption of original data 96-127 register"]
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+pub r32_ecdc_sgsd_127t96 : crate :: Reg < r32_ecdc_sgsd_127t96 :: R32_ECDC_SGSD_127T96_SPEC > , # [doc = "0x44 - Single encryption and decryption of original data 64-95 register"]
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+pub r32_ecdc_sgsd_95t64 : crate :: Reg < r32_ecdc_sgsd_95t64 :: R32_ECDC_SGSD_95T64_SPEC > , # [doc = "0x48 - Single encryption and decryption of original data 32-63 register"]
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+pub r32_ecdc_sgsd_63t32 : crate :: Reg < r32_ecdc_sgsd_63t32 :: R32_ECDC_SGSD_63T32_SPEC > , # [doc = "0x4c - Single encryption and decryption of original data 0-31 register"]
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+pub r32_ecdc_sgsd_31t0 : crate :: Reg < r32_ecdc_sgsd_31t0 :: R32_ECDC_SGSD_31T0_SPEC > , # [doc = "0x50 - Single encryption and decryption result 96-127 register"]
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+pub r32_ecdc_sgrt_127t96 : crate :: Reg < r32_ecdc_sgrt_127t96 :: R32_ECDC_SGRT_127T96_SPEC > , # [doc = "0x54 - Single encryption and decryption result 64-95 register"]
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+pub r32_ecdc_sgrt_95t64 : crate :: Reg < r32_ecdc_sgrt_95t64 :: R32_ECDC_SGRT_95T64_SPEC > , # [doc = "0x58 - Single encryption and decryption result 0-31 register"]
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+pub r32_ecdc_sgrt_63t32 : crate :: Reg < r32_ecdc_sgrt_63t32 :: R32_ECDC_SGRT_63T32_SPEC > , # [doc = "0x5c - Single encryption and decryption result 0-31 register"]
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+pub rb_ecdc_sgrt_31t0 : crate :: Reg < rb_ecdc_sgrt_31t0 :: RB_ECDC_SGRT_31T0_SPEC > , # [doc = "0x60 - encryption and decryption sram start address register"]
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+pub r32_ecdc_sram_addr : crate :: Reg < r32_ecdc_sram_addr :: R32_ECDC_SRAM_ADDR_SPEC > , # [doc = "0x64 - encryption and decryption sram size register"]
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+pub r32_ecdc_sram_len : crate :: Reg < r32_ecdc_sram_len :: R32_ECDC_SRAM_LEN_SPEC > , } # [doc = "R16_ECEC_CTRL register accessor: an alias for `Reg<R16_ECEC_CTRL_SPEC>`"]
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+pub type R16_ECEC_CTRL = crate :: Reg < r16_ecec_ctrl :: R16_ECEC_CTRL_SPEC > ; # [doc = "ECED AES/SM4 register"]
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+pub mod r16_ecec_ctrl { # [doc = "Register `R16_ECEC_CTRL` reader"]
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+pub struct R (crate :: R < R16_ECEC_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_ECEC_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_ECEC_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_ECEC_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_ECEC_CTRL` writer"]
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+pub struct W (crate :: W < R16_ECEC_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_ECEC_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_ECEC_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_ECEC_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEYEX_EN` reader - enable key expansion"]
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+pub struct RB_ECDC_KEYEX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_KEYEX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_KEYEX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEYEX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEYEX_EN` writer - enable key expansion"]
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+pub struct RB_ECDC_KEYEX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEYEX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_RDPERI_EN` reader - when write data to dma"]
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+pub struct RB_ECDC_RDPERI_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_RDPERI_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_RDPERI_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_RDPERI_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_RDPERI_EN` writer - when write data to dma"]
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+pub struct RB_ECDC_RDPERI_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_RDPERI_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_WRPERI_EN` reader - when read data from dma"]
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+pub struct RB_ECDC_WRPERI_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_WRPERI_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_WRPERI_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_WRPERI_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_WRPERI_EN` writer - when read data from dma"]
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+pub struct RB_ECDC_WRPERI_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_WRPERI_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_ECDC_MODE_SEL` reader - ECDC mode select"]
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+pub struct RB_ECDC_MODE_SEL_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_MODE_SEL_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_MODE_SEL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_MODE_SEL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_MODE_SEL` writer - ECDC mode select"]
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+pub struct RB_ECDC_MODE_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_MODE_SEL_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_ECDC_CLKDIV_MASK` reader - Clock divide factor"]
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+pub struct RB_ECDC_CLKDIV_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_ECDC_CLKDIV_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_ECDC_CLKDIV_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_CLKDIV_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_CLKDIV_MASK` writer - Clock divide factor"]
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+pub struct RB_ECDC_CLKDIV_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_CLKDIV_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x07 << 4)) | ((value as u16 & 0x07) << 4) ; self . w } } # [doc = "Field `RB_ECDC_WRSRAM_EN` reader - module dma enable"]
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+pub struct RB_ECDC_WRSRAM_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_WRSRAM_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_WRSRAM_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_WRSRAM_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_WRSRAM_EN` writer - module dma enable"]
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+pub struct RB_ECDC_WRSRAM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_WRSRAM_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_ECDC_ALGRM_MOD` reader - Encryption and decryption algorithm mode selection"]
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+pub struct RB_ECDC_ALGRM_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_ALGRM_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_ALGRM_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_ALGRM_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_ALGRM_MOD` writer - Encryption and decryption algorithm mode selection"]
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+pub struct RB_ECDC_ALGRM_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_ALGRM_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_ECDC_CIPHER_MOD` reader - Block cipher mode selection"]
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+pub struct RB_ECDC_CIPHER_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_CIPHER_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_CIPHER_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_CIPHER_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_CIPHER_MOD` writer - Block cipher mode selection"]
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+pub struct RB_ECDC_CIPHER_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_CIPHER_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } # [doc = "Field `RB_ECDC_KLEN_MASK` reader - Key length setting"]
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+pub struct RB_ECDC_KLEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_ECDC_KLEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_ECDC_KLEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KLEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KLEN_MASK` writer - Key length setting"]
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+pub struct RB_ECDC_KLEN_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KLEN_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 10)) | ((value as u16 & 0x03) << 10) ; self . w } } # [doc = "Field `RB_ECDC_DAT_MOD` reader - source data and result data is bit endian"]
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+pub struct RB_ECDC_DAT_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_DAT_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_DAT_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_DAT_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_DAT_MOD` writer - source data and result data is bit endian"]
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+pub struct RB_ECDC_DAT_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_DAT_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 13)) | ((value as u16 & 0x01) << 13) ; self . w } } impl R { # [doc = "Bit 0 - enable key expansion"]
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+# [inline (always)]
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+pub fn rb_ecdc_keyex_en (& self) -> RB_ECDC_KEYEX_EN_R { RB_ECDC_KEYEX_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - when write data to dma"]
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+# [inline (always)]
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+pub fn rb_ecdc_rdperi_en (& self) -> RB_ECDC_RDPERI_EN_R { RB_ECDC_RDPERI_EN_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - when read data from dma"]
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+# [inline (always)]
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+pub fn rb_ecdc_wrperi_en (& self) -> RB_ECDC_WRPERI_EN_R { RB_ECDC_WRPERI_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - ECDC mode select"]
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+# [inline (always)]
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+pub fn rb_ecdc_mode_sel (& self) -> RB_ECDC_MODE_SEL_R { RB_ECDC_MODE_SEL_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:6 - Clock divide factor"]
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+# [inline (always)]
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+pub fn rb_ecdc_clkdiv_mask (& self) -> RB_ECDC_CLKDIV_MASK_R { RB_ECDC_CLKDIV_MASK_R :: new (((self . bits >> 4) & 0x07) as u8) } # [doc = "Bit 7 - module dma enable"]
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+# [inline (always)]
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+pub fn rb_ecdc_wrsram_en (& self) -> RB_ECDC_WRSRAM_EN_R { RB_ECDC_WRSRAM_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - Encryption and decryption algorithm mode selection"]
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+# [inline (always)]
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|
+pub fn rb_ecdc_algrm_mod (& self) -> RB_ECDC_ALGRM_MOD_R { RB_ECDC_ALGRM_MOD_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - Block cipher mode selection"]
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+# [inline (always)]
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|
+pub fn rb_ecdc_cipher_mod (& self) -> RB_ECDC_CIPHER_MOD_R { RB_ECDC_CIPHER_MOD_R :: new (((self . bits >> 9) & 0x01) != 0) } # [doc = "Bits 10:11 - Key length setting"]
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+# [inline (always)]
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+pub fn rb_ecdc_klen_mask (& self) -> RB_ECDC_KLEN_MASK_R { RB_ECDC_KLEN_MASK_R :: new (((self . bits >> 10) & 0x03) as u8) } # [doc = "Bit 13 - source data and result data is bit endian"]
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|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_dat_mod (& self) -> RB_ECDC_DAT_MOD_R { RB_ECDC_DAT_MOD_R :: new (((self . bits >> 13) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable key expansion"]
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|
|
+# [inline (always)]
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+pub fn rb_ecdc_keyex_en (& mut self) -> RB_ECDC_KEYEX_EN_W { RB_ECDC_KEYEX_EN_W { w : self } } # [doc = "Bit 1 - when write data to dma"]
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|
|
+# [inline (always)]
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+pub fn rb_ecdc_rdperi_en (& mut self) -> RB_ECDC_RDPERI_EN_W { RB_ECDC_RDPERI_EN_W { w : self } } # [doc = "Bit 2 - when read data from dma"]
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+# [inline (always)]
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+pub fn rb_ecdc_wrperi_en (& mut self) -> RB_ECDC_WRPERI_EN_W { RB_ECDC_WRPERI_EN_W { w : self } } # [doc = "Bit 3 - ECDC mode select"]
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|
|
+# [inline (always)]
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+pub fn rb_ecdc_mode_sel (& mut self) -> RB_ECDC_MODE_SEL_W { RB_ECDC_MODE_SEL_W { w : self } } # [doc = "Bits 4:6 - Clock divide factor"]
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+# [inline (always)]
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+pub fn rb_ecdc_clkdiv_mask (& mut self) -> RB_ECDC_CLKDIV_MASK_W { RB_ECDC_CLKDIV_MASK_W { w : self } } # [doc = "Bit 7 - module dma enable"]
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|
|
+# [inline (always)]
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+pub fn rb_ecdc_wrsram_en (& mut self) -> RB_ECDC_WRSRAM_EN_W { RB_ECDC_WRSRAM_EN_W { w : self } } # [doc = "Bit 8 - Encryption and decryption algorithm mode selection"]
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+# [inline (always)]
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+pub fn rb_ecdc_algrm_mod (& mut self) -> RB_ECDC_ALGRM_MOD_W { RB_ECDC_ALGRM_MOD_W { w : self } } # [doc = "Bit 9 - Block cipher mode selection"]
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+# [inline (always)]
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+pub fn rb_ecdc_cipher_mod (& mut self) -> RB_ECDC_CIPHER_MOD_W { RB_ECDC_CIPHER_MOD_W { w : self } } # [doc = "Bits 10:11 - Key length setting"]
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+# [inline (always)]
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+pub fn rb_ecdc_klen_mask (& mut self) -> RB_ECDC_KLEN_MASK_W { RB_ECDC_KLEN_MASK_W { w : self } } # [doc = "Bit 13 - source data and result data is bit endian"]
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+# [inline (always)]
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+pub fn rb_ecdc_dat_mod (& mut self) -> RB_ECDC_DAT_MOD_W { RB_ECDC_DAT_MOD_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "ECED AES/SM4 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_ecec_ctrl](index.html) module"]
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+pub struct R16_ECEC_CTRL_SPEC ; impl crate :: RegisterSpec for R16_ECEC_CTRL_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_ecec_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R16_ECEC_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_ecec_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R16_ECEC_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_ECEC_CTRL to value 0x20"]
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+impl crate :: Resettable for R16_ECEC_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x20 } } } # [doc = "R8_ECDC_INT_EN register accessor: an alias for `Reg<R8_ECDC_INT_EN_SPEC>`"]
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+pub type R8_ECDC_INT_EN = crate :: Reg < r8_ecdc_int_en :: R8_ECDC_INT_EN_SPEC > ; # [doc = "Interupt enable register"]
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+pub mod r8_ecdc_int_en { # [doc = "Register `R8_ECDC_INT_EN` reader"]
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+pub struct R (crate :: R < R8_ECDC_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_ECDC_INT_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_ECDC_INT_EN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_ECDC_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_ECDC_INT_EN` writer"]
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+pub struct W (crate :: W < R8_ECDC_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_ECDC_INT_EN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_ECDC_INT_EN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_ECDC_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IE_EKDONE` reader - Key extension completion interrupt enable"]
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|
|
+pub struct RB_ECDC_IE_EKDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_EKDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_EKDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_EKDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_EKDONE` writer - Key extension completion interrupt enable"]
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+pub struct RB_ECDC_IE_EKDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_EKDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_IE_SINGLE` reader - Single encryption and decryption completion interrupt enable"]
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|
|
+pub struct RB_ECDC_IE_SINGLE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_SINGLE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_SINGLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_SINGLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_SINGLE` writer - Single encryption and decryption completion interrupt enable"]
|
|
|
+pub struct RB_ECDC_IE_SINGLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_SINGLE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_IE_WRSRAM` reader - Memory to memory encryption and decryption completion interrupt enable"]
|
|
|
+pub struct RB_ECDC_IE_WRSRAM_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IE_WRSRAM_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IE_WRSRAM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IE_WRSRAM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IE_WRSRAM` writer - Memory to memory encryption and decryption completion interrupt enable"]
|
|
|
+pub struct RB_ECDC_IE_WRSRAM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IE_WRSRAM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - Key extension completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_ekdone (& self) -> RB_ECDC_IE_EKDONE_R { RB_ECDC_IE_EKDONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Single encryption and decryption completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_single (& self) -> RB_ECDC_IE_SINGLE_R { RB_ECDC_IE_SINGLE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_wrsram (& self) -> RB_ECDC_IE_WRSRAM_R { RB_ECDC_IE_WRSRAM_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Key extension completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_ekdone (& mut self) -> RB_ECDC_IE_EKDONE_W { RB_ECDC_IE_EKDONE_W { w : self } } # [doc = "Bit 1 - Single encryption and decryption completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_single (& mut self) -> RB_ECDC_IE_SINGLE_W { RB_ECDC_IE_SINGLE_W { w : self } } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_ie_wrsram (& mut self) -> RB_ECDC_IE_WRSRAM_W { RB_ECDC_IE_WRSRAM_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_ecdc_int_en](index.html) module"]
|
|
|
+pub struct R8_ECDC_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_ECDC_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_ecdc_int_en::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_ECDC_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_ecdc_int_en::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_ECDC_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_ECDC_INT_EN to value 0"]
|
|
|
+impl crate :: Resettable for R8_ECDC_INT_EN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_ECDC_INT_FG register accessor: an alias for `Reg<R8_ECDC_INT_FG_SPEC>`"]
|
|
|
+pub type R8_ECDC_INT_FG = crate :: Reg < r8_ecdc_int_fg :: R8_ECDC_INT_FG_SPEC > ; # [doc = "Interupt flag register"]
|
|
|
+pub mod r8_ecdc_int_fg { # [doc = "Register `R8_ECDC_INT_FG` reader"]
|
|
|
+pub struct R (crate :: R < R8_ECDC_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_ECDC_INT_FG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_ECDC_INT_FG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_ECDC_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_ECDC_INT_FG` writer"]
|
|
|
+pub struct W (crate :: W < R8_ECDC_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_ECDC_INT_FG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_ECDC_INT_FG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_ECDC_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IF_EKDONE` reader - Key extension completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_EKDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_EKDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_EKDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_EKDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_EKDONE` writer - Key extension completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_EKDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_EKDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_ECDC_IF_SINGLE` reader - Single encryption and decryption completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_SINGLE_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_SINGLE_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_SINGLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_SINGLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_SINGLE` writer - Single encryption and decryption completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_SINGLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_SINGLE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_ECDC_IF_WRSRAM` reader - Memory to memory encryption and decryption completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_WRSRAM_R (crate :: FieldReader < bool , bool >) ; impl RB_ECDC_IF_WRSRAM_R { pub (crate) fn new (bits : bool) -> Self { RB_ECDC_IF_WRSRAM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IF_WRSRAM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IF_WRSRAM` writer - Memory to memory encryption and decryption completion interrupt flag"]
|
|
|
+pub struct RB_ECDC_IF_WRSRAM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IF_WRSRAM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } impl R { # [doc = "Bit 0 - Key extension completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_ekdone (& self) -> RB_ECDC_IF_EKDONE_R { RB_ECDC_IF_EKDONE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Single encryption and decryption completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_single (& self) -> RB_ECDC_IF_SINGLE_R { RB_ECDC_IF_SINGLE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_wrsram (& self) -> RB_ECDC_IF_WRSRAM_R { RB_ECDC_IF_WRSRAM_R :: new (((self . bits >> 2) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Key extension completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_ekdone (& mut self) -> RB_ECDC_IF_EKDONE_W { RB_ECDC_IF_EKDONE_W { w : self } } # [doc = "Bit 1 - Single encryption and decryption completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_single (& mut self) -> RB_ECDC_IF_SINGLE_W { RB_ECDC_IF_SINGLE_W { w : self } } # [doc = "Bit 2 - Memory to memory encryption and decryption completion interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_if_wrsram (& mut self) -> RB_ECDC_IF_WRSRAM_W { RB_ECDC_IF_WRSRAM_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_ecdc_int_fg](index.html) module"]
|
|
|
+pub struct R8_ECDC_INT_FG_SPEC ; impl crate :: RegisterSpec for R8_ECDC_INT_FG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_ecdc_int_fg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_ECDC_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_ecdc_int_fg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_ECDC_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_ECDC_INT_FG to value 0"]
|
|
|
+impl crate :: Resettable for R8_ECDC_INT_FG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_255T224 register accessor: an alias for `Reg<R32_ECDC_KEY_255T224_SPEC>`"]
|
|
|
+pub type R32_ECDC_KEY_255T224 = crate :: Reg < r32_ecdc_key_255t224 :: R32_ECDC_KEY_255T224_SPEC > ; # [doc = "User key 224-255 register"]
|
|
|
+pub mod r32_ecdc_key_255t224 { # [doc = "Register `R32_ECDC_KEY_255T224` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_KEY_255T224_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_255T224_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_255T224_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_KEY_255T224_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_255T224` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_KEY_255T224_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_255T224_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_255T224_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_255T224_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_255T224` reader - User key 224-255 register"]
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+pub struct RB_ECDC_KEY_255T224_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_255T224_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_255T224_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_255T224_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_255T224` writer - User key 224-255 register"]
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+pub struct RB_ECDC_KEY_255T224_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_255T224_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 224-255 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_255t224 (& self) -> RB_ECDC_KEY_255T224_R { RB_ECDC_KEY_255T224_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 224-255 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_255t224 (& mut self) -> RB_ECDC_KEY_255T224_W { RB_ECDC_KEY_255T224_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 224-255 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_255t224](index.html) module"]
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+pub struct R32_ECDC_KEY_255T224_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_255T224_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_255t224::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_KEY_255T224_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_255t224::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_KEY_255T224_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_255T224 to value 0"]
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+impl crate :: Resettable for R32_ECDC_KEY_255T224_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_223T192 register accessor: an alias for `Reg<R32_ECDC_KEY_223T192_SPEC>`"]
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+pub type R32_ECDC_KEY_223T192 = crate :: Reg < r32_ecdc_key_223t192 :: R32_ECDC_KEY_223T192_SPEC > ; # [doc = "User key 192-223 register"]
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+pub mod r32_ecdc_key_223t192 { # [doc = "Register `R32_ECDC_KEY_223T192` reader"]
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+pub struct R (crate :: R < R32_ECDC_KEY_223T192_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_223T192_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_223T192_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_KEY_223T192_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_223T192` writer"]
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+pub struct W (crate :: W < R32_ECDC_KEY_223T192_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_223T192_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_223T192_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_223T192_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_223T192` reader - User key 192-223 register"]
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+pub struct RB_ECDC_KEY_223T192_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_223T192_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_223T192_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_223T192_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_223T192` writer - User key 192-223 register"]
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+pub struct RB_ECDC_KEY_223T192_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_223T192_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 192-223 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_223t192 (& self) -> RB_ECDC_KEY_223T192_R { RB_ECDC_KEY_223T192_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 192-223 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_223t192 (& mut self) -> RB_ECDC_KEY_223T192_W { RB_ECDC_KEY_223T192_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 192-223 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_223t192](index.html) module"]
|
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+pub struct R32_ECDC_KEY_223T192_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_223T192_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_223t192::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ECDC_KEY_223T192_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_223t192::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_KEY_223T192_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_223T192 to value 0"]
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+impl crate :: Resettable for R32_ECDC_KEY_223T192_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_191T160 register accessor: an alias for `Reg<R32_ECDC_KEY_191T160_SPEC>`"]
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+pub type R32_ECDC_KEY_191T160 = crate :: Reg < r32_ecdc_key_191t160 :: R32_ECDC_KEY_191T160_SPEC > ; # [doc = "User key 160-191 register"]
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+pub mod r32_ecdc_key_191t160 { # [doc = "Register `R32_ECDC_KEY_191T160` reader"]
|
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+pub struct R (crate :: R < R32_ECDC_KEY_191T160_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_191T160_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_191T160_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_KEY_191T160_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_191T160` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_KEY_191T160_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_191T160_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_191T160_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_191T160_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_191T160` reader - User key 160-191 register"]
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+pub struct RB_ECDC_KEY_191T160_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_191T160_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_191T160_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_191T160_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_191T160` writer - User key 160-191 register"]
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+pub struct RB_ECDC_KEY_191T160_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_191T160_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 160-191 register"]
|
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|
+# [inline (always)]
|
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+pub fn rb_ecdc_key_191t160 (& self) -> RB_ECDC_KEY_191T160_R { RB_ECDC_KEY_191T160_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 160-191 register"]
|
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+# [inline (always)]
|
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+pub fn rb_ecdc_key_191t160 (& mut self) -> RB_ECDC_KEY_191T160_W { RB_ECDC_KEY_191T160_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 160-191 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_191t160](index.html) module"]
|
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|
+pub struct R32_ECDC_KEY_191T160_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_191T160_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_191t160::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_KEY_191T160_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_191t160::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_ECDC_KEY_191T160_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_191T160 to value 0"]
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|
+impl crate :: Resettable for R32_ECDC_KEY_191T160_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_159T128 register accessor: an alias for `Reg<R32_ECDC_KEY_159T128_SPEC>`"]
|
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|
+pub type R32_ECDC_KEY_159T128 = crate :: Reg < r32_ecdc_key_159t128 :: R32_ECDC_KEY_159T128_SPEC > ; # [doc = "User key 128-159 register"]
|
|
|
+pub mod r32_ecdc_key_159t128 { # [doc = "Register `R32_ECDC_KEY_159T128` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_KEY_159T128_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_159T128_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_159T128_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_KEY_159T128_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_159T128` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_KEY_159T128_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_159T128_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_159T128_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_KEY_159T128_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_159T128` reader - User key 128-159 register"]
|
|
|
+pub struct RB_ECDC_KEY_159T128_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_159T128_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_159T128_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_159T128_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_159T128` writer - User key 128-159 register"]
|
|
|
+pub struct RB_ECDC_KEY_159T128_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_159T128_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 128-159 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_key_159t128 (& self) -> RB_ECDC_KEY_159T128_R { RB_ECDC_KEY_159T128_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 128-159 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_key_159t128 (& mut self) -> RB_ECDC_KEY_159T128_W { RB_ECDC_KEY_159T128_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 128-159 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_159t128](index.html) module"]
|
|
|
+pub struct R32_ECDC_KEY_159T128_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_159T128_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_159t128::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_KEY_159T128_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_159t128::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_KEY_159T128_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_159T128 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_KEY_159T128_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_127T96 register accessor: an alias for `Reg<R32_ECDC_KEY_127T96_SPEC>`"]
|
|
|
+pub type R32_ECDC_KEY_127T96 = crate :: Reg < r32_ecdc_key_127t96 :: R32_ECDC_KEY_127T96_SPEC > ; # [doc = "User key 96-127 register"]
|
|
|
+pub mod r32_ecdc_key_127t96 { # [doc = "Register `R32_ECDC_KEY_127T96` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_KEY_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_127T96_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_127T96_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_KEY_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_127T96` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_KEY_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_127T96_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_127T96_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_KEY_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_127T96` reader - User key 96-127 register"]
|
|
|
+pub struct RB_ECDC_KEY_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_127T96` writer - User key 96-127 register"]
|
|
|
+pub struct RB_ECDC_KEY_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 96-127 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_key_127t96 (& self) -> RB_ECDC_KEY_127T96_R { RB_ECDC_KEY_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 96-127 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_key_127t96 (& mut self) -> RB_ECDC_KEY_127T96_W { RB_ECDC_KEY_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_127t96](index.html) module"]
|
|
|
+pub struct R32_ECDC_KEY_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_127t96::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_KEY_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_127t96::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_KEY_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_127T96 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_KEY_127T96_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_95T64 register accessor: an alias for `Reg<R32_ECDC_KEY_95T64_SPEC>`"]
|
|
|
+pub type R32_ECDC_KEY_95T64 = crate :: Reg < r32_ecdc_key_95t64 :: R32_ECDC_KEY_95T64_SPEC > ; # [doc = "User key 64-95 register"]
|
|
|
+pub mod r32_ecdc_key_95t64 { # [doc = "Register `R32_ECDC_KEY_95T64` reader"]
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+pub struct R (crate :: R < R32_ECDC_KEY_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_95T64_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_95T64_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_KEY_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_95T64` writer"]
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+pub struct W (crate :: W < R32_ECDC_KEY_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_95T64_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_95T64_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_95T64` reader - User key 64-95 register"]
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+pub struct RB_ECDC_KEY_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_95T64` writer - User key 64-95 register"]
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+pub struct RB_ECDC_KEY_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 64-95 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_95t64 (& self) -> RB_ECDC_KEY_95T64_R { RB_ECDC_KEY_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 64-95 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_95t64 (& mut self) -> RB_ECDC_KEY_95T64_W { RB_ECDC_KEY_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_95t64](index.html) module"]
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+pub struct R32_ECDC_KEY_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_95t64::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_KEY_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_95t64::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_KEY_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_95T64 to value 0"]
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+impl crate :: Resettable for R32_ECDC_KEY_95T64_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_63T32 register accessor: an alias for `Reg<R32_ECDC_KEY_63T32_SPEC>`"]
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+pub type R32_ECDC_KEY_63T32 = crate :: Reg < r32_ecdc_key_63t32 :: R32_ECDC_KEY_63T32_SPEC > ; # [doc = "User key 32-63 register"]
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+pub mod r32_ecdc_key_63t32 { # [doc = "Register `R32_ECDC_KEY_63T32` reader"]
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+pub struct R (crate :: R < R32_ECDC_KEY_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_63T32_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_63T32_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_KEY_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_63T32` writer"]
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+pub struct W (crate :: W < R32_ECDC_KEY_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_63T32_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_63T32_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_63T32` reader - User key 32-63 register"]
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+pub struct RB_ECDC_KEY_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_63T32` writer - User key 32-63 register"]
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+pub struct RB_ECDC_KEY_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 32-63 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_63t32 (& self) -> RB_ECDC_KEY_63T32_R { RB_ECDC_KEY_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 32-63 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_63t32 (& mut self) -> RB_ECDC_KEY_63T32_W { RB_ECDC_KEY_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_63t32](index.html) module"]
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+pub struct R32_ECDC_KEY_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_63t32::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_KEY_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_63t32::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_KEY_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_63T32 to value 0"]
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+impl crate :: Resettable for R32_ECDC_KEY_63T32_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_KEY_31T0 register accessor: an alias for `Reg<R32_ECDC_KEY_31T0_SPEC>`"]
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+pub type R32_ECDC_KEY_31T0 = crate :: Reg < r32_ecdc_key_31t0 :: R32_ECDC_KEY_31T0_SPEC > ; # [doc = "User key 0-31 register"]
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+pub mod r32_ecdc_key_31t0 { # [doc = "Register `R32_ECDC_KEY_31T0` reader"]
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+pub struct R (crate :: R < R32_ECDC_KEY_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_KEY_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_KEY_31T0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_KEY_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_KEY_31T0` writer"]
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+pub struct W (crate :: W < R32_ECDC_KEY_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_KEY_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_KEY_31T0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_KEY_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_KEY_31T0` reader - User key 0-31 register"]
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+pub struct RB_ECDC_KEY_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_KEY_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_KEY_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_KEY_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_KEY_31T0` writer - User key 0-31 register"]
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+pub struct RB_ECDC_KEY_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_KEY_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - User key 0-31 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_31t0 (& self) -> RB_ECDC_KEY_31T0_R { RB_ECDC_KEY_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - User key 0-31 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_key_31t0 (& mut self) -> RB_ECDC_KEY_31T0_W { RB_ECDC_KEY_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "User key 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_key_31t0](index.html) module"]
|
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+pub struct R32_ECDC_KEY_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_KEY_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_key_31t0::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_KEY_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_key_31t0::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_KEY_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_KEY_31T0 to value 0"]
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+impl crate :: Resettable for R32_ECDC_KEY_31T0_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_127T96 register accessor: an alias for `Reg<R32_ECDC_IV_127T96_SPEC>`"]
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+pub type R32_ECDC_IV_127T96 = crate :: Reg < r32_ecdc_iv_127t96 :: R32_ECDC_IV_127T96_SPEC > ; # [doc = "CTR mode count 96-127 register"]
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|
|
+pub mod r32_ecdc_iv_127t96 { # [doc = "Register `R32_ECDC_IV_127T96` reader"]
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|
+pub struct R (crate :: R < R32_ECDC_IV_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_127T96_SPEC > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_127T96_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_ECDC_IV_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_127T96` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_IV_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_127T96_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_127T96_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_IV_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_127T96` reader - CTR mode count 96-127 register"]
|
|
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+pub struct RB_ECDC_IV_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_127T96` writer - CTR mode count 96-127 register"]
|
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|
+pub struct RB_ECDC_IV_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 96-127 register"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_iv_127t96 (& self) -> RB_ECDC_IV_127T96_R { RB_ECDC_IV_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 96-127 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_iv_127t96 (& mut self) -> RB_ECDC_IV_127T96_W { RB_ECDC_IV_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_127t96](index.html) module"]
|
|
|
+pub struct R32_ECDC_IV_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_127t96::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_IV_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_127t96::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_IV_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_127T96 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_IV_127T96_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_95T64 register accessor: an alias for `Reg<R32_ECDC_IV_95T64_SPEC>`"]
|
|
|
+pub type R32_ECDC_IV_95T64 = crate :: Reg < r32_ecdc_iv_95t64 :: R32_ECDC_IV_95T64_SPEC > ; # [doc = "CTR mode count 64-95 register"]
|
|
|
+pub mod r32_ecdc_iv_95t64 { # [doc = "Register `R32_ECDC_IV_95T64` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_IV_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_95T64_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_95T64_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_IV_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_95T64` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_IV_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_95T64_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_95T64_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_IV_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_95T64` reader - CTR mode count 64-95 register"]
|
|
|
+pub struct RB_ECDC_IV_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_95T64` writer - CTR mode count 64-95 register"]
|
|
|
+pub struct RB_ECDC_IV_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 64-95 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_iv_95t64 (& self) -> RB_ECDC_IV_95T64_R { RB_ECDC_IV_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 64-95 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_iv_95t64 (& mut self) -> RB_ECDC_IV_95T64_W { RB_ECDC_IV_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_95t64](index.html) module"]
|
|
|
+pub struct R32_ECDC_IV_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_95t64::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_IV_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_95t64::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ECDC_IV_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_95T64 to value 0"]
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+impl crate :: Resettable for R32_ECDC_IV_95T64_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_63T32 register accessor: an alias for `Reg<R32_ECDC_IV_63T32_SPEC>`"]
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|
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+pub type R32_ECDC_IV_63T32 = crate :: Reg < r32_ecdc_iv_63t32 :: R32_ECDC_IV_63T32_SPEC > ; # [doc = "CTR mode count 32-63 register"]
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+pub mod r32_ecdc_iv_63t32 { # [doc = "Register `R32_ECDC_IV_63T32` reader"]
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+pub struct R (crate :: R < R32_ECDC_IV_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_63T32_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_63T32_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_IV_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_63T32` writer"]
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+pub struct W (crate :: W < R32_ECDC_IV_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_63T32_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_63T32_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_IV_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_63T32` reader - CTR mode count 32-63 register"]
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+pub struct RB_ECDC_IV_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_63T32` writer - CTR mode count 32-63 register"]
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+pub struct RB_ECDC_IV_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 32-63 register"]
|
|
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+# [inline (always)]
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+pub fn rb_ecdc_iv_63t32 (& self) -> RB_ECDC_IV_63T32_R { RB_ECDC_IV_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 32-63 register"]
|
|
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+# [inline (always)]
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+pub fn rb_ecdc_iv_63t32 (& mut self) -> RB_ECDC_IV_63T32_W { RB_ECDC_IV_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_63t32](index.html) module"]
|
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+pub struct R32_ECDC_IV_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_63t32::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ECDC_IV_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_63t32::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ECDC_IV_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_63T32 to value 0"]
|
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+impl crate :: Resettable for R32_ECDC_IV_63T32_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_IV_31T0 register accessor: an alias for `Reg<R32_ECDC_IV_31T0_SPEC>`"]
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+pub type R32_ECDC_IV_31T0 = crate :: Reg < r32_ecdc_iv_31t0 :: R32_ECDC_IV_31T0_SPEC > ; # [doc = "CTR mode count 0-31 register"]
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+pub mod r32_ecdc_iv_31t0 { # [doc = "Register `R32_ECDC_IV_31T0` reader"]
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+pub struct R (crate :: R < R32_ECDC_IV_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_IV_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_IV_31T0_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_ECDC_IV_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_IV_31T0` writer"]
|
|
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+pub struct W (crate :: W < R32_ECDC_IV_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_IV_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_IV_31T0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_IV_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_IV_31T0` reader - CTR mode count 0-31 register"]
|
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+pub struct RB_ECDC_IV_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_IV_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_IV_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_IV_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_IV_31T0` writer - CTR mode count 0-31 register"]
|
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+pub struct RB_ECDC_IV_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_IV_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CTR mode count 0-31 register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn rb_ecdc_iv_31t0 (& self) -> RB_ECDC_IV_31T0_R { RB_ECDC_IV_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CTR mode count 0-31 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_iv_31t0 (& mut self) -> RB_ECDC_IV_31T0_W { RB_ECDC_IV_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "CTR mode count 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_iv_31t0](index.html) module"]
|
|
|
+pub struct R32_ECDC_IV_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_IV_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_iv_31t0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_IV_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_iv_31t0::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_IV_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_IV_31T0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_IV_31T0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_127T96 register accessor: an alias for `Reg<R32_ECDC_SGSD_127T96_SPEC>`"]
|
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|
+pub type R32_ECDC_SGSD_127T96 = crate :: Reg < r32_ecdc_sgsd_127t96 :: R32_ECDC_SGSD_127T96_SPEC > ; # [doc = "Single encryption and decryption of original data 96-127 register"]
|
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+pub mod r32_ecdc_sgsd_127t96 { # [doc = "Register `R32_ECDC_SGSD_127T96` reader"]
|
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|
+pub struct R (crate :: R < R32_ECDC_SGSD_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_127T96_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_127T96_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_SGSD_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_127T96` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_SGSD_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_127T96_SPEC > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_127T96_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_SGSD_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_127T96` reader - Single encryption and decryption of original data 96-127 register"]
|
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+pub struct RB_ECDC_SGSD_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_127T96` writer - Single encryption and decryption of original data 96-127 register"]
|
|
|
+pub struct RB_ECDC_SGSD_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 96-127 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgsd_127t96 (& self) -> RB_ECDC_SGSD_127T96_R { RB_ECDC_SGSD_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 96-127 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgsd_127t96 (& mut self) -> RB_ECDC_SGSD_127T96_W { RB_ECDC_SGSD_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_127t96](index.html) module"]
|
|
|
+pub struct R32_ECDC_SGSD_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_127t96::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SGSD_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_127t96::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SGSD_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_127T96 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SGSD_127T96_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_95T64 register accessor: an alias for `Reg<R32_ECDC_SGSD_95T64_SPEC>`"]
|
|
|
+pub type R32_ECDC_SGSD_95T64 = crate :: Reg < r32_ecdc_sgsd_95t64 :: R32_ECDC_SGSD_95T64_SPEC > ; # [doc = "Single encryption and decryption of original data 64-95 register"]
|
|
|
+pub mod r32_ecdc_sgsd_95t64 { # [doc = "Register `R32_ECDC_SGSD_95T64` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_SGSD_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_95T64_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_95T64_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_SGSD_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_95T64` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_SGSD_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_95T64_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_95T64_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_SGSD_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_95T64` reader - Single encryption and decryption of original data 64-95 register"]
|
|
|
+pub struct RB_ECDC_SGSD_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_95T64` writer - Single encryption and decryption of original data 64-95 register"]
|
|
|
+pub struct RB_ECDC_SGSD_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 64-95 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgsd_95t64 (& self) -> RB_ECDC_SGSD_95T64_R { RB_ECDC_SGSD_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 64-95 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgsd_95t64 (& mut self) -> RB_ECDC_SGSD_95T64_W { RB_ECDC_SGSD_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_95t64](index.html) module"]
|
|
|
+pub struct R32_ECDC_SGSD_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_95t64::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SGSD_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_95t64::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SGSD_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_95T64 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SGSD_95T64_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_63T32 register accessor: an alias for `Reg<R32_ECDC_SGSD_63T32_SPEC>`"]
|
|
|
+pub type R32_ECDC_SGSD_63T32 = crate :: Reg < r32_ecdc_sgsd_63t32 :: R32_ECDC_SGSD_63T32_SPEC > ; # [doc = "Single encryption and decryption of original data 32-63 register"]
|
|
|
+pub mod r32_ecdc_sgsd_63t32 { # [doc = "Register `R32_ECDC_SGSD_63T32` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_SGSD_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_63T32_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_63T32_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_SGSD_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_63T32` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_SGSD_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_63T32_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_63T32_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_SGSD_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_63T32` reader - Single encryption and decryption of original data 32-63 register"]
|
|
|
+pub struct RB_ECDC_SGSD_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_63T32` writer - Single encryption and decryption of original data 32-63 register"]
|
|
|
+pub struct RB_ECDC_SGSD_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 32-63 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgsd_63t32 (& self) -> RB_ECDC_SGSD_63T32_R { RB_ECDC_SGSD_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 32-63 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_sgsd_63t32 (& mut self) -> RB_ECDC_SGSD_63T32_W { RB_ECDC_SGSD_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 32-63 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_63t32](index.html) module"]
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+pub struct R32_ECDC_SGSD_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_63t32::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_SGSD_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_63t32::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_SGSD_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_63T32 to value 0"]
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+impl crate :: Resettable for R32_ECDC_SGSD_63T32_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGSD_31T0 register accessor: an alias for `Reg<R32_ECDC_SGSD_31T0_SPEC>`"]
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+pub type R32_ECDC_SGSD_31T0 = crate :: Reg < r32_ecdc_sgsd_31t0 :: R32_ECDC_SGSD_31T0_SPEC > ; # [doc = "Single encryption and decryption of original data 0-31 register"]
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+pub mod r32_ecdc_sgsd_31t0 { # [doc = "Register `R32_ECDC_SGSD_31T0` reader"]
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+pub struct R (crate :: R < R32_ECDC_SGSD_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGSD_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGSD_31T0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_SGSD_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGSD_31T0` writer"]
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+pub struct W (crate :: W < R32_ECDC_SGSD_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGSD_31T0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGSD_31T0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_SGSD_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGSD_31T0` reader - Single encryption and decryption of original data 0-31 register"]
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+pub struct RB_ECDC_SGSD_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGSD_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGSD_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGSD_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGSD_31T0` writer - Single encryption and decryption of original data 0-31 register"]
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+pub struct RB_ECDC_SGSD_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGSD_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption of original data 0-31 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_sgsd_31t0 (& self) -> RB_ECDC_SGSD_31T0_R { RB_ECDC_SGSD_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption of original data 0-31 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_sgsd_31t0 (& mut self) -> RB_ECDC_SGSD_31T0_W { RB_ECDC_SGSD_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption of original data 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgsd_31t0](index.html) module"]
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+pub struct R32_ECDC_SGSD_31T0_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGSD_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgsd_31t0::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_SGSD_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgsd_31t0::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_SGSD_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGSD_31T0 to value 0"]
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+impl crate :: Resettable for R32_ECDC_SGSD_31T0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_127T96 register accessor: an alias for `Reg<R32_ECDC_SGRT_127T96_SPEC>`"]
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+pub type R32_ECDC_SGRT_127T96 = crate :: Reg < r32_ecdc_sgrt_127t96 :: R32_ECDC_SGRT_127T96_SPEC > ; # [doc = "Single encryption and decryption result 96-127 register"]
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+pub mod r32_ecdc_sgrt_127t96 { # [doc = "Register `R32_ECDC_SGRT_127T96` reader"]
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+pub struct R (crate :: R < R32_ECDC_SGRT_127T96_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_127T96_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_127T96_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ECDC_SGRT_127T96_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_127T96` writer"]
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+pub struct W (crate :: W < R32_ECDC_SGRT_127T96_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_127T96_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_127T96_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ECDC_SGRT_127T96_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_127T96` reader - Single encryption and decryption result 96-127 register"]
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+pub struct RB_ECDC_SGRT_127T96_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_127T96_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_127T96_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_127T96_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_127T96` writer - Single encryption and decryption result 96-127 register"]
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+pub struct RB_ECDC_SGRT_127T96_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_127T96_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 96-127 register"]
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+# [inline (always)]
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+pub fn rb_ecdc_sgrt_127t96 (& self) -> RB_ECDC_SGRT_127T96_R { RB_ECDC_SGRT_127T96_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 96-127 register"]
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+# [inline (always)]
|
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+pub fn rb_ecdc_sgrt_127t96 (& mut self) -> RB_ECDC_SGRT_127T96_W { RB_ECDC_SGRT_127T96_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 96-127 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_127t96](index.html) module"]
|
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+pub struct R32_ECDC_SGRT_127T96_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_127T96_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_127t96::R](R) reader structure"]
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+impl crate :: Readable for R32_ECDC_SGRT_127T96_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_127t96::W](W) writer structure"]
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+impl crate :: Writable for R32_ECDC_SGRT_127T96_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_127T96 to value 0"]
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+impl crate :: Resettable for R32_ECDC_SGRT_127T96_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_95T64 register accessor: an alias for `Reg<R32_ECDC_SGRT_95T64_SPEC>`"]
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+pub type R32_ECDC_SGRT_95T64 = crate :: Reg < r32_ecdc_sgrt_95t64 :: R32_ECDC_SGRT_95T64_SPEC > ; # [doc = "Single encryption and decryption result 64-95 register"]
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+pub mod r32_ecdc_sgrt_95t64 { # [doc = "Register `R32_ECDC_SGRT_95T64` reader"]
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+pub struct R (crate :: R < R32_ECDC_SGRT_95T64_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_95T64_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_95T64_SPEC >> for R { # [inline (always)]
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|
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+fn from (reader : crate :: R < R32_ECDC_SGRT_95T64_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_95T64` writer"]
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+pub struct W (crate :: W < R32_ECDC_SGRT_95T64_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_95T64_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_95T64_SPEC >> for W { # [inline (always)]
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|
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+fn from (writer : crate :: W < R32_ECDC_SGRT_95T64_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_95T64` reader - Single encryption and decryption result 64-95 register"]
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+pub struct RB_ECDC_SGRT_95T64_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_95T64_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_95T64_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_95T64_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_95T64` writer - Single encryption and decryption result 64-95 register"]
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+pub struct RB_ECDC_SGRT_95T64_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_95T64_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 64-95 register"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgrt_95t64 (& self) -> RB_ECDC_SGRT_95T64_R { RB_ECDC_SGRT_95T64_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 64-95 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgrt_95t64 (& mut self) -> RB_ECDC_SGRT_95T64_W { RB_ECDC_SGRT_95T64_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 64-95 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_95t64](index.html) module"]
|
|
|
+pub struct R32_ECDC_SGRT_95T64_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_95T64_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_95t64::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SGRT_95T64_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_95t64::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SGRT_95T64_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_95T64 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SGRT_95T64_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SGRT_63T32 register accessor: an alias for `Reg<R32_ECDC_SGRT_63T32_SPEC>`"]
|
|
|
+pub type R32_ECDC_SGRT_63T32 = crate :: Reg < r32_ecdc_sgrt_63t32 :: R32_ECDC_SGRT_63T32_SPEC > ; # [doc = "Single encryption and decryption result 0-31 register"]
|
|
|
+pub mod r32_ecdc_sgrt_63t32 { # [doc = "Register `R32_ECDC_SGRT_63T32` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_SGRT_63T32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SGRT_63T32_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SGRT_63T32_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_SGRT_63T32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SGRT_63T32` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_SGRT_63T32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SGRT_63T32_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SGRT_63T32_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_SGRT_63T32_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_63T32` reader - Single encryption and decryption result 0-31 register"]
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|
+pub struct RB_ECDC_SGRT_63T32_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_63T32_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_63T32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_63T32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_63T32` writer - Single encryption and decryption result 0-31 register"]
|
|
|
+pub struct RB_ECDC_SGRT_63T32_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_63T32_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgrt_63t32 (& self) -> RB_ECDC_SGRT_63T32_R { RB_ECDC_SGRT_63T32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgrt_63t32 (& mut self) -> RB_ECDC_SGRT_63T32_W { RB_ECDC_SGRT_63T32_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sgrt_63t32](index.html) module"]
|
|
|
+pub struct R32_ECDC_SGRT_63T32_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SGRT_63T32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sgrt_63t32::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SGRT_63T32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sgrt_63t32::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SGRT_63T32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SGRT_63T32 to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SGRT_63T32_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "RB_ECDC_SGRT_31T0 register accessor: an alias for `Reg<RB_ECDC_SGRT_31T0_SPEC>`"]
|
|
|
+pub type RB_ECDC_SGRT_31T0 = crate :: Reg < rb_ecdc_sgrt_31t0 :: RB_ECDC_SGRT_31T0_SPEC > ; # [doc = "Single encryption and decryption result 0-31 register"]
|
|
|
+pub mod rb_ecdc_sgrt_31t0 { # [doc = "Register `RB_ECDC_SGRT_31T0` reader"]
|
|
|
+pub struct R (crate :: R < RB_ECDC_SGRT_31T0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < RB_ECDC_SGRT_31T0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < RB_ECDC_SGRT_31T0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < RB_ECDC_SGRT_31T0_SPEC >) -> Self { R (reader) } } # [doc = "Register `RB_ECDC_SGRT_31T0` writer"]
|
|
|
+pub struct W (crate :: W < RB_ECDC_SGRT_31T0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < RB_ECDC_SGRT_31T0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < RB_ECDC_SGRT_31T0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < RB_ECDC_SGRT_31T0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SGRT_31T0` reader - Single encryption and decryption result 0-31 register"]
|
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+pub struct RB_ECDC_SGRT_31T0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SGRT_31T0_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SGRT_31T0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SGRT_31T0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SGRT_31T0` writer - Single encryption and decryption result 0-31 register"]
|
|
|
+pub struct RB_ECDC_SGRT_31T0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SGRT_31T0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
|
|
|
+# [inline (always)]
|
|
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+pub fn rb_ecdc_sgrt_31t0 (& self) -> RB_ECDC_SGRT_31T0_R { RB_ECDC_SGRT_31T0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - Single encryption and decryption result 0-31 register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sgrt_31t0 (& mut self) -> RB_ECDC_SGRT_31T0_W { RB_ECDC_SGRT_31T0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Single encryption and decryption result 0-31 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rb_ecdc_sgrt_31t0](index.html) module"]
|
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+pub struct RB_ECDC_SGRT_31T0_SPEC ; impl crate :: RegisterSpec for RB_ECDC_SGRT_31T0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [rb_ecdc_sgrt_31t0::R](R) reader structure"]
|
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+impl crate :: Readable for RB_ECDC_SGRT_31T0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [rb_ecdc_sgrt_31t0::W](W) writer structure"]
|
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+impl crate :: Writable for RB_ECDC_SGRT_31T0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets RB_ECDC_SGRT_31T0 to value 0"]
|
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|
+impl crate :: Resettable for RB_ECDC_SGRT_31T0_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SRAM_ADDR register accessor: an alias for `Reg<R32_ECDC_SRAM_ADDR_SPEC>`"]
|
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+pub type R32_ECDC_SRAM_ADDR = crate :: Reg < r32_ecdc_sram_addr :: R32_ECDC_SRAM_ADDR_SPEC > ; # [doc = "encryption and decryption sram start address register"]
|
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+pub mod r32_ecdc_sram_addr { # [doc = "Register `R32_ECDC_SRAM_ADDR` reader"]
|
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|
+pub struct R (crate :: R < R32_ECDC_SRAM_ADDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SRAM_ADDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SRAM_ADDR_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_ECDC_SRAM_ADDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SRAM_ADDR` writer"]
|
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+pub struct W (crate :: W < R32_ECDC_SRAM_ADDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SRAM_ADDR_SPEC > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SRAM_ADDR_SPEC >> for W { # [inline (always)]
|
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+fn from (writer : crate :: W < R32_ECDC_SRAM_ADDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SRAM_ADDR` reader - encryption and decryption sram start address register"]
|
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+pub struct RB_ECDC_SRAM_ADDR_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SRAM_ADDR_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SRAM_ADDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SRAM_ADDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SRAM_ADDR` writer - encryption and decryption sram start address register"]
|
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|
+pub struct RB_ECDC_SRAM_ADDR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SRAM_ADDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - encryption and decryption sram start address register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sram_addr (& self) -> RB_ECDC_SRAM_ADDR_R { RB_ECDC_SRAM_ADDR_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - encryption and decryption sram start address register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sram_addr (& mut self) -> RB_ECDC_SRAM_ADDR_W { RB_ECDC_SRAM_ADDR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "encryption and decryption sram start address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sram_addr](index.html) module"]
|
|
|
+pub struct R32_ECDC_SRAM_ADDR_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SRAM_ADDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sram_addr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SRAM_ADDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sram_addr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SRAM_ADDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SRAM_ADDR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SRAM_ADDR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ECDC_SRAM_LEN register accessor: an alias for `Reg<R32_ECDC_SRAM_LEN_SPEC>`"]
|
|
|
+pub type R32_ECDC_SRAM_LEN = crate :: Reg < r32_ecdc_sram_len :: R32_ECDC_SRAM_LEN_SPEC > ; # [doc = "encryption and decryption sram size register"]
|
|
|
+pub mod r32_ecdc_sram_len { # [doc = "Register `R32_ECDC_SRAM_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R32_ECDC_SRAM_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ECDC_SRAM_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ECDC_SRAM_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ECDC_SRAM_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ECDC_SRAM_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R32_ECDC_SRAM_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ECDC_SRAM_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ECDC_SRAM_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ECDC_SRAM_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_ECDC_SRAM_LEN` reader - encryption and decryption sram size register"]
|
|
|
+pub struct RB_ECDC_SRAM_LEN_R (crate :: FieldReader < u32 , u32 >) ; impl RB_ECDC_SRAM_LEN_R { pub (crate) fn new (bits : u32) -> Self { RB_ECDC_SRAM_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_ECDC_SRAM_LEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_ECDC_SRAM_LEN` writer - encryption and decryption sram size register"]
|
|
|
+pub struct RB_ECDC_SRAM_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_ECDC_SRAM_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - encryption and decryption sram size register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sram_len (& self) -> RB_ECDC_SRAM_LEN_R { RB_ECDC_SRAM_LEN_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - encryption and decryption sram size register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_ecdc_sram_len (& mut self) -> RB_ECDC_SRAM_LEN_W { RB_ECDC_SRAM_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "encryption and decryption sram size register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_ecdc_sram_len](index.html) module"]
|
|
|
+pub struct R32_ECDC_SRAM_LEN_SPEC ; impl crate :: RegisterSpec for R32_ECDC_SRAM_LEN_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_ecdc_sram_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ECDC_SRAM_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_ecdc_sram_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ECDC_SRAM_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ECDC_SRAM_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R32_ECDC_SRAM_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "USBHS register"]
|
|
|
+pub struct USBHS { _marker : PhantomData < * const () > } unsafe impl Send for USBHS { } impl USBHS { # [doc = r"Pointer to the register block"]
|
|
|
+pub const PTR : * const usbhs :: RegisterBlock = 0x4000_9000 as * const _ ; # [doc = r"Return the pointer to the register block"]
|
|
|
+# [inline (always)]
|
|
|
+pub const fn ptr () -> * const usbhs :: RegisterBlock { Self :: PTR } } impl Deref for USBHS { type Target = usbhs :: RegisterBlock ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for USBHS { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("USBHS") . finish () } } # [doc = "USBHS register"]
|
|
|
+pub mod usbhs { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - USB base control"]
|
|
|
+pub r8_usb_ctrl : crate :: Reg < r8_usb_ctrl :: R8_USB_CTRL_SPEC > , # [doc = "0x01 - USB host control register"]
|
|
|
+pub r8_uhost_ctrl : crate :: Reg < r8_uhost_ctrl :: R8_UHOST_CTRL_SPEC > , # [doc = "0x02 - USB interrupt enable"]
|
|
|
+pub r8_usb_int_en : crate :: Reg < r8_usb_int_en :: R8_USB_INT_EN_SPEC > , # [doc = "0x03 - USB device address"]
|
|
|
+pub r8_usb_dev_ad : crate :: Reg < r8_usb_dev_ad :: R8_USB_DEV_AD_SPEC > , # [doc = "0x04 - USB frame number register"]
|
|
|
+pub r16_usb_frame_no : crate :: Reg < r16_usb_frame_no :: R16_USB_FRAME_NO_SPEC > , # [doc = "0x06 - USB suspend register"]
|
|
|
+pub r8_usb_suspend : crate :: Reg < r8_usb_suspend :: R8_USB_SUSPEND_SPEC > , _reserved6 : [u8 ; 0x01]
|
|
|
+, # [doc = "0x08 - USB actual speed register"]
|
|
|
+pub r8_usb_spd_type : crate :: Reg < r8_usb_spd_type :: R8_USB_SPD_TYPE_SPEC > , # [doc = "0x09 - USB miscellaneous status"]
|
|
|
+pub r8_usb_mis_st : crate :: Reg < r8_usb_mis_st :: R8_USB_MIS_ST_SPEC > , # [doc = "0x0a - USB interrupt flag"]
|
|
|
+pub r8_usb_int_fg : crate :: Reg < r8_usb_int_fg :: R8_USB_INT_FG_SPEC > , # [doc = "0x0b - USB interrupt status"]
|
|
|
+pub r8_usb_int_st : crate :: Reg < r8_usb_int_st :: R8_USB_INT_ST_SPEC > , # [doc = "0x0c - USB receiving length"]
|
|
|
+pub r6_usb_rx_len : crate :: Reg < r6_usb_rx_len :: R6_USB_RX_LEN_SPEC > , _reserved11 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x10 - endpoint 1(9) 4(8,12) mode"]
|
|
|
+pub r8_uep4_1_mod : crate :: Reg < r8_uep4_1_mod :: R8_UEP4_1_MOD_SPEC > , # [doc = "0x11 - endpoint 2(10) 3(11) mode and USB host endpoint mode control register"]
|
|
|
+pub r8_uep2_3_mod_r8_uh_ep_mod : crate :: Reg < r8_uep2_3_mod_r8_uh_ep_mod :: R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > , # [doc = "0x12 - endpoint 5(13) 6(14) mode"]
|
|
|
+pub r8_uep5_6_mod : crate :: Reg < r8_uep5_6_mod :: R8_UEP5_6_MOD_SPEC > , # [doc = "0x13 - endpoint 7(15) mode"]
|
|
|
+pub r8_uep7_mod : crate :: Reg < r8_uep7_mod :: R8_UEP7_MOD_SPEC > , # [doc = "0x14 - endpoint 0 DMA buffer address"]
|
|
|
+pub r32_uep0_rt_dma : crate :: Reg < r32_uep0_rt_dma :: R32_UEP0_RT_DMA_SPEC > , # [doc = "0x18 - endpoint 1 DMA buffer address"]
|
|
|
+pub r32_uep1_rx_dma : crate :: Reg < r32_uep1_rx_dma :: R32_UEP1_RX_DMA_SPEC > , # [doc = "0x1c - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
|
|
|
+pub r32_uep2_rx_dma_r32_uh_rx_dma : crate :: Reg < r32_uep2_rx_dma_r32_uh_rx_dma :: R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > , # [doc = "0x20 - endpoint 3 DMA buffer address;host tx endpoint buffer high address"]
|
|
|
+pub r32_uep3_rx_dma : crate :: Reg < r32_uep3_rx_dma :: R32_UEP3_RX_DMA_SPEC > , # [doc = "0x24 - endpoint 4 DMA buffer address"]
|
|
|
+pub r32_uep4_rx_dma : crate :: Reg < r32_uep4_rx_dma :: R32_UEP4_RX_DMA_SPEC > , # [doc = "0x28 - endpoint 5 DMA buffer address"]
|
|
|
+pub r32_uep5_rx_dma : crate :: Reg < r32_uep5_rx_dma :: R32_UEP5_RX_DMA_SPEC > , # [doc = "0x2c - endpoint 6 DMA buffer address"]
|
|
|
+pub r32_uep6_rx_dma : crate :: Reg < r32_uep6_rx_dma :: R32_UEP6_RX_DMA_SPEC > , # [doc = "0x30 - endpoint 7 DMA buffer address"]
|
|
|
+pub r32_uep7_rx_dma : crate :: Reg < r32_uep7_rx_dma :: R32_UEP7_RX_DMA_SPEC > , # [doc = "0x34 - endpoint 1 DMA TX buffer address"]
|
|
|
+pub r32_uep1_tx_dma : crate :: Reg < r32_uep1_tx_dma :: R32_UEP1_TX_DMA_SPEC > , # [doc = "0x38 - endpoint 2 DMA TX buffer address"]
|
|
|
+pub r32_uep2_tx_dma : crate :: Reg < r32_uep2_tx_dma :: R32_UEP2_TX_DMA_SPEC > , # [doc = "0x3c - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+pub r32_uep3_tx_dma_r32_uh_tx_dma : crate :: Reg < r32_uep3_tx_dma_r32_uh_tx_dma :: R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > , # [doc = "0x40 - endpoint 4 DMA TX buffer address"]
|
|
|
+pub r32_uep4_tx_dma : crate :: Reg < r32_uep4_tx_dma :: R32_UEP4_TX_DMA_SPEC > , # [doc = "0x44 - endpoint 5 DMA TX buffer address"]
|
|
|
+pub r32_uep5_tx_dma : crate :: Reg < r32_uep5_tx_dma :: R32_UEP5_TX_DMA_SPEC > , # [doc = "0x48 - endpoint 4 DMA TX buffer address"]
|
|
|
+pub r32_uep6_tx_dma : crate :: Reg < r32_uep6_tx_dma :: R32_UEP6_TX_DMA_SPEC > , # [doc = "0x4c - endpoint 7 DMA TX buffer address"]
|
|
|
+pub r32_uep7_tx_dma : crate :: Reg < r32_uep7_tx_dma :: R32_UEP7_TX_DMA_SPEC > , # [doc = "0x50 - endpoint 0 receive max length"]
|
|
|
+pub r16_uep0_max_len : crate :: Reg < r16_uep0_max_len :: R16_UEP0_MAX_LEN_SPEC > , _reserved31 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x54 - endpoint 1 receive max length"]
|
|
|
+pub r16_uep1_max_len : crate :: Reg < r16_uep1_max_len :: R16_UEP1_MAX_LEN_SPEC > , _reserved32 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x58 - endpoint 2 receive max length and USB host receive max packet length register"]
|
|
|
+pub r16_uep2_max_len_r16_uh_max_len : crate :: Reg < r16_uep2_max_len_r16_uh_max_len :: R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > , _reserved33 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x5c - endpoint 3 receive max length"]
|
|
|
+pub r16_uep3_max_len : crate :: Reg < r16_uep3_max_len :: R16_UEP3_MAX_LEN_SPEC > , _reserved34 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x60 - endpoint 4 receive max length"]
|
|
|
+pub r16_uep4_max_len : crate :: Reg < r16_uep4_max_len :: R16_UEP4_MAX_LEN_SPEC > , _reserved35 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x64 - endpoint 5 receive max length"]
|
|
|
+pub r16_uep5_max_len : crate :: Reg < r16_uep5_max_len :: R16_UEP5_MAX_LEN_SPEC > , _reserved36 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x68 - endpoint 6 receive max length"]
|
|
|
+pub r16_uep6_max_len : crate :: Reg < r16_uep6_max_len :: R16_UEP6_MAX_LEN_SPEC > , _reserved37 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x6c - endpoint 7 receive max length"]
|
|
|
+pub r16_uep7_max_len : crate :: Reg < r16_uep7_max_len :: R16_UEP7_MAX_LEN_SPEC > , _reserved38 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x70 - endpoint 0 transmittal length"]
|
|
|
+pub r16_uep0_t_len : crate :: Reg < r16_uep0_t_len :: R16_UEP0_T_LEN_SPEC > , # [doc = "0x72 - endpoint 0 tx control"]
|
|
|
+pub r8_uep0_tx_ctrl : crate :: Reg < r8_uep0_tx_ctrl :: R8_UEP0_TX_CTRL_SPEC > , # [doc = "0x73 - endpoint 0 rx control"]
|
|
|
+pub r8_uep0_rx_ctrl : crate :: Reg < r8_uep0_rx_ctrl :: R8_UEP0_RX_CTRL_SPEC > , # [doc = "0x74 - endpoint 1 transmittal length"]
|
|
|
+pub r16_uep1_t_len : crate :: Reg < r16_uep1_t_len :: R16_UEP1_T_LEN_SPEC > , # [doc = "0x76 - endpoint 1 tx control"]
|
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|
+pub r8_uep1_tx_ctrl : crate :: Reg < r8_uep1_tx_ctrl :: R8_UEP1_TX_CTRL_SPEC > , # [doc = "0x77 - endpoint 1 rx control"]
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+pub r8_uep1_rx_ctrl : crate :: Reg < r8_uep1_rx_ctrl :: R8_UEP1_RX_CTRL_SPEC > , # [doc = "0x78 - endpoint 2 transmittal length and Set usb host token register"]
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+pub r16_uep2_t_len_r16_uh_ep_pid : crate :: Reg < r16_uep2_t_len_r16_uh_ep_pid :: R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > , # [doc = "0x7a - endpoint 2 tx control"]
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+pub r8_uep2_tx_ctrl : crate :: Reg < r8_uep2_tx_ctrl :: R8_UEP2_TX_CTRL_SPEC > , # [doc = "0x7b - endpoint 2 rx control and USb host receive endpoint control register"]
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+pub r8_uep2_rx_ctrl_r8_uh_rx_ctrl : crate :: Reg < r8_uep2_rx_ctrl_r8_uh_rx_ctrl :: R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > , # [doc = "0x7c - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+pub r16_uep3_t_len_r16_uh_tx_len : crate :: Reg < r16_uep3_t_len_r16_uh_tx_len :: R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > , # [doc = "0x7e - endpoint 3 tx control and host transmittal endpoint control"]
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+pub r8_uep3_tx_ctrl_r8_uh_tx_ctrl : crate :: Reg < r8_uep3_tx_ctrl_r8_uh_tx_ctrl :: R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > , # [doc = "0x7f - endpoint 3 rx control"]
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+pub r8_uep3_rx_ctrl : crate :: Reg < r8_uep3_rx_ctrl :: R8_UEP3_RX_CTRL_SPEC > , # [doc = "0x80 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+pub r16_uep4_t_len_r16_uh_split_data : crate :: Reg < r16_uep4_t_len_r16_uh_split_data :: R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > , # [doc = "0x82 - endpoint 4 tx control"]
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+pub r8_uep4_tx_ctrl : crate :: Reg < r8_uep4_tx_ctrl :: R8_UEP4_TX_CTRL_SPEC > , # [doc = "0x83 - endpoint 4 rx control"]
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+pub r8_uep4_rx_ctrl : crate :: Reg < r8_uep4_rx_ctrl :: R8_UEP4_RX_CTRL_SPEC > , # [doc = "0x84 - endpoint 5 transmittal length"]
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+pub r16_uep5_t_len : crate :: Reg < r16_uep5_t_len :: R16_UEP5_T_LEN_SPEC > , # [doc = "0x86 - endpoint 5 tx control"]
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+pub r8_uep5_tx_ctrl : crate :: Reg < r8_uep5_tx_ctrl :: R8_UEP5_TX_CTRL_SPEC > , # [doc = "0x87 - endpoint 5 rx control"]
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+pub r8_uep5_rx_ctrl : crate :: Reg < r8_uep5_rx_ctrl :: R8_UEP5_RX_CTRL_SPEC > , # [doc = "0x88 - endpoint 6 transmittal length"]
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+pub r16_uep6_t_len : crate :: Reg < r16_uep6_t_len :: R16_UEP6_T_LEN_SPEC > , # [doc = "0x8a - endpoint 6 tx control"]
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+pub r8_uep6_tx_ctrl : crate :: Reg < r8_uep6_tx_ctrl :: R8_UEP6_TX_CTRL_SPEC > , # [doc = "0x8b - endpoint 6 rx control"]
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+pub r8_uep6_rx_ctrl : crate :: Reg < r8_uep6_rx_ctrl :: R8_UEP6_RX_CTRL_SPEC > , # [doc = "0x8c - endpoint 7 transmittal length"]
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+pub r16_uep7_t_len : crate :: Reg < r16_uep7_t_len :: R16_UEP7_T_LEN_SPEC > , # [doc = "0x8e - endpoint 7 tx control"]
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+pub r8_uep7_tx_ctrl : crate :: Reg < r8_uep7_tx_ctrl :: R8_UEP7_TX_CTRL_SPEC > , # [doc = "0x8f - endpoint 7 rx control"]
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+pub r8_uep7_rx_ctrl : crate :: Reg < r8_uep7_rx_ctrl :: R8_UEP7_RX_CTRL_SPEC > , } # [doc = "R8_USB_CTRL register accessor: an alias for `Reg<R8_USB_CTRL_SPEC>`"]
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+pub type R8_USB_CTRL = crate :: Reg < r8_usb_ctrl :: R8_USB_CTRL_SPEC > ; # [doc = "USB base control"]
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+pub mod r8_usb_ctrl { # [doc = "Register `R8_USB_CTRL` reader"]
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+pub struct R (crate :: R < R8_USB_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_USB_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_CTRL` writer"]
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+pub struct W (crate :: W < R8_USB_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_USB_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_DMA_EN` reader - DMA enable and DMA interrupt enable for USB"]
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+pub struct RB_USB_DMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_DMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_DMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_DMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_DMA_EN` writer - DMA enable and DMA interrupt enable for USB"]
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+pub struct RB_USB_DMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_DMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_CLR_ALL` reader - force clear FIFO and count of USB"]
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+pub struct RB_USB_CLR_ALL_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_CLR_ALL_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_CLR_ALL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_CLR_ALL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_CLR_ALL` writer - force clear FIFO and count of USB"]
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+pub struct RB_USB_CLR_ALL_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_CLR_ALL_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_RESET_SIE` reader - force reset USB SIE, need software clear"]
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+pub struct RB_USB_RESET_SIE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_RESET_SIE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_RESET_SIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_RESET_SIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_RESET_SIE` writer - force reset USB SIE, need software clear"]
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+pub struct RB_USB_RESET_SIE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_RESET_SIE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_INT_BUSY` reader - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
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+pub struct RB_USB_INT_BUSY_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_INT_BUSY_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_INT_BUSY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_INT_BUSY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_INT_BUSY` writer - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
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+pub struct RB_USB_INT_BUSY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_INT_BUSY_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DEV_PU_EN` reader - USB device enable and internal pullup resistance enable"]
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+pub struct RB_DEV_PU_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_DEV_PU_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_DEV_PU_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_PU_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_PU_EN` writer - USB device enable and internal pullup resistance enable"]
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+pub struct RB_DEV_PU_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DEV_PU_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_SPTP_MASK` reader - enable USB low speed"]
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+pub struct RB_USB_SPTP_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_USB_SPTP_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_USB_SPTP_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SPTP_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SPTP_MASK` writer - enable USB low speed"]
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+pub struct RB_USB_SPTP_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_SPTP_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 5)) | ((value as u8 & 0x03) << 5) ; self . w } } # [doc = "Field `RB_USB_MODE` reader - enable USB host mode: 0=device mode, 1=host mode"]
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+pub struct RB_USB_MODE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_MODE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_MODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_MODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_MODE` writer - enable USB host mode: 0=device mode, 1=host mode"]
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+pub struct RB_USB_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_MODE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - DMA enable and DMA interrupt enable for USB"]
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+# [inline (always)]
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+pub fn rb_usb_dma_en (& self) -> RB_USB_DMA_EN_R { RB_USB_DMA_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - force clear FIFO and count of USB"]
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+# [inline (always)]
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+pub fn rb_usb_clr_all (& self) -> RB_USB_CLR_ALL_R { RB_USB_CLR_ALL_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - force reset USB SIE, need software clear"]
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+# [inline (always)]
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+pub fn rb_usb_reset_sie (& self) -> RB_USB_RESET_SIE_R { RB_USB_RESET_SIE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
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+# [inline (always)]
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+pub fn rb_usb_int_busy (& self) -> RB_USB_INT_BUSY_R { RB_USB_INT_BUSY_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - USB device enable and internal pullup resistance enable"]
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+# [inline (always)]
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+pub fn rb_dev_pu_en (& self) -> RB_DEV_PU_EN_R { RB_DEV_PU_EN_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 5:6 - enable USB low speed"]
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+# [inline (always)]
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+pub fn rb_usb_sptp_mask (& self) -> RB_USB_SPTP_MASK_R { RB_USB_SPTP_MASK_R :: new (((self . bits >> 5) & 0x03) as u8) } # [doc = "Bit 7 - enable USB host mode: 0=device mode, 1=host mode"]
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+# [inline (always)]
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+pub fn rb_usb_mode (& self) -> RB_USB_MODE_R { RB_USB_MODE_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DMA enable and DMA interrupt enable for USB"]
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+# [inline (always)]
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+pub fn rb_usb_dma_en (& mut self) -> RB_USB_DMA_EN_W { RB_USB_DMA_EN_W { w : self } } # [doc = "Bit 1 - force clear FIFO and count of USB"]
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+# [inline (always)]
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+pub fn rb_usb_clr_all (& mut self) -> RB_USB_CLR_ALL_W { RB_USB_CLR_ALL_W { w : self } } # [doc = "Bit 2 - force reset USB SIE, need software clear"]
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+# [inline (always)]
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+pub fn rb_usb_reset_sie (& mut self) -> RB_USB_RESET_SIE_W { RB_USB_RESET_SIE_W { w : self } } # [doc = "Bit 3 - enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid"]
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+# [inline (always)]
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+pub fn rb_usb_int_busy (& mut self) -> RB_USB_INT_BUSY_W { RB_USB_INT_BUSY_W { w : self } } # [doc = "Bit 4 - USB device enable and internal pullup resistance enable"]
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+# [inline (always)]
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+pub fn rb_dev_pu_en (& mut self) -> RB_DEV_PU_EN_W { RB_DEV_PU_EN_W { w : self } } # [doc = "Bits 5:6 - enable USB low speed"]
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+# [inline (always)]
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+pub fn rb_usb_sptp_mask (& mut self) -> RB_USB_SPTP_MASK_W { RB_USB_SPTP_MASK_W { w : self } } # [doc = "Bit 7 - enable USB host mode: 0=device mode, 1=host mode"]
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+# [inline (always)]
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+pub fn rb_usb_mode (& mut self) -> RB_USB_MODE_W { RB_USB_MODE_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB base control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_ctrl](index.html) module"]
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+pub struct R8_USB_CTRL_SPEC ; impl crate :: RegisterSpec for R8_USB_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_USB_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_USB_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_CTRL to value 0x06"]
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+impl crate :: Resettable for R8_USB_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x06 } } } # [doc = "R8_UHOST_CTRL register accessor: an alias for `Reg<R8_UHOST_CTRL_SPEC>`"]
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+pub type R8_UHOST_CTRL = crate :: Reg < r8_uhost_ctrl :: R8_UHOST_CTRL_SPEC > ; # [doc = "USB host control register"]
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+pub mod r8_uhost_ctrl { # [doc = "Register `R8_UHOST_CTRL` reader"]
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+pub struct R (crate :: R < R8_UHOST_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UHOST_CTRL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UHOST_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UHOST_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UHOST_CTRL` writer"]
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+pub struct W (crate :: W < R8_UHOST_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UHOST_CTRL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UHOST_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UHOST_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UH_BUS_RESET` reader - USB host send bus reset signal"]
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|
+pub struct RB_UH_BUS_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_RESET` writer - USB host send bus reset signal"]
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|
+pub struct RB_UH_BUS_RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_RESET_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UH_BUS_SUSPEND` reader - USB host send bus suspend signal"]
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|
|
+pub struct RB_UH_BUS_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_SUSPEND` writer - USB host send bus suspend signal"]
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|
|
+pub struct RB_UH_BUS_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_UH_BUS_RESUME` reader - USB host suspend state and wake up device"]
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|
|
+pub struct RB_UH_BUS_RESUME_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_BUS_RESUME_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_BUS_RESUME_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_BUS_RESUME_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_BUS_RESUME` writer - USB host suspend state and wake up device"]
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|
|
+pub struct RB_UH_BUS_RESUME_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_BUS_RESUME_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UH_AUTOSOF_EN` reader - Automatically generate sof packet enable control"]
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|
|
+pub struct RB_UH_AUTOSOF_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_AUTOSOF_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_AUTOSOF_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_AUTOSOF_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_AUTOSOF_EN` writer - Automatically generate sof packet enable control"]
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|
|
+pub struct RB_UH_AUTOSOF_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_AUTOSOF_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - USB host send bus reset signal"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_reset (& self) -> RB_UH_BUS_RESET_R { RB_UH_BUS_RESET_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - USB host send bus suspend signal"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_suspend (& self) -> RB_UH_BUS_SUSPEND_R { RB_UH_BUS_SUSPEND_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - USB host suspend state and wake up device"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_resume (& self) -> RB_UH_BUS_RESUME_R { RB_UH_BUS_RESUME_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 7 - Automatically generate sof packet enable control"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_autosof_en (& self) -> RB_UH_AUTOSOF_EN_R { RB_UH_AUTOSOF_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - USB host send bus reset signal"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_reset (& mut self) -> RB_UH_BUS_RESET_W { RB_UH_BUS_RESET_W { w : self } } # [doc = "Bit 1 - USB host send bus suspend signal"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_suspend (& mut self) -> RB_UH_BUS_SUSPEND_W { RB_UH_BUS_SUSPEND_W { w : self } } # [doc = "Bit 2 - USB host suspend state and wake up device"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uh_bus_resume (& mut self) -> RB_UH_BUS_RESUME_W { RB_UH_BUS_RESUME_W { w : self } } # [doc = "Bit 7 - Automatically generate sof packet enable control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uh_autosof_en (& mut self) -> RB_UH_AUTOSOF_EN_W { RB_UH_AUTOSOF_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB host control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uhost_ctrl](index.html) module"]
|
|
|
+pub struct R8_UHOST_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UHOST_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uhost_ctrl::R](R) reader structure"]
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|
|
+impl crate :: Readable for R8_UHOST_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uhost_ctrl::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_UHOST_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UHOST_CTRL to value 0"]
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|
|
+impl crate :: Resettable for R8_UHOST_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_INT_EN register accessor: an alias for `Reg<R8_USB_INT_EN_SPEC>`"]
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|
|
+pub type R8_USB_INT_EN = crate :: Reg < r8_usb_int_en :: R8_USB_INT_EN_SPEC > ; # [doc = "USB interrupt enable"]
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|
|
+pub mod r8_usb_int_en { # [doc = "Register `R8_USB_INT_EN` reader"]
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|
|
+pub struct R (crate :: R < R8_USB_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_EN_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R8_USB_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_INT_EN` writer"]
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|
|
+pub struct W (crate :: W < R8_USB_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_INT_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_INT_EN_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R8_USB_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_IE_BUSRST_RB_USB_IE_DETECT` reader - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
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|
|
+pub struct RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_BUSRST_RB_USB_IE_DETECT` writer - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
|
|
|
+pub struct RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_IE_TRANS` reader - enable interrupt for USB transfer completion"]
|
|
|
+pub struct RB_USB_IE_TRANS_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_TRANS_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_TRANS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_TRANS_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_TRANS` writer - enable interrupt for USB transfer completion"]
|
|
|
+pub struct RB_USB_IE_TRANS_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_TRANS_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_IE_SUSPEND` reader - enable interrupt for USB suspend or resume event"]
|
|
|
+pub struct RB_USB_IE_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SUSPEND` writer - enable interrupt for USB suspend or resume event"]
|
|
|
+pub struct RB_USB_IE_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_IE_SOF` reader - enable interrupt for host SOF timer action for USB host mode"]
|
|
|
+pub struct RB_USB_IE_SOF_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SOF_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SOF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SOF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SOF` writer - enable interrupt for host SOF timer action for USB host mode"]
|
|
|
+pub struct RB_USB_IE_SOF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SOF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_USB_IE_FIFOOV` reader - enable interrupt for FIFO overflow"]
|
|
|
+pub struct RB_USB_IE_FIFOOV_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_FIFOOV_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_FIFOOV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_FIFOOV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_FIFOOV` writer - enable interrupt for FIFO overflow"]
|
|
|
+pub struct RB_USB_IE_FIFOOV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_FIFOOV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_IE_SETUPACT` reader - Setup packet end interrupt"]
|
|
|
+pub struct RB_USB_IE_SETUPACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_SETUPACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_SETUPACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_SETUPACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_SETUPACT` writer - Setup packet end interrupt"]
|
|
|
+pub struct RB_USB_IE_SETUPACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_SETUPACT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_USB_IE_ISOACT` reader - Synchronous transmission received control token packet interrupt"]
|
|
|
+pub struct RB_USB_IE_ISOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_ISOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_ISOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_ISOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_ISOACT` writer - Synchronous transmission received control token packet interrupt"]
|
|
|
+pub struct RB_USB_IE_ISOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_ISOACT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_USB_IE_DEV_NAK` reader - enable interrupt for NAK responded for USB device mode"]
|
|
|
+pub struct RB_USB_IE_DEV_NAK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IE_DEV_NAK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IE_DEV_NAK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IE_DEV_NAK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IE_DEV_NAK` writer - enable interrupt for NAK responded for USB device mode"]
|
|
|
+pub struct RB_USB_IE_DEV_NAK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IE_DEV_NAK_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_busrst_rb_usb_ie_detect (& self) -> RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - enable interrupt for USB transfer completion"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_trans (& self) -> RB_USB_IE_TRANS_R { RB_USB_IE_TRANS_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable interrupt for USB suspend or resume event"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_suspend (& self) -> RB_USB_IE_SUSPEND_R { RB_USB_IE_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable interrupt for host SOF timer action for USB host mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_sof (& self) -> RB_USB_IE_SOF_R { RB_USB_IE_SOF_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - enable interrupt for FIFO overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_fifoov (& self) -> RB_USB_IE_FIFOOV_R { RB_USB_IE_FIFOOV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - Setup packet end interrupt"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_setupact (& self) -> RB_USB_IE_SETUPACT_R { RB_USB_IE_SETUPACT_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - Synchronous transmission received control token packet interrupt"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_ie_isoact (& self) -> RB_USB_IE_ISOACT_R { RB_USB_IE_ISOACT_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable interrupt for NAK responded for USB device mode"]
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+# [inline (always)]
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+pub fn rb_usb_ie_dev_nak (& self) -> RB_USB_IE_DEV_NAK_R { RB_USB_IE_DEV_NAK_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - enable interrupt for USB bus reset event for USB device mode _ enable interrupt for USB device detected event for USB host mode"]
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+# [inline (always)]
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+pub fn rb_usb_ie_busrst_rb_usb_ie_detect (& mut self) -> RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W { RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W { w : self } } # [doc = "Bit 1 - enable interrupt for USB transfer completion"]
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+# [inline (always)]
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+pub fn rb_usb_ie_trans (& mut self) -> RB_USB_IE_TRANS_W { RB_USB_IE_TRANS_W { w : self } } # [doc = "Bit 2 - enable interrupt for USB suspend or resume event"]
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+# [inline (always)]
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+pub fn rb_usb_ie_suspend (& mut self) -> RB_USB_IE_SUSPEND_W { RB_USB_IE_SUSPEND_W { w : self } } # [doc = "Bit 3 - enable interrupt for host SOF timer action for USB host mode"]
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+# [inline (always)]
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+pub fn rb_usb_ie_sof (& mut self) -> RB_USB_IE_SOF_W { RB_USB_IE_SOF_W { w : self } } # [doc = "Bit 4 - enable interrupt for FIFO overflow"]
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+# [inline (always)]
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+pub fn rb_usb_ie_fifoov (& mut self) -> RB_USB_IE_FIFOOV_W { RB_USB_IE_FIFOOV_W { w : self } } # [doc = "Bit 5 - Setup packet end interrupt"]
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+# [inline (always)]
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+pub fn rb_usb_ie_setupact (& mut self) -> RB_USB_IE_SETUPACT_W { RB_USB_IE_SETUPACT_W { w : self } } # [doc = "Bit 6 - Synchronous transmission received control token packet interrupt"]
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+# [inline (always)]
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+pub fn rb_usb_ie_isoact (& mut self) -> RB_USB_IE_ISOACT_W { RB_USB_IE_ISOACT_W { w : self } } # [doc = "Bit 7 - enable interrupt for NAK responded for USB device mode"]
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+# [inline (always)]
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+pub fn rb_usb_ie_dev_nak (& mut self) -> RB_USB_IE_DEV_NAK_W { RB_USB_IE_DEV_NAK_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_en](index.html) module"]
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+pub struct R8_USB_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_en::R](R) reader structure"]
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+impl crate :: Readable for R8_USB_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_int_en::W](W) writer structure"]
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+impl crate :: Writable for R8_USB_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_INT_EN to value 0"]
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+impl crate :: Resettable for R8_USB_INT_EN_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_DEV_AD register accessor: an alias for `Reg<R8_USB_DEV_AD_SPEC>`"]
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+pub type R8_USB_DEV_AD = crate :: Reg < r8_usb_dev_ad :: R8_USB_DEV_AD_SPEC > ; # [doc = "USB device address"]
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+pub mod r8_usb_dev_ad { # [doc = "Register `R8_USB_DEV_AD` reader"]
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+pub struct R (crate :: R < R8_USB_DEV_AD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_DEV_AD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_DEV_AD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_USB_DEV_AD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_DEV_AD` writer"]
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+pub struct W (crate :: W < R8_USB_DEV_AD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_DEV_AD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_DEV_AD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_USB_DEV_AD_SPEC >) -> Self { W (writer) } } # [doc = "Field `USB_ADDR_MASK` reader - bit mask for USB device address"]
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+pub struct USB_ADDR_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl USB_ADDR_MASK_R { pub (crate) fn new (bits : u8) -> Self { USB_ADDR_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_ADDR_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `USB_ADDR_MASK` writer - bit mask for USB device address"]
|
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|
+pub struct USB_ADDR_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > USB_ADDR_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x7f) | (value as u8 & 0x7f) ; self . w } } impl R { # [doc = "Bits 0:6 - bit mask for USB device address"]
|
|
|
+# [inline (always)]
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|
+pub fn usb_addr_mask (& self) -> USB_ADDR_MASK_R { USB_ADDR_MASK_R :: new ((self . bits & 0x7f) as u8) } } impl W { # [doc = "Bits 0:6 - bit mask for USB device address"]
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|
|
+# [inline (always)]
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|
|
+pub fn usb_addr_mask (& mut self) -> USB_ADDR_MASK_W { USB_ADDR_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB device address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_dev_ad](index.html) module"]
|
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|
+pub struct R8_USB_DEV_AD_SPEC ; impl crate :: RegisterSpec for R8_USB_DEV_AD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_dev_ad::R](R) reader structure"]
|
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+impl crate :: Readable for R8_USB_DEV_AD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_dev_ad::W](W) writer structure"]
|
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|
+impl crate :: Writable for R8_USB_DEV_AD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_DEV_AD to value 0"]
|
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|
+impl crate :: Resettable for R8_USB_DEV_AD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_USB_FRAME_NO register accessor: an alias for `Reg<R16_USB_FRAME_NO_SPEC>`"]
|
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|
+pub type R16_USB_FRAME_NO = crate :: Reg < r16_usb_frame_no :: R16_USB_FRAME_NO_SPEC > ; # [doc = "USB frame number register"]
|
|
|
+pub mod r16_usb_frame_no { # [doc = "Register `R16_USB_FRAME_NO` reader"]
|
|
|
+pub struct R (crate :: R < R16_USB_FRAME_NO_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_USB_FRAME_NO_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_USB_FRAME_NO_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_USB_FRAME_NO_SPEC >) -> Self { R (reader) } } # [doc = "Field `USB_FRAME_NO` reader - USB frame number"]
|
|
|
+pub struct USB_FRAME_NO_R (crate :: FieldReader < u16 , u16 >) ; impl USB_FRAME_NO_R { pub (crate) fn new (bits : u16) -> Self { USB_FRAME_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_FRAME_NO_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - USB frame number"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn usb_frame_no (& self) -> USB_FRAME_NO_R { USB_FRAME_NO_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "USB frame number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_usb_frame_no](index.html) module"]
|
|
|
+pub struct R16_USB_FRAME_NO_SPEC ; impl crate :: RegisterSpec for R16_USB_FRAME_NO_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_usb_frame_no::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_USB_FRAME_NO_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_USB_FRAME_NO to value 0"]
|
|
|
+impl crate :: Resettable for R16_USB_FRAME_NO_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_SUSPEND register accessor: an alias for `Reg<R8_USB_SUSPEND_SPEC>`"]
|
|
|
+pub type R8_USB_SUSPEND = crate :: Reg < r8_usb_suspend :: R8_USB_SUSPEND_SPEC > ; # [doc = "USB suspend register"]
|
|
|
+pub mod r8_usb_suspend { # [doc = "Register `R8_USB_SUSPEND` reader"]
|
|
|
+pub struct R (crate :: R < R8_USB_SUSPEND_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_SUSPEND_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_SUSPEND_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_USB_SUSPEND_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_SUSPEND` writer"]
|
|
|
+pub struct W (crate :: W < R8_USB_SUSPEND_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_SUSPEND_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_SUSPEND_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R8_USB_SUSPEND_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DEV_WAKEUP` reader - Remote wake-up control bit"]
|
|
|
+pub struct RB_DEV_WAKEUP_R (crate :: FieldReader < bool , bool >) ; impl RB_DEV_WAKEUP_R { pub (crate) fn new (bits : bool) -> Self { RB_DEV_WAKEUP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_WAKEUP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_WAKEUP` writer - Remote wake-up control bit"]
|
|
|
+pub struct RB_DEV_WAKEUP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DEV_WAKEUP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 1 - Remote wake-up control bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dev_wakeup (& self) -> RB_DEV_WAKEUP_R { RB_DEV_WAKEUP_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - Remote wake-up control bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dev_wakeup (& mut self) -> RB_DEV_WAKEUP_W { RB_DEV_WAKEUP_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB suspend register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_suspend](index.html) module"]
|
|
|
+pub struct R8_USB_SUSPEND_SPEC ; impl crate :: RegisterSpec for R8_USB_SUSPEND_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_suspend::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_USB_SUSPEND_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_suspend::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_USB_SUSPEND_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_SUSPEND to value 0"]
|
|
|
+impl crate :: Resettable for R8_USB_SUSPEND_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_SPD_TYPE register accessor: an alias for `Reg<R8_USB_SPD_TYPE_SPEC>`"]
|
|
|
+pub type R8_USB_SPD_TYPE = crate :: Reg < r8_usb_spd_type :: R8_USB_SPD_TYPE_SPEC > ; # [doc = "USB actual speed register"]
|
|
|
+pub mod r8_usb_spd_type { # [doc = "Register `R8_USB_SPD_TYPE` reader"]
|
|
|
+pub struct R (crate :: R < R8_USB_SPD_TYPE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_SPD_TYPE_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_SPD_TYPE_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_USB_SPD_TYPE_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_USBSPEED_MASK` reader - USB actual speed"]
|
|
|
+pub struct RB_USBSPEED_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_USBSPEED_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_USBSPEED_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBSPEED_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:1 - USB actual speed"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usbspeed_mask (& self) -> RB_USBSPEED_MASK_R { RB_USBSPEED_MASK_R :: new ((self . bits & 0x03) as u8) } } # [doc = "USB actual speed register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_spd_type](index.html) module"]
|
|
|
+pub struct R8_USB_SPD_TYPE_SPEC ; impl crate :: RegisterSpec for R8_USB_SPD_TYPE_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_spd_type::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_USB_SPD_TYPE_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_SPD_TYPE to value 0"]
|
|
|
+impl crate :: Resettable for R8_USB_SPD_TYPE_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_MIS_ST register accessor: an alias for `Reg<R8_USB_MIS_ST_SPEC>`"]
|
|
|
+pub type R8_USB_MIS_ST = crate :: Reg < r8_usb_mis_st :: R8_USB_MIS_ST_SPEC > ; # [doc = "USB miscellaneous status"]
|
|
|
+pub mod r8_usb_mis_st { # [doc = "Register `R8_USB_MIS_ST` reader"]
|
|
|
+pub struct R (crate :: R < R8_USB_MIS_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_MIS_ST_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_MIS_ST_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_USB_MIS_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_USB_SPLIT_EN` reader - RO,indicate host allow SPLIT packet"]
|
|
|
+pub struct RB_USB_SPLIT_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SPLIT_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SPLIT_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SPLIT_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ATTACH` reader - RO, indicate device attached status on USB host"]
|
|
|
+pub struct RB_USB_ATTACH_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ATTACH_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ATTACH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ATTACH_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USBBUS_SUSPEND` reader - RO, indicate USB suspend status"]
|
|
|
+pub struct RB_USBBUS_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USBBUS_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USBBUS_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBBUS_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USBBUS_RESET` reader - RO, indicate USB bus reset status"]
|
|
|
+pub struct RB_USBBUS_RESET_R (crate :: FieldReader < bool , bool >) ; impl RB_USBBUS_RESET_R { pub (crate) fn new (bits : bool) -> Self { RB_USBBUS_RESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USBBUS_RESET_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_FIFO_RDY` reader - RO, indicate USB receiving FIFO ready status (not empty)"]
|
|
|
+pub struct RB_USB_FIFO_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_FIFO_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_FIFO_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SIE_FREE` reader - RO, indicate USB SIE free status"]
|
|
|
+pub struct RB_USB_SIE_FREE_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SIE_FREE_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SIE_FREE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SIE_FREE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SOF_ACT` reader - RO, indicate host SOF timer action status for USB host"]
|
|
|
+pub struct RB_USB_SOF_ACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SOF_ACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SOF_ACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SOF_ACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_SOF_PRES` reader - RO, indicate host SOF timer presage status"]
|
|
|
+pub struct RB_USB_SOF_PRES_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_SOF_PRES_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_SOF_PRES_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_SOF_PRES_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - RO,indicate host allow SPLIT packet"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_split_en (& self) -> RB_USB_SPLIT_EN_R { RB_USB_SPLIT_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - RO, indicate device attached status on USB host"]
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+# [inline (always)]
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+pub fn rb_usb_attach (& self) -> RB_USB_ATTACH_R { RB_USB_ATTACH_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - RO, indicate USB suspend status"]
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+# [inline (always)]
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+pub fn rb_usbbus_suspend (& self) -> RB_USBBUS_SUSPEND_R { RB_USBBUS_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - RO, indicate USB bus reset status"]
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+# [inline (always)]
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+pub fn rb_usbbus_reset (& self) -> RB_USBBUS_RESET_R { RB_USBBUS_RESET_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - RO, indicate USB receiving FIFO ready status (not empty)"]
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+# [inline (always)]
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+pub fn rb_usb_fifo_rdy (& self) -> RB_USB_FIFO_RDY_R { RB_USB_FIFO_RDY_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - RO, indicate USB SIE free status"]
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+# [inline (always)]
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+pub fn rb_usb_sie_free (& self) -> RB_USB_SIE_FREE_R { RB_USB_SIE_FREE_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - RO, indicate host SOF timer action status for USB host"]
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+# [inline (always)]
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+pub fn rb_usb_sof_act (& self) -> RB_USB_SOF_ACT_R { RB_USB_SOF_ACT_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - RO, indicate host SOF timer presage status"]
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+# [inline (always)]
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+pub fn rb_usb_sof_pres (& self) -> RB_USB_SOF_PRES_R { RB_USB_SOF_PRES_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "USB miscellaneous status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_mis_st](index.html) module"]
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+pub struct R8_USB_MIS_ST_SPEC ; impl crate :: RegisterSpec for R8_USB_MIS_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_mis_st::R](R) reader structure"]
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+impl crate :: Readable for R8_USB_MIS_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_MIS_ST to value 0x20"]
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+impl crate :: Resettable for R8_USB_MIS_ST_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x20 } } } # [doc = "R8_USB_INT_FG register accessor: an alias for `Reg<R8_USB_INT_FG_SPEC>`"]
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+pub type R8_USB_INT_FG = crate :: Reg < r8_usb_int_fg :: R8_USB_INT_FG_SPEC > ; # [doc = "USB interrupt flag"]
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+pub mod r8_usb_int_fg { # [doc = "Register `R8_USB_INT_FG` reader"]
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+pub struct R (crate :: R < R8_USB_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_FG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_FG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_USB_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_USB_INT_FG` writer"]
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+pub struct W (crate :: W < R8_USB_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_USB_INT_FG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_USB_INT_FG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_USB_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_USB_IF_BUSRST_RB_USB_IF_DETECT` reader - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_BUSRST_RB_USB_IF_DETECT` writer - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_USB_IF_TRANSFER` reader - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_TRANSFER_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_TRANSFER_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_TRANSFER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_TRANSFER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_TRANSFER` writer - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_TRANSFER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_TRANSFER_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_USB_IF_SUSPEND` reader - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_SUSPEND_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_SUSPEND_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_SUSPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_SUSPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_SUSPEND` writer - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_SUSPEND_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_SUSPEND_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_USB_IF_HST_SOF` reader - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_HST_SOF_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_HST_SOF_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_HST_SOF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_HST_SOF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_HST_SOF` writer - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_HST_SOF_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_HST_SOF_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_USB_IF_FIFOOV` reader - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_FIFOOV_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_FIFOOV_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_FIFOOV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_FIFOOV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_FIFOOV` writer - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
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+pub struct RB_USB_IF_FIFOOV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_FIFOOV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_USB_IF_SETUOACT` reader - RO, Setup transaction end interrupt flag"]
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+pub struct RB_USB_IF_SETUOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_SETUOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_SETUOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_SETUOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_SETUOACT` writer - RO, Setup transaction end interrupt flag"]
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+pub struct RB_USB_IF_SETUOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_SETUOACT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_USB_IF_ISOACT` reader - RO, Synchronous transmission received control token packet interrupt flag"]
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|
|
+pub struct RB_USB_IF_ISOACT_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_IF_ISOACT_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_IF_ISOACT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_IF_ISOACT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_IF_ISOACT` writer - RO, Synchronous transmission received control token packet interrupt flag"]
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|
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+pub struct RB_USB_IF_ISOACT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_USB_IF_ISOACT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bit 0 - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_busrst_rb_usb_if_detect (& self) -> RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_transfer (& self) -> RB_USB_IF_TRANSFER_R { RB_USB_IF_TRANSFER_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_usb_if_suspend (& self) -> RB_USB_IF_SUSPEND_R { RB_USB_IF_SUSPEND_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_hst_sof (& self) -> RB_USB_IF_HST_SOF_R { RB_USB_IF_HST_SOF_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_fifoov (& self) -> RB_USB_IF_FIFOOV_R { RB_USB_IF_FIFOOV_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - RO, Setup transaction end interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_setuoact (& self) -> RB_USB_IF_SETUOACT_R { RB_USB_IF_SETUOACT_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - RO, Synchronous transmission received control token packet interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_isoact (& self) -> RB_USB_IF_ISOACT_R { RB_USB_IF_ISOACT_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear;device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_busrst_rb_usb_if_detect (& mut self) -> RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W { RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W { w : self } } # [doc = "Bit 1 - USB transfer completion interrupt flag, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_transfer (& mut self) -> RB_USB_IF_TRANSFER_W { RB_USB_IF_TRANSFER_W { w : self } } # [doc = "Bit 2 - USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_suspend (& mut self) -> RB_USB_IF_SUSPEND_W { RB_USB_IF_SUSPEND_W { w : self } } # [doc = "Bit 3 - host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_hst_sof (& mut self) -> RB_USB_IF_HST_SOF_W { RB_USB_IF_HST_SOF_W { w : self } } # [doc = "Bit 4 - FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_fifoov (& mut self) -> RB_USB_IF_FIFOOV_W { RB_USB_IF_FIFOOV_W { w : self } } # [doc = "Bit 5 - RO, Setup transaction end interrupt flag"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_setuoact (& mut self) -> RB_USB_IF_SETUOACT_W { RB_USB_IF_SETUOACT_W { w : self } } # [doc = "Bit 6 - RO, Synchronous transmission received control token packet interrupt flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_usb_if_isoact (& mut self) -> RB_USB_IF_ISOACT_W { RB_USB_IF_ISOACT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "USB interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_fg](index.html) module"]
|
|
|
+pub struct R8_USB_INT_FG_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_FG_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_fg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_USB_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_usb_int_fg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_USB_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_USB_INT_FG to value 0"]
|
|
|
+impl crate :: Resettable for R8_USB_INT_FG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_USB_INT_ST register accessor: an alias for `Reg<R8_USB_INT_ST_SPEC>`"]
|
|
|
+pub type R8_USB_INT_ST = crate :: Reg < r8_usb_int_st :: R8_USB_INT_ST_SPEC > ; # [doc = "USB interrupt status"]
|
|
|
+pub mod r8_usb_int_st { # [doc = "Register `R8_USB_INT_ST` reader"]
|
|
|
+pub struct R (crate :: R < R8_USB_INT_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_USB_INT_ST_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_USB_INT_ST_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_USB_INT_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_HOST_RES_MASK_RB_DEV_ENDP_MASK` reader - RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received;RO, bit mask of current transfer endpoint number for USB device mode"]
|
|
|
+pub struct RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DEV_TOKEN_MASK` reader - RO, bit mask of current token PID code received for USB device mode"]
|
|
|
+pub struct RB_DEV_TOKEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DEV_TOKEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_DEV_TOKEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DEV_TOKEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ST_TOGOK` reader - RO, indicate current USB transfer toggle is OK"]
|
|
|
+pub struct RB_USB_ST_TOGOK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ST_TOGOK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ST_TOGOK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ST_TOGOK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_USB_ST_NAK` reader - RO, indicate current USB transfer is NAK received for USB device mode"]
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+pub struct RB_USB_ST_NAK_R (crate :: FieldReader < bool , bool >) ; impl RB_USB_ST_NAK_R { pub (crate) fn new (bits : bool) -> Self { RB_USB_ST_NAK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_USB_ST_NAK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:3 - RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received;RO, bit mask of current transfer endpoint number for USB device mode"]
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+# [inline (always)]
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+pub fn rb_host_res_mask_rb_dev_endp_mask (& self) -> RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R { RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bits 4:5 - RO, bit mask of current token PID code received for USB device mode"]
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+# [inline (always)]
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+pub fn rb_dev_token_mask (& self) -> RB_DEV_TOKEN_MASK_R { RB_DEV_TOKEN_MASK_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - RO, indicate current USB transfer toggle is OK"]
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+# [inline (always)]
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+pub fn rb_usb_st_togok (& self) -> RB_USB_ST_TOGOK_R { RB_USB_ST_TOGOK_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - RO, indicate current USB transfer is NAK received for USB device mode"]
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+# [inline (always)]
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+pub fn rb_usb_st_nak (& self) -> RB_USB_ST_NAK_R { RB_USB_ST_NAK_R :: new (((self . bits >> 7) & 0x01) != 0) } } # [doc = "USB interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_usb_int_st](index.html) module"]
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+pub struct R8_USB_INT_ST_SPEC ; impl crate :: RegisterSpec for R8_USB_INT_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_usb_int_st::R](R) reader structure"]
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+impl crate :: Readable for R8_USB_INT_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_USB_INT_ST to value 0"]
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+impl crate :: Resettable for R8_USB_INT_ST_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R6_USB_RX_LEN register accessor: an alias for `Reg<R6_USB_RX_LEN_SPEC>`"]
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+pub type R6_USB_RX_LEN = crate :: Reg < r6_usb_rx_len :: R6_USB_RX_LEN_SPEC > ; # [doc = "USB receiving length"]
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+pub mod r6_usb_rx_len { # [doc = "Register `R6_USB_RX_LEN` reader"]
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+pub struct R (crate :: R < R6_USB_RX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R6_USB_RX_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R6_USB_RX_LEN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R6_USB_RX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Field `USB_RX_LEN` reader - length of received bytes"]
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+pub struct USB_RX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl USB_RX_LEN_R { pub (crate) fn new (bits : u16) -> Self { USB_RX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for USB_RX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - length of received bytes"]
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+# [inline (always)]
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+pub fn usb_rx_len (& self) -> USB_RX_LEN_R { USB_RX_LEN_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "USB receiving length\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r6_usb_rx_len](index.html) module"]
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+pub struct R6_USB_RX_LEN_SPEC ; impl crate :: RegisterSpec for R6_USB_RX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r6_usb_rx_len::R](R) reader structure"]
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+impl crate :: Readable for R6_USB_RX_LEN_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R6_USB_RX_LEN to value 0"]
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+impl crate :: Resettable for R6_USB_RX_LEN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_1_MOD register accessor: an alias for `Reg<R8_UEP4_1_MOD_SPEC>`"]
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+pub type R8_UEP4_1_MOD = crate :: Reg < r8_uep4_1_mod :: R8_UEP4_1_MOD_SPEC > ; # [doc = "endpoint 1(9) 4(8,12) mode"]
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+pub mod r8_uep4_1_mod { # [doc = "Register `R8_UEP4_1_MOD` reader"]
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+pub struct R (crate :: R < R8_UEP4_1_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_1_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_1_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP4_1_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_1_MOD` writer"]
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+pub struct W (crate :: W < R8_UEP4_1_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_1_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_1_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP4_1_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP4_BUF_MOD` reader - buffer mode of USB endpoint 4(8,12)"]
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+pub struct RB_UEP4_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_BUF_MOD` writer - buffer mode of USB endpoint 4(8,12)"]
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+pub struct RB_UEP4_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP4_TX_EN` reader - enable USB endpoint 4(8,12) transmittal (IN)"]
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+pub struct RB_UEP4_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_TX_EN` writer - enable USB endpoint 4(8,12) transmittal (IN)"]
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+pub struct RB_UEP4_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP4_RX_EN` reader - enable USB endpoint 4(8,12) receiving (OUT)"]
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+pub struct RB_UEP4_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP4_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP4_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP4_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP4_RX_EN` writer - enable USB endpoint 4(8,12) receiving (OUT)"]
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+pub struct RB_UEP4_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP4_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP1_BUF_MOD` reader - buffer mode of USB endpoint 1(9)"]
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+pub struct RB_UEP1_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_BUF_MOD` writer - buffer mode of USB endpoint 1(9)"]
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+pub struct RB_UEP1_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP1_TX_EN` reader - enable USB endpoint 1(9) transmittal (IN)"]
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+pub struct RB_UEP1_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_TX_EN` writer - enable USB endpoint 1(9) transmittal (IN)"]
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+pub struct RB_UEP1_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP1_RX_EN` reader - enable USB endpoint 1(9) receiving (OUT)"]
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|
|
+pub struct RB_UEP1_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP1_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP1_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP1_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP1_RX_EN` writer - enable USB endpoint 1(9) receiving (OUT)"]
|
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|
+pub struct RB_UEP1_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP1_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 4(8,12)"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep4_buf_mod (& self) -> RB_UEP4_BUF_MOD_R { RB_UEP4_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 4(8,12) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep4_tx_en (& self) -> RB_UEP4_TX_EN_R { RB_UEP4_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 4(8,12) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep4_rx_en (& self) -> RB_UEP4_RX_EN_R { RB_UEP4_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 1(9)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_buf_mod (& self) -> RB_UEP1_BUF_MOD_R { RB_UEP1_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 1(9) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_tx_en (& self) -> RB_UEP1_TX_EN_R { RB_UEP1_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 1(9) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_rx_en (& self) -> RB_UEP1_RX_EN_R { RB_UEP1_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 4(8,12)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep4_buf_mod (& mut self) -> RB_UEP4_BUF_MOD_W { RB_UEP4_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 4(8,12) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep4_tx_en (& mut self) -> RB_UEP4_TX_EN_W { RB_UEP4_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 4(8,12) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep4_rx_en (& mut self) -> RB_UEP4_RX_EN_W { RB_UEP4_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 1(9)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_buf_mod (& mut self) -> RB_UEP1_BUF_MOD_W { RB_UEP1_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 1(9) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_tx_en (& mut self) -> RB_UEP1_TX_EN_W { RB_UEP1_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 1(9) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep1_rx_en (& mut self) -> RB_UEP1_RX_EN_W { RB_UEP1_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1(9) 4(8,12) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_1_mod](index.html) module"]
|
|
|
+pub struct R8_UEP4_1_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP4_1_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_1_mod::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP4_1_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_1_mod::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UEP4_1_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_1_MOD to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP4_1_MOD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_3_MOD_R8_UH_EP_MOD register accessor: an alias for `Reg<R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC>`"]
|
|
|
+pub type R8_UEP2_3_MOD_R8_UH_EP_MOD = crate :: Reg < r8_uep2_3_mod_r8_uh_ep_mod :: R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [doc = "endpoint 2(10) 3(11) mode and USB host endpoint mode control register"]
|
|
|
+pub mod r8_uep2_3_mod_r8_uh_ep_mod { # [doc = "Register `R8_UEP2_3_MOD_R8_UH_EP_MOD` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_3_MOD_R8_UH_EP_MOD` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP2_BUF_MOD_RB_UH_RX_EN` reader - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
|
|
|
+pub struct RB_UEP2_BUF_MOD_RB_UH_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_BUF_MOD_RB_UH_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_BUF_MOD_RB_UH_RX_EN` writer - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
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+pub struct RB_UEP2_BUF_MOD_RB_UH_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_BUF_MOD_RB_UH_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP2_TX_EN` reader - enable USB endpoint 2(10) transmittal (IN)"]
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+pub struct RB_UEP2_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_TX_EN` writer - enable USB endpoint 2(10) transmittal (IN)"]
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+pub struct RB_UEP2_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP2_RX_EN` reader - enable USB endpoint 2(10) receiving (OUT)"]
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+pub struct RB_UEP2_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP2_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP2_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP2_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP2_RX_EN` writer - enable USB endpoint 2(10) receiving (OUT)"]
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+pub struct RB_UEP2_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP2_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP3_BUF_MOD` reader - buffer mode of USB endpoint 3(11)"]
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+pub struct RB_UEP3_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_BUF_MOD` writer - buffer mode of USB endpoint 3(11)"]
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+pub struct RB_UEP3_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP3_TX_EN_RB_UH_TX_EN` reader - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
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+pub struct RB_UEP3_TX_EN_RB_UH_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_TX_EN_RB_UH_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_TX_EN_RB_UH_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_TX_EN_RB_UH_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_TX_EN_RB_UH_TX_EN` writer - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
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|
+pub struct RB_UEP3_TX_EN_RB_UH_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_TX_EN_RB_UH_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP3_RX_EN` reader - enable USB endpoint 3(11) receiving (OUT)"]
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|
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+pub struct RB_UEP3_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP3_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP3_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP3_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP3_RX_EN` writer - enable USB endpoint 3(11) receiving (OUT)"]
|
|
|
+pub struct RB_UEP3_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP3_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep2_buf_mod_rb_uh_rx_en (& self) -> RB_UEP2_BUF_MOD_RB_UH_RX_EN_R { RB_UEP2_BUF_MOD_RB_UH_RX_EN_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 2(10) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep2_tx_en (& self) -> RB_UEP2_TX_EN_R { RB_UEP2_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 2(10) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep2_rx_en (& self) -> RB_UEP2_RX_EN_R { RB_UEP2_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 3(11)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep3_buf_mod (& self) -> RB_UEP3_BUF_MOD_R { RB_UEP3_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep3_tx_en_rb_uh_tx_en (& self) -> RB_UEP3_TX_EN_RB_UH_TX_EN_R { RB_UEP3_TX_EN_RB_UH_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 3(11) receiving (OUT)"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep3_rx_en (& self) -> RB_UEP3_RX_EN_R { RB_UEP3_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 2(10) and USB host receive endpoint (IN) enable"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep2_buf_mod_rb_uh_rx_en (& mut self) -> RB_UEP2_BUF_MOD_RB_UH_RX_EN_W { RB_UEP2_BUF_MOD_RB_UH_RX_EN_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 2(10) transmittal (IN)"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_uep2_tx_en (& mut self) -> RB_UEP2_TX_EN_W { RB_UEP2_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 2(10) receiving (OUT)"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep2_rx_en (& mut self) -> RB_UEP2_RX_EN_W { RB_UEP2_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 3(11)"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep3_buf_mod (& mut self) -> RB_UEP3_BUF_MOD_W { RB_UEP3_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 3(11) transmittal (IN) and USB host send endpoint (SETUP/OUT) enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep3_tx_en_rb_uh_tx_en (& mut self) -> RB_UEP3_TX_EN_RB_UH_TX_EN_W { RB_UEP3_TX_EN_RB_UH_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 3(11) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep3_rx_en (& mut self) -> RB_UEP3_RX_EN_W { RB_UEP3_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2(10) 3(11) mode and USB host endpoint mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_3_mod_r8_uh_ep_mod](index.html) module"]
|
|
|
+pub struct R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_3_mod_r8_uh_ep_mod::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_3_mod_r8_uh_ep_mod::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_3_MOD_R8_UH_EP_MOD to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_6_MOD register accessor: an alias for `Reg<R8_UEP5_6_MOD_SPEC>`"]
|
|
|
+pub type R8_UEP5_6_MOD = crate :: Reg < r8_uep5_6_mod :: R8_UEP5_6_MOD_SPEC > ; # [doc = "endpoint 5(13) 6(14) mode"]
|
|
|
+pub mod r8_uep5_6_mod { # [doc = "Register `R8_UEP5_6_MOD` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP5_6_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_6_MOD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_6_MOD_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP5_6_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_6_MOD` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP5_6_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_6_MOD_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_6_MOD_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP5_6_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP5_BUF_MOD` reader - buffer mode of USB endpoint 5(13)"]
|
|
|
+pub struct RB_UEP5_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_BUF_MOD` writer - buffer mode of USB endpoint 5(13)"]
|
|
|
+pub struct RB_UEP5_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP5_TX_EN` reader - enable USB endpoint 5(13) transmittal (IN)"]
|
|
|
+pub struct RB_UEP5_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_TX_EN` writer - enable USB endpoint 5(13) transmittal (IN)"]
|
|
|
+pub struct RB_UEP5_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP5_RX_EN` reader - enable USB endpoint 5(13) receiving (OUT)"]
|
|
|
+pub struct RB_UEP5_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP5_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP5_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP5_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP5_RX_EN` writer - enable USB endpoint 5(13) receiving (OUT)"]
|
|
|
+pub struct RB_UEP5_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP5_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_UEP6_BUF_MOD` reader - buffer mode of USB endpoint 6(14)"]
|
|
|
+pub struct RB_UEP6_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_BUF_MOD` writer - buffer mode of USB endpoint 6(14)"]
|
|
|
+pub struct RB_UEP6_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_UEP6_TX_EN` reader - enable USB endpoint 6(14) transmittal (IN)"]
|
|
|
+pub struct RB_UEP6_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_TX_EN` writer - enable USB endpoint 6(14) transmittal (IN)"]
|
|
|
+pub struct RB_UEP6_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_UEP6_RX_EN` reader - enable USB endpoint 6(14) receiving (OUT)"]
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+pub struct RB_UEP6_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP6_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP6_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP6_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP6_RX_EN` writer - enable USB endpoint 6(14) receiving (OUT)"]
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+pub struct RB_UEP6_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP6_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 5(13)"]
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+# [inline (always)]
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+pub fn rb_uep5_buf_mod (& self) -> RB_UEP5_BUF_MOD_R { RB_UEP5_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 5(13) transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep5_tx_en (& self) -> RB_UEP5_TX_EN_R { RB_UEP5_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 5(13) receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep5_rx_en (& self) -> RB_UEP5_RX_EN_R { RB_UEP5_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - buffer mode of USB endpoint 6(14)"]
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+# [inline (always)]
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+pub fn rb_uep6_buf_mod (& self) -> RB_UEP6_BUF_MOD_R { RB_UEP6_BUF_MOD_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 6 - enable USB endpoint 6(14) transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep6_tx_en (& self) -> RB_UEP6_TX_EN_R { RB_UEP6_TX_EN_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - enable USB endpoint 6(14) receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep6_rx_en (& self) -> RB_UEP6_RX_EN_R { RB_UEP6_RX_EN_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 5(13)"]
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+# [inline (always)]
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+pub fn rb_uep5_buf_mod (& mut self) -> RB_UEP5_BUF_MOD_W { RB_UEP5_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 5(13) transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep5_tx_en (& mut self) -> RB_UEP5_TX_EN_W { RB_UEP5_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 5(13) receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep5_rx_en (& mut self) -> RB_UEP5_RX_EN_W { RB_UEP5_RX_EN_W { w : self } } # [doc = "Bit 4 - buffer mode of USB endpoint 6(14)"]
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+# [inline (always)]
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+pub fn rb_uep6_buf_mod (& mut self) -> RB_UEP6_BUF_MOD_W { RB_UEP6_BUF_MOD_W { w : self } } # [doc = "Bit 6 - enable USB endpoint 6(14) transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep6_tx_en (& mut self) -> RB_UEP6_TX_EN_W { RB_UEP6_TX_EN_W { w : self } } # [doc = "Bit 7 - enable USB endpoint 6(14) receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep6_rx_en (& mut self) -> RB_UEP6_RX_EN_W { RB_UEP6_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5(13) 6(14) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_6_mod](index.html) module"]
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+pub struct R8_UEP5_6_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP5_6_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_6_mod::R](R) reader structure"]
|
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+impl crate :: Readable for R8_UEP5_6_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_6_mod::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP5_6_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_6_MOD to value 0"]
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+impl crate :: Resettable for R8_UEP5_6_MOD_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_MOD register accessor: an alias for `Reg<R8_UEP7_MOD_SPEC>`"]
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+pub type R8_UEP7_MOD = crate :: Reg < r8_uep7_mod :: R8_UEP7_MOD_SPEC > ; # [doc = "endpoint 7(15) mode"]
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+pub mod r8_uep7_mod { # [doc = "Register `R8_UEP7_MOD` reader"]
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+pub struct R (crate :: R < R8_UEP7_MOD_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_MOD_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_MOD_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP7_MOD_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_MOD` writer"]
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+pub struct W (crate :: W < R8_UEP7_MOD_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_MOD_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_MOD_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP7_MOD_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP7_BUF_MOD` reader - buffer mode of USB endpoint 7(15)"]
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|
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+pub struct RB_UEP7_BUF_MOD_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_BUF_MOD_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_BUF_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_BUF_MOD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_BUF_MOD` writer - buffer mode of USB endpoint 7(15)"]
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+pub struct RB_UEP7_BUF_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_BUF_MOD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_UEP7_TX_EN` reader - enable USB endpoint 7(15) transmittal (IN)"]
|
|
|
+pub struct RB_UEP7_TX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_TX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_TX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_TX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_TX_EN` writer - enable USB endpoint 7(15) transmittal (IN)"]
|
|
|
+pub struct RB_UEP7_TX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_TX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP7_RX_EN` reader - enable USB endpoint 7(15) receiving (OUT)"]
|
|
|
+pub struct RB_UEP7_RX_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP7_RX_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP7_RX_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP7_RX_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP7_RX_EN` writer - enable USB endpoint 7(15) receiving (OUT)"]
|
|
|
+pub struct RB_UEP7_RX_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP7_RX_EN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - buffer mode of USB endpoint 7(15)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_buf_mod (& self) -> RB_UEP7_BUF_MOD_R { RB_UEP7_BUF_MOD_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 2 - enable USB endpoint 7(15) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_tx_en (& self) -> RB_UEP7_TX_EN_R { RB_UEP7_TX_EN_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable USB endpoint 7(15) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_rx_en (& self) -> RB_UEP7_RX_EN_R { RB_UEP7_RX_EN_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - buffer mode of USB endpoint 7(15)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_buf_mod (& mut self) -> RB_UEP7_BUF_MOD_W { RB_UEP7_BUF_MOD_W { w : self } } # [doc = "Bit 2 - enable USB endpoint 7(15) transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_tx_en (& mut self) -> RB_UEP7_TX_EN_W { RB_UEP7_TX_EN_W { w : self } } # [doc = "Bit 3 - enable USB endpoint 7(15) receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep7_rx_en (& mut self) -> RB_UEP7_RX_EN_W { RB_UEP7_RX_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7(15) mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_mod](index.html) module"]
|
|
|
+pub struct R8_UEP7_MOD_SPEC ; impl crate :: RegisterSpec for R8_UEP7_MOD_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_mod::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP7_MOD_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_mod::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UEP7_MOD_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_MOD to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP7_MOD_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP0_RT_DMA register accessor: an alias for `Reg<R32_UEP0_RT_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP0_RT_DMA = crate :: Reg < r32_uep0_rt_dma :: R32_UEP0_RT_DMA_SPEC > ; # [doc = "endpoint 0 DMA buffer address"]
|
|
|
+pub mod r32_uep0_rt_dma { # [doc = "Register `R32_UEP0_RT_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP0_RT_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP0_RT_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP0_RT_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP0_RT_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP0_RT_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP0_RT_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP0_RT_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP0_RT_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP0_RT_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_RT_DMA` reader - endpoint 0 DMA buffer address"]
|
|
|
+pub struct UEP0_RT_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP0_RT_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP0_RT_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_RT_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_RT_DMA` writer - endpoint 0 DMA buffer address"]
|
|
|
+pub struct UEP0_RT_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_RT_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 0 DMA buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_rt_dma (& self) -> UEP0_RT_DMA_R { UEP0_RT_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 0 DMA buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_rt_dma (& mut self) -> UEP0_RT_DMA_W { UEP0_RT_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep0_rt_dma](index.html) module"]
|
|
|
+pub struct R32_UEP0_RT_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP0_RT_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep0_rt_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP0_RT_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep0_rt_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP0_RT_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP0_RT_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP0_RT_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP1_RX_DMA register accessor: an alias for `Reg<R32_UEP1_RX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP1_RX_DMA = crate :: Reg < r32_uep1_rx_dma :: R32_UEP1_RX_DMA_SPEC > ; # [doc = "endpoint 1 DMA buffer address"]
|
|
|
+pub mod r32_uep1_rx_dma { # [doc = "Register `R32_UEP1_RX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP1_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP1_RX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP1_RX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP1_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP1_RX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP1_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP1_RX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP1_RX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP1_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_RX_DMA` reader - endpoint 1 DMA buffer address"]
|
|
|
+pub struct UEP1_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP1_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP1_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_RX_DMA` writer - endpoint 1 DMA buffer address"]
|
|
|
+pub struct UEP1_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 1 DMA buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep1_rx_dma (& self) -> UEP1_RX_DMA_R { UEP1_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 1 DMA buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep1_rx_dma (& mut self) -> UEP1_RX_DMA_W { UEP1_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep1_rx_dma](index.html) module"]
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+pub struct R32_UEP1_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP1_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep1_rx_dma::R](R) reader structure"]
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+impl crate :: Readable for R32_UEP1_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep1_rx_dma::W](W) writer structure"]
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+impl crate :: Writable for R32_UEP1_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP1_RX_DMA to value 0"]
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+impl crate :: Resettable for R32_UEP1_RX_DMA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP2_RX_DMA_R32_UH_RX_DMA register accessor: an alias for `Reg<R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC>`"]
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+pub type R32_UEP2_RX_DMA_R32_UH_RX_DMA = crate :: Reg < r32_uep2_rx_dma_r32_uh_rx_dma :: R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [doc = "endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
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+pub mod r32_uep2_rx_dma_r32_uh_rx_dma { # [doc = "Register `R32_UEP2_RX_DMA_R32_UH_RX_DMA` reader"]
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+pub struct R (crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP2_RX_DMA_R32_UH_RX_DMA` writer"]
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+pub struct W (crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_RX_DMA_UH_RX_DMA` reader - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
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+pub struct UEP2_RX_DMA_UH_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP2_RX_DMA_UH_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP2_RX_DMA_UH_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_RX_DMA_UH_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_RX_DMA_UH_RX_DMA` writer - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
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+pub struct UEP2_RX_DMA_UH_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_RX_DMA_UH_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
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+# [inline (always)]
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+pub fn uep2_rx_dma_uh_rx_dma (& self) -> UEP2_RX_DMA_UH_RX_DMA_R { UEP2_RX_DMA_UH_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 2 DMA buffer address _ host rx endpoint buffer start address"]
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+# [inline (always)]
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+pub fn uep2_rx_dma_uh_rx_dma (& mut self) -> UEP2_RX_DMA_UH_RX_DMA_W { UEP2_RX_DMA_UH_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 DMA buffer address _ host rx endpoint buffer start address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep2_rx_dma_r32_uh_rx_dma](index.html) module"]
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+pub struct R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep2_rx_dma_r32_uh_rx_dma::R](R) reader structure"]
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+impl crate :: Readable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep2_rx_dma_r32_uh_rx_dma::W](W) writer structure"]
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+impl crate :: Writable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP2_RX_DMA_R32_UH_RX_DMA to value 0"]
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+impl crate :: Resettable for R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP3_RX_DMA register accessor: an alias for `Reg<R32_UEP3_RX_DMA_SPEC>`"]
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+pub type R32_UEP3_RX_DMA = crate :: Reg < r32_uep3_rx_dma :: R32_UEP3_RX_DMA_SPEC > ; # [doc = "endpoint 3 DMA buffer address;host tx endpoint buffer high address"]
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+pub mod r32_uep3_rx_dma { # [doc = "Register `R32_UEP3_RX_DMA` reader"]
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+pub struct R (crate :: R < R32_UEP3_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP3_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP3_RX_DMA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_UEP3_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP3_RX_DMA` writer"]
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+pub struct W (crate :: W < R32_UEP3_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP3_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP3_RX_DMA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_UEP3_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_RX_DMA` reader - endpoint 3 DMA buffer address"]
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+pub struct UEP3_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP3_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP3_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_RX_DMA` writer - endpoint 3 DMA buffer address"]
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+pub struct UEP3_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 3 DMA buffer address"]
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+# [inline (always)]
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+pub fn uep3_rx_dma (& self) -> UEP3_RX_DMA_R { UEP3_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 3 DMA buffer address"]
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+# [inline (always)]
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+pub fn uep3_rx_dma (& mut self) -> UEP3_RX_DMA_W { UEP3_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 DMA buffer address;host tx endpoint buffer high address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep3_rx_dma](index.html) module"]
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+pub struct R32_UEP3_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP3_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep3_rx_dma::R](R) reader structure"]
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+impl crate :: Readable for R32_UEP3_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep3_rx_dma::W](W) writer structure"]
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+impl crate :: Writable for R32_UEP3_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP3_RX_DMA to value 0"]
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+impl crate :: Resettable for R32_UEP3_RX_DMA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP4_RX_DMA register accessor: an alias for `Reg<R32_UEP4_RX_DMA_SPEC>`"]
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+pub type R32_UEP4_RX_DMA = crate :: Reg < r32_uep4_rx_dma :: R32_UEP4_RX_DMA_SPEC > ; # [doc = "endpoint 4 DMA buffer address"]
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+pub mod r32_uep4_rx_dma { # [doc = "Register `R32_UEP4_RX_DMA` reader"]
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+pub struct R (crate :: R < R32_UEP4_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP4_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP4_RX_DMA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_UEP4_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP4_RX_DMA` writer"]
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+pub struct W (crate :: W < R32_UEP4_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP4_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP4_RX_DMA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_UEP4_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_RX_DMA` reader - endpoint 4 DMA buffer address"]
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+pub struct UEP4_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP4_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP4_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_RX_DMA` writer - endpoint 4 DMA buffer address"]
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+pub struct UEP4_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 4 DMA buffer address"]
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|
+# [inline (always)]
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+pub fn uep4_rx_dma (& self) -> UEP4_RX_DMA_R { UEP4_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 4 DMA buffer address"]
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|
+# [inline (always)]
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+pub fn uep4_rx_dma (& mut self) -> UEP4_RX_DMA_W { UEP4_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep4_rx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP4_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP4_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep4_rx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP4_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep4_rx_dma::W](W) writer structure"]
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|
+impl crate :: Writable for R32_UEP4_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP4_RX_DMA to value 0"]
|
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|
+impl crate :: Resettable for R32_UEP4_RX_DMA_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP5_RX_DMA register accessor: an alias for `Reg<R32_UEP5_RX_DMA_SPEC>`"]
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|
+pub type R32_UEP5_RX_DMA = crate :: Reg < r32_uep5_rx_dma :: R32_UEP5_RX_DMA_SPEC > ; # [doc = "endpoint 5 DMA buffer address"]
|
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|
+pub mod r32_uep5_rx_dma { # [doc = "Register `R32_UEP5_RX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP5_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP5_RX_DMA_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP5_RX_DMA_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_UEP5_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP5_RX_DMA` writer"]
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|
|
+pub struct W (crate :: W < R32_UEP5_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP5_RX_DMA_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP5_RX_DMA_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R32_UEP5_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_RX_DMA` reader - endpoint 5 DMA buffer address"]
|
|
|
+pub struct UEP5_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP5_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP5_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_RX_DMA` writer - endpoint 5 DMA buffer address"]
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|
|
+pub struct UEP5_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 5 DMA buffer address"]
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|
|
+# [inline (always)]
|
|
|
+pub fn uep5_rx_dma (& self) -> UEP5_RX_DMA_R { UEP5_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 5 DMA buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep5_rx_dma (& mut self) -> UEP5_RX_DMA_W { UEP5_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep5_rx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP5_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP5_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep5_rx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP5_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep5_rx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP5_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP5_RX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP5_RX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP6_RX_DMA register accessor: an alias for `Reg<R32_UEP6_RX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP6_RX_DMA = crate :: Reg < r32_uep6_rx_dma :: R32_UEP6_RX_DMA_SPEC > ; # [doc = "endpoint 6 DMA buffer address"]
|
|
|
+pub mod r32_uep6_rx_dma { # [doc = "Register `R32_UEP6_RX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP6_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP6_RX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP6_RX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP6_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP6_RX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP6_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP6_RX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP6_RX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP6_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_RX_DMA` reader - endpoint 6 DMA buffer address"]
|
|
|
+pub struct UEP6_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP6_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP6_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_RX_DMA` writer - endpoint 6 DMA buffer address"]
|
|
|
+pub struct UEP6_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
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+# [inline (always)]
|
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 6 DMA buffer address"]
|
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+# [inline (always)]
|
|
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+pub fn uep6_rx_dma (& self) -> UEP6_RX_DMA_R { UEP6_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 6 DMA buffer address"]
|
|
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+# [inline (always)]
|
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+pub fn uep6_rx_dma (& mut self) -> UEP6_RX_DMA_W { UEP6_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
|
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep6_rx_dma](index.html) module"]
|
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+pub struct R32_UEP6_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP6_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep6_rx_dma::R](R) reader structure"]
|
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+impl crate :: Readable for R32_UEP6_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep6_rx_dma::W](W) writer structure"]
|
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+impl crate :: Writable for R32_UEP6_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP6_RX_DMA to value 0"]
|
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+impl crate :: Resettable for R32_UEP6_RX_DMA_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP7_RX_DMA register accessor: an alias for `Reg<R32_UEP7_RX_DMA_SPEC>`"]
|
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+pub type R32_UEP7_RX_DMA = crate :: Reg < r32_uep7_rx_dma :: R32_UEP7_RX_DMA_SPEC > ; # [doc = "endpoint 7 DMA buffer address"]
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+pub mod r32_uep7_rx_dma { # [doc = "Register `R32_UEP7_RX_DMA` reader"]
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+pub struct R (crate :: R < R32_UEP7_RX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP7_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP7_RX_DMA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_UEP7_RX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP7_RX_DMA` writer"]
|
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+pub struct W (crate :: W < R32_UEP7_RX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP7_RX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP7_RX_DMA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_UEP7_RX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_RX_DMA` reader - endpoint 7 DMA buffer address"]
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+pub struct UEP7_RX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP7_RX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP7_RX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_RX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_RX_DMA` writer - endpoint 7 DMA buffer address"]
|
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+pub struct UEP7_RX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_RX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 7 DMA buffer address"]
|
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+# [inline (always)]
|
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+pub fn uep7_rx_dma (& self) -> UEP7_RX_DMA_R { UEP7_RX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 7 DMA buffer address"]
|
|
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+# [inline (always)]
|
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+pub fn uep7_rx_dma (& mut self) -> UEP7_RX_DMA_W { UEP7_RX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 DMA buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep7_rx_dma](index.html) module"]
|
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+pub struct R32_UEP7_RX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP7_RX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep7_rx_dma::R](R) reader structure"]
|
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+impl crate :: Readable for R32_UEP7_RX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep7_rx_dma::W](W) writer structure"]
|
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+impl crate :: Writable for R32_UEP7_RX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP7_RX_DMA to value 0"]
|
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+impl crate :: Resettable for R32_UEP7_RX_DMA_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP1_TX_DMA register accessor: an alias for `Reg<R32_UEP1_TX_DMA_SPEC>`"]
|
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+pub type R32_UEP1_TX_DMA = crate :: Reg < r32_uep1_tx_dma :: R32_UEP1_TX_DMA_SPEC > ; # [doc = "endpoint 1 DMA TX buffer address"]
|
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+pub mod r32_uep1_tx_dma { # [doc = "Register `R32_UEP1_TX_DMA` reader"]
|
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+pub struct R (crate :: R < R32_UEP1_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP1_TX_DMA_SPEC > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP1_TX_DMA_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_UEP1_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP1_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP1_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP1_TX_DMA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP1_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R32_UEP1_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_TX_DMA` reader - endpoint 1 DMA TX buffer address"]
|
|
|
+pub struct UEP1_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP1_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP1_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_TX_DMA` writer - endpoint 1 DMA TX buffer address"]
|
|
|
+pub struct UEP1_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 1 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
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|
+pub fn uep1_tx_dma (& self) -> UEP1_TX_DMA_R { UEP1_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 1 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep1_tx_dma (& mut self) -> UEP1_TX_DMA_W { UEP1_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep1_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP1_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP1_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep1_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP1_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep1_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP1_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP1_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP1_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP2_TX_DMA register accessor: an alias for `Reg<R32_UEP2_TX_DMA_SPEC>`"]
|
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|
+pub type R32_UEP2_TX_DMA = crate :: Reg < r32_uep2_tx_dma :: R32_UEP2_TX_DMA_SPEC > ; # [doc = "endpoint 2 DMA TX buffer address"]
|
|
|
+pub mod r32_uep2_tx_dma { # [doc = "Register `R32_UEP2_TX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP2_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP2_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP2_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP2_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP2_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP2_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP2_TX_DMA_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP2_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP2_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_TX_DMA` reader - endpoint 2 DMA TX buffer address"]
|
|
|
+pub struct UEP2_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP2_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP2_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_TX_DMA` writer - endpoint 2 DMA TX buffer address"]
|
|
|
+pub struct UEP2_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 2 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep2_tx_dma (& self) -> UEP2_TX_DMA_R { UEP2_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 2 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep2_tx_dma (& mut self) -> UEP2_TX_DMA_W { UEP2_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep2_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP2_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP2_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep2_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP2_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep2_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP2_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP2_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP2_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP3_TX_DMA_R32_UH_TX_DMA register accessor: an alias for `Reg<R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP3_TX_DMA_R32_UH_TX_DMA = crate :: Reg < r32_uep3_tx_dma_r32_uh_tx_dma :: R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [doc = "endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+pub mod r32_uep3_tx_dma_r32_uh_tx_dma { # [doc = "Register `R32_UEP3_TX_DMA_R32_UH_TX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP3_TX_DMA_R32_UH_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_TX_DMA_UH_TX_DMA` reader - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+pub struct UEP3_TX_DMA_UH_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP3_TX_DMA_UH_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP3_TX_DMA_UH_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_TX_DMA_UH_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_TX_DMA_UH_TX_DMA` writer - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+pub struct UEP3_TX_DMA_UH_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_TX_DMA_UH_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep3_tx_dma_uh_tx_dma (& self) -> UEP3_TX_DMA_UH_TX_DMA_R { UEP3_TX_DMA_UH_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 3 DMA TX buffer address and host tx endpoint buffer start address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep3_tx_dma_uh_tx_dma (& mut self) -> UEP3_TX_DMA_UH_TX_DMA_W { UEP3_TX_DMA_UH_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 DMA TX buffer address and host tx endpoint buffer start address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep3_tx_dma_r32_uh_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep3_tx_dma_r32_uh_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep3_tx_dma_r32_uh_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP3_TX_DMA_R32_UH_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP4_TX_DMA register accessor: an alias for `Reg<R32_UEP4_TX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP4_TX_DMA = crate :: Reg < r32_uep4_tx_dma :: R32_UEP4_TX_DMA_SPEC > ; # [doc = "endpoint 4 DMA TX buffer address"]
|
|
|
+pub mod r32_uep4_tx_dma { # [doc = "Register `R32_UEP4_TX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP4_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP4_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP4_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP4_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP4_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP4_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP4_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP4_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP4_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_TX_DMA` reader - endpoint 4 DMA TX buffer address"]
|
|
|
+pub struct UEP4_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP4_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP4_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_TX_DMA` writer - endpoint 4 DMA TX buffer address"]
|
|
|
+pub struct UEP4_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 4 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep4_tx_dma (& self) -> UEP4_TX_DMA_R { UEP4_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 4 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep4_tx_dma (& mut self) -> UEP4_TX_DMA_W { UEP4_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep4_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP4_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP4_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep4_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP4_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep4_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP4_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP4_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP4_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP5_TX_DMA register accessor: an alias for `Reg<R32_UEP5_TX_DMA_SPEC>`"]
|
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|
+pub type R32_UEP5_TX_DMA = crate :: Reg < r32_uep5_tx_dma :: R32_UEP5_TX_DMA_SPEC > ; # [doc = "endpoint 5 DMA TX buffer address"]
|
|
|
+pub mod r32_uep5_tx_dma { # [doc = "Register `R32_UEP5_TX_DMA` reader"]
|
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|
+pub struct R (crate :: R < R32_UEP5_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP5_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP5_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP5_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP5_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP5_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP5_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP5_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP5_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_TX_DMA` reader - endpoint 5 DMA TX buffer address"]
|
|
|
+pub struct UEP5_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP5_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP5_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_TX_DMA` writer - endpoint 5 DMA TX buffer address"]
|
|
|
+pub struct UEP5_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 5 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep5_tx_dma (& self) -> UEP5_TX_DMA_R { UEP5_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 5 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep5_tx_dma (& mut self) -> UEP5_TX_DMA_W { UEP5_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep5_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP5_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP5_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep5_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP5_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep5_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP5_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP5_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP5_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP6_TX_DMA register accessor: an alias for `Reg<R32_UEP6_TX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP6_TX_DMA = crate :: Reg < r32_uep6_tx_dma :: R32_UEP6_TX_DMA_SPEC > ; # [doc = "endpoint 4 DMA TX buffer address"]
|
|
|
+pub mod r32_uep6_tx_dma { # [doc = "Register `R32_UEP6_TX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP6_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP6_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP6_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP6_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP6_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP6_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP6_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP6_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP6_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_TX_DMA` reader - endpoint 6 DMA TX buffer address"]
|
|
|
+pub struct UEP6_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP6_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP6_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_TX_DMA` writer - endpoint 6 DMA TX buffer address"]
|
|
|
+pub struct UEP6_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 6 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep6_tx_dma (& self) -> UEP6_TX_DMA_R { UEP6_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 6 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep6_tx_dma (& mut self) -> UEP6_TX_DMA_W { UEP6_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep6_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP6_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP6_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep6_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP6_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep6_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP6_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP6_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP6_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_UEP7_TX_DMA register accessor: an alias for `Reg<R32_UEP7_TX_DMA_SPEC>`"]
|
|
|
+pub type R32_UEP7_TX_DMA = crate :: Reg < r32_uep7_tx_dma :: R32_UEP7_TX_DMA_SPEC > ; # [doc = "endpoint 7 DMA TX buffer address"]
|
|
|
+pub mod r32_uep7_tx_dma { # [doc = "Register `R32_UEP7_TX_DMA` reader"]
|
|
|
+pub struct R (crate :: R < R32_UEP7_TX_DMA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_UEP7_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_UEP7_TX_DMA_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_UEP7_TX_DMA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_UEP7_TX_DMA` writer"]
|
|
|
+pub struct W (crate :: W < R32_UEP7_TX_DMA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_UEP7_TX_DMA_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_UEP7_TX_DMA_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_UEP7_TX_DMA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_TX_DMA` reader - endpoint 7 DMA TX buffer address"]
|
|
|
+pub struct UEP7_TX_DMA_R (crate :: FieldReader < u32 , u32 >) ; impl UEP7_TX_DMA_R { pub (crate) fn new (bits : u32) -> Self { UEP7_TX_DMA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_TX_DMA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_TX_DMA` writer - endpoint 7 DMA TX buffer address"]
|
|
|
+pub struct UEP7_TX_DMA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_TX_DMA_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - endpoint 7 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_tx_dma (& self) -> UEP7_TX_DMA_R { UEP7_TX_DMA_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - endpoint 7 DMA TX buffer address"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_tx_dma (& mut self) -> UEP7_TX_DMA_W { UEP7_TX_DMA_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 DMA TX buffer address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_uep7_tx_dma](index.html) module"]
|
|
|
+pub struct R32_UEP7_TX_DMA_SPEC ; impl crate :: RegisterSpec for R32_UEP7_TX_DMA_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_uep7_tx_dma::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_UEP7_TX_DMA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_uep7_tx_dma::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_UEP7_TX_DMA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_UEP7_TX_DMA to value 0"]
|
|
|
+impl crate :: Resettable for R32_UEP7_TX_DMA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP0_MAX_LEN register accessor: an alias for `Reg<R16_UEP0_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP0_MAX_LEN = crate :: Reg < r16_uep0_max_len :: R16_UEP0_MAX_LEN_SPEC > ; # [doc = "endpoint 0 receive max length"]
|
|
|
+pub mod r16_uep0_max_len { # [doc = "Register `R16_UEP0_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP0_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP0_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP0_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP0_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP0_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP0_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP0_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP0_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP0_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_MAX_LEN` reader - endpoint 0 receive max length"]
|
|
|
+pub struct UEP0_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP0_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP0_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_MAX_LEN` writer - endpoint 0 receive max length"]
|
|
|
+pub struct UEP0_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 0 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_max_len (& self) -> UEP0_MAX_LEN_R { UEP0_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 0 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_max_len (& mut self) -> UEP0_MAX_LEN_W { UEP0_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep0_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP0_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP0_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep0_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP0_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep0_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP0_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP0_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP0_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP1_MAX_LEN register accessor: an alias for `Reg<R16_UEP1_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP1_MAX_LEN = crate :: Reg < r16_uep1_max_len :: R16_UEP1_MAX_LEN_SPEC > ; # [doc = "endpoint 1 receive max length"]
|
|
|
+pub mod r16_uep1_max_len { # [doc = "Register `R16_UEP1_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP1_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP1_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP1_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP1_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP1_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP1_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP1_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP1_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP1_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_MAX_LEN` reader - endpoint 1 receive max length"]
|
|
|
+pub struct UEP1_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP1_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP1_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_MAX_LEN` writer - endpoint 1 receive max length"]
|
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+pub struct UEP1_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
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+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 1 receive max length"]
|
|
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+# [inline (always)]
|
|
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+pub fn uep1_max_len (& self) -> UEP1_MAX_LEN_R { UEP1_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 1 receive max length"]
|
|
|
+# [inline (always)]
|
|
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+pub fn uep1_max_len (& mut self) -> UEP1_MAX_LEN_W { UEP1_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep1_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP1_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP1_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep1_max_len::R](R) reader structure"]
|
|
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+impl crate :: Readable for R16_UEP1_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep1_max_len::W](W) writer structure"]
|
|
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+impl crate :: Writable for R16_UEP1_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP1_MAX_LEN to value 0"]
|
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+impl crate :: Resettable for R16_UEP1_MAX_LEN_SPEC { # [inline (always)]
|
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP2_MAX_LEN_R16_UH_MAX_LEN register accessor: an alias for `Reg<R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC>`"]
|
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+pub type R16_UEP2_MAX_LEN_R16_UH_MAX_LEN = crate :: Reg < r16_uep2_max_len_r16_uh_max_len :: R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [doc = "endpoint 2 receive max length and USB host receive max packet length register"]
|
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|
+pub mod r16_uep2_max_len_r16_uh_max_len { # [doc = "Register `R16_UEP2_MAX_LEN_R16_UH_MAX_LEN` reader"]
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+pub struct R (crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP2_MAX_LEN_R16_UH_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP2_MAX_LEN_UH_MAX_LEN` reader - endpoint 2 receive max length and USB host receive max packet length register"]
|
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+pub struct UEP2_MAX_LEN_UH_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP2_MAX_LEN_UH_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP2_MAX_LEN_UH_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_MAX_LEN_UH_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_MAX_LEN_UH_MAX_LEN` writer - endpoint 2 receive max length and USB host receive max packet length register"]
|
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|
+pub struct UEP2_MAX_LEN_UH_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_MAX_LEN_UH_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 2 receive max length and USB host receive max packet length register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep2_max_len_uh_max_len (& self) -> UEP2_MAX_LEN_UH_MAX_LEN_R { UEP2_MAX_LEN_UH_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 2 receive max length and USB host receive max packet length register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep2_max_len_uh_max_len (& mut self) -> UEP2_MAX_LEN_UH_MAX_LEN_W { UEP2_MAX_LEN_UH_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 receive max length and USB host receive max packet length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep2_max_len_r16_uh_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep2_max_len_r16_uh_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep2_max_len_r16_uh_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP2_MAX_LEN_R16_UH_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP3_MAX_LEN register accessor: an alias for `Reg<R16_UEP3_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP3_MAX_LEN = crate :: Reg < r16_uep3_max_len :: R16_UEP3_MAX_LEN_SPEC > ; # [doc = "endpoint 3 receive max length"]
|
|
|
+pub mod r16_uep3_max_len { # [doc = "Register `R16_UEP3_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP3_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP3_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP3_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP3_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP3_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP3_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP3_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP3_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP3_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_MAX_LEN` reader - endpoint 3 receive max length"]
|
|
|
+pub struct UEP3_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP3_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP3_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_MAX_LEN` writer - endpoint 3 receive max length"]
|
|
|
+pub struct UEP3_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 3 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep3_max_len (& self) -> UEP3_MAX_LEN_R { UEP3_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 3 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep3_max_len (& mut self) -> UEP3_MAX_LEN_W { UEP3_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep3_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP3_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP3_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep3_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP3_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep3_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP3_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP3_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP3_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP4_MAX_LEN register accessor: an alias for `Reg<R16_UEP4_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP4_MAX_LEN = crate :: Reg < r16_uep4_max_len :: R16_UEP4_MAX_LEN_SPEC > ; # [doc = "endpoint 4 receive max length"]
|
|
|
+pub mod r16_uep4_max_len { # [doc = "Register `R16_UEP4_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP4_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP4_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP4_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP4_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP4_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP4_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP4_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP4_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP4_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_MAX_LEN` reader - endpoint 4 receive max length"]
|
|
|
+pub struct UEP4_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP4_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP4_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_MAX_LEN` writer - endpoint 4 receive max length"]
|
|
|
+pub struct UEP4_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 4 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep4_max_len (& self) -> UEP4_MAX_LEN_R { UEP4_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 4 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep4_max_len (& mut self) -> UEP4_MAX_LEN_W { UEP4_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep4_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP4_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP4_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep4_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP4_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep4_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP4_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP4_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP4_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP5_MAX_LEN register accessor: an alias for `Reg<R16_UEP5_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP5_MAX_LEN = crate :: Reg < r16_uep5_max_len :: R16_UEP5_MAX_LEN_SPEC > ; # [doc = "endpoint 5 receive max length"]
|
|
|
+pub mod r16_uep5_max_len { # [doc = "Register `R16_UEP5_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP5_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP5_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP5_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP5_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP5_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP5_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP5_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP5_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP5_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_MAX_LEN` reader - endpoint 5 receive max length"]
|
|
|
+pub struct UEP5_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP5_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP5_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_MAX_LEN` writer - endpoint 5 receive max length"]
|
|
|
+pub struct UEP5_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 5 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep5_max_len (& self) -> UEP5_MAX_LEN_R { UEP5_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 5 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep5_max_len (& mut self) -> UEP5_MAX_LEN_W { UEP5_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep5_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP5_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP5_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep5_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP5_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep5_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP5_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP5_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP5_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP6_MAX_LEN register accessor: an alias for `Reg<R16_UEP6_MAX_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP6_MAX_LEN = crate :: Reg < r16_uep6_max_len :: R16_UEP6_MAX_LEN_SPEC > ; # [doc = "endpoint 6 receive max length"]
|
|
|
+pub mod r16_uep6_max_len { # [doc = "Register `R16_UEP6_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP6_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP6_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP6_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP6_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP6_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP6_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP6_MAX_LEN_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP6_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
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+fn from (writer : crate :: W < R16_UEP6_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_MAX_LEN` reader - endpoint 6 receive max length"]
|
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+pub struct UEP6_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP6_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP6_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_MAX_LEN` writer - endpoint 6 receive max length"]
|
|
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+pub struct UEP6_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 6 receive max length"]
|
|
|
+# [inline (always)]
|
|
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+pub fn uep6_max_len (& self) -> UEP6_MAX_LEN_R { UEP6_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 6 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep6_max_len (& mut self) -> UEP6_MAX_LEN_W { UEP6_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep6_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP6_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP6_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep6_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP6_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep6_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP6_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP6_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP6_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP7_MAX_LEN register accessor: an alias for `Reg<R16_UEP7_MAX_LEN_SPEC>`"]
|
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|
+pub type R16_UEP7_MAX_LEN = crate :: Reg < r16_uep7_max_len :: R16_UEP7_MAX_LEN_SPEC > ; # [doc = "endpoint 7 receive max length"]
|
|
|
+pub mod r16_uep7_max_len { # [doc = "Register `R16_UEP7_MAX_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP7_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP7_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP7_MAX_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP7_MAX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP7_MAX_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP7_MAX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP7_MAX_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP7_MAX_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP7_MAX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_MAX_LEN` reader - endpoint 7 receive max length"]
|
|
|
+pub struct UEP7_MAX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP7_MAX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP7_MAX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_MAX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_MAX_LEN` writer - endpoint 7 receive max length"]
|
|
|
+pub struct UEP7_MAX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_MAX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 7 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_max_len (& self) -> UEP7_MAX_LEN_R { UEP7_MAX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 7 receive max length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_max_len (& mut self) -> UEP7_MAX_LEN_W { UEP7_MAX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 receive max length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep7_max_len](index.html) module"]
|
|
|
+pub struct R16_UEP7_MAX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP7_MAX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep7_max_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP7_MAX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep7_max_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP7_MAX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP7_MAX_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP7_MAX_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP0_T_LEN register accessor: an alias for `Reg<R16_UEP0_T_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP0_T_LEN = crate :: Reg < r16_uep0_t_len :: R16_UEP0_T_LEN_SPEC > ; # [doc = "endpoint 0 transmittal length"]
|
|
|
+pub mod r16_uep0_t_len { # [doc = "Register `R16_UEP0_T_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP0_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP0_T_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP0_T_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP0_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP0_T_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP0_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP0_T_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP0_T_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP0_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP0_T_LEN` reader - endpoint 0 transmittal length"]
|
|
|
+pub struct UEP0_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP0_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP0_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP0_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP0_T_LEN` writer - endpoint 0 transmittal length"]
|
|
|
+pub struct UEP0_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP0_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 0 transmittal length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_t_len (& self) -> UEP0_T_LEN_R { UEP0_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 0 transmittal length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep0_t_len (& mut self) -> UEP0_T_LEN_W { UEP0_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep0_t_len](index.html) module"]
|
|
|
+pub struct R16_UEP0_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP0_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep0_t_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP0_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep0_t_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP0_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP0_T_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP0_T_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP0_TX_CTRL register accessor: an alias for `Reg<R8_UEP0_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP0_TX_CTRL = crate :: Reg < r8_uep0_tx_ctrl :: R8_UEP0_TX_CTRL_SPEC > ; # [doc = "endpoint 0 tx control"]
|
|
|
+pub mod r8_uep0_tx_ctrl { # [doc = "Register `R8_UEP0_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP0_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP0_TX_CTRL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP0_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP0_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP0_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP0_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP0_TX_CTRL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP0_TX_CTRL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP0_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep0_tx_ctrl](index.html) module"]
|
|
|
+pub struct R8_UEP0_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP0_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep0_tx_ctrl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP0_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep0_tx_ctrl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UEP0_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP0_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP0_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP0_RX_CTRL register accessor: an alias for `Reg<R8_UEP0_RX_CTRL_SPEC>`"]
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+pub type R8_UEP0_RX_CTRL = crate :: Reg < r8_uep0_rx_ctrl :: R8_UEP0_RX_CTRL_SPEC > ; # [doc = "endpoint 0 rx control"]
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+pub mod r8_uep0_rx_ctrl { # [doc = "Register `R8_UEP0_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP0_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP0_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP0_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP0_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP0_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP0_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP0_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP0_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP0_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 0 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep0_rx_ctrl](index.html) module"]
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+pub struct R8_UEP0_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP0_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep0_rx_ctrl::R](R) reader structure"]
|
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+impl crate :: Readable for R8_UEP0_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep0_rx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP0_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP0_RX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP0_RX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP1_T_LEN register accessor: an alias for `Reg<R16_UEP1_T_LEN_SPEC>`"]
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+pub type R16_UEP1_T_LEN = crate :: Reg < r16_uep1_t_len :: R16_UEP1_T_LEN_SPEC > ; # [doc = "endpoint 1 transmittal length"]
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+pub mod r16_uep1_t_len { # [doc = "Register `R16_UEP1_T_LEN` reader"]
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+pub struct R (crate :: R < R16_UEP1_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP1_T_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP1_T_LEN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UEP1_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP1_T_LEN` writer"]
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+pub struct W (crate :: W < R16_UEP1_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP1_T_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP1_T_LEN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UEP1_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP1_T_LEN` reader - endpoint 1 transmittal length"]
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+pub struct UEP1_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP1_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP1_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP1_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP1_T_LEN` writer - endpoint 1 transmittal length"]
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+pub struct UEP1_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP1_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 1 transmittal length"]
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|
+# [inline (always)]
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|
+pub fn uep1_t_len (& self) -> UEP1_T_LEN_R { UEP1_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 1 transmittal length"]
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|
|
+# [inline (always)]
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|
+pub fn uep1_t_len (& mut self) -> UEP1_T_LEN_W { UEP1_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep1_t_len](index.html) module"]
|
|
|
+pub struct R16_UEP1_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP1_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep1_t_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP1_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep1_t_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP1_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP1_T_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP1_T_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP1_TX_CTRL register accessor: an alias for `Reg<R8_UEP1_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP1_TX_CTRL = crate :: Reg < r8_uep1_tx_ctrl :: R8_UEP1_TX_CTRL_SPEC > ; # [doc = "endpoint 1 tx control"]
|
|
|
+pub mod r8_uep1_tx_ctrl { # [doc = "Register `R8_UEP1_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP1_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP1_TX_CTRL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP1_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP1_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP1_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP1_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP1_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP1_TX_CTRL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP1_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep1_tx_ctrl](index.html) module"]
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+pub struct R8_UEP1_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP1_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep1_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP1_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep1_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP1_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP1_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP1_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP1_RX_CTRL register accessor: an alias for `Reg<R8_UEP1_RX_CTRL_SPEC>`"]
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+pub type R8_UEP1_RX_CTRL = crate :: Reg < r8_uep1_rx_ctrl :: R8_UEP1_RX_CTRL_SPEC > ; # [doc = "endpoint 1 rx control"]
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+pub mod r8_uep1_rx_ctrl { # [doc = "Register `R8_UEP1_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP1_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP1_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP1_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP1_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP1_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP1_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP1_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP1_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP1_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 1 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep1_rx_ctrl](index.html) module"]
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+pub struct R8_UEP1_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP1_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep1_rx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP1_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep1_rx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP1_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP1_RX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP1_RX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP2_T_LEN_R16_UH_EP_PID register accessor: an alias for `Reg<R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC>`"]
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+pub type R16_UEP2_T_LEN_R16_UH_EP_PID = crate :: Reg < r16_uep2_t_len_r16_uh_ep_pid :: R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [doc = "endpoint 2 transmittal length and Set usb host token register"]
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+pub mod r16_uep2_t_len_r16_uh_ep_pid { # [doc = "Register `R16_UEP2_T_LEN_R16_UH_EP_PID` reader"]
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+pub struct R (crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP2_T_LEN_R16_UH_EP_PID` writer"]
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+pub struct W (crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UH_EPNUM_MASK` reader - The endpoint number of the target of this operation"]
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+pub struct RB_UH_EPNUM_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UH_EPNUM_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UH_EPNUM_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_EPNUM_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_EPNUM_MASK` writer - The endpoint number of the target of this operation"]
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|
+pub struct RB_UH_EPNUM_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_EPNUM_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u16 & 0x0f) ; self . w } } # [doc = "Field `RB_UH_TOKEN_MASK` reader - The token PID packet identification of this USB transfer transaction"]
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+pub struct RB_UH_TOKEN_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UH_TOKEN_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UH_TOKEN_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_TOKEN_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_TOKEN_MASK` writer - The token PID packet identification of this USB transfer transaction"]
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+pub struct RB_UH_TOKEN_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_TOKEN_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0f << 4)) | ((value as u16 & 0x0f) << 4) ; self . w } } # [doc = "Field `UEP2_T_LEN` reader - endpoint 2 transmittal length"]
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|
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+pub struct UEP2_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP2_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP2_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP2_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP2_T_LEN` writer - endpoint 2 transmittal length"]
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+pub struct UEP2_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP2_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:3 - The endpoint number of the target of this operation"]
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|
+# [inline (always)]
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+pub fn rb_uh_epnum_mask (& self) -> RB_UH_EPNUM_MASK_R { RB_UH_EPNUM_MASK_R :: new ((self . bits & 0x0f) as u8) } # [doc = "Bits 4:7 - The token PID packet identification of this USB transfer transaction"]
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|
+# [inline (always)]
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|
+pub fn rb_uh_token_mask (& self) -> RB_UH_TOKEN_MASK_R { RB_UH_TOKEN_MASK_R :: new (((self . bits >> 4) & 0x0f) as u8) } # [doc = "Bits 0:15 - endpoint 2 transmittal length"]
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|
|
+# [inline (always)]
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|
+pub fn uep2_t_len (& self) -> UEP2_T_LEN_R { UEP2_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:3 - The endpoint number of the target of this operation"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uh_epnum_mask (& mut self) -> RB_UH_EPNUM_MASK_W { RB_UH_EPNUM_MASK_W { w : self } } # [doc = "Bits 4:7 - The token PID packet identification of this USB transfer transaction"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uh_token_mask (& mut self) -> RB_UH_TOKEN_MASK_W { RB_UH_TOKEN_MASK_W { w : self } } # [doc = "Bits 0:15 - endpoint 2 transmittal length"]
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|
|
+# [inline (always)]
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|
+pub fn uep2_t_len (& mut self) -> UEP2_T_LEN_W { UEP2_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 transmittal length and Set usb host token register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep2_t_len_r16_uh_ep_pid](index.html) module"]
|
|
|
+pub struct R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC ; impl crate :: RegisterSpec for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep2_t_len_r16_uh_ep_pid::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep2_t_len_r16_uh_ep_pid::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP2_T_LEN_R16_UH_EP_PID to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_TX_CTRL register accessor: an alias for `Reg<R8_UEP2_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP2_TX_CTRL = crate :: Reg < r8_uep2_tx_ctrl :: R8_UEP2_TX_CTRL_SPEC > ; # [doc = "endpoint 2 tx control"]
|
|
|
+pub mod r8_uep2_tx_ctrl { # [doc = "Register `R8_UEP2_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP2_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP2_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP2_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_TX_CTRL_SPEC >> for W { # [inline (always)]
|
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+fn from (writer : crate :: W < R8_UEP2_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
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+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
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+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_tx_ctrl](index.html) module"]
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+pub struct R8_UEP2_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP2_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP2_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP2_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP2_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP2_RX_CTRL_R8_UH_RX_CTRL register accessor: an alias for `Reg<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>`"]
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+pub type R8_UEP2_RX_CTRL_R8_UH_RX_CTRL = crate :: Reg < r8_uep2_rx_ctrl_r8_uh_rx_ctrl :: R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [doc = "endpoint 2 rx control and USb host receive endpoint control register"]
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+pub mod r8_uep2_rx_ctrl_r8_uh_rx_ctrl { # [doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
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+pub struct RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
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+pub struct RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` reader - Prepared no response and Response control bit of host receiver"]
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+pub struct RB_UEP_RRES_NO_RB_UH_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_RB_UH_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_RB_UH_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_RB_UH_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` writer - Prepared no response and Response control bit of host receiver"]
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+pub struct RB_UEP_RRES_NO_RB_UH_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_RB_UH_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
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+pub struct RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
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+pub struct RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
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+pub struct RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
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+pub struct RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_UH_RDATA_NO` reader - expect no data packet, for high speed hub in host mode"]
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+pub struct RB_UH_RDATA_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_RDATA_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_RDATA_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_RDATA_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_RDATA_NO` writer - expect no data packet, for high speed hub in host mode"]
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+pub struct RB_UH_RDATA_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_RDATA_NO_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_rres_mask_rb_uh_rres_mask (& self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
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|
+# [inline (always)]
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|
+pub fn rb_uep_rres_no_rb_uh_rres_no (& self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_R { RB_UEP_RRES_NO_RB_UH_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_r_autotog_rb_uh_r_autotog (& self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
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+# [inline (always)]
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+pub fn rb_uh_rdata_no (& self) -> RB_UH_RDATA_NO_R { RB_UH_RDATA_NO_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_rres_mask_rb_uh_rres_mask (& mut self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W { RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W { w : self } } # [doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_rres_no_rb_uh_rres_no (& mut self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_W { RB_UEP_RRES_NO_RB_UH_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
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|
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+# [inline (always)]
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|
+pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_r_autotog_rb_uh_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W { w : self } } # [doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
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+# [inline (always)]
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+pub fn rb_uh_rdata_no (& mut self) -> RB_UH_RDATA_NO_W { RB_UH_RDATA_NO_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 2 rx control and USb host receive endpoint control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_rx_ctrl_r8_uh_rx_ctrl](index.html) module"]
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+pub struct R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP2_RX_CTRL_R8_UH_RX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP3_T_LEN_R16_UH_TX_LEN register accessor: an alias for `Reg<R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC>`"]
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+pub type R16_UEP3_T_LEN_R16_UH_TX_LEN = crate :: Reg < r16_uep3_t_len_r16_uh_tx_len :: R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [doc = "endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+pub mod r16_uep3_t_len_r16_uh_tx_len { # [doc = "Register `R16_UEP3_T_LEN_R16_UH_TX_LEN` reader"]
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+pub struct R (crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP3_T_LEN_R16_UH_TX_LEN` writer"]
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+pub struct W (crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP3_T_LEN_UH_TX_LEN` reader - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+pub struct UEP3_T_LEN_UH_TX_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP3_T_LEN_UH_TX_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP3_T_LEN_UH_TX_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP3_T_LEN_UH_TX_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP3_T_LEN_UH_TX_LEN` writer - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+pub struct UEP3_T_LEN_UH_TX_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP3_T_LEN_UH_TX_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+# [inline (always)]
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+pub fn uep3_t_len_uh_tx_len (& self) -> UEP3_T_LEN_UH_TX_LEN_R { UEP3_T_LEN_UH_TX_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 3 transmittal length and host transmittal endpoint transmittal length"]
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+# [inline (always)]
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+pub fn uep3_t_len_uh_tx_len (& mut self) -> UEP3_T_LEN_UH_TX_LEN_W { UEP3_T_LEN_UH_TX_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 transmittal length and host transmittal endpoint transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep3_t_len_r16_uh_tx_len](index.html) module"]
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+pub struct R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep3_t_len_r16_uh_tx_len::R](R) reader structure"]
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+impl crate :: Readable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep3_t_len_r16_uh_tx_len::W](W) writer structure"]
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+impl crate :: Writable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP3_T_LEN_R16_UH_TX_LEN to value 0"]
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+impl crate :: Resettable for R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP3_TX_CTRL_R8_UH_TX_CTRL register accessor: an alias for `Reg<R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC>`"]
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+pub type R8_UEP3_TX_CTRL_R8_UH_TX_CTRL = crate :: Reg < r8_uep3_tx_ctrl_r8_uh_tx_ctrl :: R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [doc = "endpoint 3 tx control and host transmittal endpoint control"]
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+pub mod r8_uep3_tx_ctrl_r8_uh_tx_ctrl { # [doc = "Register `R8_UEP3_TX_CTRL_R8_UH_TX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP3_TX_CTRL_R8_UH_TX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK_RB_UH_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
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+pub struct RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK_RB_UH_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
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+pub struct RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO_RB_UH_TRES_NO` reader - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
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+pub struct RB_UEP_TRES_NO_RB_UH_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_RB_UH_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_RB_UH_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_RB_UH_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO_RB_UH_TRES_NO` writer - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
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+pub struct RB_UEP_TRES_NO_RB_UH_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_RB_UH_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
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+pub struct RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
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+pub struct RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
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+pub struct RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
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+pub struct RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_UH_TDATA_NO` reader - prepared no data packet, for high speed hub in host mode"]
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+pub struct RB_UH_TDATA_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UH_TDATA_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UH_TDATA_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UH_TDATA_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UH_TDATA_NO` writer - prepared no data packet, for high speed hub in host mode"]
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+pub struct RB_UH_TDATA_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UH_TDATA_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask_rb_uh_tres_mask (& self) -> RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no_rb_uh_tres_no (& self) -> RB_UEP_TRES_NO_RB_UH_TRES_NO_R { RB_UEP_TRES_NO_RB_UH_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask_rb_uh_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog_rb_uh_t_autotog (& self) -> RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - prepared no data packet, for high speed hub in host mode"]
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+# [inline (always)]
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+pub fn rb_uh_tdata_no (& self) -> RB_UH_TDATA_NO_R { RB_UH_TDATA_NO_R :: new (((self . bits >> 6) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN) and expected handshake response type for host transmittal (SETUP/OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask_rb_uh_tres_mask (& mut self) -> RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W { RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response and expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no_rb_uh_tres_no (& mut self) -> RB_UEP_TRES_NO_RB_UH_TRES_NO_W { RB_UEP_TRES_NO_RB_UH_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal and prepared data toggle flag of host transmittal (SETUP/OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask_rb_uh_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0 and enable automatic toggle after successful transfer completion"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog_rb_uh_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W { w : self } } # [doc = "Bit 6 - prepared no data packet, for high speed hub in host mode"]
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+# [inline (always)]
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+pub fn rb_uh_tdata_no (& mut self) -> RB_UH_TDATA_NO_W { RB_UH_TDATA_NO_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 tx control and host transmittal endpoint control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep3_tx_ctrl_r8_uh_tx_ctrl](index.html) module"]
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+pub struct R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep3_tx_ctrl_r8_uh_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep3_tx_ctrl_r8_uh_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP3_TX_CTRL_R8_UH_TX_CTRL to value 0"]
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|
+impl crate :: Resettable for R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP3_RX_CTRL register accessor: an alias for `Reg<R8_UEP3_RX_CTRL_SPEC>`"]
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|
+pub type R8_UEP3_RX_CTRL = crate :: Reg < r8_uep3_rx_ctrl :: R8_UEP3_RX_CTRL_SPEC > ; # [doc = "endpoint 3 rx control"]
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+pub mod r8_uep3_rx_ctrl { # [doc = "Register `R8_UEP3_RX_CTRL` reader"]
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|
+pub struct R (crate :: R < R8_UEP3_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP3_RX_CTRL_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP3_RX_CTRL_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R8_UEP3_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP3_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP3_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP3_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP3_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP3_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 3 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep3_rx_ctrl](index.html) module"]
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+pub struct R8_UEP3_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP3_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep3_rx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP3_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep3_rx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP3_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP3_RX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP3_RX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP4_T_LEN_R16_UH_SPLIT_DATA register accessor: an alias for `Reg<R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC>`"]
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+pub type R16_UEP4_T_LEN_R16_UH_SPLIT_DATA = crate :: Reg < r16_uep4_t_len_r16_uh_split_data :: R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [doc = "endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+pub mod r16_uep4_t_len_r16_uh_split_data { # [doc = "Register `R16_UEP4_T_LEN_R16_UH_SPLIT_DATA` reader"]
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+pub struct R (crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP4_T_LEN_R16_UH_SPLIT_DATA` writer"]
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+pub struct W (crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP4_T_LEN_UH_SPLIT_DATA` reader - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+pub struct UEP4_T_LEN_UH_SPLIT_DATA_R (crate :: FieldReader < u16 , u16 >) ; impl UEP4_T_LEN_UH_SPLIT_DATA_R { pub (crate) fn new (bits : u16) -> Self { UEP4_T_LEN_UH_SPLIT_DATA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP4_T_LEN_UH_SPLIT_DATA_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP4_T_LEN_UH_SPLIT_DATA` writer - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+pub struct UEP4_T_LEN_UH_SPLIT_DATA_W < 'a > { w : & 'a mut W , } impl < 'a > UEP4_T_LEN_UH_SPLIT_DATA_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+# [inline (always)]
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+pub fn uep4_t_len_uh_split_data (& self) -> UEP4_T_LEN_UH_SPLIT_DATA_R { UEP4_T_LEN_UH_SPLIT_DATA_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 4 transmittal length and USB host Tx SPLIT packet data"]
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+# [inline (always)]
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+pub fn uep4_t_len_uh_split_data (& mut self) -> UEP4_T_LEN_UH_SPLIT_DATA_W { UEP4_T_LEN_UH_SPLIT_DATA_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 transmittal length and USB host Tx SPLIT packet data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep4_t_len_r16_uh_split_data](index.html) module"]
|
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+pub struct R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC ; impl crate :: RegisterSpec for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep4_t_len_r16_uh_split_data::R](R) reader structure"]
|
|
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+impl crate :: Readable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep4_t_len_r16_uh_split_data::W](W) writer structure"]
|
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|
+impl crate :: Writable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP4_T_LEN_R16_UH_SPLIT_DATA to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_TX_CTRL register accessor: an alias for `Reg<R8_UEP4_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP4_TX_CTRL = crate :: Reg < r8_uep4_tx_ctrl :: R8_UEP4_TX_CTRL_SPEC > ; # [doc = "endpoint 4 tx control"]
|
|
|
+pub mod r8_uep4_tx_ctrl { # [doc = "Register `R8_UEP4_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP4_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP4_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP4_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_TX_CTRL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP4_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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|
|
+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+# [inline (always)]
|
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|
+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_tx_ctrl](index.html) module"]
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+pub struct R8_UEP4_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP4_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP4_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP4_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP4_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP4_RX_CTRL register accessor: an alias for `Reg<R8_UEP4_RX_CTRL_SPEC>`"]
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+pub type R8_UEP4_RX_CTRL = crate :: Reg < r8_uep4_rx_ctrl :: R8_UEP4_RX_CTRL_SPEC > ; # [doc = "endpoint 4 rx control"]
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+pub mod r8_uep4_rx_ctrl { # [doc = "Register `R8_UEP4_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP4_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP4_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP4_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP4_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP4_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP4_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP4_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP4_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP4_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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+# [inline (always)]
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+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 4 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep4_rx_ctrl](index.html) module"]
|
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+pub struct R8_UEP4_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP4_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep4_rx_ctrl::R](R) reader structure"]
|
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+impl crate :: Readable for R8_UEP4_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep4_rx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP4_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP4_RX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP4_RX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP5_T_LEN register accessor: an alias for `Reg<R16_UEP5_T_LEN_SPEC>`"]
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+pub type R16_UEP5_T_LEN = crate :: Reg < r16_uep5_t_len :: R16_UEP5_T_LEN_SPEC > ; # [doc = "endpoint 5 transmittal length"]
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+pub mod r16_uep5_t_len { # [doc = "Register `R16_UEP5_T_LEN` reader"]
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+pub struct R (crate :: R < R16_UEP5_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP5_T_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP5_T_LEN_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_UEP5_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP5_T_LEN` writer"]
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+pub struct W (crate :: W < R16_UEP5_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP5_T_LEN_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP5_T_LEN_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_UEP5_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP5_T_LEN` reader - endpoint 5 transmittal length"]
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+pub struct UEP5_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP5_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP5_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP5_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP5_T_LEN` writer - endpoint 5 transmittal length"]
|
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|
+pub struct UEP5_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP5_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 5 transmittal length"]
|
|
|
+# [inline (always)]
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|
+pub fn uep5_t_len (& self) -> UEP5_T_LEN_R { UEP5_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 5 transmittal length"]
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|
|
+# [inline (always)]
|
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|
+pub fn uep5_t_len (& mut self) -> UEP5_T_LEN_W { UEP5_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep5_t_len](index.html) module"]
|
|
|
+pub struct R16_UEP5_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP5_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep5_t_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP5_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep5_t_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP5_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP5_T_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP5_T_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_TX_CTRL register accessor: an alias for `Reg<R8_UEP5_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP5_TX_CTRL = crate :: Reg < r8_uep5_tx_ctrl :: R8_UEP5_TX_CTRL_SPEC > ; # [doc = "endpoint 5 tx control"]
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|
+pub mod r8_uep5_tx_ctrl { # [doc = "Register `R8_UEP5_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP5_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP5_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP5_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_TX_CTRL_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_TX_CTRL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP5_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
|
|
|
+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
|
|
|
+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_tx_ctrl](index.html) module"]
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+pub struct R8_UEP5_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP5_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP5_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP5_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP5_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP5_RX_CTRL register accessor: an alias for `Reg<R8_UEP5_RX_CTRL_SPEC>`"]
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+pub type R8_UEP5_RX_CTRL = crate :: Reg < r8_uep5_rx_ctrl :: R8_UEP5_RX_CTRL_SPEC > ; # [doc = "endpoint 5 rx control"]
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+pub mod r8_uep5_rx_ctrl { # [doc = "Register `R8_UEP5_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP5_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP5_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP5_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP5_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP5_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP5_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP5_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP5_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP5_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
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+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
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+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+# [inline (always)]
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+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
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+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
+# [inline (always)]
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+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
+# [inline (always)]
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+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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|
|
+# [inline (always)]
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+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 5 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep5_rx_ctrl](index.html) module"]
|
|
|
+pub struct R8_UEP5_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP5_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep5_rx_ctrl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP5_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep5_rx_ctrl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UEP5_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP5_RX_CTRL to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP5_RX_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP6_T_LEN register accessor: an alias for `Reg<R16_UEP6_T_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP6_T_LEN = crate :: Reg < r16_uep6_t_len :: R16_UEP6_T_LEN_SPEC > ; # [doc = "endpoint 6 transmittal length"]
|
|
|
+pub mod r16_uep6_t_len { # [doc = "Register `R16_UEP6_T_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP6_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP6_T_LEN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP6_T_LEN_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R16_UEP6_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP6_T_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP6_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP6_T_LEN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP6_T_LEN_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R16_UEP6_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP6_T_LEN` reader - endpoint 6 transmittal length"]
|
|
|
+pub struct UEP6_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP6_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP6_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP6_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP6_T_LEN` writer - endpoint 6 transmittal length"]
|
|
|
+pub struct UEP6_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP6_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 6 transmittal length"]
|
|
|
+# [inline (always)]
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|
+pub fn uep6_t_len (& self) -> UEP6_T_LEN_R { UEP6_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 6 transmittal length"]
|
|
|
+# [inline (always)]
|
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|
+pub fn uep6_t_len (& mut self) -> UEP6_T_LEN_W { UEP6_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep6_t_len](index.html) module"]
|
|
|
+pub struct R16_UEP6_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP6_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep6_t_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP6_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep6_t_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP6_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP6_T_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP6_T_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP6_TX_CTRL register accessor: an alias for `Reg<R8_UEP6_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP6_TX_CTRL = crate :: Reg < r8_uep6_tx_ctrl :: R8_UEP6_TX_CTRL_SPEC > ; # [doc = "endpoint 6 tx control"]
|
|
|
+pub mod r8_uep6_tx_ctrl { # [doc = "Register `R8_UEP6_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP6_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP6_TX_CTRL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP6_TX_CTRL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_UEP6_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP6_TX_CTRL` writer"]
|
|
|
+pub struct W (crate :: W < R8_UEP6_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP6_TX_CTRL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP6_TX_CTRL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_UEP6_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
|
|
+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
|
|
|
+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
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+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
|
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
|
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
|
|
|
+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
|
|
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+# [inline (always)]
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|
+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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|
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep6_tx_ctrl](index.html) module"]
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+pub struct R8_UEP6_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP6_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep6_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP6_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep6_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP6_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP6_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP6_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP6_RX_CTRL register accessor: an alias for `Reg<R8_UEP6_RX_CTRL_SPEC>`"]
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+pub type R8_UEP6_RX_CTRL = crate :: Reg < r8_uep6_rx_ctrl :: R8_UEP6_RX_CTRL_SPEC > ; # [doc = "endpoint 6 rx control"]
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+pub mod r8_uep6_rx_ctrl { # [doc = "Register `R8_UEP6_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP6_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP6_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP6_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP6_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP6_RX_CTRL` writer"]
|
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|
+pub struct W (crate :: W < R8_UEP6_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP6_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP6_RX_CTRL_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R8_UEP6_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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|
+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
|
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|
+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
|
|
|
+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
|
|
|
+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 6 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep6_rx_ctrl](index.html) module"]
|
|
|
+pub struct R8_UEP6_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP6_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep6_rx_ctrl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_UEP6_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep6_rx_ctrl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_UEP6_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP6_RX_CTRL to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP6_RX_CTRL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_UEP7_T_LEN register accessor: an alias for `Reg<R16_UEP7_T_LEN_SPEC>`"]
|
|
|
+pub type R16_UEP7_T_LEN = crate :: Reg < r16_uep7_t_len :: R16_UEP7_T_LEN_SPEC > ; # [doc = "endpoint 7 transmittal length"]
|
|
|
+pub mod r16_uep7_t_len { # [doc = "Register `R16_UEP7_T_LEN` reader"]
|
|
|
+pub struct R (crate :: R < R16_UEP7_T_LEN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_UEP7_T_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_UEP7_T_LEN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_UEP7_T_LEN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_UEP7_T_LEN` writer"]
|
|
|
+pub struct W (crate :: W < R16_UEP7_T_LEN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_UEP7_T_LEN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_UEP7_T_LEN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_UEP7_T_LEN_SPEC >) -> Self { W (writer) } } # [doc = "Field `UEP7_T_LEN` reader - endpoint 7 transmittal length"]
|
|
|
+pub struct UEP7_T_LEN_R (crate :: FieldReader < u16 , u16 >) ; impl UEP7_T_LEN_R { pub (crate) fn new (bits : u16) -> Self { UEP7_T_LEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for UEP7_T_LEN_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `UEP7_T_LEN` writer - endpoint 7 transmittal length"]
|
|
|
+pub struct UEP7_T_LEN_W < 'a > { w : & 'a mut W , } impl < 'a > UEP7_T_LEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - endpoint 7 transmittal length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_t_len (& self) -> UEP7_T_LEN_R { UEP7_T_LEN_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - endpoint 7 transmittal length"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn uep7_t_len (& mut self) -> UEP7_T_LEN_W { UEP7_T_LEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 transmittal length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_uep7_t_len](index.html) module"]
|
|
|
+pub struct R16_UEP7_T_LEN_SPEC ; impl crate :: RegisterSpec for R16_UEP7_T_LEN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_uep7_t_len::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_UEP7_T_LEN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_uep7_t_len::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_UEP7_T_LEN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_UEP7_T_LEN to value 0"]
|
|
|
+impl crate :: Resettable for R16_UEP7_T_LEN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_TX_CTRL register accessor: an alias for `Reg<R8_UEP7_TX_CTRL_SPEC>`"]
|
|
|
+pub type R8_UEP7_TX_CTRL = crate :: Reg < r8_uep7_tx_ctrl :: R8_UEP7_TX_CTRL_SPEC > ; # [doc = "endpoint 7 tx control"]
|
|
|
+pub mod r8_uep7_tx_ctrl { # [doc = "Register `R8_UEP7_TX_CTRL` reader"]
|
|
|
+pub struct R (crate :: R < R8_UEP7_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_TX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_TX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP7_TX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_TX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP7_TX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_TX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_TX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP7_TX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_TRES_MASK` reader - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+pub struct RB_UEP_TRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_TRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_TRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_MASK` writer - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+pub struct RB_UEP_TRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_TRES_NO` reader - expected no response"]
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+pub struct RB_UEP_TRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_TRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_TRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_TRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_TRES_NO` writer - expected no response"]
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+pub struct RB_UEP_TRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_TRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_T_TOG_MASK` reader - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_T_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_T_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_TOG_MASK` writer - prepared data toggle flag of USB endpoint X transmittal"]
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+pub struct RB_UEP_T_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_T_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_T_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_T_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_T_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_T_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint 0"]
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+pub struct RB_UEP_T_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_T_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& self) -> RB_UEP_TRES_MASK_R { RB_UEP_TRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& self) -> RB_UEP_TRES_NO_R { RB_UEP_TRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& self) -> RB_UEP_T_TOG_MASK_R { RB_UEP_T_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& self) -> RB_UEP_T_AUTOTOG_R { RB_UEP_T_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X transmittal (IN)"]
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+# [inline (always)]
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+pub fn rb_uep_tres_mask (& mut self) -> RB_UEP_TRES_MASK_W { RB_UEP_TRES_MASK_W { w : self } } # [doc = "Bit 2 - expected no response"]
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+# [inline (always)]
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+pub fn rb_uep_tres_no (& mut self) -> RB_UEP_TRES_NO_W { RB_UEP_TRES_NO_W { w : self } } # [doc = "Bits 3:4 - prepared data toggle flag of USB endpoint X transmittal"]
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+# [inline (always)]
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+pub fn rb_uep_t_tog_mask (& mut self) -> RB_UEP_T_TOG_MASK_W { RB_UEP_T_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint 0"]
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+# [inline (always)]
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+pub fn rb_uep_t_autotog (& mut self) -> RB_UEP_T_AUTOTOG_W { RB_UEP_T_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 tx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_tx_ctrl](index.html) module"]
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+pub struct R8_UEP7_TX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP7_TX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_tx_ctrl::R](R) reader structure"]
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+impl crate :: Readable for R8_UEP7_TX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_tx_ctrl::W](W) writer structure"]
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+impl crate :: Writable for R8_UEP7_TX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_TX_CTRL to value 0"]
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+impl crate :: Resettable for R8_UEP7_TX_CTRL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_UEP7_RX_CTRL register accessor: an alias for `Reg<R8_UEP7_RX_CTRL_SPEC>`"]
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+pub type R8_UEP7_RX_CTRL = crate :: Reg < r8_uep7_rx_ctrl :: R8_UEP7_RX_CTRL_SPEC > ; # [doc = "endpoint 7 rx control"]
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+pub mod r8_uep7_rx_ctrl { # [doc = "Register `R8_UEP7_RX_CTRL` reader"]
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+pub struct R (crate :: R < R8_UEP7_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_UEP7_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_UEP7_RX_CTRL_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_UEP7_RX_CTRL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_UEP7_RX_CTRL` writer"]
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+pub struct W (crate :: W < R8_UEP7_RX_CTRL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_UEP7_RX_CTRL_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_UEP7_RX_CTRL_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_UEP7_RX_CTRL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_UEP_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_RRES_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_RRES_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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+pub struct RB_UEP_RRES_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_UEP_RRES_NO` reader - prepared no response"]
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+pub struct RB_UEP_RRES_NO_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_RRES_NO_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_RRES_NO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_RRES_NO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_RRES_NO` writer - prepared no response"]
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+pub struct RB_UEP_RRES_NO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_RRES_NO_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_UEP_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving"]
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|
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+pub struct RB_UEP_R_TOG_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_UEP_R_TOG_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_UEP_R_TOG_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_TOG_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving"]
|
|
|
+pub struct RB_UEP_R_TOG_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_TOG_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 3)) | ((value as u8 & 0x03) << 3) ; self . w } } # [doc = "Field `RB_UEP_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+pub struct RB_UEP_R_AUTOTOG_R (crate :: FieldReader < bool , bool >) ; impl RB_UEP_R_AUTOTOG_R { pub (crate) fn new (bits : bool) -> Self { RB_UEP_R_AUTOTOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_UEP_R_AUTOTOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_UEP_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint"]
|
|
|
+pub struct RB_UEP_R_AUTOTOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_UEP_R_AUTOTOG_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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|
|
+# [inline (always)]
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|
+pub fn rb_uep_rres_mask (& self) -> RB_UEP_RRES_MASK_R { RB_UEP_RRES_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - prepared no response"]
|
|
|
+# [inline (always)]
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+pub fn rb_uep_rres_no (& self) -> RB_UEP_RRES_NO_R { RB_UEP_RRES_NO_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_r_tog_mask (& self) -> RB_UEP_R_TOG_MASK_R { RB_UEP_R_TOG_MASK_R :: new (((self . bits >> 3) & 0x03) as u8) } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_r_autotog (& self) -> RB_UEP_R_AUTOTOG_R { RB_UEP_R_AUTOTOG_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT)"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_rres_mask (& mut self) -> RB_UEP_RRES_MASK_W { RB_UEP_RRES_MASK_W { w : self } } # [doc = "Bit 2 - prepared no response"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_rres_no (& mut self) -> RB_UEP_RRES_NO_W { RB_UEP_RRES_NO_W { w : self } } # [doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_r_tog_mask (& mut self) -> RB_UEP_R_TOG_MASK_W { RB_UEP_R_TOG_MASK_W { w : self } } # [doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_uep_r_autotog (& mut self) -> RB_UEP_R_AUTOTOG_W { RB_UEP_R_AUTOTOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "endpoint 7 rx control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep7_rx_ctrl](index.html) module"]
|
|
|
+pub struct R8_UEP7_RX_CTRL_SPEC ; impl crate :: RegisterSpec for R8_UEP7_RX_CTRL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_uep7_rx_ctrl::R](R) reader structure"]
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|
|
+impl crate :: Readable for R8_UEP7_RX_CTRL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_uep7_rx_ctrl::W](W) writer structure"]
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|
|
+impl crate :: Writable for R8_UEP7_RX_CTRL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_UEP7_RX_CTRL to value 0"]
|
|
|
+impl crate :: Resettable for R8_UEP7_RX_CTRL_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "ETH register (Please refer to subprogram library)"]
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|
|
+pub struct ETH { _marker : PhantomData < * const () > } unsafe impl Send for ETH { } impl ETH { # [doc = r"Pointer to the register block"]
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|
+pub const PTR : * const eth :: RegisterBlock = 0x4000_c000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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|
|
+pub const fn ptr () -> * const eth :: RegisterBlock { Self :: PTR } } impl Deref for ETH { type Target = eth :: RegisterBlock ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for ETH { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("ETH") . finish () } } # [doc = "ETH register (Please refer to subprogram library)"]
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|
+pub mod eth { # [doc = r"Register block"]
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|
|
+# [repr (C)]
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|
|
+pub struct RegisterBlock { # [doc = "0x00 - MAC Frame Configure Register"]
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|
+pub r32_eth_maccr : crate :: Reg < r32_eth_maccr :: R32_ETH_MACCR_SPEC > , # [doc = "0x04 - MAC Frame Filter Configure Register"]
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|
+pub r32_eth_macffr : crate :: Reg < r32_eth_macffr :: R32_ETH_MACFFR_SPEC > , # [doc = "0x08 - MAC Hash Table High Register"]
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|
+pub r32_eth_machthr : crate :: Reg < r32_eth_machthr :: R32_ETH_MACHTHR_SPEC > , # [doc = "0x0c - MAC Hash Table Low Register"]
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|
+pub r32_eth_machtlr : crate :: Reg < r32_eth_machtlr :: R32_ETH_MACHTLR_SPEC > , # [doc = "0x10 - MAC MII Address Register"]
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|
+pub r32_eth_macmiiar : crate :: Reg < r32_eth_macmiiar :: R32_ETH_MACMIIAR_SPEC > , # [doc = "0x14 - MAC MII Data Register"]
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|
|
+pub r32_eth_macmiidr : crate :: Reg < r32_eth_macmiidr :: R32_ETH_MACMIIDR_SPEC > , # [doc = "0x18 - MAC Flow-Control Register"]
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|
|
+pub r32_eth_macfcr : crate :: Reg < r32_eth_macfcr :: R32_ETH_MACFCR_SPEC > , # [doc = "0x1c - MAC VLAN Tag Register"]
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|
+pub r32_eth_macvlantr : crate :: Reg < r32_eth_macvlantr :: R32_ETH_MACVLANTR_SPEC > , _reserved8 : [u8 ; 0x08]
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|
+, # [doc = "0x28 - MAC Remote Wake-Up Frame Filter Register"]
|
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+pub r32_eth_macrwuffr : crate :: Reg < r32_eth_macrwuffr :: R32_ETH_MACRWUFFR_SPEC > , # [doc = "0x2c - MAC PMT Control and Reset Register"]
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+pub r32_eth_macpmtcsr : crate :: Reg < r32_eth_macpmtcsr :: R32_ETH_MACPMTCSR_SPEC > , _reserved10 : [u8 ; 0x08]
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+, # [doc = "0x38 - MAC Interrupt Status Register"]
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+pub r32_eth_macsr : crate :: Reg < r32_eth_macsr :: R32_ETH_MACSR_SPEC > , # [doc = "0x3c - MAC Interrupt Mask Register"]
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+pub r32_eth_macimr : crate :: Reg < r32_eth_macimr :: R32_ETH_MACIMR_SPEC > , # [doc = "0x40 - MAC Address 0 High Register"]
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+pub r32_eth_maca0hr : crate :: Reg < r32_eth_maca0hr :: R32_ETH_MACA0HR_SPEC > , # [doc = "0x44 - MAC Address 0 Low Register"]
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+pub r32_eth_maca0lr : crate :: Reg < r32_eth_maca0lr :: R32_ETH_MACA0LR_SPEC > , # [doc = "0x48 - MAC Address 1 High Register"]
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+pub r32_eth_maca1hr : crate :: Reg < r32_eth_maca1hr :: R32_ETH_MACA1HR_SPEC > , # [doc = "0x4c - MAC Address 1 Low Register"]
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+pub r32_eth_maca1lr : crate :: Reg < r32_eth_maca1lr :: R32_ETH_MACA1LR_SPEC > , # [doc = "0x50 - MAC Address 2 High Register"]
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+pub r32_eth_maca2hr : crate :: Reg < r32_eth_maca2hr :: R32_ETH_MACA2HR_SPEC > , # [doc = "0x54 - MAC Address 2 Low Register"]
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+pub r32_eth_maca2lr : crate :: Reg < r32_eth_maca2lr :: R32_ETH_MACA2LR_SPEC > , # [doc = "0x58 - MAC Address 3 High Register"]
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+pub r32_eth_maca3hr : crate :: Reg < r32_eth_maca3hr :: R32_ETH_MACA3HR_SPEC > , # [doc = "0x5c - MAC Address 3 Low Register"]
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+pub r32_eth_maca3lr : crate :: Reg < r32_eth_maca3lr :: R32_ETH_MACA3LR_SPEC > , _reserved20 : [u8 ; 0xa0]
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+, # [doc = "0x100 - MMC Control Register"]
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+pub r32_eth_mmccr : crate :: Reg < r32_eth_mmccr :: R32_ETH_MMCCR_SPEC > , # [doc = "0x104 - MMC RX Interrupt Register"]
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+pub r32_eth_mmcrir : crate :: Reg < r32_eth_mmcrir :: R32_ETH_MMCRIR_SPEC > , # [doc = "0x108 - MMC TX Interrupt Register"]
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+pub r32_eth_mmctir : crate :: Reg < r32_eth_mmctir :: R32_ETH_MMCTIR_SPEC > , # [doc = "0x10c - MMC RX Interrupt Mask Register"]
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+pub r32_eth_mmcrimr : crate :: Reg < r32_eth_mmcrimr :: R32_ETH_MMCRIMR_SPEC > , _reserved24 : [u8 ; 0x34]
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+, # [doc = "0x144 - MMC TX Interrupt Mask Register"]
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+pub r32_eth_mmctimr : crate :: Reg < r32_eth_mmctimr :: R32_ETH_MMCTIMR_SPEC > , _reserved25 : [u8 ; 0x04]
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+, # [doc = "0x14c - MMC Transmit Good Frame After Single Conflict Counter Register"]
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+pub r32_eth_mmctgfsccr : crate :: Reg < r32_eth_mmctgfsccr :: R32_ETH_MMCTGFSCCR_SPEC > , # [doc = "0x150 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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+pub r32_eth_mmctgfmsccr : crate :: Reg < r32_eth_mmctgfmsccr :: R32_ETH_MMCTGFMSCCR_SPEC > , _reserved27 : [u8 ; 0x14]
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+, # [doc = "0x168 - MMC Transmit Good Frame Counter Register"]
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+pub r32_eth_mmctgfcr : crate :: Reg < r32_eth_mmctgfcr :: R32_ETH_MMCTGFCR_SPEC > , _reserved28 : [u8 ; 0x28]
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+, # [doc = "0x194 - MMC RX Frame CRC Error Counter Register"]
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+pub r32_eth_mmcrfcecr : crate :: Reg < r32_eth_mmcrfcecr :: R32_ETH_MMCRFCECR_SPEC > , # [doc = "0x198 - MMC RX Frame Alignment Error Counter Register"]
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+pub r32_eth_mmcrfaecr : crate :: Reg < r32_eth_mmcrfaecr :: R32_ETH_MMCRFAECR_SPEC > , _reserved30 : [u8 ; 0x28]
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+, # [doc = "0x1c4 - MMC RX Good Unicast Frame Counter Register"]
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+pub r32_eth_mmcrgufcr : crate :: Reg < r32_eth_mmcrgufcr :: R32_ETH_MMCRGUFCR_SPEC > , _reserved31 : [u8 ; 0x0538]
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+, # [doc = "0x700 - PTP Time Stamp Control Register"]
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+pub r32_eth_ptptscr : crate :: Reg < r32_eth_ptptscr :: R32_ETH_PTPTSCR_SPEC > , # [doc = "0x704 - PTP Sub Second Increment Register"]
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+pub r32_eth_ptpssir : crate :: Reg < r32_eth_ptpssir :: R32_ETH_PTPSSIR_SPEC > , # [doc = "0x708 - PTP Time Stamp High Register"]
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+pub r32_eth_ptptshr : crate :: Reg < r32_eth_ptptshr :: R32_ETH_PTPTSHR_SPEC > , # [doc = "0x70c - PTP Time Stamp Low Register"]
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+pub r32_eth_ptptslr : crate :: Reg < r32_eth_ptptslr :: R32_ETH_PTPTSLR_SPEC > , # [doc = "0x710 - PTP Time Stamp High Update Register"]
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+pub r32_eth_ptptshur : crate :: Reg < r32_eth_ptptshur :: R32_ETH_PTPTSHUR_SPEC > , # [doc = "0x714 - PTP Time Stamp Low Update Register"]
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+pub r32_eth_ptptslur : crate :: Reg < r32_eth_ptptslur :: R32_ETH_PTPTSLUR_SPEC > , # [doc = "0x718 - PTP Time Stamp Accumulating Register"]
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+pub r32_eth_ptptsar : crate :: Reg < r32_eth_ptptsar :: R32_ETH_PTPTSAR_SPEC > , # [doc = "0x71c - PTP Target Time High Register"]
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+pub r32_eth_ptptthr : crate :: Reg < r32_eth_ptptthr :: R32_ETH_PTPTTHR_SPEC > , # [doc = "0x720 - PTP Target Time Low Register"]
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+pub r32_eth_ptpttlr : crate :: Reg < r32_eth_ptpttlr :: R32_ETH_PTPTTLR_SPEC > , # [doc = "0x724 - PTP Time Stamp Status Register"]
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+pub r32_eth_ptptssr : crate :: Reg < r32_eth_ptptssr :: R32_ETH_PTPTSSR_SPEC > , _reserved41 : [u8 ; 0x08d8]
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+, # [doc = "0x1000 - DMA Bus Mode Register"]
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+pub r32_eth_dmabmr : crate :: Reg < r32_eth_dmabmr :: R32_ETH_DMABMR_SPEC > , # [doc = "0x1004 - DMA TX Poll Demand Register"]
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+pub r32_eth_dmatpdr : crate :: Reg < r32_eth_dmatpdr :: R32_ETH_DMATPDR_SPEC > , # [doc = "0x1008 - DMA RX Poll Demand Register"]
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+pub r32_eth_dmarpdr : crate :: Reg < r32_eth_dmarpdr :: R32_ETH_DMARPDR_SPEC > , # [doc = "0x100c - DMA RX Description List Address Register"]
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+pub r32_eth_dmardlar : crate :: Reg < r32_eth_dmardlar :: R32_ETH_DMARDLAR_SPEC > , # [doc = "0x1010 - DMA TX Description List Address Register"]
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+pub r32_eth_dmatdlar : crate :: Reg < r32_eth_dmatdlar :: R32_ETH_DMATDLAR_SPEC > , # [doc = "0x1014 - DMA Status Register"]
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+pub r32_eth_dmasr : crate :: Reg < r32_eth_dmasr :: R32_ETH_DMASR_SPEC > , # [doc = "0x1018 - DMA Operate Mode Register"]
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+pub r32_eth_dmaomr : crate :: Reg < r32_eth_dmaomr :: R32_ETH_DMAOMR_SPEC > , # [doc = "0x101c - DMA Interrupt Enable Register"]
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+pub r32_eth_dmaier : crate :: Reg < r32_eth_dmaier :: R32_ETH_DMAIER_SPEC > , # [doc = "0x1020 - DMA Missing Frame and Buffer Overflow Counter Register"]
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+pub r32_eth_dmamfbocr : crate :: Reg < r32_eth_dmamfbocr :: R32_ETH_DMAMFBOCR_SPEC > , # [doc = "0x1024 - DMA RX Status Watchdog Timer Register"]
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+pub r32_eth_dmarswtr : crate :: Reg < r32_eth_dmarswtr :: R32_ETH_DMARSWTR_SPEC > , _reserved51 : [u8 ; 0x20]
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+, # [doc = "0x1048 - DMA Current Host TX Description Register"]
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+pub r32_eth_dmachtdr : crate :: Reg < r32_eth_dmachtdr :: R32_ETH_DMACHTDR_SPEC > , # [doc = "0x104c - DMA Current Host RX Description Register"]
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+pub r32_eth_dmachrdr : crate :: Reg < r32_eth_dmachrdr :: R32_ETH_DMACHRDR_SPEC > , # [doc = "0x1050 - DMA Current Host TX Buffer Address Register"]
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+pub r32_eth_dmachtbar : crate :: Reg < r32_eth_dmachtbar :: R32_ETH_DMACHTBAR_SPEC > , # [doc = "0x1054 - DMA Current Host RX Buffer Address Register"]
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+pub r32_eth_dmachrbar : crate :: Reg < r32_eth_dmachrbar :: R32_ETH_DMACHRBAR_SPEC > , } # [doc = "R32_ETH_MACCR register accessor: an alias for `Reg<R32_ETH_MACCR_SPEC>`"]
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+pub type R32_ETH_MACCR = crate :: Reg < r32_eth_maccr :: R32_ETH_MACCR_SPEC > ; # [doc = "MAC Frame Configure Register"]
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+pub mod r32_eth_maccr { # [doc = "Register `R32_ETH_MACCR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACCR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACCR` reader - MAC Frame Configure Register"]
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+pub struct R32_ETH_MACCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACCR` writer - MAC Frame Configure Register"]
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+pub struct R32_ETH_MACCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Frame Configure Register"]
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+# [inline (always)]
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+pub fn r32_eth_maccr (& self) -> R32_ETH_MACCR_R { R32_ETH_MACCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Frame Configure Register"]
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+# [inline (always)]
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+pub fn r32_eth_maccr (& mut self) -> R32_ETH_MACCR_W { R32_ETH_MACCR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Frame Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maccr](index.html) module"]
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+pub struct R32_ETH_MACCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maccr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MACCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maccr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MACCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACCR to value 0"]
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+impl crate :: Resettable for R32_ETH_MACCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACFFR register accessor: an alias for `Reg<R32_ETH_MACFFR_SPEC>`"]
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+pub type R32_ETH_MACFFR = crate :: Reg < r32_eth_macffr :: R32_ETH_MACFFR_SPEC > ; # [doc = "MAC Frame Filter Configure Register"]
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+pub mod r32_eth_macffr { # [doc = "Register `R32_ETH_MACFFR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACFFR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACFFR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACFFR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACFFR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACFFR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACFFR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACFFR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACFFR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACFFR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACFFR` reader - MAC Frame Filter Configure Register"]
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+pub struct R32_ETH_MACFFR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACFFR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACFFR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACFFR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACFFR` writer - MAC Frame Filter Configure Register"]
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+pub struct R32_ETH_MACFFR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACFFR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Frame Filter Configure Register"]
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+# [inline (always)]
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+pub fn r32_eth_macffr (& self) -> R32_ETH_MACFFR_R { R32_ETH_MACFFR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Frame Filter Configure Register"]
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+# [inline (always)]
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+pub fn r32_eth_macffr (& mut self) -> R32_ETH_MACFFR_W { R32_ETH_MACFFR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Frame Filter Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macffr](index.html) module"]
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+pub struct R32_ETH_MACFFR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACFFR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macffr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MACFFR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macffr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MACFFR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACFFR to value 0"]
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+impl crate :: Resettable for R32_ETH_MACFFR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACHTHR register accessor: an alias for `Reg<R32_ETH_MACHTHR_SPEC>`"]
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+pub type R32_ETH_MACHTHR = crate :: Reg < r32_eth_machthr :: R32_ETH_MACHTHR_SPEC > ; # [doc = "MAC Hash Table High Register"]
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+pub mod r32_eth_machthr { # [doc = "Register `R32_ETH_MACHTHR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACHTHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACHTHR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACHTHR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACHTHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACHTHR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACHTHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACHTHR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACHTHR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACHTHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACHTHR` reader - MAC Hash Table High Register"]
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+pub struct R32_ETH_MACHTHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACHTHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACHTHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACHTHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACHTHR` writer - MAC Hash Table High Register"]
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+pub struct R32_ETH_MACHTHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACHTHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Hash Table High Register"]
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+# [inline (always)]
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+pub fn r32_eth_machthr (& self) -> R32_ETH_MACHTHR_R { R32_ETH_MACHTHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Hash Table High Register"]
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+# [inline (always)]
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+pub fn r32_eth_machthr (& mut self) -> R32_ETH_MACHTHR_W { R32_ETH_MACHTHR_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Hash Table High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_machthr](index.html) module"]
|
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+pub struct R32_ETH_MACHTHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACHTHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_machthr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACHTHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_machthr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_MACHTHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACHTHR to value 0"]
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+impl crate :: Resettable for R32_ETH_MACHTHR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACHTLR register accessor: an alias for `Reg<R32_ETH_MACHTLR_SPEC>`"]
|
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|
+pub type R32_ETH_MACHTLR = crate :: Reg < r32_eth_machtlr :: R32_ETH_MACHTLR_SPEC > ; # [doc = "MAC Hash Table Low Register"]
|
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+pub mod r32_eth_machtlr { # [doc = "Register `R32_ETH_MACHTLR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACHTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACHTLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACHTLR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACHTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACHTLR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACHTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACHTLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACHTLR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACHTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACHTLR` reader - MAC Hash Table Low Register"]
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+pub struct R32_ETH_MACHTLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACHTLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACHTLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACHTLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACHTLR` writer - MAC Hash Table Low Register"]
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+pub struct R32_ETH_MACHTLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACHTLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Hash Table Low Register"]
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+# [inline (always)]
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+pub fn r32_eth_machtlr (& self) -> R32_ETH_MACHTLR_R { R32_ETH_MACHTLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Hash Table Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_machtlr (& mut self) -> R32_ETH_MACHTLR_W { R32_ETH_MACHTLR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Hash Table Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_machtlr](index.html) module"]
|
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+pub struct R32_ETH_MACHTLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACHTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_machtlr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MACHTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_machtlr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MACHTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACHTLR to value 0"]
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+impl crate :: Resettable for R32_ETH_MACHTLR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACMIIAR register accessor: an alias for `Reg<R32_ETH_MACMIIAR_SPEC>`"]
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+pub type R32_ETH_MACMIIAR = crate :: Reg < r32_eth_macmiiar :: R32_ETH_MACMIIAR_SPEC > ; # [doc = "MAC MII Address Register"]
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+pub mod r32_eth_macmiiar { # [doc = "Register `R32_ETH_MACMIIAR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACMIIAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACMIIAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACMIIAR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACMIIAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACMIIAR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACMIIAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACMIIAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACMIIAR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACMIIAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACMIIAR` reader - MAC MII Address Register"]
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+pub struct R32_ETH_MACMIIAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACMIIAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACMIIAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACMIIAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACMIIAR` writer - MAC MII Address Register"]
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+pub struct R32_ETH_MACMIIAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACMIIAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC MII Address Register"]
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+# [inline (always)]
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+pub fn r32_eth_macmiiar (& self) -> R32_ETH_MACMIIAR_R { R32_ETH_MACMIIAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC MII Address Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_macmiiar (& mut self) -> R32_ETH_MACMIIAR_W { R32_ETH_MACMIIAR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC MII Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macmiiar](index.html) module"]
|
|
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+pub struct R32_ETH_MACMIIAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACMIIAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macmiiar::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACMIIAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macmiiar::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_MACMIIAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACMIIAR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACMIIAR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACMIIDR register accessor: an alias for `Reg<R32_ETH_MACMIIDR_SPEC>`"]
|
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+pub type R32_ETH_MACMIIDR = crate :: Reg < r32_eth_macmiidr :: R32_ETH_MACMIIDR_SPEC > ; # [doc = "MAC MII Data Register"]
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+pub mod r32_eth_macmiidr { # [doc = "Register `R32_ETH_MACMIIDR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_MACMIIDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACMIIDR_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACMIIDR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACMIIDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACMIIDR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACMIIDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACMIIDR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACMIIDR_SPEC >> for W { # [inline (always)]
|
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+fn from (writer : crate :: W < R32_ETH_MACMIIDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACMIIDR` reader - MAC MII Data Register"]
|
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+pub struct R32_ETH_MACMIIDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACMIIDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACMIIDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACMIIDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACMIIDR` writer - MAC MII Data Register"]
|
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+pub struct R32_ETH_MACMIIDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACMIIDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC MII Data Register"]
|
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|
+# [inline (always)]
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+pub fn r32_eth_macmiidr (& self) -> R32_ETH_MACMIIDR_R { R32_ETH_MACMIIDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC MII Data Register"]
|
|
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+# [inline (always)]
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+pub fn r32_eth_macmiidr (& mut self) -> R32_ETH_MACMIIDR_W { R32_ETH_MACMIIDR_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC MII Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macmiidr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACMIIDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACMIIDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macmiidr::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_ETH_MACMIIDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macmiidr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACMIIDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACMIIDR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACMIIDR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACFCR register accessor: an alias for `Reg<R32_ETH_MACFCR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACFCR = crate :: Reg < r32_eth_macfcr :: R32_ETH_MACFCR_SPEC > ; # [doc = "MAC Flow-Control Register"]
|
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|
+pub mod r32_eth_macfcr { # [doc = "Register `R32_ETH_MACFCR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACFCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACFCR_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_ETH_MACFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACFCR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACFCR_SPEC > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACFCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACFCR` reader - MAC Flow-Control Register"]
|
|
|
+pub struct R32_ETH_MACFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACFCR` writer - MAC Flow-Control Register"]
|
|
|
+pub struct R32_ETH_MACFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Flow-Control Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macfcr (& self) -> R32_ETH_MACFCR_R { R32_ETH_MACFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Flow-Control Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macfcr (& mut self) -> R32_ETH_MACFCR_W { R32_ETH_MACFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Flow-Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macfcr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macfcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macfcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACFCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACFCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACVLANTR register accessor: an alias for `Reg<R32_ETH_MACVLANTR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACVLANTR = crate :: Reg < r32_eth_macvlantr :: R32_ETH_MACVLANTR_SPEC > ; # [doc = "MAC VLAN Tag Register"]
|
|
|
+pub mod r32_eth_macvlantr { # [doc = "Register `R32_ETH_MACVLANTR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACVLANTR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACVLANTR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACVLANTR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACVLANTR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACVLANTR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACVLANTR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACVLANTR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACVLANTR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACVLANTR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACVLANTR` reader - MAC VLAN Tag Register"]
|
|
|
+pub struct R32_ETH_MACVLANTR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACVLANTR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACVLANTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACVLANTR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACVLANTR` writer - MAC VLAN Tag Register"]
|
|
|
+pub struct R32_ETH_MACVLANTR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACVLANTR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC VLAN Tag Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macvlantr (& self) -> R32_ETH_MACVLANTR_R { R32_ETH_MACVLANTR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC VLAN Tag Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macvlantr (& mut self) -> R32_ETH_MACVLANTR_W { R32_ETH_MACVLANTR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC VLAN Tag Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macvlantr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACVLANTR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACVLANTR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macvlantr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACVLANTR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macvlantr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACVLANTR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACVLANTR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACVLANTR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACRWUFFR register accessor: an alias for `Reg<R32_ETH_MACRWUFFR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACRWUFFR = crate :: Reg < r32_eth_macrwuffr :: R32_ETH_MACRWUFFR_SPEC > ; # [doc = "MAC Remote Wake-Up Frame Filter Register"]
|
|
|
+pub mod r32_eth_macrwuffr { # [doc = "Register `R32_ETH_MACRWUFFR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACRWUFFR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACRWUFFR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACRWUFFR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACRWUFFR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACRWUFFR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACRWUFFR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACRWUFFR_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACRWUFFR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACRWUFFR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACRWUFFR` reader - MAC Remote Wake-Up Frame Filter Register"]
|
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+pub struct R32_ETH_MACRWUFFR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACRWUFFR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACRWUFFR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACRWUFFR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACRWUFFR` writer - MAC Remote Wake-Up Frame Filter Register"]
|
|
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+pub struct R32_ETH_MACRWUFFR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACRWUFFR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Remote Wake-Up Frame Filter Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macrwuffr (& self) -> R32_ETH_MACRWUFFR_R { R32_ETH_MACRWUFFR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Remote Wake-Up Frame Filter Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macrwuffr (& mut self) -> R32_ETH_MACRWUFFR_W { R32_ETH_MACRWUFFR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Remote Wake-Up Frame Filter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macrwuffr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACRWUFFR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACRWUFFR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macrwuffr::R](R) reader structure"]
|
|
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+impl crate :: Readable for R32_ETH_MACRWUFFR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macrwuffr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_MACRWUFFR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACRWUFFR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_MACRWUFFR_SPEC { # [inline (always)]
|
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACPMTCSR register accessor: an alias for `Reg<R32_ETH_MACPMTCSR_SPEC>`"]
|
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+pub type R32_ETH_MACPMTCSR = crate :: Reg < r32_eth_macpmtcsr :: R32_ETH_MACPMTCSR_SPEC > ; # [doc = "MAC PMT Control and Reset Register"]
|
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+pub mod r32_eth_macpmtcsr { # [doc = "Register `R32_ETH_MACPMTCSR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_MACPMTCSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACPMTCSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACPMTCSR_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_ETH_MACPMTCSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACPMTCSR` writer"]
|
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|
+pub struct W (crate :: W < R32_ETH_MACPMTCSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACPMTCSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACPMTCSR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACPMTCSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACPMTCSR` reader - MAC PMT Control and Reset Register"]
|
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+pub struct R32_ETH_MACPMTCSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACPMTCSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACPMTCSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACPMTCSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACPMTCSR` writer - MAC PMT Control and Reset Register"]
|
|
|
+pub struct R32_ETH_MACPMTCSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACPMTCSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC PMT Control and Reset Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macpmtcsr (& self) -> R32_ETH_MACPMTCSR_R { R32_ETH_MACPMTCSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC PMT Control and Reset Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_macpmtcsr (& mut self) -> R32_ETH_MACPMTCSR_W { R32_ETH_MACPMTCSR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC PMT Control and Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macpmtcsr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACPMTCSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACPMTCSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macpmtcsr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACPMTCSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macpmtcsr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACPMTCSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACPMTCSR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACPMTCSR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACSR register accessor: an alias for `Reg<R32_ETH_MACSR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACSR = crate :: Reg < r32_eth_macsr :: R32_ETH_MACSR_SPEC > ; # [doc = "MAC Interrupt Status Register"]
|
|
|
+pub mod r32_eth_macsr { # [doc = "Register `R32_ETH_MACSR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACSR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACSR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACSR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACSR` reader - MAC Interrupt Status Register"]
|
|
|
+pub struct R32_ETH_MACSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACSR` writer - MAC Interrupt Status Register"]
|
|
|
+pub struct R32_ETH_MACSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Interrupt Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macsr (& self) -> R32_ETH_MACSR_R { R32_ETH_MACSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Interrupt Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macsr (& mut self) -> R32_ETH_MACSR_W { R32_ETH_MACSR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macsr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macsr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macsr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACSR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACSR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACIMR register accessor: an alias for `Reg<R32_ETH_MACIMR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACIMR = crate :: Reg < r32_eth_macimr :: R32_ETH_MACIMR_SPEC > ; # [doc = "MAC Interrupt Mask Register"]
|
|
|
+pub mod r32_eth_macimr { # [doc = "Register `R32_ETH_MACIMR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACIMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACIMR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACIMR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACIMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACIMR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACIMR` reader - MAC Interrupt Mask Register"]
|
|
|
+pub struct R32_ETH_MACIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACIMR` writer - MAC Interrupt Mask Register"]
|
|
|
+pub struct R32_ETH_MACIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Interrupt Mask Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macimr (& self) -> R32_ETH_MACIMR_R { R32_ETH_MACIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Interrupt Mask Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_macimr (& mut self) -> R32_ETH_MACIMR_W { R32_ETH_MACIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_macimr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_macimr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_macimr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACIMR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACIMR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA0HR register accessor: an alias for `Reg<R32_ETH_MACA0HR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACA0HR = crate :: Reg < r32_eth_maca0hr :: R32_ETH_MACA0HR_SPEC > ; # [doc = "MAC Address 0 High Register"]
|
|
|
+pub mod r32_eth_maca0hr { # [doc = "Register `R32_ETH_MACA0HR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACA0HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA0HR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA0HR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACA0HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA0HR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACA0HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA0HR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA0HR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACA0HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA0HR` reader - MAC Address 0 High Register"]
|
|
|
+pub struct R32_ETH_MACA0HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA0HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA0HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA0HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA0HR` writer - MAC Address 0 High Register"]
|
|
|
+pub struct R32_ETH_MACA0HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA0HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 0 High Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca0hr (& self) -> R32_ETH_MACA0HR_R { R32_ETH_MACA0HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 0 High Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca0hr (& mut self) -> R32_ETH_MACA0HR_W { R32_ETH_MACA0HR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 0 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca0hr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACA0HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA0HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca0hr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACA0HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca0hr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACA0HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA0HR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACA0HR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA0LR register accessor: an alias for `Reg<R32_ETH_MACA0LR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACA0LR = crate :: Reg < r32_eth_maca0lr :: R32_ETH_MACA0LR_SPEC > ; # [doc = "MAC Address 0 Low Register"]
|
|
|
+pub mod r32_eth_maca0lr { # [doc = "Register `R32_ETH_MACA0LR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACA0LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA0LR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA0LR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACA0LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA0LR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACA0LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA0LR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA0LR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACA0LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA0LR` reader - MAC Address 0 Low Register"]
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+pub struct R32_ETH_MACA0LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA0LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA0LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA0LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA0LR` writer - MAC Address 0 Low Register"]
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+pub struct R32_ETH_MACA0LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA0LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 0 Low Register"]
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+# [inline (always)]
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+pub fn r32_eth_maca0lr (& self) -> R32_ETH_MACA0LR_R { R32_ETH_MACA0LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 0 Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca0lr (& mut self) -> R32_ETH_MACA0LR_W { R32_ETH_MACA0LR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 0 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca0lr](index.html) module"]
|
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+pub struct R32_ETH_MACA0LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA0LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca0lr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACA0LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca0lr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MACA0LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA0LR to value 0"]
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+impl crate :: Resettable for R32_ETH_MACA0LR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA1HR register accessor: an alias for `Reg<R32_ETH_MACA1HR_SPEC>`"]
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+pub type R32_ETH_MACA1HR = crate :: Reg < r32_eth_maca1hr :: R32_ETH_MACA1HR_SPEC > ; # [doc = "MAC Address 1 High Register"]
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+pub mod r32_eth_maca1hr { # [doc = "Register `R32_ETH_MACA1HR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACA1HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA1HR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA1HR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACA1HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA1HR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACA1HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA1HR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA1HR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACA1HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA1HR` reader - MAC Address 1 High Register"]
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+pub struct R32_ETH_MACA1HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA1HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA1HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA1HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA1HR` writer - MAC Address 1 High Register"]
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+pub struct R32_ETH_MACA1HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA1HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 1 High Register"]
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+# [inline (always)]
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+pub fn r32_eth_maca1hr (& self) -> R32_ETH_MACA1HR_R { R32_ETH_MACA1HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 1 High Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca1hr (& mut self) -> R32_ETH_MACA1HR_W { R32_ETH_MACA1HR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 1 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca1hr](index.html) module"]
|
|
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+pub struct R32_ETH_MACA1HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA1HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca1hr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACA1HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca1hr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_MACA1HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA1HR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_MACA1HR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA1LR register accessor: an alias for `Reg<R32_ETH_MACA1LR_SPEC>`"]
|
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+pub type R32_ETH_MACA1LR = crate :: Reg < r32_eth_maca1lr :: R32_ETH_MACA1LR_SPEC > ; # [doc = "MAC Address 1 Low Register"]
|
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+pub mod r32_eth_maca1lr { # [doc = "Register `R32_ETH_MACA1LR` reader"]
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|
+pub struct R (crate :: R < R32_ETH_MACA1LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA1LR_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA1LR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACA1LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA1LR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_MACA1LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA1LR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA1LR_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_ETH_MACA1LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA1LR` reader - MAC Address 1 Low Register"]
|
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+pub struct R32_ETH_MACA1LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA1LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA1LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA1LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA1LR` writer - MAC Address 1 Low Register"]
|
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+pub struct R32_ETH_MACA1LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA1LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 1 Low Register"]
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|
+# [inline (always)]
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+pub fn r32_eth_maca1lr (& self) -> R32_ETH_MACA1LR_R { R32_ETH_MACA1LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 1 Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca1lr (& mut self) -> R32_ETH_MACA1LR_W { R32_ETH_MACA1LR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 1 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca1lr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACA1LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA1LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca1lr::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_ETH_MACA1LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca1lr::W](W) writer structure"]
|
|
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+impl crate :: Writable for R32_ETH_MACA1LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA1LR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACA1LR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA2HR register accessor: an alias for `Reg<R32_ETH_MACA2HR_SPEC>`"]
|
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+pub type R32_ETH_MACA2HR = crate :: Reg < r32_eth_maca2hr :: R32_ETH_MACA2HR_SPEC > ; # [doc = "MAC Address 2 High Register"]
|
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|
+pub mod r32_eth_maca2hr { # [doc = "Register `R32_ETH_MACA2HR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_MACA2HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA2HR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA2HR_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_ETH_MACA2HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA2HR` writer"]
|
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|
+pub struct W (crate :: W < R32_ETH_MACA2HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA2HR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA2HR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACA2HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA2HR` reader - MAC Address 2 High Register"]
|
|
|
+pub struct R32_ETH_MACA2HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA2HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA2HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA2HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA2HR` writer - MAC Address 2 High Register"]
|
|
|
+pub struct R32_ETH_MACA2HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA2HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 2 High Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca2hr (& self) -> R32_ETH_MACA2HR_R { R32_ETH_MACA2HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 2 High Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca2hr (& mut self) -> R32_ETH_MACA2HR_W { R32_ETH_MACA2HR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 2 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca2hr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACA2HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA2HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca2hr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACA2HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca2hr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACA2HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA2HR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACA2HR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA2LR register accessor: an alias for `Reg<R32_ETH_MACA2LR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACA2LR = crate :: Reg < r32_eth_maca2lr :: R32_ETH_MACA2LR_SPEC > ; # [doc = "MAC Address 2 Low Register"]
|
|
|
+pub mod r32_eth_maca2lr { # [doc = "Register `R32_ETH_MACA2LR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACA2LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA2LR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA2LR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACA2LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA2LR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACA2LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA2LR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA2LR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MACA2LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA2LR` reader - MAC Address 2 Low Register"]
|
|
|
+pub struct R32_ETH_MACA2LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA2LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA2LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA2LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA2LR` writer - MAC Address 2 Low Register"]
|
|
|
+pub struct R32_ETH_MACA2LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA2LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 2 Low Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca2lr (& self) -> R32_ETH_MACA2LR_R { R32_ETH_MACA2LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 2 Low Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_maca2lr (& mut self) -> R32_ETH_MACA2LR_W { R32_ETH_MACA2LR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 2 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca2lr](index.html) module"]
|
|
|
+pub struct R32_ETH_MACA2LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA2LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca2lr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MACA2LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca2lr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MACA2LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA2LR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MACA2LR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA3HR register accessor: an alias for `Reg<R32_ETH_MACA3HR_SPEC>`"]
|
|
|
+pub type R32_ETH_MACA3HR = crate :: Reg < r32_eth_maca3hr :: R32_ETH_MACA3HR_SPEC > ; # [doc = "MAC Address 3 High Register"]
|
|
|
+pub mod r32_eth_maca3hr { # [doc = "Register `R32_ETH_MACA3HR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MACA3HR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA3HR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA3HR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MACA3HR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA3HR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MACA3HR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA3HR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA3HR_SPEC >> for W { # [inline (always)]
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|
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+fn from (writer : crate :: W < R32_ETH_MACA3HR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA3HR` reader - MAC Address 3 High Register"]
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+pub struct R32_ETH_MACA3HR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA3HR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA3HR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA3HR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA3HR` writer - MAC Address 3 High Register"]
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+pub struct R32_ETH_MACA3HR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA3HR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 3 High Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca3hr (& self) -> R32_ETH_MACA3HR_R { R32_ETH_MACA3HR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 3 High Register"]
|
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|
+# [inline (always)]
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+pub fn r32_eth_maca3hr (& mut self) -> R32_ETH_MACA3HR_W { R32_ETH_MACA3HR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 3 High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca3hr](index.html) module"]
|
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+pub struct R32_ETH_MACA3HR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA3HR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca3hr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACA3HR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca3hr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MACA3HR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA3HR to value 0"]
|
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+impl crate :: Resettable for R32_ETH_MACA3HR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MACA3LR register accessor: an alias for `Reg<R32_ETH_MACA3LR_SPEC>`"]
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+pub type R32_ETH_MACA3LR = crate :: Reg < r32_eth_maca3lr :: R32_ETH_MACA3LR_SPEC > ; # [doc = "MAC Address 3 Low Register"]
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+pub mod r32_eth_maca3lr { # [doc = "Register `R32_ETH_MACA3LR` reader"]
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+pub struct R (crate :: R < R32_ETH_MACA3LR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MACA3LR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MACA3LR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MACA3LR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MACA3LR` writer"]
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+pub struct W (crate :: W < R32_ETH_MACA3LR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MACA3LR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MACA3LR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MACA3LR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MACA3LR` reader - MAC Address 3 Low Register"]
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+pub struct R32_ETH_MACA3LR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MACA3LR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MACA3LR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MACA3LR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MACA3LR` writer - MAC Address 3 Low Register"]
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+pub struct R32_ETH_MACA3LR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MACA3LR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MAC Address 3 Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca3lr (& self) -> R32_ETH_MACA3LR_R { R32_ETH_MACA3LR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MAC Address 3 Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_maca3lr (& mut self) -> R32_ETH_MACA3LR_W { R32_ETH_MACA3LR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MAC Address 3 Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_maca3lr](index.html) module"]
|
|
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+pub struct R32_ETH_MACA3LR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MACA3LR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_maca3lr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MACA3LR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_maca3lr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_MACA3LR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MACA3LR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_MACA3LR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCCR register accessor: an alias for `Reg<R32_ETH_MMCCR_SPEC>`"]
|
|
|
+pub type R32_ETH_MMCCR = crate :: Reg < r32_eth_mmccr :: R32_ETH_MMCCR_SPEC > ; # [doc = "MMC Control Register"]
|
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|
+pub mod r32_eth_mmccr { # [doc = "Register `R32_ETH_MMCCR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MMCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCCR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_ETH_MMCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCCR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MMCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCCR_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_ETH_MMCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCCR` reader - MMC Control Register"]
|
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|
+pub struct R32_ETH_MMCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCCR` writer - MMC Control Register"]
|
|
|
+pub struct R32_ETH_MMCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Control Register"]
|
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|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmccr (& self) -> R32_ETH_MMCCR_R { R32_ETH_MMCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Control Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_mmccr (& mut self) -> R32_ETH_MMCCR_W { R32_ETH_MMCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmccr](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmccr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MMCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmccr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MMCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRIR register accessor: an alias for `Reg<R32_ETH_MMCRIR_SPEC>`"]
|
|
|
+pub type R32_ETH_MMCRIR = crate :: Reg < r32_eth_mmcrir :: R32_ETH_MMCRIR_SPEC > ; # [doc = "MMC RX Interrupt Register"]
|
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|
+pub mod r32_eth_mmcrir { # [doc = "Register `R32_ETH_MMCRIR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MMCRIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRIR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MMCRIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRIR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MMCRIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRIR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MMCRIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRIR` reader - MMC RX Interrupt Register"]
|
|
|
+pub struct R32_ETH_MMCRIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRIR` writer - MMC RX Interrupt Register"]
|
|
|
+pub struct R32_ETH_MMCRIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Interrupt Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmcrir (& self) -> R32_ETH_MMCRIR_R { R32_ETH_MMCRIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Interrupt Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmcrir (& mut self) -> R32_ETH_MMCRIR_W { R32_ETH_MMCRIR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrir](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCRIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MMCRIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrir::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MMCRIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRIR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCRIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTIR register accessor: an alias for `Reg<R32_ETH_MMCTIR_SPEC>`"]
|
|
|
+pub type R32_ETH_MMCTIR = crate :: Reg < r32_eth_mmctir :: R32_ETH_MMCTIR_SPEC > ; # [doc = "MMC TX Interrupt Register"]
|
|
|
+pub mod r32_eth_mmctir { # [doc = "Register `R32_ETH_MMCTIR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MMCTIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTIR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MMCTIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTIR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MMCTIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTIR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MMCTIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTIR` reader - MMC TX Interrupt Register"]
|
|
|
+pub struct R32_ETH_MMCTIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTIR` writer - MMC TX Interrupt Register"]
|
|
|
+pub struct R32_ETH_MMCTIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC TX Interrupt Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmctir (& self) -> R32_ETH_MMCTIR_R { R32_ETH_MMCTIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC TX Interrupt Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmctir (& mut self) -> R32_ETH_MMCTIR_W { R32_ETH_MMCTIR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC TX Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctir](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCTIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MMCTIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctir::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MMCTIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTIR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCTIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRIMR register accessor: an alias for `Reg<R32_ETH_MMCRIMR_SPEC>`"]
|
|
|
+pub type R32_ETH_MMCRIMR = crate :: Reg < r32_eth_mmcrimr :: R32_ETH_MMCRIMR_SPEC > ; # [doc = "MMC RX Interrupt Mask Register"]
|
|
|
+pub mod r32_eth_mmcrimr { # [doc = "Register `R32_ETH_MMCRIMR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MMCRIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRIMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRIMR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MMCRIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRIMR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MMCRIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRIMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRIMR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_MMCRIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRIMR` reader - MMC RX Interrupt Mask Register"]
|
|
|
+pub struct R32_ETH_MMCRIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRIMR` writer - MMC RX Interrupt Mask Register"]
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+pub struct R32_ETH_MMCRIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Interrupt Mask Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmcrimr (& self) -> R32_ETH_MMCRIMR_R { R32_ETH_MMCRIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Interrupt Mask Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmcrimr (& mut self) -> R32_ETH_MMCRIMR_W { R32_ETH_MMCRIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrimr](index.html) module"]
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+pub struct R32_ETH_MMCRIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrimr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MMCRIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrimr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MMCRIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRIMR to value 0"]
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+impl crate :: Resettable for R32_ETH_MMCRIMR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTIMR register accessor: an alias for `Reg<R32_ETH_MMCTIMR_SPEC>`"]
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+pub type R32_ETH_MMCTIMR = crate :: Reg < r32_eth_mmctimr :: R32_ETH_MMCTIMR_SPEC > ; # [doc = "MMC TX Interrupt Mask Register"]
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+pub mod r32_eth_mmctimr { # [doc = "Register `R32_ETH_MMCTIMR` reader"]
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+pub struct R (crate :: R < R32_ETH_MMCTIMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTIMR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTIMR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MMCTIMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTIMR` writer"]
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+pub struct W (crate :: W < R32_ETH_MMCTIMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTIMR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTIMR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MMCTIMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTIMR` reader - MMC TX Interrupt Mask Register"]
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+pub struct R32_ETH_MMCTIMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTIMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTIMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTIMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTIMR` writer - MMC TX Interrupt Mask Register"]
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+pub struct R32_ETH_MMCTIMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTIMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC TX Interrupt Mask Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmctimr (& self) -> R32_ETH_MMCTIMR_R { R32_ETH_MMCTIMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC TX Interrupt Mask Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmctimr (& mut self) -> R32_ETH_MMCTIMR_W { R32_ETH_MMCTIMR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC TX Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctimr](index.html) module"]
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+pub struct R32_ETH_MMCTIMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTIMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctimr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MMCTIMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctimr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MMCTIMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTIMR to value 0"]
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+impl crate :: Resettable for R32_ETH_MMCTIMR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFSCCR register accessor: an alias for `Reg<R32_ETH_MMCTGFSCCR_SPEC>`"]
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+pub type R32_ETH_MMCTGFSCCR = crate :: Reg < r32_eth_mmctgfsccr :: R32_ETH_MMCTGFSCCR_SPEC > ; # [doc = "MMC Transmit Good Frame After Single Conflict Counter Register"]
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+pub mod r32_eth_mmctgfsccr { # [doc = "Register `R32_ETH_MMCTGFSCCR` reader"]
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+pub struct R (crate :: R < R32_ETH_MMCTGFSCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFSCCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFSCCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MMCTGFSCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFSCCR` writer"]
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+pub struct W (crate :: W < R32_ETH_MMCTGFSCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFSCCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFSCCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MMCTGFSCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFSCCR` reader - MMC Transmit Good Frame After Single Conflict Counter Register"]
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+pub struct R32_ETH_MMCTGFSCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFSCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFSCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFSCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFSCCR` writer - MMC Transmit Good Frame After Single Conflict Counter Register"]
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+pub struct R32_ETH_MMCTGFSCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFSCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Single Conflict Counter Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmctgfsccr (& self) -> R32_ETH_MMCTGFSCCR_R { R32_ETH_MMCTGFSCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Single Conflict Counter Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmctgfsccr (& mut self) -> R32_ETH_MMCTGFSCCR_W { R32_ETH_MMCTGFSCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame After Single Conflict Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfsccr](index.html) module"]
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+pub struct R32_ETH_MMCTGFSCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFSCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfsccr::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_MMCTGFSCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfsccr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MMCTGFSCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFSCCR to value 0"]
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+impl crate :: Resettable for R32_ETH_MMCTGFSCCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFMSCCR register accessor: an alias for `Reg<R32_ETH_MMCTGFMSCCR_SPEC>`"]
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+pub type R32_ETH_MMCTGFMSCCR = crate :: Reg < r32_eth_mmctgfmsccr :: R32_ETH_MMCTGFMSCCR_SPEC > ; # [doc = "MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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+pub mod r32_eth_mmctgfmsccr { # [doc = "Register `R32_ETH_MMCTGFMSCCR` reader"]
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+pub struct R (crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFMSCCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MMCTGFMSCCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFMSCCR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFMSCCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MMCTGFMSCCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFMSCCR` reader - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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+pub struct R32_ETH_MMCTGFMSCCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFMSCCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFMSCCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFMSCCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFMSCCR` writer - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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+pub struct R32_ETH_MMCTGFMSCCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFMSCCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmctgfmsccr (& self) -> R32_ETH_MMCTGFMSCCR_R { R32_ETH_MMCTGFMSCCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame After Multiple Conflicts Counter Register"]
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|
|
+# [inline (always)]
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+pub fn r32_eth_mmctgfmsccr (& mut self) -> R32_ETH_MMCTGFMSCCR_W { R32_ETH_MMCTGFMSCCR_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame After Multiple Conflicts Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfmsccr](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCTGFMSCCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFMSCCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfmsccr::R](R) reader structure"]
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|
+impl crate :: Readable for R32_ETH_MMCTGFMSCCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfmsccr::W](W) writer structure"]
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|
+impl crate :: Writable for R32_ETH_MMCTGFMSCCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFMSCCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCTGFMSCCR_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCTGFCR register accessor: an alias for `Reg<R32_ETH_MMCTGFCR_SPEC>`"]
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+pub type R32_ETH_MMCTGFCR = crate :: Reg < r32_eth_mmctgfcr :: R32_ETH_MMCTGFCR_SPEC > ; # [doc = "MMC Transmit Good Frame Counter Register"]
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|
+pub mod r32_eth_mmctgfcr { # [doc = "Register `R32_ETH_MMCTGFCR` reader"]
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|
+pub struct R (crate :: R < R32_ETH_MMCTGFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCTGFCR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCTGFCR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_ETH_MMCTGFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCTGFCR` writer"]
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|
+pub struct W (crate :: W < R32_ETH_MMCTGFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCTGFCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCTGFCR_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R32_ETH_MMCTGFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCTGFCR` reader - MMC Transmit Good Frame Counter Register"]
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|
|
+pub struct R32_ETH_MMCTGFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCTGFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCTGFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCTGFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCTGFCR` writer - MMC Transmit Good Frame Counter Register"]
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|
+pub struct R32_ETH_MMCTGFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCTGFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC Transmit Good Frame Counter Register"]
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|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_mmctgfcr (& self) -> R32_ETH_MMCTGFCR_R { R32_ETH_MMCTGFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC Transmit Good Frame Counter Register"]
|
|
|
+# [inline (always)]
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|
+pub fn r32_eth_mmctgfcr (& mut self) -> R32_ETH_MMCTGFCR_W { R32_ETH_MMCTGFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC Transmit Good Frame Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmctgfcr](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCTGFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCTGFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmctgfcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MMCTGFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmctgfcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MMCTGFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCTGFCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCTGFCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRFCECR register accessor: an alias for `Reg<R32_ETH_MMCRFCECR_SPEC>`"]
|
|
|
+pub type R32_ETH_MMCRFCECR = crate :: Reg < r32_eth_mmcrfcecr :: R32_ETH_MMCRFCECR_SPEC > ; # [doc = "MMC RX Frame CRC Error Counter Register"]
|
|
|
+pub mod r32_eth_mmcrfcecr { # [doc = "Register `R32_ETH_MMCRFCECR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_MMCRFCECR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRFCECR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRFCECR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_MMCRFCECR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRFCECR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_MMCRFCECR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRFCECR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRFCECR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MMCRFCECR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRFCECR` reader - MMC RX Frame CRC Error Counter Register"]
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+pub struct R32_ETH_MMCRFCECR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRFCECR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRFCECR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRFCECR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRFCECR` writer - MMC RX Frame CRC Error Counter Register"]
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+pub struct R32_ETH_MMCRFCECR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRFCECR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Frame CRC Error Counter Register"]
|
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+# [inline (always)]
|
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+pub fn r32_eth_mmcrfcecr (& self) -> R32_ETH_MMCRFCECR_R { R32_ETH_MMCRFCECR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Frame CRC Error Counter Register"]
|
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+# [inline (always)]
|
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|
+pub fn r32_eth_mmcrfcecr (& mut self) -> R32_ETH_MMCRFCECR_W { R32_ETH_MMCRFCECR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Frame CRC Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrfcecr](index.html) module"]
|
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+pub struct R32_ETH_MMCRFCECR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRFCECR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrfcecr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MMCRFCECR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrfcecr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MMCRFCECR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRFCECR to value 0"]
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+impl crate :: Resettable for R32_ETH_MMCRFCECR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRFAECR register accessor: an alias for `Reg<R32_ETH_MMCRFAECR_SPEC>`"]
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+pub type R32_ETH_MMCRFAECR = crate :: Reg < r32_eth_mmcrfaecr :: R32_ETH_MMCRFAECR_SPEC > ; # [doc = "MMC RX Frame Alignment Error Counter Register"]
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+pub mod r32_eth_mmcrfaecr { # [doc = "Register `R32_ETH_MMCRFAECR` reader"]
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+pub struct R (crate :: R < R32_ETH_MMCRFAECR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRFAECR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRFAECR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_MMCRFAECR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRFAECR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_MMCRFAECR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRFAECR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRFAECR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_MMCRFAECR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRFAECR` reader - MMC RX Frame Alignment Error Counter Register"]
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+pub struct R32_ETH_MMCRFAECR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRFAECR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRFAECR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRFAECR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRFAECR` writer - MMC RX Frame Alignment Error Counter Register"]
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+pub struct R32_ETH_MMCRFAECR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRFAECR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Frame Alignment Error Counter Register"]
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+# [inline (always)]
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+pub fn r32_eth_mmcrfaecr (& self) -> R32_ETH_MMCRFAECR_R { R32_ETH_MMCRFAECR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Frame Alignment Error Counter Register"]
|
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+# [inline (always)]
|
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+pub fn r32_eth_mmcrfaecr (& mut self) -> R32_ETH_MMCRFAECR_W { R32_ETH_MMCRFAECR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Frame Alignment Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrfaecr](index.html) module"]
|
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+pub struct R32_ETH_MMCRFAECR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRFAECR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrfaecr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_MMCRFAECR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrfaecr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_MMCRFAECR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRFAECR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_MMCRFAECR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_MMCRGUFCR register accessor: an alias for `Reg<R32_ETH_MMCRGUFCR_SPEC>`"]
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+pub type R32_ETH_MMCRGUFCR = crate :: Reg < r32_eth_mmcrgufcr :: R32_ETH_MMCRGUFCR_SPEC > ; # [doc = "MMC RX Good Unicast Frame Counter Register"]
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+pub mod r32_eth_mmcrgufcr { # [doc = "Register `R32_ETH_MMCRGUFCR` reader"]
|
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+pub struct R (crate :: R < R32_ETH_MMCRGUFCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_MMCRGUFCR_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_MMCRGUFCR_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_ETH_MMCRGUFCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_MMCRGUFCR` writer"]
|
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|
+pub struct W (crate :: W < R32_ETH_MMCRGUFCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_MMCRGUFCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_MMCRGUFCR_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_ETH_MMCRGUFCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_MMCRGUFCR` reader - MMC RX Good Unicast Frame Counter Register"]
|
|
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+pub struct R32_ETH_MMCRGUFCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_MMCRGUFCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_MMCRGUFCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_MMCRGUFCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_MMCRGUFCR` writer - MMC RX Good Unicast Frame Counter Register"]
|
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+pub struct R32_ETH_MMCRGUFCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_MMCRGUFCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - MMC RX Good Unicast Frame Counter Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_mmcrgufcr (& self) -> R32_ETH_MMCRGUFCR_R { R32_ETH_MMCRGUFCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - MMC RX Good Unicast Frame Counter Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_mmcrgufcr (& mut self) -> R32_ETH_MMCRGUFCR_W { R32_ETH_MMCRGUFCR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "MMC RX Good Unicast Frame Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_mmcrgufcr](index.html) module"]
|
|
|
+pub struct R32_ETH_MMCRGUFCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_MMCRGUFCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_mmcrgufcr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_MMCRGUFCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_mmcrgufcr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_MMCRGUFCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_MMCRGUFCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_MMCRGUFCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSCR register accessor: an alias for `Reg<R32_ETH_PTPTSCR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPTSCR = crate :: Reg < r32_eth_ptptscr :: R32_ETH_PTPTSCR_SPEC > ; # [doc = "PTP Time Stamp Control Register"]
|
|
|
+pub mod r32_eth_ptptscr { # [doc = "Register `R32_ETH_PTPTSCR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTSCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSCR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSCR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTSCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSCR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSCR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTSCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSCR` reader - PTP Time Stamp Control Register"]
|
|
|
+pub struct R32_ETH_PTPTSCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSCR` writer - PTP Time Stamp Control Register"]
|
|
|
+pub struct R32_ETH_PTPTSCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Control Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptscr (& self) -> R32_ETH_PTPTSCR_R { R32_ETH_PTPTSCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Control Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptscr (& mut self) -> R32_ETH_PTPTSCR_W { R32_ETH_PTPTSCR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptscr](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTSCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptscr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPTSCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptscr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTSCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSCR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSCR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPSSIR register accessor: an alias for `Reg<R32_ETH_PTPSSIR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPSSIR = crate :: Reg < r32_eth_ptpssir :: R32_ETH_PTPSSIR_SPEC > ; # [doc = "PTP Sub Second Increment Register"]
|
|
|
+pub mod r32_eth_ptpssir { # [doc = "Register `R32_ETH_PTPSSIR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPSSIR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPSSIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPSSIR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPSSIR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPSSIR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPSSIR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPSSIR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPSSIR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPSSIR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPSSIR` reader - PTP Sub Second Increment Register"]
|
|
|
+pub struct R32_ETH_PTPSSIR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPSSIR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPSSIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPSSIR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPSSIR` writer - PTP Sub Second Increment Register"]
|
|
|
+pub struct R32_ETH_PTPSSIR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPSSIR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Sub Second Increment Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptpssir (& self) -> R32_ETH_PTPSSIR_R { R32_ETH_PTPSSIR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Sub Second Increment Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptpssir (& mut self) -> R32_ETH_PTPSSIR_W { R32_ETH_PTPSSIR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Sub Second Increment Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptpssir](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPSSIR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPSSIR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptpssir::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPSSIR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptpssir::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPSSIR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPSSIR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPSSIR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSHR register accessor: an alias for `Reg<R32_ETH_PTPTSHR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPTSHR = crate :: Reg < r32_eth_ptptshr :: R32_ETH_PTPTSHR_SPEC > ; # [doc = "PTP Time Stamp High Register"]
|
|
|
+pub mod r32_eth_ptptshr { # [doc = "Register `R32_ETH_PTPTSHR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTSHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSHR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSHR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSHR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTSHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSHR_SPEC > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSHR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_PTPTSHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSHR` reader - PTP Time Stamp High Register"]
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+pub struct R32_ETH_PTPTSHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSHR` writer - PTP Time Stamp High Register"]
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+pub struct R32_ETH_PTPTSHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp High Register"]
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+# [inline (always)]
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+pub fn r32_eth_ptptshr (& self) -> R32_ETH_PTPTSHR_R { R32_ETH_PTPTSHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp High Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_ptptshr (& mut self) -> R32_ETH_PTPTSHR_W { R32_ETH_PTPTSHR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptshr](index.html) module"]
|
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+pub struct R32_ETH_PTPTSHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptshr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_PTPTSHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptshr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_PTPTSHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSHR to value 0"]
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+impl crate :: Resettable for R32_ETH_PTPTSHR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSLR register accessor: an alias for `Reg<R32_ETH_PTPTSLR_SPEC>`"]
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+pub type R32_ETH_PTPTSLR = crate :: Reg < r32_eth_ptptslr :: R32_ETH_PTPTSLR_SPEC > ; # [doc = "PTP Time Stamp Low Register"]
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+pub mod r32_eth_ptptslr { # [doc = "Register `R32_ETH_PTPTSLR` reader"]
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+pub struct R (crate :: R < R32_ETH_PTPTSLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSLR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_PTPTSLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSLR` writer"]
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+pub struct W (crate :: W < R32_ETH_PTPTSLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSLR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_PTPTSLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSLR` reader - PTP Time Stamp Low Register"]
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+pub struct R32_ETH_PTPTSLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSLR` writer - PTP Time Stamp Low Register"]
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+pub struct R32_ETH_PTPTSLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Low Register"]
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+# [inline (always)]
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+pub fn r32_eth_ptptslr (& self) -> R32_ETH_PTPTSLR_R { R32_ETH_PTPTSLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Low Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_ptptslr (& mut self) -> R32_ETH_PTPTSLR_W { R32_ETH_PTPTSLR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptslr](index.html) module"]
|
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+pub struct R32_ETH_PTPTSLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptslr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_PTPTSLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptslr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_PTPTSLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSLR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSLR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSHUR register accessor: an alias for `Reg<R32_ETH_PTPTSHUR_SPEC>`"]
|
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+pub type R32_ETH_PTPTSHUR = crate :: Reg < r32_eth_ptptshur :: R32_ETH_PTPTSHUR_SPEC > ; # [doc = "PTP Time Stamp High Update Register"]
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+pub mod r32_eth_ptptshur { # [doc = "Register `R32_ETH_PTPTSHUR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_PTPTSHUR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSHUR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSHUR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSHUR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSHUR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_PTPTSHUR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSHUR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSHUR_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R32_ETH_PTPTSHUR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSHUR` reader - PTP Time Stamp High Update Register"]
|
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+pub struct R32_ETH_PTPTSHUR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSHUR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSHUR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSHUR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSHUR` writer - PTP Time Stamp High Update Register"]
|
|
|
+pub struct R32_ETH_PTPTSHUR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSHUR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp High Update Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptshur (& self) -> R32_ETH_PTPTSHUR_R { R32_ETH_PTPTSHUR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp High Update Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_ptptshur (& mut self) -> R32_ETH_PTPTSHUR_W { R32_ETH_PTPTSHUR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp High Update Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptshur](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTSHUR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSHUR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptshur::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPTSHUR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptshur::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTSHUR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSHUR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSHUR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSLUR register accessor: an alias for `Reg<R32_ETH_PTPTSLUR_SPEC>`"]
|
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|
+pub type R32_ETH_PTPTSLUR = crate :: Reg < r32_eth_ptptslur :: R32_ETH_PTPTSLUR_SPEC > ; # [doc = "PTP Time Stamp Low Update Register"]
|
|
|
+pub mod r32_eth_ptptslur { # [doc = "Register `R32_ETH_PTPTSLUR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTSLUR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSLUR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSLUR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSLUR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSLUR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTSLUR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSLUR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSLUR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTSLUR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSLUR` reader - PTP Time Stamp Low Update Register"]
|
|
|
+pub struct R32_ETH_PTPTSLUR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSLUR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSLUR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSLUR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSLUR` writer - PTP Time Stamp Low Update Register"]
|
|
|
+pub struct R32_ETH_PTPTSLUR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSLUR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Low Update Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptslur (& self) -> R32_ETH_PTPTSLUR_R { R32_ETH_PTPTSLUR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Low Update Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptslur (& mut self) -> R32_ETH_PTPTSLUR_W { R32_ETH_PTPTSLUR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Low Update Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptslur](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTSLUR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSLUR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptslur::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPTSLUR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptslur::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTSLUR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSLUR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSLUR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSAR register accessor: an alias for `Reg<R32_ETH_PTPTSAR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPTSAR = crate :: Reg < r32_eth_ptptsar :: R32_ETH_PTPTSAR_SPEC > ; # [doc = "PTP Time Stamp Accumulating Register"]
|
|
|
+pub mod r32_eth_ptptsar { # [doc = "Register `R32_ETH_PTPTSAR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTSAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSAR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSAR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTSAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSAR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTSAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSAR` reader - PTP Time Stamp Accumulating Register"]
|
|
|
+pub struct R32_ETH_PTPTSAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSAR` writer - PTP Time Stamp Accumulating Register"]
|
|
|
+pub struct R32_ETH_PTPTSAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Accumulating Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptsar (& self) -> R32_ETH_PTPTSAR_R { R32_ETH_PTPTSAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Accumulating Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptsar (& mut self) -> R32_ETH_PTPTSAR_W { R32_ETH_PTPTSAR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Accumulating Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptsar](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTSAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptsar::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPTSAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptsar::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTSAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSAR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSAR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTTHR register accessor: an alias for `Reg<R32_ETH_PTPTTHR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPTTHR = crate :: Reg < r32_eth_ptptthr :: R32_ETH_PTPTTHR_SPEC > ; # [doc = "PTP Target Time High Register"]
|
|
|
+pub mod r32_eth_ptptthr { # [doc = "Register `R32_ETH_PTPTTHR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTTHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTTHR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTTHR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTTHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTTHR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTTHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTTHR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTTHR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTTHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTTHR` reader - PTP Target Time High Register"]
|
|
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+pub struct R32_ETH_PTPTTHR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTTHR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTTHR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTTHR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTTHR` writer - PTP Target Time High Register"]
|
|
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+pub struct R32_ETH_PTPTTHR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTTHR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Target Time High Register"]
|
|
|
+# [inline (always)]
|
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+pub fn r32_eth_ptptthr (& self) -> R32_ETH_PTPTTHR_R { R32_ETH_PTPTTHR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Target Time High Register"]
|
|
|
+# [inline (always)]
|
|
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+pub fn r32_eth_ptptthr (& mut self) -> R32_ETH_PTPTTHR_W { R32_ETH_PTPTTHR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Target Time High Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptthr](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTTHR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTTHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptthr::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_ETH_PTPTTHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptthr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTTHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTTHR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTTHR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTTLR register accessor: an alias for `Reg<R32_ETH_PTPTTLR_SPEC>`"]
|
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+pub type R32_ETH_PTPTTLR = crate :: Reg < r32_eth_ptpttlr :: R32_ETH_PTPTTLR_SPEC > ; # [doc = "PTP Target Time Low Register"]
|
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|
+pub mod r32_eth_ptpttlr { # [doc = "Register `R32_ETH_PTPTTLR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_PTPTTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTTLR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTTLR_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_ETH_PTPTTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTTLR` writer"]
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+pub struct W (crate :: W < R32_ETH_PTPTTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTTLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTTLR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTTLR` reader - PTP Target Time Low Register"]
|
|
|
+pub struct R32_ETH_PTPTTLR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTTLR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTTLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTTLR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTTLR` writer - PTP Target Time Low Register"]
|
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+pub struct R32_ETH_PTPTTLR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTTLR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Target Time Low Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptpttlr (& self) -> R32_ETH_PTPTTLR_R { R32_ETH_PTPTTLR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Target Time Low Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptpttlr (& mut self) -> R32_ETH_PTPTTLR_W { R32_ETH_PTPTTLR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Target Time Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptpttlr](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTTLR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptpttlr::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_ETH_PTPTTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptpttlr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTTLR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTTLR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_PTPTSSR register accessor: an alias for `Reg<R32_ETH_PTPTSSR_SPEC>`"]
|
|
|
+pub type R32_ETH_PTPTSSR = crate :: Reg < r32_eth_ptptssr :: R32_ETH_PTPTSSR_SPEC > ; # [doc = "PTP Time Stamp Status Register"]
|
|
|
+pub mod r32_eth_ptptssr { # [doc = "Register `R32_ETH_PTPTSSR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_PTPTSSR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_PTPTSSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_PTPTSSR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_PTPTSSR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_PTPTSSR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_PTPTSSR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_PTPTSSR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_PTPTSSR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_PTPTSSR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_PTPTSSR` reader - PTP Time Stamp Status Register"]
|
|
|
+pub struct R32_ETH_PTPTSSR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_PTPTSSR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_PTPTSSR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_PTPTSSR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_PTPTSSR` writer - PTP Time Stamp Status Register"]
|
|
|
+pub struct R32_ETH_PTPTSSR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_PTPTSSR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - PTP Time Stamp Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptssr (& self) -> R32_ETH_PTPTSSR_R { R32_ETH_PTPTSSR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - PTP Time Stamp Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_ptptssr (& mut self) -> R32_ETH_PTPTSSR_W { R32_ETH_PTPTSSR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "PTP Time Stamp Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_ptptssr](index.html) module"]
|
|
|
+pub struct R32_ETH_PTPTSSR_SPEC ; impl crate :: RegisterSpec for R32_ETH_PTPTSSR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_ptptssr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_PTPTSSR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_ptptssr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_PTPTSSR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_PTPTSSR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_PTPTSSR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMABMR register accessor: an alias for `Reg<R32_ETH_DMABMR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMABMR = crate :: Reg < r32_eth_dmabmr :: R32_ETH_DMABMR_SPEC > ; # [doc = "DMA Bus Mode Register"]
|
|
|
+pub mod r32_eth_dmabmr { # [doc = "Register `R32_ETH_DMABMR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMABMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMABMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMABMR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMABMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMABMR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMABMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMABMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMABMR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMABMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMABMR` reader - DMA Bus Mode Register"]
|
|
|
+pub struct R32_ETH_DMABMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMABMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMABMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMABMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMABMR` writer - DMA Bus Mode Register"]
|
|
|
+pub struct R32_ETH_DMABMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMABMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Bus Mode Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmabmr (& self) -> R32_ETH_DMABMR_R { R32_ETH_DMABMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Bus Mode Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmabmr (& mut self) -> R32_ETH_DMABMR_W { R32_ETH_DMABMR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Bus Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmabmr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMABMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMABMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmabmr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMABMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmabmr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMABMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMABMR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMABMR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMATPDR register accessor: an alias for `Reg<R32_ETH_DMATPDR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMATPDR = crate :: Reg < r32_eth_dmatpdr :: R32_ETH_DMATPDR_SPEC > ; # [doc = "DMA TX Poll Demand Register"]
|
|
|
+pub mod r32_eth_dmatpdr { # [doc = "Register `R32_ETH_DMATPDR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMATPDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMATPDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMATPDR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMATPDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMATPDR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMATPDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMATPDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMATPDR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMATPDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMATPDR` reader - DMA TX Poll Demand Register"]
|
|
|
+pub struct R32_ETH_DMATPDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMATPDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMATPDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMATPDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMATPDR` writer - DMA TX Poll Demand Register"]
|
|
|
+pub struct R32_ETH_DMATPDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMATPDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA TX Poll Demand Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmatpdr (& self) -> R32_ETH_DMATPDR_R { R32_ETH_DMATPDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA TX Poll Demand Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmatpdr (& mut self) -> R32_ETH_DMATPDR_W { R32_ETH_DMATPDR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA TX Poll Demand Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmatpdr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMATPDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMATPDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmatpdr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMATPDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmatpdr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMATPDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMATPDR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMATPDR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARPDR register accessor: an alias for `Reg<R32_ETH_DMARPDR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMARPDR = crate :: Reg < r32_eth_dmarpdr :: R32_ETH_DMARPDR_SPEC > ; # [doc = "DMA RX Poll Demand Register"]
|
|
|
+pub mod r32_eth_dmarpdr { # [doc = "Register `R32_ETH_DMARPDR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMARPDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARPDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARPDR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMARPDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARPDR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMARPDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARPDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARPDR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMARPDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARPDR` reader - DMA RX Poll Demand Register"]
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+pub struct R32_ETH_DMARPDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARPDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARPDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARPDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARPDR` writer - DMA RX Poll Demand Register"]
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+pub struct R32_ETH_DMARPDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARPDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Poll Demand Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_dmarpdr (& self) -> R32_ETH_DMARPDR_R { R32_ETH_DMARPDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Poll Demand Register"]
|
|
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+# [inline (always)]
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+pub fn r32_eth_dmarpdr (& mut self) -> R32_ETH_DMARPDR_W { R32_ETH_DMARPDR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Poll Demand Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmarpdr](index.html) module"]
|
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+pub struct R32_ETH_DMARPDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARPDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmarpdr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_DMARPDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmarpdr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMARPDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARPDR to value 0"]
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+impl crate :: Resettable for R32_ETH_DMARPDR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARDLAR register accessor: an alias for `Reg<R32_ETH_DMARDLAR_SPEC>`"]
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+pub type R32_ETH_DMARDLAR = crate :: Reg < r32_eth_dmardlar :: R32_ETH_DMARDLAR_SPEC > ; # [doc = "DMA RX Description List Address Register"]
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+pub mod r32_eth_dmardlar { # [doc = "Register `R32_ETH_DMARDLAR` reader"]
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+pub struct R (crate :: R < R32_ETH_DMARDLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARDLAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARDLAR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_DMARDLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARDLAR` writer"]
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+pub struct W (crate :: W < R32_ETH_DMARDLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARDLAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARDLAR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_DMARDLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARDLAR` reader - DMA RX Description List Address Register"]
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+pub struct R32_ETH_DMARDLAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARDLAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARDLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARDLAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARDLAR` writer - DMA RX Description List Address Register"]
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+pub struct R32_ETH_DMARDLAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARDLAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Description List Address Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmardlar (& self) -> R32_ETH_DMARDLAR_R { R32_ETH_DMARDLAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Description List Address Register"]
|
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+# [inline (always)]
|
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+pub fn r32_eth_dmardlar (& mut self) -> R32_ETH_DMARDLAR_W { R32_ETH_DMARDLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
|
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Description List Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmardlar](index.html) module"]
|
|
|
+pub struct R32_ETH_DMARDLAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARDLAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmardlar::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_DMARDLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmardlar::W](W) writer structure"]
|
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+impl crate :: Writable for R32_ETH_DMARDLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARDLAR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_DMARDLAR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMATDLAR register accessor: an alias for `Reg<R32_ETH_DMATDLAR_SPEC>`"]
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+pub type R32_ETH_DMATDLAR = crate :: Reg < r32_eth_dmatdlar :: R32_ETH_DMATDLAR_SPEC > ; # [doc = "DMA TX Description List Address Register"]
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+pub mod r32_eth_dmatdlar { # [doc = "Register `R32_ETH_DMATDLAR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_DMATDLAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMATDLAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMATDLAR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_DMATDLAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMATDLAR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_DMATDLAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMATDLAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMATDLAR_SPEC >> for W { # [inline (always)]
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|
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+fn from (writer : crate :: W < R32_ETH_DMATDLAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMATDLAR` reader - DMA TX Description List Address Register"]
|
|
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+pub struct R32_ETH_DMATDLAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMATDLAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMATDLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMATDLAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMATDLAR` writer - DMA TX Description List Address Register"]
|
|
|
+pub struct R32_ETH_DMATDLAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMATDLAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA TX Description List Address Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmatdlar (& self) -> R32_ETH_DMATDLAR_R { R32_ETH_DMATDLAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA TX Description List Address Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmatdlar (& mut self) -> R32_ETH_DMATDLAR_W { R32_ETH_DMATDLAR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA TX Description List Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmatdlar](index.html) module"]
|
|
|
+pub struct R32_ETH_DMATDLAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMATDLAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmatdlar::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMATDLAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmatdlar::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMATDLAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMATDLAR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMATDLAR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMASR register accessor: an alias for `Reg<R32_ETH_DMASR_SPEC>`"]
|
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+pub type R32_ETH_DMASR = crate :: Reg < r32_eth_dmasr :: R32_ETH_DMASR_SPEC > ; # [doc = "DMA Status Register"]
|
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|
+pub mod r32_eth_dmasr { # [doc = "Register `R32_ETH_DMASR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMASR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMASR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMASR_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_ETH_DMASR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMASR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_DMASR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMASR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMASR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMASR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMASR` reader - DMA Status Register"]
|
|
|
+pub struct R32_ETH_DMASR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMASR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMASR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMASR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMASR` writer - DMA Status Register"]
|
|
|
+pub struct R32_ETH_DMASR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMASR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmasr (& self) -> R32_ETH_DMASR_R { R32_ETH_DMASR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Status Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmasr (& mut self) -> R32_ETH_DMASR_W { R32_ETH_DMASR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmasr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMASR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMASR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmasr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMASR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmasr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMASR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMASR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMASR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAOMR register accessor: an alias for `Reg<R32_ETH_DMAOMR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMAOMR = crate :: Reg < r32_eth_dmaomr :: R32_ETH_DMAOMR_SPEC > ; # [doc = "DMA Operate Mode Register"]
|
|
|
+pub mod r32_eth_dmaomr { # [doc = "Register `R32_ETH_DMAOMR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMAOMR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAOMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAOMR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMAOMR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAOMR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMAOMR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAOMR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAOMR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMAOMR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAOMR` reader - DMA Operate Mode Register"]
|
|
|
+pub struct R32_ETH_DMAOMR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAOMR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAOMR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAOMR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAOMR` writer - DMA Operate Mode Register"]
|
|
|
+pub struct R32_ETH_DMAOMR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAOMR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Operate Mode Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmaomr (& self) -> R32_ETH_DMAOMR_R { R32_ETH_DMAOMR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Operate Mode Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmaomr (& mut self) -> R32_ETH_DMAOMR_W { R32_ETH_DMAOMR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Operate Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmaomr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMAOMR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAOMR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmaomr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMAOMR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmaomr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMAOMR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAOMR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMAOMR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAIER register accessor: an alias for `Reg<R32_ETH_DMAIER_SPEC>`"]
|
|
|
+pub type R32_ETH_DMAIER = crate :: Reg < r32_eth_dmaier :: R32_ETH_DMAIER_SPEC > ; # [doc = "DMA Interrupt Enable Register"]
|
|
|
+pub mod r32_eth_dmaier { # [doc = "Register `R32_ETH_DMAIER` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMAIER_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAIER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAIER_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMAIER_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAIER` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMAIER_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAIER_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAIER_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMAIER_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAIER` reader - DMA Interrupt Enable Register"]
|
|
|
+pub struct R32_ETH_DMAIER_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAIER_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAIER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAIER_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAIER` writer - DMA Interrupt Enable Register"]
|
|
|
+pub struct R32_ETH_DMAIER_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAIER_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Interrupt Enable Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmaier (& self) -> R32_ETH_DMAIER_R { R32_ETH_DMAIER_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Interrupt Enable Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmaier (& mut self) -> R32_ETH_DMAIER_W { R32_ETH_DMAIER_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmaier](index.html) module"]
|
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+pub struct R32_ETH_DMAIER_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAIER_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmaier::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_DMAIER_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmaier::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMAIER_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAIER to value 0"]
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+impl crate :: Resettable for R32_ETH_DMAIER_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMAMFBOCR register accessor: an alias for `Reg<R32_ETH_DMAMFBOCR_SPEC>`"]
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+pub type R32_ETH_DMAMFBOCR = crate :: Reg < r32_eth_dmamfbocr :: R32_ETH_DMAMFBOCR_SPEC > ; # [doc = "DMA Missing Frame and Buffer Overflow Counter Register"]
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+pub mod r32_eth_dmamfbocr { # [doc = "Register `R32_ETH_DMAMFBOCR` reader"]
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+pub struct R (crate :: R < R32_ETH_DMAMFBOCR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMAMFBOCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMAMFBOCR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_DMAMFBOCR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMAMFBOCR` writer"]
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+pub struct W (crate :: W < R32_ETH_DMAMFBOCR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMAMFBOCR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMAMFBOCR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_DMAMFBOCR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMAMFBOCR` reader - DMA Missing Frame and Buffer Overflow Counter Register"]
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+pub struct R32_ETH_DMAMFBOCR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMAMFBOCR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMAMFBOCR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMAMFBOCR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMAMFBOCR` writer - DMA Missing Frame and Buffer Overflow Counter Register"]
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+pub struct R32_ETH_DMAMFBOCR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMAMFBOCR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Missing Frame and Buffer Overflow Counter Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmamfbocr (& self) -> R32_ETH_DMAMFBOCR_R { R32_ETH_DMAMFBOCR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Missing Frame and Buffer Overflow Counter Register"]
|
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+# [inline (always)]
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+pub fn r32_eth_dmamfbocr (& mut self) -> R32_ETH_DMAMFBOCR_W { R32_ETH_DMAMFBOCR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Missing Frame and Buffer Overflow Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmamfbocr](index.html) module"]
|
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+pub struct R32_ETH_DMAMFBOCR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMAMFBOCR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmamfbocr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_DMAMFBOCR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmamfbocr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMAMFBOCR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMAMFBOCR to value 0"]
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+impl crate :: Resettable for R32_ETH_DMAMFBOCR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMARSWTR register accessor: an alias for `Reg<R32_ETH_DMARSWTR_SPEC>`"]
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+pub type R32_ETH_DMARSWTR = crate :: Reg < r32_eth_dmarswtr :: R32_ETH_DMARSWTR_SPEC > ; # [doc = "DMA RX Status Watchdog Timer Register"]
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+pub mod r32_eth_dmarswtr { # [doc = "Register `R32_ETH_DMARSWTR` reader"]
|
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+pub struct R (crate :: R < R32_ETH_DMARSWTR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMARSWTR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMARSWTR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_DMARSWTR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMARSWTR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_DMARSWTR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMARSWTR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMARSWTR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_DMARSWTR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMARSWTR` reader - DMA RX Status Watchdog Timer Register"]
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+pub struct R32_ETH_DMARSWTR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMARSWTR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMARSWTR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMARSWTR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMARSWTR` writer - DMA RX Status Watchdog Timer Register"]
|
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|
+pub struct R32_ETH_DMARSWTR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMARSWTR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA RX Status Watchdog Timer Register"]
|
|
|
+# [inline (always)]
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+pub fn r32_eth_dmarswtr (& self) -> R32_ETH_DMARSWTR_R { R32_ETH_DMARSWTR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA RX Status Watchdog Timer Register"]
|
|
|
+# [inline (always)]
|
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|
+pub fn r32_eth_dmarswtr (& mut self) -> R32_ETH_DMARSWTR_W { R32_ETH_DMARSWTR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA RX Status Watchdog Timer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmarswtr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMARSWTR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMARSWTR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmarswtr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_ETH_DMARSWTR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmarswtr::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMARSWTR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMARSWTR to value 0"]
|
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|
+impl crate :: Resettable for R32_ETH_DMARSWTR_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHTDR register accessor: an alias for `Reg<R32_ETH_DMACHTDR_SPEC>`"]
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+pub type R32_ETH_DMACHTDR = crate :: Reg < r32_eth_dmachtdr :: R32_ETH_DMACHTDR_SPEC > ; # [doc = "DMA Current Host TX Description Register"]
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+pub mod r32_eth_dmachtdr { # [doc = "Register `R32_ETH_DMACHTDR` reader"]
|
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|
+pub struct R (crate :: R < R32_ETH_DMACHTDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHTDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHTDR_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_ETH_DMACHTDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHTDR` writer"]
|
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+pub struct W (crate :: W < R32_ETH_DMACHTDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHTDR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHTDR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMACHTDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHTDR` reader - DMA Current Host TX Description Register"]
|
|
|
+pub struct R32_ETH_DMACHTDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHTDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHTDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHTDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHTDR` writer - DMA Current Host TX Description Register"]
|
|
|
+pub struct R32_ETH_DMACHTDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHTDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host TX Description Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmachtdr (& self) -> R32_ETH_DMACHTDR_R { R32_ETH_DMACHTDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host TX Description Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmachtdr (& mut self) -> R32_ETH_DMACHTDR_W { R32_ETH_DMACHTDR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host TX Description Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachtdr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMACHTDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHTDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachtdr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMACHTDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachtdr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMACHTDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHTDR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMACHTDR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHRDR register accessor: an alias for `Reg<R32_ETH_DMACHRDR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMACHRDR = crate :: Reg < r32_eth_dmachrdr :: R32_ETH_DMACHRDR_SPEC > ; # [doc = "DMA Current Host RX Description Register"]
|
|
|
+pub mod r32_eth_dmachrdr { # [doc = "Register `R32_ETH_DMACHRDR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMACHRDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHRDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHRDR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMACHRDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHRDR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMACHRDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHRDR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHRDR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMACHRDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHRDR` reader - DMA Current Host RX Description Register"]
|
|
|
+pub struct R32_ETH_DMACHRDR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHRDR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHRDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHRDR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHRDR` writer - DMA Current Host RX Description Register"]
|
|
|
+pub struct R32_ETH_DMACHRDR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHRDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host RX Description Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmachrdr (& self) -> R32_ETH_DMACHRDR_R { R32_ETH_DMACHRDR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host RX Description Register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_eth_dmachrdr (& mut self) -> R32_ETH_DMACHRDR_W { R32_ETH_DMACHRDR_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host RX Description Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachrdr](index.html) module"]
|
|
|
+pub struct R32_ETH_DMACHRDR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHRDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachrdr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_ETH_DMACHRDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachrdr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_ETH_DMACHRDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHRDR to value 0"]
|
|
|
+impl crate :: Resettable for R32_ETH_DMACHRDR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHTBAR register accessor: an alias for `Reg<R32_ETH_DMACHTBAR_SPEC>`"]
|
|
|
+pub type R32_ETH_DMACHTBAR = crate :: Reg < r32_eth_dmachtbar :: R32_ETH_DMACHTBAR_SPEC > ; # [doc = "DMA Current Host TX Buffer Address Register"]
|
|
|
+pub mod r32_eth_dmachtbar { # [doc = "Register `R32_ETH_DMACHTBAR` reader"]
|
|
|
+pub struct R (crate :: R < R32_ETH_DMACHTBAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHTBAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHTBAR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_ETH_DMACHTBAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHTBAR` writer"]
|
|
|
+pub struct W (crate :: W < R32_ETH_DMACHTBAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHTBAR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHTBAR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_ETH_DMACHTBAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHTBAR` reader - DMA Current Host TX Buffer Address Register"]
|
|
|
+pub struct R32_ETH_DMACHTBAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHTBAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHTBAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHTBAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHTBAR` writer - DMA Current Host TX Buffer Address Register"]
|
|
|
+pub struct R32_ETH_DMACHTBAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHTBAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host TX Buffer Address Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmachtbar (& self) -> R32_ETH_DMACHTBAR_R { R32_ETH_DMACHTBAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host TX Buffer Address Register"]
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|
|
+# [inline (always)]
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+pub fn r32_eth_dmachtbar (& mut self) -> R32_ETH_DMACHTBAR_W { R32_ETH_DMACHTBAR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host TX Buffer Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachtbar](index.html) module"]
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+pub struct R32_ETH_DMACHTBAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHTBAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachtbar::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_DMACHTBAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachtbar::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMACHTBAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHTBAR to value 0"]
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+impl crate :: Resettable for R32_ETH_DMACHTBAR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_ETH_DMACHRBAR register accessor: an alias for `Reg<R32_ETH_DMACHRBAR_SPEC>`"]
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+pub type R32_ETH_DMACHRBAR = crate :: Reg < r32_eth_dmachrbar :: R32_ETH_DMACHRBAR_SPEC > ; # [doc = "DMA Current Host RX Buffer Address Register"]
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+pub mod r32_eth_dmachrbar { # [doc = "Register `R32_ETH_DMACHRBAR` reader"]
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+pub struct R (crate :: R < R32_ETH_DMACHRBAR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_ETH_DMACHRBAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_ETH_DMACHRBAR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_ETH_DMACHRBAR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_ETH_DMACHRBAR` writer"]
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+pub struct W (crate :: W < R32_ETH_DMACHRBAR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_ETH_DMACHRBAR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_ETH_DMACHRBAR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_ETH_DMACHRBAR_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_ETH_DMACHRBAR` reader - DMA Current Host RX Buffer Address Register"]
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+pub struct R32_ETH_DMACHRBAR_R (crate :: FieldReader < u32 , u32 >) ; impl R32_ETH_DMACHRBAR_R { pub (crate) fn new (bits : u32) -> Self { R32_ETH_DMACHRBAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_ETH_DMACHRBAR_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `R32_ETH_DMACHRBAR` writer - DMA Current Host RX Buffer Address Register"]
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+pub struct R32_ETH_DMACHRBAR_W < 'a > { w : & 'a mut W , } impl < 'a > R32_ETH_DMACHRBAR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - DMA Current Host RX Buffer Address Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmachrbar (& self) -> R32_ETH_DMACHRBAR_R { R32_ETH_DMACHRBAR_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - DMA Current Host RX Buffer Address Register"]
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+# [inline (always)]
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+pub fn r32_eth_dmachrbar (& mut self) -> R32_ETH_DMACHRBAR_W { R32_ETH_DMACHRBAR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DMA Current Host RX Buffer Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_eth_dmachrbar](index.html) module"]
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+pub struct R32_ETH_DMACHRBAR_SPEC ; impl crate :: RegisterSpec for R32_ETH_DMACHRBAR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_eth_dmachrbar::R](R) reader structure"]
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+impl crate :: Readable for R32_ETH_DMACHRBAR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_eth_dmachrbar::W](W) writer structure"]
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+impl crate :: Writable for R32_ETH_DMACHRBAR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_ETH_DMACHRBAR to value 0"]
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|
+impl crate :: Resettable for R32_ETH_DMACHRBAR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "DVP register"]
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+pub struct DVP { _marker : PhantomData < * const () > } unsafe impl Send for DVP { } impl DVP { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const dvp :: RegisterBlock = 0x4000_e000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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+pub const fn ptr () -> * const dvp :: RegisterBlock { Self :: PTR } } impl Deref for DVP { type Target = dvp :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for DVP { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("DVP") . finish () } } # [doc = "DVP register"]
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+pub mod dvp { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - DVP control register0"]
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+pub r8_dvp_cr0 : crate :: Reg < r8_dvp_cr0 :: R8_DVP_CR0_SPEC > , # [doc = "0x01 - DVP control register1"]
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+pub r8_dvp_cr1 : crate :: Reg < r8_dvp_cr1 :: R8_DVP_CR1_SPEC > , # [doc = "0x02 - DVP interrupt enable register"]
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+pub r8_dvp_int_en : crate :: Reg < r8_dvp_int_en :: R8_DVP_INT_EN_SPEC > , _reserved3 : [u8 ; 0x01]
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+, # [doc = "0x04 - DVP row number of a frame indicator register"]
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+pub r16_dvp_row_num : crate :: Reg < r16_dvp_row_num :: R16_DVP_ROW_NUM_SPEC > , # [doc = "0x06 - DVP row number of a frame indicator register"]
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+pub r16_dvp_col_num : crate :: Reg < r16_dvp_col_num :: R16_DVP_COL_NUM_SPEC > , # [doc = "0x08 - DVP dma buffer0 addr"]
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+pub r32_dvp_dma_buf0 : crate :: Reg < r32_dvp_dma_buf0 :: R32_DVP_DMA_BUF0_SPEC > , # [doc = "0x0c - DVP dma buffer1 addr"]
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|
+pub r32_dvp_dma_buf1 : crate :: Reg < r32_dvp_dma_buf1 :: R32_DVP_DMA_BUF1_SPEC > , _reserved_7_r8_dvp : [u8 ; 0x04]
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+, # [doc = "0x14 - DVP row count value"]
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+pub r16_dvp_row_cnt : crate :: Reg < r16_dvp_row_cnt :: R16_DVP_ROW_CNT_SPEC > , # [doc = "0x16 - DVP col count value"]
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+pub r16_dvp_col_cnt : crate :: Reg < r16_dvp_col_cnt :: R16_DVP_COL_CNT_SPEC > , } impl RegisterBlock { # [doc = "0x10 - DVP interrupt flag register"]
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|
|
+# [inline (always)]
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+pub fn r8_dvp_int_flag (& self) -> & crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (16usize) as * const crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC >) } } # [doc = "0x11 - DVP receive fifo status"]
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+# [inline (always)]
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+pub fn r8_dvp_fifo_st (& self) -> & crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (17usize) as * const crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC >) } } } # [doc = "R8_DVP_CR0 register accessor: an alias for `Reg<R8_DVP_CR0_SPEC>`"]
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|
+pub type R8_DVP_CR0 = crate :: Reg < r8_dvp_cr0 :: R8_DVP_CR0_SPEC > ; # [doc = "DVP control register0"]
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+pub mod r8_dvp_cr0 { # [doc = "Register `R8_DVP_CR0` reader"]
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+pub struct R (crate :: R < R8_DVP_CR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_CR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_CR0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_DVP_CR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_CR0` writer"]
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+pub struct W (crate :: W < R8_DVP_CR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_CR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_CR0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_DVP_CR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_ENABLE` reader - DVP enable"]
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+pub struct RB_DVP_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ENABLE` writer - DVP enable"]
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+pub struct RB_DVP_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_V_POLAR` reader - DVP VSYNC polarity control"]
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+pub struct RB_DVP_V_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_V_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_V_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_V_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_V_POLAR` writer - DVP VSYNC polarity control"]
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+pub struct RB_DVP_V_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_V_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_H_POLAR` reader - DVP HSYNC polarity control"]
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+pub struct RB_DVP_H_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_H_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_H_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_H_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_H_POLAR` writer - DVP HSYNC polarity control"]
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+pub struct RB_DVP_H_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_H_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_P_POLAR` reader - DVP PCLK polarity control"]
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+pub struct RB_DVP_P_POLAR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_P_POLAR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_P_POLAR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_P_POLAR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_P_POLAR` writer - DVP PCLK polarity control"]
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+pub struct RB_DVP_P_POLAR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_P_POLAR_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_MSK_DAT_MOD` reader - DVP data bit width confguration"]
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+pub struct RB_DVP_MSK_DAT_MOD_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DVP_MSK_DAT_MOD_R { pub (crate) fn new (bits : u8) -> Self { RB_DVP_MSK_DAT_MOD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_MSK_DAT_MOD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_MSK_DAT_MOD` writer - DVP data bit width confguration"]
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|
+pub struct RB_DVP_MSK_DAT_MOD_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_MSK_DAT_MOD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 4)) | ((value as u8 & 0x03) << 4) ; self . w } } # [doc = "Field `RB_DVP_JPEG` reader - DVP JPEG mode"]
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|
|
+pub struct RB_DVP_JPEG_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_JPEG_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_JPEG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_JPEG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_JPEG` writer - DVP JPEG mode"]
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|
|
+pub struct RB_DVP_JPEG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_JPEG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u8 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_DVP_RAW_CM` reader - DVP row count mode"]
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|
|
+pub struct RB_DVP_RAW_CM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_RAW_CM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_RAW_CM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_RAW_CM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_RAW_CM` writer - DVP row count mode"]
|
|
|
+pub struct RB_DVP_RAW_CM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_RAW_CM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u8 & 0x01) << 7) ; self . w } } impl R { # [doc = "Bit 0 - DVP enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_enable (& self) -> RB_DVP_ENABLE_R { RB_DVP_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP VSYNC polarity control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_v_polar (& self) -> RB_DVP_V_POLAR_R { RB_DVP_V_POLAR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP HSYNC polarity control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_h_polar (& self) -> RB_DVP_H_POLAR_R { RB_DVP_H_POLAR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP PCLK polarity control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_p_polar (& self) -> RB_DVP_P_POLAR_R { RB_DVP_P_POLAR_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bits 4:5 - DVP data bit width confguration"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_msk_dat_mod (& self) -> RB_DVP_MSK_DAT_MOD_R { RB_DVP_MSK_DAT_MOD_R :: new (((self . bits >> 4) & 0x03) as u8) } # [doc = "Bit 6 - DVP JPEG mode"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_jpeg (& self) -> RB_DVP_JPEG_R { RB_DVP_JPEG_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - DVP row count mode"]
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|
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+# [inline (always)]
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+pub fn rb_dvp_raw_cm (& self) -> RB_DVP_RAW_CM_R { RB_DVP_RAW_CM_R :: new (((self . bits >> 7) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP enable"]
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+# [inline (always)]
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+pub fn rb_dvp_enable (& mut self) -> RB_DVP_ENABLE_W { RB_DVP_ENABLE_W { w : self } } # [doc = "Bit 1 - DVP VSYNC polarity control"]
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+# [inline (always)]
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+pub fn rb_dvp_v_polar (& mut self) -> RB_DVP_V_POLAR_W { RB_DVP_V_POLAR_W { w : self } } # [doc = "Bit 2 - DVP HSYNC polarity control"]
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+# [inline (always)]
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+pub fn rb_dvp_h_polar (& mut self) -> RB_DVP_H_POLAR_W { RB_DVP_H_POLAR_W { w : self } } # [doc = "Bit 3 - DVP PCLK polarity control"]
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|
|
+# [inline (always)]
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+pub fn rb_dvp_p_polar (& mut self) -> RB_DVP_P_POLAR_W { RB_DVP_P_POLAR_W { w : self } } # [doc = "Bits 4:5 - DVP data bit width confguration"]
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+# [inline (always)]
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+pub fn rb_dvp_msk_dat_mod (& mut self) -> RB_DVP_MSK_DAT_MOD_W { RB_DVP_MSK_DAT_MOD_W { w : self } } # [doc = "Bit 6 - DVP JPEG mode"]
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|
+# [inline (always)]
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+pub fn rb_dvp_jpeg (& mut self) -> RB_DVP_JPEG_W { RB_DVP_JPEG_W { w : self } } # [doc = "Bit 7 - DVP row count mode"]
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+# [inline (always)]
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+pub fn rb_dvp_raw_cm (& mut self) -> RB_DVP_RAW_CM_W { RB_DVP_RAW_CM_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP control register0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_cr0](index.html) module"]
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+pub struct R8_DVP_CR0_SPEC ; impl crate :: RegisterSpec for R8_DVP_CR0_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_cr0::R](R) reader structure"]
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+impl crate :: Readable for R8_DVP_CR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_cr0::W](W) writer structure"]
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+impl crate :: Writable for R8_DVP_CR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_CR0 to value 0"]
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+impl crate :: Resettable for R8_DVP_CR0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_CR1 register accessor: an alias for `Reg<R8_DVP_CR1_SPEC>`"]
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+pub type R8_DVP_CR1 = crate :: Reg < r8_dvp_cr1 :: R8_DVP_CR1_SPEC > ; # [doc = "DVP control register1"]
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+pub mod r8_dvp_cr1 { # [doc = "Register `R8_DVP_CR1` reader"]
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+pub struct R (crate :: R < R8_DVP_CR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_CR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_CR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_DVP_CR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_CR1` writer"]
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+pub struct W (crate :: W < R8_DVP_CR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_CR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_CR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_DVP_CR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_ENABLE` reader - DVP dma enable"]
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+pub struct RB_DVP_DMA_ENABLE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_DMA_ENABLE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_DMA_ENABLE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_ENABLE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_ENABLE` writer - DVP dma enable"]
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+pub struct RB_DVP_DMA_ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_ENABLE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_ALL_CLR` reader - DVP all clear, high action"]
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+pub struct RB_DVP_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ALL_CLR` writer - DVP all clear, high action"]
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+pub struct RB_DVP_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
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|
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+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_RCV_CLR` reader - DVP receive logic clear, high action"]
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+pub struct RB_DVP_RCV_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_RCV_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_RCV_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_RCV_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_RCV_CLR` writer - DVP receive logic clear, high action"]
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|
|
+pub struct RB_DVP_RCV_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_RCV_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_BUF_TOG` reader - DVP bug toggle by software"]
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|
|
+pub struct RB_DVP_BUF_TOG_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_BUF_TOG_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_BUF_TOG_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_BUF_TOG_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_BUF_TOG` writer - DVP bug toggle by software"]
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|
|
+pub struct RB_DVP_BUF_TOG_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_BUF_TOG_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } impl R { # [doc = "Bit 0 - DVP dma enable"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_dvp_dma_enable (& self) -> RB_DVP_DMA_ENABLE_R { RB_DVP_DMA_ENABLE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP all clear, high action"]
|
|
|
+# [inline (always)]
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|
+pub fn rb_dvp_all_clr (& self) -> RB_DVP_ALL_CLR_R { RB_DVP_ALL_CLR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP receive logic clear, high action"]
|
|
|
+# [inline (always)]
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+pub fn rb_dvp_rcv_clr (& self) -> RB_DVP_RCV_CLR_R { RB_DVP_RCV_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP bug toggle by software"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_dvp_buf_tog (& self) -> RB_DVP_BUF_TOG_R { RB_DVP_BUF_TOG_R :: new (((self . bits >> 3) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP dma enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_dvp_dma_enable (& mut self) -> RB_DVP_DMA_ENABLE_W { RB_DVP_DMA_ENABLE_W { w : self } } # [doc = "Bit 1 - DVP all clear, high action"]
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|
|
+# [inline (always)]
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|
+pub fn rb_dvp_all_clr (& mut self) -> RB_DVP_ALL_CLR_W { RB_DVP_ALL_CLR_W { w : self } } # [doc = "Bit 2 - DVP receive logic clear, high action"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_dvp_rcv_clr (& mut self) -> RB_DVP_RCV_CLR_W { RB_DVP_RCV_CLR_W { w : self } } # [doc = "Bit 3 - DVP bug toggle by software"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_dvp_buf_tog (& mut self) -> RB_DVP_BUF_TOG_W { RB_DVP_BUF_TOG_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP control register1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_cr1](index.html) module"]
|
|
|
+pub struct R8_DVP_CR1_SPEC ; impl crate :: RegisterSpec for R8_DVP_CR1_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_cr1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_DVP_CR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_cr1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R8_DVP_CR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_CR1 to value 0x06"]
|
|
|
+impl crate :: Resettable for R8_DVP_CR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x06 } } } # [doc = "R8_DVP_INT_EN register accessor: an alias for `Reg<R8_DVP_INT_EN_SPEC>`"]
|
|
|
+pub type R8_DVP_INT_EN = crate :: Reg < r8_dvp_int_en :: R8_DVP_INT_EN_SPEC > ; # [doc = "DVP interrupt enable register"]
|
|
|
+pub mod r8_dvp_int_en { # [doc = "Register `R8_DVP_INT_EN` reader"]
|
|
|
+pub struct R (crate :: R < R8_DVP_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_INT_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_INT_EN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_DVP_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_INT_EN` writer"]
|
|
|
+pub struct W (crate :: W < R8_DVP_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_INT_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_INT_EN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_DVP_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_IE_STR_FRM` reader - DVP frame start interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_STR_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_STR_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_STR_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_STR_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_STR_FRM` writer - DVP frame start interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_STR_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_STR_FRM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u8 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_IE_ROW_DONE` reader - DVP row received done interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_ROW_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_ROW_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_ROW_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_ROW_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_ROW_DONE` writer - DVP row received done interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_ROW_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_ROW_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u8 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_IE_FRM_DONE` reader - DVP frame received done interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_FRM_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_FRM_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_FRM_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_FRM_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_FRM_DONE` writer - DVP frame received done interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_FRM_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_FRM_DONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_IE_FIFO_OV` reader - DVP receive fifo overflow interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_FIFO_OV` writer - DVP receive fifo overflow interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_IE_STP_FRM` reader - DVP frame stop interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_STP_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IE_STP_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IE_STP_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IE_STP_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IE_STP_FRM` writer - DVP frame stop interrupt enable"]
|
|
|
+pub struct RB_DVP_IE_STP_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IE_STP_FRM_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - DVP frame start interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_str_frm (& self) -> RB_DVP_IE_STR_FRM_R { RB_DVP_IE_STR_FRM_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP row received done interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_row_done (& self) -> RB_DVP_IE_ROW_DONE_R { RB_DVP_IE_ROW_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP frame received done interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_frm_done (& self) -> RB_DVP_IE_FRM_DONE_R { RB_DVP_IE_FRM_DONE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - DVP receive fifo overflow interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_fifo_ov (& self) -> RB_DVP_IE_FIFO_OV_R { RB_DVP_IE_FIFO_OV_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - DVP frame stop interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_stp_frm (& self) -> RB_DVP_IE_STP_FRM_R { RB_DVP_IE_STP_FRM_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - DVP frame start interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_str_frm (& mut self) -> RB_DVP_IE_STR_FRM_W { RB_DVP_IE_STR_FRM_W { w : self } } # [doc = "Bit 1 - DVP row received done interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_row_done (& mut self) -> RB_DVP_IE_ROW_DONE_W { RB_DVP_IE_ROW_DONE_W { w : self } } # [doc = "Bit 2 - DVP frame received done interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_frm_done (& mut self) -> RB_DVP_IE_FRM_DONE_W { RB_DVP_IE_FRM_DONE_W { w : self } } # [doc = "Bit 3 - DVP receive fifo overflow interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_fifo_ov (& mut self) -> RB_DVP_IE_FIFO_OV_W { RB_DVP_IE_FIFO_OV_W { w : self } } # [doc = "Bit 4 - DVP frame stop interrupt enable"]
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+# [inline (always)]
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+pub fn rb_dvp_ie_stp_frm (& mut self) -> RB_DVP_IE_STP_FRM_W { RB_DVP_IE_STP_FRM_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_int_en](index.html) module"]
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+pub struct R8_DVP_INT_EN_SPEC ; impl crate :: RegisterSpec for R8_DVP_INT_EN_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_int_en::R](R) reader structure"]
|
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+impl crate :: Readable for R8_DVP_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_int_en::W](W) writer structure"]
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+impl crate :: Writable for R8_DVP_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_INT_EN to value 0"]
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+impl crate :: Resettable for R8_DVP_INT_EN_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_ROW_NUM register accessor: an alias for `Reg<R16_DVP_ROW_NUM_SPEC>`"]
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+pub type R16_DVP_ROW_NUM = crate :: Reg < r16_dvp_row_num :: R16_DVP_ROW_NUM_SPEC > ; # [doc = "DVP row number of a frame indicator register"]
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+pub mod r16_dvp_row_num { # [doc = "Register `R16_DVP_ROW_NUM` reader"]
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+pub struct R (crate :: R < R16_DVP_ROW_NUM_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_ROW_NUM_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_ROW_NUM_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R16_DVP_ROW_NUM_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_DVP_ROW_NUM` writer"]
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+pub struct W (crate :: W < R16_DVP_ROW_NUM_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_DVP_ROW_NUM_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_DVP_ROW_NUM_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_DVP_ROW_NUM_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_ROW_NUM` reader - the number of rows contained in a frame of image data"]
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+pub struct RB_DVP_ROW_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_ROW_NUM_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_ROW_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ROW_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_ROW_NUM` writer - the number of rows contained in a frame of image data"]
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+pub struct RB_DVP_ROW_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_ROW_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of rows contained in a frame of image data"]
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+# [inline (always)]
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+pub fn rb_dvp_row_num (& self) -> RB_DVP_ROW_NUM_R { RB_DVP_ROW_NUM_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of rows contained in a frame of image data"]
|
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+# [inline (always)]
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+pub fn rb_dvp_row_num (& mut self) -> RB_DVP_ROW_NUM_W { RB_DVP_ROW_NUM_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP row number of a frame indicator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_row_num](index.html) module"]
|
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|
+pub struct R16_DVP_ROW_NUM_SPEC ; impl crate :: RegisterSpec for R16_DVP_ROW_NUM_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_row_num::R](R) reader structure"]
|
|
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+impl crate :: Readable for R16_DVP_ROW_NUM_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_dvp_row_num::W](W) writer structure"]
|
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+impl crate :: Writable for R16_DVP_ROW_NUM_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_DVP_ROW_NUM to value 0"]
|
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+impl crate :: Resettable for R16_DVP_ROW_NUM_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_COL_NUM register accessor: an alias for `Reg<R16_DVP_COL_NUM_SPEC>`"]
|
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+pub type R16_DVP_COL_NUM = crate :: Reg < r16_dvp_col_num :: R16_DVP_COL_NUM_SPEC > ; # [doc = "DVP row number of a frame indicator register"]
|
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+pub mod r16_dvp_col_num { # [doc = "Register `R16_DVP_COL_NUM` reader"]
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|
+pub struct R (crate :: R < R16_DVP_COL_NUM_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_COL_NUM_SPEC > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_COL_NUM_SPEC >> for R { # [inline (always)]
|
|
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+fn from (reader : crate :: R < R16_DVP_COL_NUM_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_DVP_COL_NUM` writer"]
|
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+pub struct W (crate :: W < R16_DVP_COL_NUM_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_DVP_COL_NUM_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_DVP_COL_NUM_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R16_DVP_COL_NUM_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_COL_NUM` reader - the number of PCLK cyccles contained in a row of data in RGB mode"]
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+pub struct RB_DVP_COL_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_COL_NUM_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_COL_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_COL_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_COL_NUM` writer - the number of PCLK cyccles contained in a row of data in RGB mode"]
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+pub struct RB_DVP_COL_NUM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_COL_NUM_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u16 & 0xffff) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of PCLK cyccles contained in a row of data in RGB mode"]
|
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+# [inline (always)]
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+pub fn rb_dvp_col_num (& self) -> RB_DVP_COL_NUM_R { RB_DVP_COL_NUM_R :: new ((self . bits & 0xffff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of PCLK cyccles contained in a row of data in RGB mode"]
|
|
|
+# [inline (always)]
|
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+pub fn rb_dvp_col_num (& mut self) -> RB_DVP_COL_NUM_W { RB_DVP_COL_NUM_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP row number of a frame indicator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_col_num](index.html) module"]
|
|
|
+pub struct R16_DVP_COL_NUM_SPEC ; impl crate :: RegisterSpec for R16_DVP_COL_NUM_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_col_num::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_DVP_COL_NUM_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_dvp_col_num::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_DVP_COL_NUM_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_DVP_COL_NUM to value 0"]
|
|
|
+impl crate :: Resettable for R16_DVP_COL_NUM_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_DVP_DMA_BUF0 register accessor: an alias for `Reg<R32_DVP_DMA_BUF0_SPEC>`"]
|
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|
+pub type R32_DVP_DMA_BUF0 = crate :: Reg < r32_dvp_dma_buf0 :: R32_DVP_DMA_BUF0_SPEC > ; # [doc = "DVP dma buffer0 addr"]
|
|
|
+pub mod r32_dvp_dma_buf0 { # [doc = "Register `R32_DVP_DMA_BUF0` reader"]
|
|
|
+pub struct R (crate :: R < R32_DVP_DMA_BUF0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_DVP_DMA_BUF0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_DVP_DMA_BUF0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_DVP_DMA_BUF0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_DVP_DMA_BUF0` writer"]
|
|
|
+pub struct W (crate :: W < R32_DVP_DMA_BUF0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_DVP_DMA_BUF0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_DVP_DMA_BUF0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_DVP_DMA_BUF0_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_BUF0` reader - the receiving address 0 of DMA"]
|
|
|
+pub struct RB_DVP_DMA_BUF0_R (crate :: FieldReader < u32 , u32 >) ; impl RB_DVP_DMA_BUF0_R { pub (crate) fn new (bits : u32) -> Self { RB_DVP_DMA_BUF0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_BUF0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_BUF0` writer - the receiving address 0 of DMA"]
|
|
|
+pub struct RB_DVP_DMA_BUF0_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_BUF0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - the receiving address 0 of DMA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_dma_buf0 (& self) -> RB_DVP_DMA_BUF0_R { RB_DVP_DMA_BUF0_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - the receiving address 0 of DMA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_dma_buf0 (& mut self) -> RB_DVP_DMA_BUF0_W { RB_DVP_DMA_BUF0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP dma buffer0 addr\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_dvp_dma_buf0](index.html) module"]
|
|
|
+pub struct R32_DVP_DMA_BUF0_SPEC ; impl crate :: RegisterSpec for R32_DVP_DMA_BUF0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_dvp_dma_buf0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_DVP_DMA_BUF0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_dvp_dma_buf0::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_DVP_DMA_BUF0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_DVP_DMA_BUF0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_DVP_DMA_BUF0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_DVP_DMA_BUF1 register accessor: an alias for `Reg<R32_DVP_DMA_BUF1_SPEC>`"]
|
|
|
+pub type R32_DVP_DMA_BUF1 = crate :: Reg < r32_dvp_dma_buf1 :: R32_DVP_DMA_BUF1_SPEC > ; # [doc = "DVP dma buffer1 addr"]
|
|
|
+pub mod r32_dvp_dma_buf1 { # [doc = "Register `R32_DVP_DMA_BUF1` reader"]
|
|
|
+pub struct R (crate :: R < R32_DVP_DMA_BUF1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_DVP_DMA_BUF1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_DVP_DMA_BUF1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_DVP_DMA_BUF1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_DVP_DMA_BUF1` writer"]
|
|
|
+pub struct W (crate :: W < R32_DVP_DMA_BUF1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_DVP_DMA_BUF1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_DVP_DMA_BUF1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_DVP_DMA_BUF1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_DMA_BUF1` reader - the receiving address1 of DMA"]
|
|
|
+pub struct RB_DVP_DMA_BUF1_R (crate :: FieldReader < u32 , u32 >) ; impl RB_DVP_DMA_BUF1_R { pub (crate) fn new (bits : u32) -> Self { RB_DVP_DMA_BUF1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_DMA_BUF1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_DMA_BUF1` writer - the receiving address1 of DMA"]
|
|
|
+pub struct RB_DVP_DMA_BUF1_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_DMA_BUF1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - the receiving address1 of DMA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_dma_buf1 (& self) -> RB_DVP_DMA_BUF1_R { RB_DVP_DMA_BUF1_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - the receiving address1 of DMA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_dma_buf1 (& mut self) -> RB_DVP_DMA_BUF1_W { RB_DVP_DMA_BUF1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP dma buffer1 addr\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_dvp_dma_buf1](index.html) module"]
|
|
|
+pub struct R32_DVP_DMA_BUF1_SPEC ; impl crate :: RegisterSpec for R32_DVP_DMA_BUF1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_dvp_dma_buf1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_DVP_DMA_BUF1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_dvp_dma_buf1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_DVP_DMA_BUF1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_DVP_DMA_BUF1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_DVP_DMA_BUF1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_INT_FLAG register accessor: an alias for `Reg<R8_DVP_INT_FLAG_SPEC>`"]
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+pub type R8_DVP_INT_FLAG = crate :: Reg < r8_dvp_int_flag :: R8_DVP_INT_FLAG_SPEC > ; # [doc = "DVP interrupt flag register"]
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+pub mod r8_dvp_int_flag { # [doc = "Register `R8_DVP_INT_FLAG` reader"]
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+pub struct R (crate :: R < R8_DVP_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_INT_FLAG_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_DVP_INT_FLAG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_DVP_INT_FLAG` writer"]
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+pub struct W (crate :: W < R8_DVP_INT_FLAG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_DVP_INT_FLAG_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_DVP_INT_FLAG_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_DVP_INT_FLAG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_DVP_IF_STR_FRM` reader - interrupt flag for DVP frame start"]
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+pub struct RB_DVP_IF_STR_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_STR_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_STR_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_STR_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_STR_FRM` writer - interrupt flag for DVP frame start"]
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+pub struct RB_DVP_IF_STR_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_STR_FRM_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `RB_DVP_IF_ROW_DONE` reader - interrupt flag for DVP row receive done"]
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+pub struct RB_DVP_IF_ROW_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_ROW_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_ROW_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_ROW_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_ROW_DONE` writer - interrupt flag for DVP row receive done"]
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+pub struct RB_DVP_IF_ROW_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_ROW_DONE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_DVP_IF_FRM_DONE` reader - interrupt flag for DVP frame receive done"]
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+pub struct RB_DVP_IF_FRM_DONE_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_FRM_DONE_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_FRM_DONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_FRM_DONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_FRM_DONE` writer - interrupt flag for DVP frame receive done"]
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+pub struct RB_DVP_IF_FRM_DONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_FRM_DONE_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_DVP_IF_FIFO_OV` reader - interrupt flag for DVP receive fifo overflow"]
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+pub struct RB_DVP_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_FIFO_OV` writer - interrupt flag for DVP receive fifo overflow"]
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+pub struct RB_DVP_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_DVP_IF_STP_FRM` reader - interrupt flag for DVP frame stop"]
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+pub struct RB_DVP_IF_STP_FRM_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_IF_STP_FRM_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_IF_STP_FRM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_IF_STP_FRM_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_IF_STP_FRM` writer - interrupt flag for DVP frame stop"]
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+pub struct RB_DVP_IF_STP_FRM_W < 'a > { w : & 'a mut W , } impl < 'a > RB_DVP_IF_STP_FRM_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } impl R { # [doc = "Bit 0 - interrupt flag for DVP frame start"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_str_frm (& self) -> RB_DVP_IF_STR_FRM_R { RB_DVP_IF_STR_FRM_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - interrupt flag for DVP row receive done"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_row_done (& self) -> RB_DVP_IF_ROW_DONE_R { RB_DVP_IF_ROW_DONE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - interrupt flag for DVP frame receive done"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_frm_done (& self) -> RB_DVP_IF_FRM_DONE_R { RB_DVP_IF_FRM_DONE_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - interrupt flag for DVP receive fifo overflow"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_fifo_ov (& self) -> RB_DVP_IF_FIFO_OV_R { RB_DVP_IF_FIFO_OV_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - interrupt flag for DVP frame stop"]
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|
|
+# [inline (always)]
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|
+pub fn rb_dvp_if_stp_frm (& self) -> RB_DVP_IF_STP_FRM_R { RB_DVP_IF_STP_FRM_R :: new (((self . bits >> 4) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - interrupt flag for DVP frame start"]
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|
|
+# [inline (always)]
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+pub fn rb_dvp_if_str_frm (& mut self) -> RB_DVP_IF_STR_FRM_W { RB_DVP_IF_STR_FRM_W { w : self } } # [doc = "Bit 1 - interrupt flag for DVP row receive done"]
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|
|
+# [inline (always)]
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+pub fn rb_dvp_if_row_done (& mut self) -> RB_DVP_IF_ROW_DONE_W { RB_DVP_IF_ROW_DONE_W { w : self } } # [doc = "Bit 2 - interrupt flag for DVP frame receive done"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_frm_done (& mut self) -> RB_DVP_IF_FRM_DONE_W { RB_DVP_IF_FRM_DONE_W { w : self } } # [doc = "Bit 3 - interrupt flag for DVP receive fifo overflow"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_fifo_ov (& mut self) -> RB_DVP_IF_FIFO_OV_W { RB_DVP_IF_FIFO_OV_W { w : self } } # [doc = "Bit 4 - interrupt flag for DVP frame stop"]
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|
+# [inline (always)]
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+pub fn rb_dvp_if_stp_frm (& mut self) -> RB_DVP_IF_STP_FRM_W { RB_DVP_IF_STP_FRM_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "DVP interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_int_flag](index.html) module"]
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|
+pub struct R8_DVP_INT_FLAG_SPEC ; impl crate :: RegisterSpec for R8_DVP_INT_FLAG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r8_dvp_int_flag::R](R) reader structure"]
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|
+impl crate :: Readable for R8_DVP_INT_FLAG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_dvp_int_flag::W](W) writer structure"]
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+impl crate :: Writable for R8_DVP_INT_FLAG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_DVP_INT_FLAG to value 0"]
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|
+impl crate :: Resettable for R8_DVP_INT_FLAG_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_DVP_FIFO_ST register accessor: an alias for `Reg<R8_DVP_FIFO_ST_SPEC>`"]
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+pub type R8_DVP_FIFO_ST = crate :: Reg < r8_dvp_fifo_st :: R8_DVP_FIFO_ST_SPEC > ; # [doc = "DVP receive fifo status"]
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|
+pub mod r8_dvp_fifo_st { # [doc = "Register `R8_DVP_FIFO_ST` reader"]
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|
+pub struct R (crate :: R < R8_DVP_FIFO_ST_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_DVP_FIFO_ST_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_DVP_FIFO_ST_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_DVP_FIFO_ST_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_FIFO_RDY` reader - DVP receive fifo ready"]
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|
|
+pub struct RB_DVP_FIFO_RDY_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_RDY_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_RDY_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_FIFO_FULL` reader - DVP receive fifo full"]
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|
|
+pub struct RB_DVP_FIFO_FULL_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_FULL_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_FULL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_FULL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_FIFO_OV` reader - DVP receive fifo overflow"]
|
|
|
+pub struct RB_DVP_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_DVP_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_DVP_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_DVP_MSK_FIFO_CNT` reader - DVP receive fifo count"]
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|
+pub struct RB_DVP_MSK_FIFO_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_DVP_MSK_FIFO_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_DVP_MSK_FIFO_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_MSK_FIFO_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bit 0 - DVP receive fifo ready"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_fifo_rdy (& self) -> RB_DVP_FIFO_RDY_R { RB_DVP_FIFO_RDY_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - DVP receive fifo full"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_dvp_fifo_full (& self) -> RB_DVP_FIFO_FULL_R { RB_DVP_FIFO_FULL_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - DVP receive fifo overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_fifo_ov (& self) -> RB_DVP_FIFO_OV_R { RB_DVP_FIFO_OV_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bits 4:6 - DVP receive fifo count"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_msk_fifo_cnt (& self) -> RB_DVP_MSK_FIFO_CNT_R { RB_DVP_MSK_FIFO_CNT_R :: new (((self . bits >> 4) & 0x07) as u8) } } # [doc = "DVP receive fifo status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_dvp_fifo_st](index.html) module"]
|
|
|
+pub struct R8_DVP_FIFO_ST_SPEC ; impl crate :: RegisterSpec for R8_DVP_FIFO_ST_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_dvp_fifo_st::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R8_DVP_FIFO_ST_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R8_DVP_FIFO_ST to value 0"]
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|
|
+impl crate :: Resettable for R8_DVP_FIFO_ST_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_ROW_CNT register accessor: an alias for `Reg<R16_DVP_ROW_CNT_SPEC>`"]
|
|
|
+pub type R16_DVP_ROW_CNT = crate :: Reg < r16_dvp_row_cnt :: R16_DVP_ROW_CNT_SPEC > ; # [doc = "DVP row count value"]
|
|
|
+pub mod r16_dvp_row_cnt { # [doc = "Register `R16_DVP_ROW_CNT` reader"]
|
|
|
+pub struct R (crate :: R < R16_DVP_ROW_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_ROW_CNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_ROW_CNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_DVP_ROW_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_ROW_CNT` reader - DVP receive fifo full"]
|
|
|
+pub struct RB_DVP_ROW_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_ROW_CNT_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_ROW_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_ROW_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - DVP receive fifo full"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_row_cnt (& self) -> RB_DVP_ROW_CNT_R { RB_DVP_ROW_CNT_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "DVP row count value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_row_cnt](index.html) module"]
|
|
|
+pub struct R16_DVP_ROW_CNT_SPEC ; impl crate :: RegisterSpec for R16_DVP_ROW_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_row_cnt::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_DVP_ROW_CNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_DVP_ROW_CNT to value 0"]
|
|
|
+impl crate :: Resettable for R16_DVP_ROW_CNT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_DVP_COL_CNT register accessor: an alias for `Reg<R16_DVP_COL_CNT_SPEC>`"]
|
|
|
+pub type R16_DVP_COL_CNT = crate :: Reg < r16_dvp_col_cnt :: R16_DVP_COL_CNT_SPEC > ; # [doc = "DVP col count value"]
|
|
|
+pub mod r16_dvp_col_cnt { # [doc = "Register `R16_DVP_COL_CNT` reader"]
|
|
|
+pub struct R (crate :: R < R16_DVP_COL_CNT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_DVP_COL_CNT_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_DVP_COL_CNT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_DVP_COL_CNT_SPEC >) -> Self { R (reader) } } # [doc = "Field `RB_DVP_COL_CNT` reader - DVP receive fifo ready"]
|
|
|
+pub struct RB_DVP_COL_CNT_R (crate :: FieldReader < u16 , u16 >) ; impl RB_DVP_COL_CNT_R { pub (crate) fn new (bits : u16) -> Self { RB_DVP_COL_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_DVP_COL_CNT_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - DVP receive fifo ready"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_dvp_col_cnt (& self) -> RB_DVP_COL_CNT_R { RB_DVP_COL_CNT_R :: new ((self . bits & 0xffff) as u16) } } # [doc = "DVP col count value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_dvp_col_cnt](index.html) module"]
|
|
|
+pub struct R16_DVP_COL_CNT_SPEC ; impl crate :: RegisterSpec for R16_DVP_COL_CNT_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_dvp_col_cnt::R](R) reader structure"]
|
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+impl crate :: Readable for R16_DVP_COL_CNT_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R16_DVP_COL_CNT to value 0"]
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+impl crate :: Resettable for R16_DVP_COL_CNT_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "Program Fast Interrupt Controller"]
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+pub struct PFIC { _marker : PhantomData < * const () > } unsafe impl Send for PFIC { } impl PFIC { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const pfic :: RegisterBlock = 0xe000_e000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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+# [inline (always)]
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+pub const fn ptr () -> * const pfic :: RegisterBlock { Self :: PTR } } impl Deref for PFIC { type Target = pfic :: RegisterBlock ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for PFIC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("PFIC") . finish () } } # [doc = "Program Fast Interrupt Controller"]
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+pub mod pfic { # [doc = r"Register block"]
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+# [repr (C)]
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+pub struct RegisterBlock { # [doc = "0x00 - Interrupt Status Register"]
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+pub r32_pfic_isr1 : crate :: Reg < r32_pfic_isr1 :: R32_PFIC_ISR1_SPEC > , # [doc = "0x04 - Interrupt Status Register"]
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+pub r32_pfic_isr2 : crate :: Reg < r32_pfic_isr2 :: R32_PFIC_ISR2_SPEC > , _reserved2 : [u8 ; 0x18]
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+, # [doc = "0x20 - Interrupt Pending Register"]
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+pub r32_pfic_ipr1 : crate :: Reg < r32_pfic_ipr1 :: R32_PFIC_IPR1_SPEC > , # [doc = "0x24 - Interrupt Pending Register"]
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+pub r32_pfic_ipr2 : crate :: Reg < r32_pfic_ipr2 :: R32_PFIC_IPR2_SPEC > , _reserved4 : [u8 ; 0x18]
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+, # [doc = "0x40 - Interrupt Priority Register"]
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+pub r32_pfic_ithresdr : crate :: Reg < r32_pfic_ithresdr :: R32_PFIC_ITHRESDR_SPEC > , # [doc = "0x44 - Interrupt Fast Address Register"]
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+pub r32_pfic_fibaddrr : crate :: Reg < r32_pfic_fibaddrr :: R32_PFIC_FIBADDRR_SPEC > , # [doc = "0x48 - Interrupt Config Register"]
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+pub r32_pfic_cfgr : crate :: Reg < r32_pfic_cfgr :: R32_PFIC_CFGR_SPEC > , # [doc = "0x4c - Interrupt Global Register"]
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+pub r32_pfic_gisr : crate :: Reg < r32_pfic_gisr :: R32_PFIC_GISR_SPEC > , _reserved8 : [u8 ; 0x10]
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+, # [doc = "0x60 - Interrupt 0 address Register"]
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+pub r32_pfic_fifoaddrr0 : crate :: Reg < r32_pfic_fifoaddrr0 :: R32_PFIC_FIFOADDRR0_SPEC > , # [doc = "0x64 - Interrupt 1 address Register"]
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+pub r32_pfic_fifoaddrr1 : crate :: Reg < r32_pfic_fifoaddrr1 :: R32_PFIC_FIFOADDRR1_SPEC > , # [doc = "0x68 - Interrupt 2 address Register"]
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+pub r32_pfic_fifoaddrr2 : crate :: Reg < r32_pfic_fifoaddrr2 :: R32_PFIC_FIFOADDRR2_SPEC > , # [doc = "0x6c - Interrupt 3 address Register"]
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+pub r32_pfic_fifoaddrr3 : crate :: Reg < r32_pfic_fifoaddrr3 :: R32_PFIC_FIFOADDRR3_SPEC > , _reserved12 : [u8 ; 0x90]
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+, # [doc = "0x100 - Interrupt Setting Register"]
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+pub r32_pfic_ienr1 : crate :: Reg < r32_pfic_ienr1 :: R32_PFIC_IENR1_SPEC > , # [doc = "0x104 - Interrupt Setting Register"]
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+pub r32_pfic_ienr2 : crate :: Reg < r32_pfic_ienr2 :: R32_PFIC_IENR2_SPEC > , _reserved14 : [u8 ; 0x78]
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+, # [doc = "0x180 - Interrupt Clear Register"]
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+pub r32_pfic_irer1 : crate :: Reg < r32_pfic_irer1 :: R32_PFIC_IRER1_SPEC > , # [doc = "0x184 - Interrupt Clear Register"]
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+pub r32_pfic_irer2 : crate :: Reg < r32_pfic_irer2 :: R32_PFIC_IRER2_SPEC > , _reserved16 : [u8 ; 0x78]
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+, # [doc = "0x200 - Interrupt Pending Register"]
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+pub r32_pfic_ipsr1 : crate :: Reg < r32_pfic_ipsr1 :: R32_PFIC_IPSR1_SPEC > , # [doc = "0x204 - Interrupt Pending Register"]
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+pub r32_pfic_ipsr2 : crate :: Reg < r32_pfic_ipsr2 :: R32_PFIC_IPSR2_SPEC > , _reserved18 : [u8 ; 0x78]
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+, # [doc = "0x280 - Interrupt Pending Clear Register"]
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+pub r32_pfic_iprr1 : crate :: Reg < r32_pfic_iprr1 :: R32_PFIC_IPRR1_SPEC > , # [doc = "0x284 - Interrupt Pending Clear Register"]
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+pub r32_pfic_iprr2 : crate :: Reg < r32_pfic_iprr2 :: R32_PFIC_IPRR2_SPEC > , _reserved20 : [u8 ; 0x78]
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+, # [doc = "0x300 - Interrupt ACTIVE Register"]
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+pub r32_pfic_iactr1 : crate :: Reg < r32_pfic_iactr1 :: R32_PFIC_IACTR1_SPEC > , # [doc = "0x304 - Interrupt ACTIVE Register"]
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+pub r32_pfic_iactr2 : crate :: Reg < r32_pfic_iactr2 :: R32_PFIC_IACTR2_SPEC > , _reserved22 : [u8 ; 0xf8]
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+, # [doc = "0x400 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior0 : crate :: Reg < r32_pfic_iprior0 :: R32_PFIC_IPRIOR0_SPEC > , _reserved23 : [u8 ; 0x1c]
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+, # [doc = "0x420 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior1 : crate :: Reg < r32_pfic_iprior1 :: R32_PFIC_IPRIOR1_SPEC > , _reserved24 : [u8 ; 0x1c]
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+, # [doc = "0x440 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior2 : crate :: Reg < r32_pfic_iprior2 :: R32_PFIC_IPRIOR2_SPEC > , _reserved25 : [u8 ; 0x1c]
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+, # [doc = "0x460 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior3 : crate :: Reg < r32_pfic_iprior3 :: R32_PFIC_IPRIOR3_SPEC > , _reserved26 : [u8 ; 0x1c]
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+, # [doc = "0x480 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior4 : crate :: Reg < r32_pfic_iprior4 :: R32_PFIC_IPRIOR4_SPEC > , _reserved27 : [u8 ; 0x1c]
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+, # [doc = "0x4a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior5 : crate :: Reg < r32_pfic_iprior5 :: R32_PFIC_IPRIOR5_SPEC > , _reserved28 : [u8 ; 0x1c]
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+, # [doc = "0x4c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior6 : crate :: Reg < r32_pfic_iprior6 :: R32_PFIC_IPRIOR6_SPEC > , _reserved29 : [u8 ; 0x1c]
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+, # [doc = "0x4e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior7 : crate :: Reg < r32_pfic_iprior7 :: R32_PFIC_IPRIOR7_SPEC > , _reserved30 : [u8 ; 0x1c]
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+, # [doc = "0x500 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior8 : crate :: Reg < r32_pfic_iprior8 :: R32_PFIC_IPRIOR8_SPEC > , _reserved31 : [u8 ; 0x1c]
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+, # [doc = "0x520 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior9 : crate :: Reg < r32_pfic_iprior9 :: R32_PFIC_IPRIOR9_SPEC > , _reserved32 : [u8 ; 0x1c]
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+, # [doc = "0x540 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior10 : crate :: Reg < r32_pfic_iprior10 :: R32_PFIC_IPRIOR10_SPEC > , _reserved33 : [u8 ; 0x1c]
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+, # [doc = "0x560 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior11 : crate :: Reg < r32_pfic_iprior11 :: R32_PFIC_IPRIOR11_SPEC > , _reserved34 : [u8 ; 0x1c]
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+, # [doc = "0x580 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior12 : crate :: Reg < r32_pfic_iprior12 :: R32_PFIC_IPRIOR12_SPEC > , _reserved35 : [u8 ; 0x1c]
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+, # [doc = "0x5a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior13 : crate :: Reg < r32_pfic_iprior13 :: R32_PFIC_IPRIOR13_SPEC > , _reserved36 : [u8 ; 0x1c]
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+, # [doc = "0x5c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior14 : crate :: Reg < r32_pfic_iprior14 :: R32_PFIC_IPRIOR14_SPEC > , _reserved37 : [u8 ; 0x1c]
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+, # [doc = "0x5e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior15 : crate :: Reg < r32_pfic_iprior15 :: R32_PFIC_IPRIOR15_SPEC > , _reserved38 : [u8 ; 0x1c]
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+, # [doc = "0x600 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior16 : crate :: Reg < r32_pfic_iprior16 :: R32_PFIC_IPRIOR16_SPEC > , _reserved39 : [u8 ; 0x1c]
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+, # [doc = "0x620 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior17 : crate :: Reg < r32_pfic_iprior17 :: R32_PFIC_IPRIOR17_SPEC > , _reserved40 : [u8 ; 0x1c]
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+, # [doc = "0x640 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior18 : crate :: Reg < r32_pfic_iprior18 :: R32_PFIC_IPRIOR18_SPEC > , _reserved41 : [u8 ; 0x1c]
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+, # [doc = "0x660 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior19 : crate :: Reg < r32_pfic_iprior19 :: R32_PFIC_IPRIOR19_SPEC > , _reserved42 : [u8 ; 0x1c]
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+, # [doc = "0x680 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior20 : crate :: Reg < r32_pfic_iprior20 :: R32_PFIC_IPRIOR20_SPEC > , _reserved43 : [u8 ; 0x1c]
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+, # [doc = "0x6a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior21 : crate :: Reg < r32_pfic_iprior21 :: R32_PFIC_IPRIOR21_SPEC > , _reserved44 : [u8 ; 0x1c]
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+, # [doc = "0x6c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior22 : crate :: Reg < r32_pfic_iprior22 :: R32_PFIC_IPRIOR22_SPEC > , _reserved45 : [u8 ; 0x1c]
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+, # [doc = "0x6e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior23 : crate :: Reg < r32_pfic_iprior23 :: R32_PFIC_IPRIOR23_SPEC > , _reserved46 : [u8 ; 0x1c]
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+, # [doc = "0x700 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior24 : crate :: Reg < r32_pfic_iprior24 :: R32_PFIC_IPRIOR24_SPEC > , _reserved47 : [u8 ; 0x1c]
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+, # [doc = "0x720 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior25 : crate :: Reg < r32_pfic_iprior25 :: R32_PFIC_IPRIOR25_SPEC > , _reserved48 : [u8 ; 0x1c]
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+, # [doc = "0x740 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior26 : crate :: Reg < r32_pfic_iprior26 :: R32_PFIC_IPRIOR26_SPEC > , _reserved49 : [u8 ; 0x1c]
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+, # [doc = "0x760 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior27 : crate :: Reg < r32_pfic_iprior27 :: R32_PFIC_IPRIOR27_SPEC > , _reserved50 : [u8 ; 0x1c]
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+, # [doc = "0x780 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior28 : crate :: Reg < r32_pfic_iprior28 :: R32_PFIC_IPRIOR28_SPEC > , _reserved51 : [u8 ; 0x1c]
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+, # [doc = "0x7a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior29 : crate :: Reg < r32_pfic_iprior29 :: R32_PFIC_IPRIOR29_SPEC > , _reserved52 : [u8 ; 0x1c]
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+, # [doc = "0x7c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior30 : crate :: Reg < r32_pfic_iprior30 :: R32_PFIC_IPRIOR30_SPEC > , _reserved53 : [u8 ; 0x1c]
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+, # [doc = "0x7e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior31 : crate :: Reg < r32_pfic_iprior31 :: R32_PFIC_IPRIOR31_SPEC > , _reserved54 : [u8 ; 0x1c]
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+, # [doc = "0x800 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior32 : crate :: Reg < r32_pfic_iprior32 :: R32_PFIC_IPRIOR32_SPEC > , _reserved55 : [u8 ; 0x1c]
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+, # [doc = "0x820 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior33 : crate :: Reg < r32_pfic_iprior33 :: R32_PFIC_IPRIOR33_SPEC > , _reserved56 : [u8 ; 0x1c]
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+, # [doc = "0x840 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior34 : crate :: Reg < r32_pfic_iprior34 :: R32_PFIC_IPRIOR34_SPEC > , _reserved57 : [u8 ; 0x1c]
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+, # [doc = "0x860 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior35 : crate :: Reg < r32_pfic_iprior35 :: R32_PFIC_IPRIOR35_SPEC > , _reserved58 : [u8 ; 0x1c]
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+, # [doc = "0x880 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior36 : crate :: Reg < r32_pfic_iprior36 :: R32_PFIC_IPRIOR36_SPEC > , _reserved59 : [u8 ; 0x1c]
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+, # [doc = "0x8a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior37 : crate :: Reg < r32_pfic_iprior37 :: R32_PFIC_IPRIOR37_SPEC > , _reserved60 : [u8 ; 0x1c]
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+, # [doc = "0x8c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior38 : crate :: Reg < r32_pfic_iprior38 :: R32_PFIC_IPRIOR38_SPEC > , _reserved61 : [u8 ; 0x1c]
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+, # [doc = "0x8e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior39 : crate :: Reg < r32_pfic_iprior39 :: R32_PFIC_IPRIOR39_SPEC > , _reserved62 : [u8 ; 0x1c]
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+, # [doc = "0x900 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior40 : crate :: Reg < r32_pfic_iprior40 :: R32_PFIC_IPRIOR40_SPEC > , _reserved63 : [u8 ; 0x1c]
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+, # [doc = "0x920 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior41 : crate :: Reg < r32_pfic_iprior41 :: R32_PFIC_IPRIOR41_SPEC > , _reserved64 : [u8 ; 0x1c]
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+, # [doc = "0x940 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior42 : crate :: Reg < r32_pfic_iprior42 :: R32_PFIC_IPRIOR42_SPEC > , _reserved65 : [u8 ; 0x1c]
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+, # [doc = "0x960 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior43 : crate :: Reg < r32_pfic_iprior43 :: R32_PFIC_IPRIOR43_SPEC > , _reserved66 : [u8 ; 0x1c]
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+, # [doc = "0x980 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior44 : crate :: Reg < r32_pfic_iprior44 :: R32_PFIC_IPRIOR44_SPEC > , _reserved67 : [u8 ; 0x1c]
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+, # [doc = "0x9a0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior45 : crate :: Reg < r32_pfic_iprior45 :: R32_PFIC_IPRIOR45_SPEC > , _reserved68 : [u8 ; 0x1c]
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+, # [doc = "0x9c0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior46 : crate :: Reg < r32_pfic_iprior46 :: R32_PFIC_IPRIOR46_SPEC > , _reserved69 : [u8 ; 0x1c]
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+, # [doc = "0x9e0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior47 : crate :: Reg < r32_pfic_iprior47 :: R32_PFIC_IPRIOR47_SPEC > , _reserved70 : [u8 ; 0x1c]
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+, # [doc = "0xa00 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior48 : crate :: Reg < r32_pfic_iprior48 :: R32_PFIC_IPRIOR48_SPEC > , _reserved71 : [u8 ; 0x1c]
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+, # [doc = "0xa20 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior49 : crate :: Reg < r32_pfic_iprior49 :: R32_PFIC_IPRIOR49_SPEC > , _reserved72 : [u8 ; 0x1c]
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+, # [doc = "0xa40 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior50 : crate :: Reg < r32_pfic_iprior50 :: R32_PFIC_IPRIOR50_SPEC > , _reserved73 : [u8 ; 0x1c]
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+, # [doc = "0xa60 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior51 : crate :: Reg < r32_pfic_iprior51 :: R32_PFIC_IPRIOR51_SPEC > , _reserved74 : [u8 ; 0x1c]
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+, # [doc = "0xa80 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior52 : crate :: Reg < r32_pfic_iprior52 :: R32_PFIC_IPRIOR52_SPEC > , _reserved75 : [u8 ; 0x1c]
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+, # [doc = "0xaa0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior53 : crate :: Reg < r32_pfic_iprior53 :: R32_PFIC_IPRIOR53_SPEC > , _reserved76 : [u8 ; 0x2c]
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+, # [doc = "0xad0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior54 : crate :: Reg < r32_pfic_iprior54 :: R32_PFIC_IPRIOR54_SPEC > , _reserved77 : [u8 ; 0x0c]
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+, # [doc = "0xae0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior55 : crate :: Reg < r32_pfic_iprior55 :: R32_PFIC_IPRIOR55_SPEC > , _reserved78 : [u8 ; 0x1c]
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+, # [doc = "0xb00 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior56 : crate :: Reg < r32_pfic_iprior56 :: R32_PFIC_IPRIOR56_SPEC > , _reserved79 : [u8 ; 0x1c]
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+, # [doc = "0xb20 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior57 : crate :: Reg < r32_pfic_iprior57 :: R32_PFIC_IPRIOR57_SPEC > , _reserved80 : [u8 ; 0x1c]
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+, # [doc = "0xb40 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior58 : crate :: Reg < r32_pfic_iprior58 :: R32_PFIC_IPRIOR58_SPEC > , _reserved81 : [u8 ; 0x1c]
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+, # [doc = "0xb60 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior59 : crate :: Reg < r32_pfic_iprior59 :: R32_PFIC_IPRIOR59_SPEC > , _reserved82 : [u8 ; 0x1c]
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+, # [doc = "0xb80 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior60 : crate :: Reg < r32_pfic_iprior60 :: R32_PFIC_IPRIOR60_SPEC > , _reserved83 : [u8 ; 0x1c]
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+, # [doc = "0xba0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior61 : crate :: Reg < r32_pfic_iprior61 :: R32_PFIC_IPRIOR61_SPEC > , _reserved84 : [u8 ; 0x3c]
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+, # [doc = "0xbe0 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior62 : crate :: Reg < r32_pfic_iprior62 :: R32_PFIC_IPRIOR62_SPEC > , _reserved85 : [u8 ; 0x1c]
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+, # [doc = "0xc00 - Interrupt Priority configuration Register"]
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+pub r32_pfic_iprior63 : crate :: Reg < r32_pfic_iprior63 :: R32_PFIC_IPRIOR63_SPEC > , _reserved86 : [u8 ; 0x010c]
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+, # [doc = "0xd10 - System Control Register"]
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+pub r32_pfic_sctlr : crate :: Reg < r32_pfic_sctlr :: R32_PFIC_SCTLR_SPEC > , } # [doc = "R32_PFIC_ISR1 register accessor: an alias for `Reg<R32_PFIC_ISR1_SPEC>`"]
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+pub type R32_PFIC_ISR1 = crate :: Reg < r32_pfic_isr1 :: R32_PFIC_ISR1_SPEC > ; # [doc = "Interrupt Status Register"]
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+pub mod r32_pfic_isr1 { # [doc = "Register `R32_PFIC_ISR1` reader"]
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+pub struct R (crate :: R < R32_PFIC_ISR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ISR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ISR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_ISR1_SPEC >) -> Self { R (reader) } } # [doc = "Field `INTSTA` reader - Interrupt ID Status"]
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+pub struct INTSTA_R (crate :: FieldReader < u32 , u32 >) ; impl INTSTA_R { pub (crate) fn new (bits : u32) -> Self { INTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 12:31 - Interrupt ID Status"]
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+# [inline (always)]
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+pub fn intsta (& self) -> INTSTA_R { INTSTA_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } # [doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_isr1](index.html) module"]
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+pub struct R32_PFIC_ISR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ISR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_isr1::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_ISR1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_ISR1 to value 0"]
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+impl crate :: Resettable for R32_PFIC_ISR1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_ISR2 register accessor: an alias for `Reg<R32_PFIC_ISR2_SPEC>`"]
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+pub type R32_PFIC_ISR2 = crate :: Reg < r32_pfic_isr2 :: R32_PFIC_ISR2_SPEC > ; # [doc = "Interrupt Status Register"]
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+pub mod r32_pfic_isr2 { # [doc = "Register `R32_PFIC_ISR2` reader"]
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+pub struct R (crate :: R < R32_PFIC_ISR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ISR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ISR2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_ISR2_SPEC >) -> Self { R (reader) } } # [doc = "Field `INTENSTA` reader - Interrupt ID Status"]
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+pub struct INTENSTA_R (crate :: FieldReader < u32 , u32 >) ; impl INTENSTA_R { pub (crate) fn new (bits : u32) -> Self { INTENSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTENSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:27 - Interrupt ID Status"]
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+# [inline (always)]
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+pub fn intensta (& self) -> INTENSTA_R { INTENSTA_R :: new ((self . bits & 0x0fff_ffff) as u32) } } # [doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_isr2](index.html) module"]
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+pub struct R32_PFIC_ISR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ISR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_isr2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_ISR2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_ISR2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_ISR2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPR1 register accessor: an alias for `Reg<R32_PFIC_IPR1_SPEC>`"]
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+pub type R32_PFIC_IPR1 = crate :: Reg < r32_pfic_ipr1 :: R32_PFIC_IPR1_SPEC > ; # [doc = "Interrupt Pending Register"]
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+pub mod r32_pfic_ipr1 { # [doc = "Register `R32_PFIC_IPR1` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPR1_SPEC >) -> Self { R (reader) } } # [doc = "Field `PENDSTA` reader - PENDSTA"]
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+pub struct PENDSTA_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSTA_R { pub (crate) fn new (bits : u32) -> Self { PENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 12:31 - PENDSTA"]
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+# [inline (always)]
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+pub fn pendsta (& self) -> PENDSTA_R { PENDSTA_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipr1](index.html) module"]
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+pub struct R32_PFIC_IPR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipr1::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPR1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_IPR1 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPR1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPR2 register accessor: an alias for `Reg<R32_PFIC_IPR2_SPEC>`"]
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+pub type R32_PFIC_IPR2 = crate :: Reg < r32_pfic_ipr2 :: R32_PFIC_IPR2_SPEC > ; # [doc = "Interrupt Pending Register"]
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+pub mod r32_pfic_ipr2 { # [doc = "Register `R32_PFIC_IPR2` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPR2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPR2_SPEC >) -> Self { R (reader) } } # [doc = "Field `PENDSTA` reader - PENDSTA"]
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+pub struct PENDSTA_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSTA_R { pub (crate) fn new (bits : u32) -> Self { PENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSTA_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:27 - PENDSTA"]
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+# [inline (always)]
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+pub fn pendsta (& self) -> PENDSTA_R { PENDSTA_R :: new ((self . bits & 0x0fff_ffff) as u32) } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipr2](index.html) module"]
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+pub struct R32_PFIC_IPR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipr2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPR2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_IPR2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPR2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_ITHRESDR register accessor: an alias for `Reg<R32_PFIC_ITHRESDR_SPEC>`"]
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+pub type R32_PFIC_ITHRESDR = crate :: Reg < r32_pfic_ithresdr :: R32_PFIC_ITHRESDR_SPEC > ; # [doc = "Interrupt Priority Register"]
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+pub mod r32_pfic_ithresdr { # [doc = "Register `R32_PFIC_ITHRESDR` reader"]
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+pub struct R (crate :: R < R32_PFIC_ITHRESDR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_ITHRESDR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_ITHRESDR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_ITHRESDR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_ITHRESDR` writer"]
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+pub struct W (crate :: W < R32_PFIC_ITHRESDR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_ITHRESDR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_ITHRESDR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_ITHRESDR_SPEC >) -> Self { W (writer) } } # [doc = "Field `THRESHOLD` reader - THRESHOLD"]
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+pub struct THRESHOLD_R (crate :: FieldReader < u8 , u8 >) ; impl THRESHOLD_R { pub (crate) fn new (bits : u8) -> Self { THRESHOLD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for THRESHOLD_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `THRESHOLD` writer - THRESHOLD"]
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+pub struct THRESHOLD_W < 'a > { w : & 'a mut W , } impl < 'a > THRESHOLD_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xff) | (value as u32 & 0xff) ; self . w } } impl R { # [doc = "Bits 0:7 - THRESHOLD"]
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+# [inline (always)]
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+pub fn threshold (& self) -> THRESHOLD_R { THRESHOLD_R :: new ((self . bits & 0xff) as u8) } } impl W { # [doc = "Bits 0:7 - THRESHOLD"]
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+# [inline (always)]
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+pub fn threshold (& mut self) -> THRESHOLD_W { THRESHOLD_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ithresdr](index.html) module"]
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+pub struct R32_PFIC_ITHRESDR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_ITHRESDR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ithresdr::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_ITHRESDR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ithresdr::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_ITHRESDR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_ITHRESDR to value 0"]
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+impl crate :: Resettable for R32_PFIC_ITHRESDR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIBADDRR register accessor: an alias for `Reg<R32_PFIC_FIBADDRR_SPEC>`"]
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+pub type R32_PFIC_FIBADDRR = crate :: Reg < r32_pfic_fibaddrr :: R32_PFIC_FIBADDRR_SPEC > ; # [doc = "Interrupt Fast Address Register"]
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+pub mod r32_pfic_fibaddrr { # [doc = "Register `R32_PFIC_FIBADDRR` reader"]
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+pub struct R (crate :: R < R32_PFIC_FIBADDRR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIBADDRR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIBADDRR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_FIBADDRR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIBADDRR` writer"]
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+pub struct W (crate :: W < R32_PFIC_FIBADDRR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIBADDRR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIBADDRR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_FIBADDRR_SPEC >) -> Self { W (writer) } } # [doc = "Field `BASEADDR` reader - BASEADDR"]
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+pub struct BASEADDR_R (crate :: FieldReader < u8 , u8 >) ; impl BASEADDR_R { pub (crate) fn new (bits : u8) -> Self { BASEADDR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for BASEADDR_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `BASEADDR` writer - BASEADDR"]
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+pub struct BASEADDR_W < 'a > { w : & 'a mut W , } impl < 'a > BASEADDR_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0f << 28)) | ((value as u32 & 0x0f) << 28) ; self . w } } impl R { # [doc = "Bits 28:31 - BASEADDR"]
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+# [inline (always)]
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+pub fn baseaddr (& self) -> BASEADDR_R { BASEADDR_R :: new (((self . bits >> 28) & 0x0f) as u8) } } impl W { # [doc = "Bits 28:31 - BASEADDR"]
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+# [inline (always)]
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+pub fn baseaddr (& mut self) -> BASEADDR_W { BASEADDR_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Fast Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fibaddrr](index.html) module"]
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+pub struct R32_PFIC_FIBADDRR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIBADDRR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fibaddrr::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_FIBADDRR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fibaddrr::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_FIBADDRR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIBADDRR to value 0"]
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+impl crate :: Resettable for R32_PFIC_FIBADDRR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_CFGR register accessor: an alias for `Reg<R32_PFIC_CFGR_SPEC>`"]
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+pub type R32_PFIC_CFGR = crate :: Reg < r32_pfic_cfgr :: R32_PFIC_CFGR_SPEC > ; # [doc = "Interrupt Config Register"]
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+pub mod r32_pfic_cfgr { # [doc = "Register `R32_PFIC_CFGR` reader"]
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+pub struct R (crate :: R < R32_PFIC_CFGR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_CFGR_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_CFGR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_CFGR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_CFGR` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_CFGR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_CFGR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_CFGR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_CFGR_SPEC >) -> Self { W (writer) } } # [doc = "Field `HWSTKCTRL` reader - HWSTKCTRL"]
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+pub struct HWSTKCTRL_R (crate :: FieldReader < bool , bool >) ; impl HWSTKCTRL_R { pub (crate) fn new (bits : bool) -> Self { HWSTKCTRL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for HWSTKCTRL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `HWSTKCTRL` writer - HWSTKCTRL"]
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+pub struct HWSTKCTRL_W < 'a > { w : & 'a mut W , } impl < 'a > HWSTKCTRL_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `NESTCTRL` reader - NESTCTRL"]
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|
+pub struct NESTCTRL_R (crate :: FieldReader < bool , bool >) ; impl NESTCTRL_R { pub (crate) fn new (bits : bool) -> Self { NESTCTRL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for NESTCTRL_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `NESTCTRL` writer - NESTCTRL"]
|
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|
+pub struct NESTCTRL_W < 'a > { w : & 'a mut W , } impl < 'a > NESTCTRL_W < 'a > { # [doc = r"Sets the field bit"]
|
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|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `NMISET` writer - NMISET"]
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|
+pub struct NMISET_W < 'a > { w : & 'a mut W , } impl < 'a > NMISET_W < 'a > { # [doc = r"Sets the field bit"]
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|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `NMIRESET` writer - NMIRESET"]
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|
+pub struct NMIRESET_W < 'a > { w : & 'a mut W , } impl < 'a > NMIRESET_W < 'a > { # [doc = r"Sets the field bit"]
|
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|
+# [inline (always)]
|
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `EXCSET` writer - EXCSET"]
|
|
|
+pub struct EXCSET_W < 'a > { w : & 'a mut W , } impl < 'a > EXCSET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `EXCRESET` writer - EXCRESET"]
|
|
|
+pub struct EXCRESET_W < 'a > { w : & 'a mut W , } impl < 'a > EXCRESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u32 & 0x01) << 5) ; self . w } } # [doc = "Field `PFICRESET` writer - PFICRSET"]
|
|
|
+pub struct PFICRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PFICRESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u32 & 0x01) << 6) ; self . w } } # [doc = "Field `SYSRESET` writer - SYSRESET"]
|
|
|
+pub struct SYSRESET_W < 'a > { w : & 'a mut W , } impl < 'a > SYSRESET_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u32 & 0x01) << 7) ; self . w } } # [doc = "Field `KEYCODE` writer - KEYCODE"]
|
|
|
+pub struct KEYCODE_W < 'a > { w : & 'a mut W , } impl < 'a > KEYCODE_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xffff << 16)) | ((value as u32 & 0xffff) << 16) ; self . w } } impl R { # [doc = "Bit 0 - HWSTKCTRL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn hwstkctrl (& self) -> HWSTKCTRL_R { HWSTKCTRL_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - NESTCTRL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn nestctrl (& self) -> NESTCTRL_R { NESTCTRL_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - HWSTKCTRL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn hwstkctrl (& mut self) -> HWSTKCTRL_W { HWSTKCTRL_W { w : self } } # [doc = "Bit 1 - NESTCTRL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn nestctrl (& mut self) -> NESTCTRL_W { NESTCTRL_W { w : self } } # [doc = "Bit 2 - NMISET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn nmiset (& mut self) -> NMISET_W { NMISET_W { w : self } } # [doc = "Bit 3 - NMIRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn nmireset (& mut self) -> NMIRESET_W { NMIRESET_W { w : self } } # [doc = "Bit 4 - EXCSET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn excset (& mut self) -> EXCSET_W { EXCSET_W { w : self } } # [doc = "Bit 5 - EXCRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn excreset (& mut self) -> EXCRESET_W { EXCRESET_W { w : self } } # [doc = "Bit 6 - PFICRSET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn pficreset (& mut self) -> PFICRESET_W { PFICRESET_W { w : self } } # [doc = "Bit 7 - SYSRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn sysreset (& mut self) -> SYSRESET_W { SYSRESET_W { w : self } } # [doc = "Bits 16:31 - KEYCODE"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn keycode (& mut self) -> KEYCODE_W { KEYCODE_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_cfgr](index.html) module"]
|
|
|
+pub struct R32_PFIC_CFGR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_CFGR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_cfgr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_CFGR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_cfgr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_CFGR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_CFGR to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_CFGR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_GISR register accessor: an alias for `Reg<R32_PFIC_GISR_SPEC>`"]
|
|
|
+pub type R32_PFIC_GISR = crate :: Reg < r32_pfic_gisr :: R32_PFIC_GISR_SPEC > ; # [doc = "Interrupt Global Register"]
|
|
|
+pub mod r32_pfic_gisr { # [doc = "Register `R32_PFIC_GISR` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_GISR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_GISR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_GISR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_GISR_SPEC >) -> Self { R (reader) } } # [doc = "Field `NESTSTA` reader - NESTSTA"]
|
|
|
+pub struct NESTSTA_R (crate :: FieldReader < u8 , u8 >) ; impl NESTSTA_R { pub (crate) fn new (bits : u8) -> Self { NESTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for NESTSTA_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `GACTSTA` reader - GACTSTA"]
|
|
|
+pub struct GACTSTA_R (crate :: FieldReader < bool , bool >) ; impl GACTSTA_R { pub (crate) fn new (bits : bool) -> Self { GACTSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for GACTSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `GPENDSTA` reader - GPENDSTA"]
|
|
|
+pub struct GPENDSTA_R (crate :: FieldReader < bool , bool >) ; impl GPENDSTA_R { pub (crate) fn new (bits : bool) -> Self { GPENDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for GPENDSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:7 - NESTSTA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn neststa (& self) -> NESTSTA_R { NESTSTA_R :: new ((self . bits & 0xff) as u8) } # [doc = "Bit 8 - GACTSTA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn gactsta (& self) -> GACTSTA_R { GACTSTA_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - GPENDSTA"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn gpendsta (& self) -> GPENDSTA_R { GPENDSTA_R :: new (((self . bits >> 9) & 0x01) != 0) } } # [doc = "Interrupt Global Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_gisr](index.html) module"]
|
|
|
+pub struct R32_PFIC_GISR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_GISR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_gisr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_GISR_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_PFIC_GISR to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_GISR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR0 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR0_SPEC>`"]
|
|
|
+pub type R32_PFIC_FIFOADDRR0 = crate :: Reg < r32_pfic_fifoaddrr0 :: R32_PFIC_FIFOADDRR0_SPEC > ; # [doc = "Interrupt 0 address Register"]
|
|
|
+pub mod r32_pfic_fifoaddrr0 { # [doc = "Register `R32_PFIC_FIFOADDRR0` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_FIFOADDRR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_FIFOADDRR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR0` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_FIFOADDRR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR0_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_FIFOADDRR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR0` reader - OFFADDR0"]
|
|
|
+pub struct OFFADDR0_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR0_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR0` writer - OFFADDR0"]
|
|
|
+pub struct OFFADDR0_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID0` reader - IRQID0"]
|
|
|
+pub struct IRQID0_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID0_R { pub (crate) fn new (bits : u8) -> Self { IRQID0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID0_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID0` writer - IRQID0"]
|
|
|
+pub struct IRQID0_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID0_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn offaddr0 (& self) -> OFFADDR0_R { OFFADDR0_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn irqid0 (& self) -> IRQID0_R { IRQID0_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn offaddr0 (& mut self) -> OFFADDR0_W { OFFADDR0_W { w : self } } # [doc = "Bits 24:31 - IRQID0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn irqid0 (& mut self) -> IRQID0_W { IRQID0_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 0 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr0](index.html) module"]
|
|
|
+pub struct R32_PFIC_FIFOADDRR0_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_FIFOADDRR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr0::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_FIFOADDRR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_FIFOADDRR0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR1 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR1_SPEC>`"]
|
|
|
+pub type R32_PFIC_FIFOADDRR1 = crate :: Reg < r32_pfic_fifoaddrr1 :: R32_PFIC_FIFOADDRR1_SPEC > ; # [doc = "Interrupt 1 address Register"]
|
|
|
+pub mod r32_pfic_fifoaddrr1 { # [doc = "Register `R32_PFIC_FIFOADDRR1` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_FIFOADDRR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_FIFOADDRR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR1` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_FIFOADDRR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_FIFOADDRR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR1` reader - OFFADDR1"]
|
|
|
+pub struct OFFADDR1_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR1_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR1` writer - OFFADDR1"]
|
|
|
+pub struct OFFADDR1_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID1` reader - IRQID1"]
|
|
|
+pub struct IRQID1_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID1_R { pub (crate) fn new (bits : u8) -> Self { IRQID1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID1_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID1` writer - IRQID1"]
|
|
|
+pub struct IRQID1_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID1_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn offaddr1 (& self) -> OFFADDR1_R { OFFADDR1_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn irqid1 (& self) -> IRQID1_R { IRQID1_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn offaddr1 (& mut self) -> OFFADDR1_W { OFFADDR1_W { w : self } } # [doc = "Bits 24:31 - IRQID1"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn irqid1 (& mut self) -> IRQID1_W { IRQID1_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 1 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr1](index.html) module"]
|
|
|
+pub struct R32_PFIC_FIFOADDRR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_FIFOADDRR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_FIFOADDRR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_FIFOADDRR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR2 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR2_SPEC>`"]
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+pub type R32_PFIC_FIFOADDRR2 = crate :: Reg < r32_pfic_fifoaddrr2 :: R32_PFIC_FIFOADDRR2_SPEC > ; # [doc = "Interrupt 2 address Register"]
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+pub mod r32_pfic_fifoaddrr2 { # [doc = "Register `R32_PFIC_FIFOADDRR2` reader"]
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+pub struct R (crate :: R < R32_PFIC_FIFOADDRR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_FIFOADDRR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR2` writer"]
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+pub struct W (crate :: W < R32_PFIC_FIFOADDRR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR2_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_FIFOADDRR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR2` reader - OFFADDR2"]
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+pub struct OFFADDR2_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR2_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR2` writer - OFFADDR2"]
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+pub struct OFFADDR2_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR2_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID2` reader - IRQID2"]
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+pub struct IRQID2_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID2_R { pub (crate) fn new (bits : u8) -> Self { IRQID2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID2_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID2` writer - IRQID2"]
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+pub struct IRQID2_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID2_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR2"]
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+# [inline (always)]
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+pub fn offaddr2 (& self) -> OFFADDR2_R { OFFADDR2_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID2"]
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+# [inline (always)]
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+pub fn irqid2 (& self) -> IRQID2_R { IRQID2_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR2"]
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+# [inline (always)]
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+pub fn offaddr2 (& mut self) -> OFFADDR2_W { OFFADDR2_W { w : self } } # [doc = "Bits 24:31 - IRQID2"]
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+# [inline (always)]
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+pub fn irqid2 (& mut self) -> IRQID2_W { IRQID2_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 2 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr2](index.html) module"]
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+pub struct R32_PFIC_FIFOADDRR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_FIFOADDRR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr2::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_FIFOADDRR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_FIFOADDRR2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_FIFOADDRR3 register accessor: an alias for `Reg<R32_PFIC_FIFOADDRR3_SPEC>`"]
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+pub type R32_PFIC_FIFOADDRR3 = crate :: Reg < r32_pfic_fifoaddrr3 :: R32_PFIC_FIFOADDRR3_SPEC > ; # [doc = "Interrupt 3 address Register"]
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+pub mod r32_pfic_fifoaddrr3 { # [doc = "Register `R32_PFIC_FIFOADDRR3` reader"]
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+pub struct R (crate :: R < R32_PFIC_FIFOADDRR3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_FIFOADDRR3_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_FIFOADDRR3_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_FIFOADDRR3_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_FIFOADDRR3` writer"]
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+pub struct W (crate :: W < R32_PFIC_FIFOADDRR3_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_FIFOADDRR3_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_FIFOADDRR3_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_FIFOADDRR3_SPEC >) -> Self { W (writer) } } # [doc = "Field `OFFADDR3` reader - OFFADDR3"]
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+pub struct OFFADDR3_R (crate :: FieldReader < u32 , u32 >) ; impl OFFADDR3_R { pub (crate) fn new (bits : u32) -> Self { OFFADDR3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for OFFADDR3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `OFFADDR3` writer - OFFADDR3"]
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+pub struct OFFADDR3_W < 'a > { w : & 'a mut W , } impl < 'a > OFFADDR3_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x00ff_ffff) | (value as u32 & 0x00ff_ffff) ; self . w } } # [doc = "Field `IRQID3` reader - IRQID3"]
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+pub struct IRQID3_R (crate :: FieldReader < u8 , u8 >) ; impl IRQID3_R { pub (crate) fn new (bits : u8) -> Self { IRQID3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IRQID3_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IRQID3` writer - IRQID3"]
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+pub struct IRQID3_W < 'a > { w : & 'a mut W , } impl < 'a > IRQID3_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xff << 24)) | ((value as u32 & 0xff) << 24) ; self . w } } impl R { # [doc = "Bits 0:23 - OFFADDR3"]
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|
+# [inline (always)]
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|
+pub fn offaddr3 (& self) -> OFFADDR3_R { OFFADDR3_R :: new ((self . bits & 0x00ff_ffff) as u32) } # [doc = "Bits 24:31 - IRQID3"]
|
|
|
+# [inline (always)]
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|
|
+pub fn irqid3 (& self) -> IRQID3_R { IRQID3_R :: new (((self . bits >> 24) & 0xff) as u8) } } impl W { # [doc = "Bits 0:23 - OFFADDR3"]
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|
+# [inline (always)]
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|
+pub fn offaddr3 (& mut self) -> OFFADDR3_W { OFFADDR3_W { w : self } } # [doc = "Bits 24:31 - IRQID3"]
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|
+# [inline (always)]
|
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|
+pub fn irqid3 (& mut self) -> IRQID3_W { IRQID3_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt 3 address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_fifoaddrr3](index.html) module"]
|
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|
+pub struct R32_PFIC_FIFOADDRR3_SPEC ; impl crate :: RegisterSpec for R32_PFIC_FIFOADDRR3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_fifoaddrr3::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_PFIC_FIFOADDRR3_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_fifoaddrr3::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PFIC_FIFOADDRR3_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_FIFOADDRR3 to value 0"]
|
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|
+impl crate :: Resettable for R32_PFIC_FIFOADDRR3_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IENR1 register accessor: an alias for `Reg<R32_PFIC_IENR1_SPEC>`"]
|
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|
+pub type R32_PFIC_IENR1 = crate :: Reg < r32_pfic_ienr1 :: R32_PFIC_IENR1_SPEC > ; # [doc = "Interrupt Setting Register"]
|
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|
+pub mod r32_pfic_ienr1 { # [doc = "Register `R32_PFIC_IENR1` reader"]
|
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|
+pub struct R (crate :: R < R32_PFIC_IENR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IENR1_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IENR1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IENR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IENR1` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IENR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IENR1_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IENR1_SPEC >> for W { # [inline (always)]
|
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+fn from (writer : crate :: W < R32_PFIC_IENR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTEN` reader - INTEN"]
|
|
|
+pub struct INTEN_R (crate :: FieldReader < u32 , u32 >) ; impl INTEN_R { pub (crate) fn new (bits : u32) -> Self { INTEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTEN` writer - INTEN"]
|
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+pub struct INTEN_W < 'a > { w : & 'a mut W , } impl < 'a > INTEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - INTEN"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn inten (& self) -> INTEN_R { INTEN_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - INTEN"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn inten (& mut self) -> INTEN_W { INTEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Setting Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ienr1](index.html) module"]
|
|
|
+pub struct R32_PFIC_IENR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IENR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ienr1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IENR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ienr1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IENR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IENR1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IENR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IENR2 register accessor: an alias for `Reg<R32_PFIC_IENR2_SPEC>`"]
|
|
|
+pub type R32_PFIC_IENR2 = crate :: Reg < r32_pfic_ienr2 :: R32_PFIC_IENR2_SPEC > ; # [doc = "Interrupt Setting Register"]
|
|
|
+pub mod r32_pfic_ienr2 { # [doc = "Register `R32_PFIC_IENR2` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IENR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IENR2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IENR2_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IENR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IENR2` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IENR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IENR2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IENR2_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IENR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTEN` reader - INTEN"]
|
|
|
+pub struct INTEN_R (crate :: FieldReader < u32 , u32 >) ; impl INTEN_R { pub (crate) fn new (bits : u32) -> Self { INTEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTEN_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTEN` writer - INTEN"]
|
|
|
+pub struct INTEN_W < 'a > { w : & 'a mut W , } impl < 'a > INTEN_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - INTEN"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn inten (& self) -> INTEN_R { INTEN_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - INTEN"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn inten (& mut self) -> INTEN_W { INTEN_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Setting Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ienr2](index.html) module"]
|
|
|
+pub struct R32_PFIC_IENR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IENR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ienr2::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IENR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ienr2::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IENR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IENR2 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IENR2_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IRER1 register accessor: an alias for `Reg<R32_PFIC_IRER1_SPEC>`"]
|
|
|
+pub type R32_PFIC_IRER1 = crate :: Reg < r32_pfic_irer1 :: R32_PFIC_IRER1_SPEC > ; # [doc = "Interrupt Clear Register"]
|
|
|
+pub mod r32_pfic_irer1 { # [doc = "Register `R32_PFIC_IRER1` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IRER1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IRER1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IRER1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IRER1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IRER1` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IRER1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IRER1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IRER1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IRER1_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTRESET` reader - INTRESET"]
|
|
|
+pub struct INTRESET_R (crate :: FieldReader < u32 , u32 >) ; impl INTRESET_R { pub (crate) fn new (bits : u32) -> Self { INTRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTRESET` writer - INTRESET"]
|
|
|
+pub struct INTRESET_W < 'a > { w : & 'a mut W , } impl < 'a > INTRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - INTRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn intreset (& self) -> INTRESET_R { INTRESET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - INTRESET"]
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+# [inline (always)]
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+pub fn intreset (& mut self) -> INTRESET_W { INTRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_irer1](index.html) module"]
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+pub struct R32_PFIC_IRER1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IRER1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_irer1::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IRER1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_irer1::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IRER1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IRER1 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IRER1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IRER2 register accessor: an alias for `Reg<R32_PFIC_IRER2_SPEC>`"]
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+pub type R32_PFIC_IRER2 = crate :: Reg < r32_pfic_irer2 :: R32_PFIC_IRER2_SPEC > ; # [doc = "Interrupt Clear Register"]
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+pub mod r32_pfic_irer2 { # [doc = "Register `R32_PFIC_IRER2` reader"]
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+pub struct R (crate :: R < R32_PFIC_IRER2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IRER2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IRER2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IRER2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IRER2` writer"]
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+pub struct W (crate :: W < R32_PFIC_IRER2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IRER2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IRER2_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IRER2_SPEC >) -> Self { W (writer) } } # [doc = "Field `INTRESET` reader - INTRESET"]
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+pub struct INTRESET_R (crate :: FieldReader < u32 , u32 >) ; impl INTRESET_R { pub (crate) fn new (bits : u32) -> Self { INTRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for INTRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `INTRESET` writer - INTRESET"]
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+pub struct INTRESET_W < 'a > { w : & 'a mut W , } impl < 'a > INTRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - INTRESET"]
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+# [inline (always)]
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+pub fn intreset (& self) -> INTRESET_R { INTRESET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - INTRESET"]
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+# [inline (always)]
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+pub fn intreset (& mut self) -> INTRESET_W { INTRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_irer2](index.html) module"]
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+pub struct R32_PFIC_IRER2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IRER2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_irer2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IRER2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_irer2::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IRER2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IRER2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IRER2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPSR1 register accessor: an alias for `Reg<R32_PFIC_IPSR1_SPEC>`"]
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+pub type R32_PFIC_IPSR1 = crate :: Reg < r32_pfic_ipsr1 :: R32_PFIC_IPSR1_SPEC > ; # [doc = "Interrupt Pending Register"]
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+pub mod r32_pfic_ipsr1 { # [doc = "Register `R32_PFIC_IPSR1` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPSR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPSR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPSR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPSR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPSR1` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPSR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPSR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPSR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPSR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDSET` reader - PENDSET"]
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+pub struct PENDSET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSET_R { pub (crate) fn new (bits : u32) -> Self { PENDSET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDSET` writer - PENDSET"]
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+pub struct PENDSET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDSET_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - PENDSET"]
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+# [inline (always)]
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+pub fn pendset (& self) -> PENDSET_R { PENDSET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - PENDSET"]
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+# [inline (always)]
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+pub fn pendset (& mut self) -> PENDSET_W { PENDSET_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipsr1](index.html) module"]
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+pub struct R32_PFIC_IPSR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPSR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipsr1::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPSR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ipsr1::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPSR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPSR1 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPSR1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPSR2 register accessor: an alias for `Reg<R32_PFIC_IPSR2_SPEC>`"]
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+pub type R32_PFIC_IPSR2 = crate :: Reg < r32_pfic_ipsr2 :: R32_PFIC_IPSR2_SPEC > ; # [doc = "Interrupt Pending Register"]
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+pub mod r32_pfic_ipsr2 { # [doc = "Register `R32_PFIC_IPSR2` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPSR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPSR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPSR2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPSR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPSR2` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPSR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPSR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPSR2_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPSR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDSET` reader - PENDSET"]
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+pub struct PENDSET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDSET_R { pub (crate) fn new (bits : u32) -> Self { PENDSET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDSET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDSET` writer - PENDSET"]
|
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+pub struct PENDSET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDSET_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - PENDSET"]
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|
+# [inline (always)]
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+pub fn pendset (& self) -> PENDSET_R { PENDSET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - PENDSET"]
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|
|
+# [inline (always)]
|
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|
+pub fn pendset (& mut self) -> PENDSET_W { PENDSET_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_ipsr2](index.html) module"]
|
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|
+pub struct R32_PFIC_IPSR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPSR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_ipsr2::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_PFIC_IPSR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_ipsr2::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPSR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPSR2 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPSR2_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRR1 register accessor: an alias for `Reg<R32_PFIC_IPRR1_SPEC>`"]
|
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|
+pub type R32_PFIC_IPRR1 = crate :: Reg < r32_pfic_iprr1 :: R32_PFIC_IPRR1_SPEC > ; # [doc = "Interrupt Pending Clear Register"]
|
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+pub mod r32_pfic_iprr1 { # [doc = "Register `R32_PFIC_IPRR1` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRR1_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRR1` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDRESET` reader - PENDRESET"]
|
|
|
+pub struct PENDRESET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDRESET_R { pub (crate) fn new (bits : u32) -> Self { PENDRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDRESET` writer - PENDRESET"]
|
|
|
+pub struct PENDRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - PENDRESET"]
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|
+# [inline (always)]
|
|
|
+pub fn pendreset (& self) -> PENDRESET_R { PENDRESET_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - PENDRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn pendreset (& mut self) -> PENDRESET_W { PENDRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprr1](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprr1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprr1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRR1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRR2 register accessor: an alias for `Reg<R32_PFIC_IPRR2_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRR2 = crate :: Reg < r32_pfic_iprr2 :: R32_PFIC_IPRR2_SPEC > ; # [doc = "Interrupt Pending Clear Register"]
|
|
|
+pub mod r32_pfic_iprr2 { # [doc = "Register `R32_PFIC_IPRR2` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRR2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRR2_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRR2` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRR2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRR2_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `PENDRESET` reader - PENDRESET"]
|
|
|
+pub struct PENDRESET_R (crate :: FieldReader < u32 , u32 >) ; impl PENDRESET_R { pub (crate) fn new (bits : u32) -> Self { PENDRESET_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for PENDRESET_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `PENDRESET` writer - PENDRESET"]
|
|
|
+pub struct PENDRESET_W < 'a > { w : & 'a mut W , } impl < 'a > PENDRESET_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - PENDRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn pendreset (& self) -> PENDRESET_R { PENDRESET_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - PENDRESET"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn pendreset (& mut self) -> PENDRESET_W { PENDRESET_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Pending Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprr2](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprr2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprr2::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRR2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRR2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IACTR1 register accessor: an alias for `Reg<R32_PFIC_IACTR1_SPEC>`"]
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+pub type R32_PFIC_IACTR1 = crate :: Reg < r32_pfic_iactr1 :: R32_PFIC_IACTR1_SPEC > ; # [doc = "Interrupt ACTIVE Register"]
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+pub mod r32_pfic_iactr1 { # [doc = "Register `R32_PFIC_IACTR1` reader"]
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+pub struct R (crate :: R < R32_PFIC_IACTR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IACTR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IACTR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IACTR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IACTR1` writer"]
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+pub struct W (crate :: W < R32_PFIC_IACTR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IACTR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IACTR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IACTR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `IACTS` reader - IACTS"]
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+pub struct IACTS_R (crate :: FieldReader < u32 , u32 >) ; impl IACTS_R { pub (crate) fn new (bits : u32) -> Self { IACTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IACTS_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IACTS` writer - IACTS"]
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+pub struct IACTS_W < 'a > { w : & 'a mut W , } impl < 'a > IACTS_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x000f_ffff << 12)) | ((value as u32 & 0x000f_ffff) << 12) ; self . w } } impl R { # [doc = "Bits 12:31 - IACTS"]
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+# [inline (always)]
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+pub fn iacts (& self) -> IACTS_R { IACTS_R :: new (((self . bits >> 12) & 0x000f_ffff) as u32) } } impl W { # [doc = "Bits 12:31 - IACTS"]
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+# [inline (always)]
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+pub fn iacts (& mut self) -> IACTS_W { IACTS_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt ACTIVE Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iactr1](index.html) module"]
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+pub struct R32_PFIC_IACTR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IACTR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iactr1::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IACTR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iactr1::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IACTR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IACTR1 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IACTR1_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IACTR2 register accessor: an alias for `Reg<R32_PFIC_IACTR2_SPEC>`"]
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+pub type R32_PFIC_IACTR2 = crate :: Reg < r32_pfic_iactr2 :: R32_PFIC_IACTR2_SPEC > ; # [doc = "Interrupt ACTIVE Register"]
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+pub mod r32_pfic_iactr2 { # [doc = "Register `R32_PFIC_IACTR2` reader"]
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+pub struct R (crate :: R < R32_PFIC_IACTR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IACTR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IACTR2_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IACTR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IACTR2` writer"]
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+pub struct W (crate :: W < R32_PFIC_IACTR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IACTR2_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IACTR2_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IACTR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `IACTS` reader - IACTS"]
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+pub struct IACTS_R (crate :: FieldReader < u32 , u32 >) ; impl IACTS_R { pub (crate) fn new (bits : u32) -> Self { IACTS_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IACTS_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IACTS` writer - IACTS"]
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+pub struct IACTS_W < 'a > { w : & 'a mut W , } impl < 'a > IACTS_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0fff_ffff) | (value as u32 & 0x0fff_ffff) ; self . w } } impl R { # [doc = "Bits 0:27 - IACTS"]
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+# [inline (always)]
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+pub fn iacts (& self) -> IACTS_R { IACTS_R :: new ((self . bits & 0x0fff_ffff) as u32) } } impl W { # [doc = "Bits 0:27 - IACTS"]
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+# [inline (always)]
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+pub fn iacts (& mut self) -> IACTS_W { IACTS_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt ACTIVE Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iactr2](index.html) module"]
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+pub struct R32_PFIC_IACTR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IACTR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iactr2::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IACTR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iactr2::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IACTR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IACTR2 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IACTR2_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR0 register accessor: an alias for `Reg<R32_PFIC_IPRIOR0_SPEC>`"]
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+pub type R32_PFIC_IPRIOR0 = crate :: Reg < r32_pfic_iprior0 :: R32_PFIC_IPRIOR0_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior0 { # [doc = "Register `R32_PFIC_IPRIOR0` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR0_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR0_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR0` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR0_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR0_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR0_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR0_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR0` reader - IPRIOR0"]
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+pub struct IPRIOR0_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR0_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR0` writer - IPRIOR0"]
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+pub struct IPRIOR0_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR0_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR0"]
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+# [inline (always)]
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+pub fn iprior0 (& self) -> IPRIOR0_R { IPRIOR0_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR0"]
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+# [inline (always)]
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+pub fn iprior0 (& mut self) -> IPRIOR0_W { IPRIOR0_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior0](index.html) module"]
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+pub struct R32_PFIC_IPRIOR0_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior0::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR0_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior0::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR0_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR0 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR0_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR1 register accessor: an alias for `Reg<R32_PFIC_IPRIOR1_SPEC>`"]
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+pub type R32_PFIC_IPRIOR1 = crate :: Reg < r32_pfic_iprior1 :: R32_PFIC_IPRIOR1_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior1 { # [doc = "Register `R32_PFIC_IPRIOR1` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR1_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR1` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR1_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR1_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR1_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR1` reader - IPRIOR1"]
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|
+pub struct IPRIOR1_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR1_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR1` writer - IPRIOR1"]
|
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+pub struct IPRIOR1_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR1_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR1"]
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|
|
+# [inline (always)]
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|
+pub fn iprior1 (& self) -> IPRIOR1_R { IPRIOR1_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR1"]
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|
|
+# [inline (always)]
|
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|
+pub fn iprior1 (& mut self) -> IPRIOR1_W { IPRIOR1_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior1](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR1_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR2 register accessor: an alias for `Reg<R32_PFIC_IPRIOR2_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR2 = crate :: Reg < r32_pfic_iprior2 :: R32_PFIC_IPRIOR2_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior2 { # [doc = "Register `R32_PFIC_IPRIOR2` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR2_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR2_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR2` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR2_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR2_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR2_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR2` reader - IPRIOR2"]
|
|
|
+pub struct IPRIOR2_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR2_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR2` writer - IPRIOR2"]
|
|
|
+pub struct IPRIOR2_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR2_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior2 (& self) -> IPRIOR2_R { IPRIOR2_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR2"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior2 (& mut self) -> IPRIOR2_W { IPRIOR2_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior2](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR2_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior2::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior2::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR2 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR2_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR3 register accessor: an alias for `Reg<R32_PFIC_IPRIOR3_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR3 = crate :: Reg < r32_pfic_iprior3 :: R32_PFIC_IPRIOR3_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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+pub mod r32_pfic_iprior3 { # [doc = "Register `R32_PFIC_IPRIOR3` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR3_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR3_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR3_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR3` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR3_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR3_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR3_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR3_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR3` reader - IPRIOR3"]
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+pub struct IPRIOR3_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR3_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR3` writer - IPRIOR3"]
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+pub struct IPRIOR3_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR3_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR3"]
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+# [inline (always)]
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+pub fn iprior3 (& self) -> IPRIOR3_R { IPRIOR3_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR3"]
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+# [inline (always)]
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+pub fn iprior3 (& mut self) -> IPRIOR3_W { IPRIOR3_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior3](index.html) module"]
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+pub struct R32_PFIC_IPRIOR3_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior3::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR3_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior3::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR3_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR3 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR3_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR4 register accessor: an alias for `Reg<R32_PFIC_IPRIOR4_SPEC>`"]
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+pub type R32_PFIC_IPRIOR4 = crate :: Reg < r32_pfic_iprior4 :: R32_PFIC_IPRIOR4_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior4 { # [doc = "Register `R32_PFIC_IPRIOR4` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR4_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR4_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR4_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR4_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR4` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR4_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR4_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR4_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR4_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR4` reader - IPRIOR4"]
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+pub struct IPRIOR4_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR4_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR4_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR4_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR4` writer - IPRIOR4"]
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+pub struct IPRIOR4_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR4_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR4"]
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+# [inline (always)]
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+pub fn iprior4 (& self) -> IPRIOR4_R { IPRIOR4_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR4"]
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+# [inline (always)]
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+pub fn iprior4 (& mut self) -> IPRIOR4_W { IPRIOR4_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior4](index.html) module"]
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+pub struct R32_PFIC_IPRIOR4_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR4_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior4::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR4_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior4::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR4_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR4 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR4_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR5 register accessor: an alias for `Reg<R32_PFIC_IPRIOR5_SPEC>`"]
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+pub type R32_PFIC_IPRIOR5 = crate :: Reg < r32_pfic_iprior5 :: R32_PFIC_IPRIOR5_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior5 { # [doc = "Register `R32_PFIC_IPRIOR5` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR5_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR5_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR5_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR5_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR5` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR5_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR5_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR5_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR5_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR5` reader - IPRIOR5"]
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+pub struct IPRIOR5_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR5_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR5_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR5_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR5` writer - IPRIOR5"]
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+pub struct IPRIOR5_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR5_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR5"]
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+# [inline (always)]
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+pub fn iprior5 (& self) -> IPRIOR5_R { IPRIOR5_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR5"]
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+# [inline (always)]
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+pub fn iprior5 (& mut self) -> IPRIOR5_W { IPRIOR5_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior5](index.html) module"]
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+pub struct R32_PFIC_IPRIOR5_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR5_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior5::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR5_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior5::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR5_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR5 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR5_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR6 register accessor: an alias for `Reg<R32_PFIC_IPRIOR6_SPEC>`"]
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+pub type R32_PFIC_IPRIOR6 = crate :: Reg < r32_pfic_iprior6 :: R32_PFIC_IPRIOR6_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior6 { # [doc = "Register `R32_PFIC_IPRIOR6` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR6_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR6_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR6_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR6_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR6` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR6_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR6_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR6_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR6_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR6` reader - IPRIOR6"]
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+pub struct IPRIOR6_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR6_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR6_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR6_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR6` writer - IPRIOR6"]
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+pub struct IPRIOR6_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR6_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR6"]
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+# [inline (always)]
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+pub fn iprior6 (& self) -> IPRIOR6_R { IPRIOR6_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR6"]
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+# [inline (always)]
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+pub fn iprior6 (& mut self) -> IPRIOR6_W { IPRIOR6_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior6](index.html) module"]
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+pub struct R32_PFIC_IPRIOR6_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR6_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior6::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR6_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior6::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR6_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR6 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR6_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR7 register accessor: an alias for `Reg<R32_PFIC_IPRIOR7_SPEC>`"]
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+pub type R32_PFIC_IPRIOR7 = crate :: Reg < r32_pfic_iprior7 :: R32_PFIC_IPRIOR7_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior7 { # [doc = "Register `R32_PFIC_IPRIOR7` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR7_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR7_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR7_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR7_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR7` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR7_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR7_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR7_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR7_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR7` reader - IPRIOR7"]
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+pub struct IPRIOR7_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR7_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR7_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR7_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR7` writer - IPRIOR7"]
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+pub struct IPRIOR7_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR7_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR7"]
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|
+# [inline (always)]
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+pub fn iprior7 (& self) -> IPRIOR7_R { IPRIOR7_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR7"]
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|
+# [inline (always)]
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|
+pub fn iprior7 (& mut self) -> IPRIOR7_W { IPRIOR7_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior7](index.html) module"]
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|
+pub struct R32_PFIC_IPRIOR7_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR7_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior7::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_PFIC_IPRIOR7_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior7::W](W) writer structure"]
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|
+impl crate :: Writable for R32_PFIC_IPRIOR7_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR7 to value 0"]
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|
+impl crate :: Resettable for R32_PFIC_IPRIOR7_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR8 register accessor: an alias for `Reg<R32_PFIC_IPRIOR8_SPEC>`"]
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|
+pub type R32_PFIC_IPRIOR8 = crate :: Reg < r32_pfic_iprior8 :: R32_PFIC_IPRIOR8_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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|
+pub mod r32_pfic_iprior8 { # [doc = "Register `R32_PFIC_IPRIOR8` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR8_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR8_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR8_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR8_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR8` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR8_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR8_SPEC > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR8_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR8_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR8` reader - IPRIOR8"]
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+pub struct IPRIOR8_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR8_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR8_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR8_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR8` writer - IPRIOR8"]
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+pub struct IPRIOR8_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR8_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR8"]
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+# [inline (always)]
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+pub fn iprior8 (& self) -> IPRIOR8_R { IPRIOR8_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR8"]
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+# [inline (always)]
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+pub fn iprior8 (& mut self) -> IPRIOR8_W { IPRIOR8_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior8](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR8_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR8_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior8::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR8_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior8::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR8_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR8 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR8_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR9 register accessor: an alias for `Reg<R32_PFIC_IPRIOR9_SPEC>`"]
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+pub type R32_PFIC_IPRIOR9 = crate :: Reg < r32_pfic_iprior9 :: R32_PFIC_IPRIOR9_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior9 { # [doc = "Register `R32_PFIC_IPRIOR9` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR9_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR9_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR9_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR9_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR9` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR9_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR9_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR9_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR9_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR9` reader - IPRIOR9"]
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+pub struct IPRIOR9_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR9_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR9_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR9_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR9` writer - IPRIOR9"]
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+pub struct IPRIOR9_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR9_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR9"]
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+# [inline (always)]
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+pub fn iprior9 (& self) -> IPRIOR9_R { IPRIOR9_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR9"]
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+# [inline (always)]
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+pub fn iprior9 (& mut self) -> IPRIOR9_W { IPRIOR9_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior9](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR9_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR9_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior9::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR9_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior9::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR9_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR9 to value 0"]
|
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+impl crate :: Resettable for R32_PFIC_IPRIOR9_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR10 register accessor: an alias for `Reg<R32_PFIC_IPRIOR10_SPEC>`"]
|
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+pub type R32_PFIC_IPRIOR10 = crate :: Reg < r32_pfic_iprior10 :: R32_PFIC_IPRIOR10_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior10 { # [doc = "Register `R32_PFIC_IPRIOR10` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR10_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR10_SPEC > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR10_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR10_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR10` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR10_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR10_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR10_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR10_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR10` reader - IPRIOR10"]
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+pub struct IPRIOR10_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR10_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR10_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR10_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR10` writer - IPRIOR10"]
|
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+pub struct IPRIOR10_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR10_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR10"]
|
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|
+# [inline (always)]
|
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|
+pub fn iprior10 (& self) -> IPRIOR10_R { IPRIOR10_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR10"]
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|
|
+# [inline (always)]
|
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|
+pub fn iprior10 (& mut self) -> IPRIOR10_W { IPRIOR10_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior10](index.html) module"]
|
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|
+pub struct R32_PFIC_IPRIOR10_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR10_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior10::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR10_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior10::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PFIC_IPRIOR10_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR10 to value 0"]
|
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|
+impl crate :: Resettable for R32_PFIC_IPRIOR10_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR11 register accessor: an alias for `Reg<R32_PFIC_IPRIOR11_SPEC>`"]
|
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+pub type R32_PFIC_IPRIOR11 = crate :: Reg < r32_pfic_iprior11 :: R32_PFIC_IPRIOR11_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior11 { # [doc = "Register `R32_PFIC_IPRIOR11` reader"]
|
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR11_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR11_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR11_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR11_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR11` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR11_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR11_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR11_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR11_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR11` reader - IPRIOR11"]
|
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|
+pub struct IPRIOR11_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR11_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR11_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR11_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR11` writer - IPRIOR11"]
|
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|
+pub struct IPRIOR11_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR11_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR11"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior11 (& self) -> IPRIOR11_R { IPRIOR11_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR11"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior11 (& mut self) -> IPRIOR11_W { IPRIOR11_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior11](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR11_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR11_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior11::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR11_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior11::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR11_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR11 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR11_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR12 register accessor: an alias for `Reg<R32_PFIC_IPRIOR12_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR12 = crate :: Reg < r32_pfic_iprior12 :: R32_PFIC_IPRIOR12_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior12 { # [doc = "Register `R32_PFIC_IPRIOR12` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR12_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR12_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR12_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR12_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR12` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR12_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR12_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR12_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR12_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR12` reader - IPRIOR12"]
|
|
|
+pub struct IPRIOR12_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR12_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR12_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR12_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR12` writer - IPRIOR12"]
|
|
|
+pub struct IPRIOR12_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR12_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR12"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior12 (& self) -> IPRIOR12_R { IPRIOR12_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR12"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior12 (& mut self) -> IPRIOR12_W { IPRIOR12_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior12](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR12_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR12_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior12::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR12_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior12::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR12_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR12 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR12_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR13 register accessor: an alias for `Reg<R32_PFIC_IPRIOR13_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR13 = crate :: Reg < r32_pfic_iprior13 :: R32_PFIC_IPRIOR13_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior13 { # [doc = "Register `R32_PFIC_IPRIOR13` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR13_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR13_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR13_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR13_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR13` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR13_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR13_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR13_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR13_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR13` reader - IPRIOR13"]
|
|
|
+pub struct IPRIOR13_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR13_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR13_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR13_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR13` writer - IPRIOR13"]
|
|
|
+pub struct IPRIOR13_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR13_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR13"]
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+# [inline (always)]
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+pub fn iprior13 (& self) -> IPRIOR13_R { IPRIOR13_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR13"]
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+# [inline (always)]
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+pub fn iprior13 (& mut self) -> IPRIOR13_W { IPRIOR13_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior13](index.html) module"]
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+pub struct R32_PFIC_IPRIOR13_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR13_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior13::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR13_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior13::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR13_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR13 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR13_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR14 register accessor: an alias for `Reg<R32_PFIC_IPRIOR14_SPEC>`"]
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+pub type R32_PFIC_IPRIOR14 = crate :: Reg < r32_pfic_iprior14 :: R32_PFIC_IPRIOR14_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior14 { # [doc = "Register `R32_PFIC_IPRIOR14` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR14_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR14_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR14_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR14_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR14` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR14_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR14_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR14_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR14_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR14` reader - IPRIOR14"]
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+pub struct IPRIOR14_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR14_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR14_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR14_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR14` writer - IPRIOR14"]
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+pub struct IPRIOR14_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR14_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR14"]
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+# [inline (always)]
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+pub fn iprior14 (& self) -> IPRIOR14_R { IPRIOR14_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR14"]
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+# [inline (always)]
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+pub fn iprior14 (& mut self) -> IPRIOR14_W { IPRIOR14_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior14](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR14_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR14_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior14::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR14_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior14::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR14_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR14 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR14_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR15 register accessor: an alias for `Reg<R32_PFIC_IPRIOR15_SPEC>`"]
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+pub type R32_PFIC_IPRIOR15 = crate :: Reg < r32_pfic_iprior15 :: R32_PFIC_IPRIOR15_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior15 { # [doc = "Register `R32_PFIC_IPRIOR15` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR15_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR15_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR15_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR15_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR15` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR15_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR15_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR15_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR15_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR15` reader - IPRIOR15"]
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+pub struct IPRIOR15_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR15_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR15_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR15_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR15` writer - IPRIOR15"]
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+pub struct IPRIOR15_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR15_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR15"]
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+# [inline (always)]
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+pub fn iprior15 (& self) -> IPRIOR15_R { IPRIOR15_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR15"]
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+# [inline (always)]
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+pub fn iprior15 (& mut self) -> IPRIOR15_W { IPRIOR15_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior15](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR15_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR15_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior15::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR15_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior15::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR15_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR15 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR15_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR16 register accessor: an alias for `Reg<R32_PFIC_IPRIOR16_SPEC>`"]
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+pub type R32_PFIC_IPRIOR16 = crate :: Reg < r32_pfic_iprior16 :: R32_PFIC_IPRIOR16_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior16 { # [doc = "Register `R32_PFIC_IPRIOR16` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR16_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR16_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR16_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR16_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR16` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR16_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR16_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR16_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR16_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR16` reader - IPRIOR16"]
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+pub struct IPRIOR16_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR16_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR16_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR16_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR16` writer - IPRIOR16"]
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+pub struct IPRIOR16_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR16_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR16"]
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|
|
+# [inline (always)]
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|
+pub fn iprior16 (& self) -> IPRIOR16_R { IPRIOR16_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR16"]
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|
|
+# [inline (always)]
|
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|
+pub fn iprior16 (& mut self) -> IPRIOR16_W { IPRIOR16_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior16](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR16_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR16_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior16::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR16_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior16::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR16_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR16 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR16_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR17 register accessor: an alias for `Reg<R32_PFIC_IPRIOR17_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR17 = crate :: Reg < r32_pfic_iprior17 :: R32_PFIC_IPRIOR17_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior17 { # [doc = "Register `R32_PFIC_IPRIOR17` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR17_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR17_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR17_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR17_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR17` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR17_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR17_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR17_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR17_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR17` reader - IPRIOR17"]
|
|
|
+pub struct IPRIOR17_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR17_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR17_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR17_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR17` writer - IPRIOR17"]
|
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|
+pub struct IPRIOR17_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR17_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR17"]
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|
|
+# [inline (always)]
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|
+pub fn iprior17 (& self) -> IPRIOR17_R { IPRIOR17_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR17"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior17 (& mut self) -> IPRIOR17_W { IPRIOR17_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior17](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR17_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR17_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior17::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR17_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior17::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR17_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR17 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR17_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR18 register accessor: an alias for `Reg<R32_PFIC_IPRIOR18_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR18 = crate :: Reg < r32_pfic_iprior18 :: R32_PFIC_IPRIOR18_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior18 { # [doc = "Register `R32_PFIC_IPRIOR18` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR18_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR18_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR18_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR18_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR18` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR18_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR18_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR18_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR18_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR18` reader - IPRIOR18"]
|
|
|
+pub struct IPRIOR18_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR18_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR18_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR18_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR18` writer - IPRIOR18"]
|
|
|
+pub struct IPRIOR18_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR18_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR18"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior18 (& self) -> IPRIOR18_R { IPRIOR18_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR18"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior18 (& mut self) -> IPRIOR18_W { IPRIOR18_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior18](index.html) module"]
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+pub struct R32_PFIC_IPRIOR18_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR18_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior18::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR18_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior18::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR18_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR18 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR18_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR19 register accessor: an alias for `Reg<R32_PFIC_IPRIOR19_SPEC>`"]
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+pub type R32_PFIC_IPRIOR19 = crate :: Reg < r32_pfic_iprior19 :: R32_PFIC_IPRIOR19_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior19 { # [doc = "Register `R32_PFIC_IPRIOR19` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR19_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR19_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR19_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR19_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR19` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR19_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR19_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR19_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR19_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR19` reader - IPRIOR19"]
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+pub struct IPRIOR19_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR19_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR19_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR19_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR19` writer - IPRIOR19"]
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+pub struct IPRIOR19_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR19_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR19"]
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+# [inline (always)]
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+pub fn iprior19 (& self) -> IPRIOR19_R { IPRIOR19_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR19"]
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+# [inline (always)]
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+pub fn iprior19 (& mut self) -> IPRIOR19_W { IPRIOR19_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior19](index.html) module"]
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+pub struct R32_PFIC_IPRIOR19_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR19_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior19::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR19_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior19::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR19_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR19 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR19_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR20 register accessor: an alias for `Reg<R32_PFIC_IPRIOR20_SPEC>`"]
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+pub type R32_PFIC_IPRIOR20 = crate :: Reg < r32_pfic_iprior20 :: R32_PFIC_IPRIOR20_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior20 { # [doc = "Register `R32_PFIC_IPRIOR20` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR20_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR20_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR20_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR20_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR20` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR20_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR20_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR20_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR20_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR20` reader - IPRIOR20"]
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+pub struct IPRIOR20_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR20_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR20_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR20_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR20` writer - IPRIOR20"]
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+pub struct IPRIOR20_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR20_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR20"]
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+# [inline (always)]
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+pub fn iprior20 (& self) -> IPRIOR20_R { IPRIOR20_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR20"]
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+# [inline (always)]
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+pub fn iprior20 (& mut self) -> IPRIOR20_W { IPRIOR20_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior20](index.html) module"]
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+pub struct R32_PFIC_IPRIOR20_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR20_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior20::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR20_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior20::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR20_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR20 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR20_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR21 register accessor: an alias for `Reg<R32_PFIC_IPRIOR21_SPEC>`"]
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+pub type R32_PFIC_IPRIOR21 = crate :: Reg < r32_pfic_iprior21 :: R32_PFIC_IPRIOR21_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior21 { # [doc = "Register `R32_PFIC_IPRIOR21` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR21_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR21_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR21_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR21_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR21` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR21_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR21_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR21_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR21_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR21` reader - IPRIOR21"]
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+pub struct IPRIOR21_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR21_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR21_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR21_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR21` writer - IPRIOR21"]
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+pub struct IPRIOR21_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR21_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR21"]
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+# [inline (always)]
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+pub fn iprior21 (& self) -> IPRIOR21_R { IPRIOR21_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR21"]
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+# [inline (always)]
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+pub fn iprior21 (& mut self) -> IPRIOR21_W { IPRIOR21_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior21](index.html) module"]
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+pub struct R32_PFIC_IPRIOR21_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR21_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior21::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR21_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior21::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR21_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR21 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR21_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR22 register accessor: an alias for `Reg<R32_PFIC_IPRIOR22_SPEC>`"]
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+pub type R32_PFIC_IPRIOR22 = crate :: Reg < r32_pfic_iprior22 :: R32_PFIC_IPRIOR22_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior22 { # [doc = "Register `R32_PFIC_IPRIOR22` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR22_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR22_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR22_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR22_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR22` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR22_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR22_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR22_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR22_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR22` reader - IPRIOR22"]
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+pub struct IPRIOR22_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR22_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR22_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR22_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR22` writer - IPRIOR22"]
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+pub struct IPRIOR22_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR22_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR22"]
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+# [inline (always)]
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+pub fn iprior22 (& self) -> IPRIOR22_R { IPRIOR22_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR22"]
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|
+# [inline (always)]
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+pub fn iprior22 (& mut self) -> IPRIOR22_W { IPRIOR22_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior22](index.html) module"]
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|
+pub struct R32_PFIC_IPRIOR22_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR22_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior22::R](R) reader structure"]
|
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|
+impl crate :: Readable for R32_PFIC_IPRIOR22_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior22::W](W) writer structure"]
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|
+impl crate :: Writable for R32_PFIC_IPRIOR22_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR22 to value 0"]
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|
+impl crate :: Resettable for R32_PFIC_IPRIOR22_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR23 register accessor: an alias for `Reg<R32_PFIC_IPRIOR23_SPEC>`"]
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|
+pub type R32_PFIC_IPRIOR23 = crate :: Reg < r32_pfic_iprior23 :: R32_PFIC_IPRIOR23_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior23 { # [doc = "Register `R32_PFIC_IPRIOR23` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR23_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR23_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR23_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR23_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR23` writer"]
|
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|
+pub struct W (crate :: W < R32_PFIC_IPRIOR23_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR23_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR23_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR23_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR23` reader - IPRIOR23"]
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|
+pub struct IPRIOR23_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR23_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR23_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR23_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR23` writer - IPRIOR23"]
|
|
|
+pub struct IPRIOR23_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR23_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR23"]
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|
|
+# [inline (always)]
|
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|
+pub fn iprior23 (& self) -> IPRIOR23_R { IPRIOR23_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR23"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior23 (& mut self) -> IPRIOR23_W { IPRIOR23_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior23](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR23_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR23_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior23::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR23_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior23::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR23_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR23 to value 0"]
|
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+impl crate :: Resettable for R32_PFIC_IPRIOR23_SPEC { # [inline (always)]
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|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR24 register accessor: an alias for `Reg<R32_PFIC_IPRIOR24_SPEC>`"]
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+pub type R32_PFIC_IPRIOR24 = crate :: Reg < r32_pfic_iprior24 :: R32_PFIC_IPRIOR24_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior24 { # [doc = "Register `R32_PFIC_IPRIOR24` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR24_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR24_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR24_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR24_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR24` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR24_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR24_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR24_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR24_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR24` reader - IPRIOR24"]
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+pub struct IPRIOR24_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR24_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR24_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR24_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR24` writer - IPRIOR24"]
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+pub struct IPRIOR24_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR24_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR24"]
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+# [inline (always)]
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+pub fn iprior24 (& self) -> IPRIOR24_R { IPRIOR24_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR24"]
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+# [inline (always)]
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+pub fn iprior24 (& mut self) -> IPRIOR24_W { IPRIOR24_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior24](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR24_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR24_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior24::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR24_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior24::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR24_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR24 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR24_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR25 register accessor: an alias for `Reg<R32_PFIC_IPRIOR25_SPEC>`"]
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+pub type R32_PFIC_IPRIOR25 = crate :: Reg < r32_pfic_iprior25 :: R32_PFIC_IPRIOR25_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior25 { # [doc = "Register `R32_PFIC_IPRIOR25` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR25_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR25_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR25_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR25_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR25` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR25_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR25_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR25_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR25_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR25` reader - IPRIOR25"]
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+pub struct IPRIOR25_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR25_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR25_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR25_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR25` writer - IPRIOR25"]
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+pub struct IPRIOR25_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR25_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR25"]
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+# [inline (always)]
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+pub fn iprior25 (& self) -> IPRIOR25_R { IPRIOR25_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR25"]
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+# [inline (always)]
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+pub fn iprior25 (& mut self) -> IPRIOR25_W { IPRIOR25_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior25](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR25_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR25_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior25::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR25_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior25::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR25_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR25 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR25_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR26 register accessor: an alias for `Reg<R32_PFIC_IPRIOR26_SPEC>`"]
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+pub type R32_PFIC_IPRIOR26 = crate :: Reg < r32_pfic_iprior26 :: R32_PFIC_IPRIOR26_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior26 { # [doc = "Register `R32_PFIC_IPRIOR26` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR26_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR26_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR26_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR26_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR26` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR26_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR26_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR26_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR26_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR26` reader - IPRIOR26"]
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+pub struct IPRIOR26_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR26_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR26_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR26_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR26` writer - IPRIOR26"]
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+pub struct IPRIOR26_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR26_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR26"]
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+# [inline (always)]
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+pub fn iprior26 (& self) -> IPRIOR26_R { IPRIOR26_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR26"]
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+# [inline (always)]
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+pub fn iprior26 (& mut self) -> IPRIOR26_W { IPRIOR26_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior26](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR26_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR26_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior26::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR26_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior26::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR26_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR26 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR26_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR27 register accessor: an alias for `Reg<R32_PFIC_IPRIOR27_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR27 = crate :: Reg < r32_pfic_iprior27 :: R32_PFIC_IPRIOR27_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior27 { # [doc = "Register `R32_PFIC_IPRIOR27` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR27_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR27_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR27_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR27_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR27` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR27_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR27_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR27_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR27_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR27` reader - IPRIOR27"]
|
|
|
+pub struct IPRIOR27_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR27_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR27_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR27_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR27` writer - IPRIOR27"]
|
|
|
+pub struct IPRIOR27_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR27_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR27"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior27 (& self) -> IPRIOR27_R { IPRIOR27_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR27"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior27 (& mut self) -> IPRIOR27_W { IPRIOR27_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior27](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR27_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR27_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior27::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR27_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior27::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR27_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR27 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR27_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR28 register accessor: an alias for `Reg<R32_PFIC_IPRIOR28_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR28 = crate :: Reg < r32_pfic_iprior28 :: R32_PFIC_IPRIOR28_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior28 { # [doc = "Register `R32_PFIC_IPRIOR28` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR28_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR28_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR28_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR28_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR28` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR28_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR28_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR28_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR28_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR28` reader - IPRIOR28"]
|
|
|
+pub struct IPRIOR28_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR28_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR28_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR28_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR28` writer - IPRIOR28"]
|
|
|
+pub struct IPRIOR28_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR28_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR28"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior28 (& self) -> IPRIOR28_R { IPRIOR28_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR28"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior28 (& mut self) -> IPRIOR28_W { IPRIOR28_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior28](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR28_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR28_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior28::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR28_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior28::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR28_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR28 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR28_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR29 register accessor: an alias for `Reg<R32_PFIC_IPRIOR29_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR29 = crate :: Reg < r32_pfic_iprior29 :: R32_PFIC_IPRIOR29_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior29 { # [doc = "Register `R32_PFIC_IPRIOR29` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR29_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR29_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR29_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR29_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR29` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR29_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR29_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR29_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR29_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR29` reader - IPRIOR29"]
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+pub struct IPRIOR29_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR29_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR29_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR29_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR29` writer - IPRIOR29"]
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+pub struct IPRIOR29_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR29_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR29"]
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+# [inline (always)]
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+pub fn iprior29 (& self) -> IPRIOR29_R { IPRIOR29_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR29"]
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+# [inline (always)]
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+pub fn iprior29 (& mut self) -> IPRIOR29_W { IPRIOR29_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior29](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR29_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR29_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior29::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR29_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior29::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR29_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR29 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR29_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR30 register accessor: an alias for `Reg<R32_PFIC_IPRIOR30_SPEC>`"]
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+pub type R32_PFIC_IPRIOR30 = crate :: Reg < r32_pfic_iprior30 :: R32_PFIC_IPRIOR30_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior30 { # [doc = "Register `R32_PFIC_IPRIOR30` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR30_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR30_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR30_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR30_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR30` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR30_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR30_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR30_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR30_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR30` reader - IPRIOR30"]
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+pub struct IPRIOR30_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR30_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR30_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR30_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR30` writer - IPRIOR30"]
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+pub struct IPRIOR30_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR30_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR30"]
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+# [inline (always)]
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+pub fn iprior30 (& self) -> IPRIOR30_R { IPRIOR30_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR30"]
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+# [inline (always)]
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+pub fn iprior30 (& mut self) -> IPRIOR30_W { IPRIOR30_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior30](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR30_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR30_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior30::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR30_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior30::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR30_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR30 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR30_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR31 register accessor: an alias for `Reg<R32_PFIC_IPRIOR31_SPEC>`"]
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+pub type R32_PFIC_IPRIOR31 = crate :: Reg < r32_pfic_iprior31 :: R32_PFIC_IPRIOR31_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior31 { # [doc = "Register `R32_PFIC_IPRIOR31` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR31_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR31_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR31_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR31_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR31` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR31_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR31_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR31_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR31_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR31` reader - IPRIOR31"]
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+pub struct IPRIOR31_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR31_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR31_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR31_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR31` writer - IPRIOR31"]
|
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+pub struct IPRIOR31_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR31_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR31"]
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+# [inline (always)]
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+pub fn iprior31 (& self) -> IPRIOR31_R { IPRIOR31_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR31"]
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|
+# [inline (always)]
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+pub fn iprior31 (& mut self) -> IPRIOR31_W { IPRIOR31_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior31](index.html) module"]
|
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|
+pub struct R32_PFIC_IPRIOR31_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR31_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior31::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR31_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior31::W](W) writer structure"]
|
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|
+impl crate :: Writable for R32_PFIC_IPRIOR31_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR31 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR31_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR32 register accessor: an alias for `Reg<R32_PFIC_IPRIOR32_SPEC>`"]
|
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|
+pub type R32_PFIC_IPRIOR32 = crate :: Reg < r32_pfic_iprior32 :: R32_PFIC_IPRIOR32_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior32 { # [doc = "Register `R32_PFIC_IPRIOR32` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR32_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR32_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR32_SPEC >> for R { # [inline (always)]
|
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR32_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR32` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR32_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR32_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR32_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR32_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR32` reader - IPRIOR32"]
|
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|
+pub struct IPRIOR32_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR32_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR32_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR32_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR32` writer - IPRIOR32"]
|
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|
+pub struct IPRIOR32_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR32_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR32"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior32 (& self) -> IPRIOR32_R { IPRIOR32_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR32"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior32 (& mut self) -> IPRIOR32_W { IPRIOR32_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior32](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR32_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR32_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior32::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR32_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior32::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR32_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR32 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR32_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR33 register accessor: an alias for `Reg<R32_PFIC_IPRIOR33_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR33 = crate :: Reg < r32_pfic_iprior33 :: R32_PFIC_IPRIOR33_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior33 { # [doc = "Register `R32_PFIC_IPRIOR33` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR33_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR33_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR33_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR33_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR33` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR33_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR33_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR33_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR33_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR33` reader - IPRIOR33"]
|
|
|
+pub struct IPRIOR33_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR33_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR33_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR33_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR33` writer - IPRIOR33"]
|
|
|
+pub struct IPRIOR33_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR33_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR33"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior33 (& self) -> IPRIOR33_R { IPRIOR33_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR33"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior33 (& mut self) -> IPRIOR33_W { IPRIOR33_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior33](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR33_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR33_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior33::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR33_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior33::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR33_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR33 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR33_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR34 register accessor: an alias for `Reg<R32_PFIC_IPRIOR34_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR34 = crate :: Reg < r32_pfic_iprior34 :: R32_PFIC_IPRIOR34_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior34 { # [doc = "Register `R32_PFIC_IPRIOR34` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR34_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR34_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR34_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR34_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR34` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR34_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR34_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR34_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR34_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR34` reader - IPRIOR34"]
|
|
|
+pub struct IPRIOR34_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR34_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR34_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR34_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR34` writer - IPRIOR34"]
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+pub struct IPRIOR34_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR34_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR34"]
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+# [inline (always)]
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+pub fn iprior34 (& self) -> IPRIOR34_R { IPRIOR34_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR34"]
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+# [inline (always)]
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+pub fn iprior34 (& mut self) -> IPRIOR34_W { IPRIOR34_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior34](index.html) module"]
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+pub struct R32_PFIC_IPRIOR34_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR34_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior34::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR34_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior34::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR34_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR34 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR34_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR35 register accessor: an alias for `Reg<R32_PFIC_IPRIOR35_SPEC>`"]
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+pub type R32_PFIC_IPRIOR35 = crate :: Reg < r32_pfic_iprior35 :: R32_PFIC_IPRIOR35_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior35 { # [doc = "Register `R32_PFIC_IPRIOR35` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR35_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR35_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR35_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR35_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR35` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR35_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR35_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR35_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR35_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR35` reader - IPRIOR35"]
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+pub struct IPRIOR35_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR35_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR35_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR35_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR35` writer - IPRIOR35"]
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+pub struct IPRIOR35_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR35_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR35"]
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+# [inline (always)]
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+pub fn iprior35 (& self) -> IPRIOR35_R { IPRIOR35_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR35"]
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+# [inline (always)]
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+pub fn iprior35 (& mut self) -> IPRIOR35_W { IPRIOR35_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior35](index.html) module"]
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+pub struct R32_PFIC_IPRIOR35_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR35_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior35::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR35_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior35::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR35_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR35 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR35_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR36 register accessor: an alias for `Reg<R32_PFIC_IPRIOR36_SPEC>`"]
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+pub type R32_PFIC_IPRIOR36 = crate :: Reg < r32_pfic_iprior36 :: R32_PFIC_IPRIOR36_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior36 { # [doc = "Register `R32_PFIC_IPRIOR36` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR36_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR36_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR36_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR36_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR36` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR36_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR36_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR36_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR36_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR36` reader - IPRIOR36"]
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+pub struct IPRIOR36_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR36_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR36_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR36_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR36` writer - IPRIOR36"]
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+pub struct IPRIOR36_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR36_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR36"]
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+# [inline (always)]
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+pub fn iprior36 (& self) -> IPRIOR36_R { IPRIOR36_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR36"]
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+# [inline (always)]
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+pub fn iprior36 (& mut self) -> IPRIOR36_W { IPRIOR36_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior36](index.html) module"]
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+pub struct R32_PFIC_IPRIOR36_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR36_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior36::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR36_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior36::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR36_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR36 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR36_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR37 register accessor: an alias for `Reg<R32_PFIC_IPRIOR37_SPEC>`"]
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+pub type R32_PFIC_IPRIOR37 = crate :: Reg < r32_pfic_iprior37 :: R32_PFIC_IPRIOR37_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior37 { # [doc = "Register `R32_PFIC_IPRIOR37` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR37_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR37_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR37_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR37_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR37` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR37_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR37_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR37_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR37_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR37` reader - IPRIOR37"]
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+pub struct IPRIOR37_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR37_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR37_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR37_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR37` writer - IPRIOR37"]
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+pub struct IPRIOR37_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR37_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR37"]
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+# [inline (always)]
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+pub fn iprior37 (& self) -> IPRIOR37_R { IPRIOR37_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR37"]
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+# [inline (always)]
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+pub fn iprior37 (& mut self) -> IPRIOR37_W { IPRIOR37_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior37](index.html) module"]
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+pub struct R32_PFIC_IPRIOR37_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR37_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior37::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR37_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior37::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR37_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR37 to value 0"]
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|
+impl crate :: Resettable for R32_PFIC_IPRIOR37_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR38 register accessor: an alias for `Reg<R32_PFIC_IPRIOR38_SPEC>`"]
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+pub type R32_PFIC_IPRIOR38 = crate :: Reg < r32_pfic_iprior38 :: R32_PFIC_IPRIOR38_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior38 { # [doc = "Register `R32_PFIC_IPRIOR38` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR38_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR38_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR38_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR38_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR38` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR38_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR38_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR38_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR38_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR38` reader - IPRIOR38"]
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+pub struct IPRIOR38_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR38_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR38_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR38_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR38` writer - IPRIOR38"]
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+pub struct IPRIOR38_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR38_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR38"]
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|
+# [inline (always)]
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|
+pub fn iprior38 (& self) -> IPRIOR38_R { IPRIOR38_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR38"]
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|
|
+# [inline (always)]
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|
+pub fn iprior38 (& mut self) -> IPRIOR38_W { IPRIOR38_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior38](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR38_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR38_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior38::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR38_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior38::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR38_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR38 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR38_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR39 register accessor: an alias for `Reg<R32_PFIC_IPRIOR39_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR39 = crate :: Reg < r32_pfic_iprior39 :: R32_PFIC_IPRIOR39_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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|
|
+pub mod r32_pfic_iprior39 { # [doc = "Register `R32_PFIC_IPRIOR39` reader"]
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|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR39_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR39_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR39_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR39_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR39` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR39_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR39_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR39_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR39_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR39` reader - IPRIOR39"]
|
|
|
+pub struct IPRIOR39_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR39_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR39_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR39_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR39` writer - IPRIOR39"]
|
|
|
+pub struct IPRIOR39_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR39_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR39"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior39 (& self) -> IPRIOR39_R { IPRIOR39_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR39"]
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+# [inline (always)]
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+pub fn iprior39 (& mut self) -> IPRIOR39_W { IPRIOR39_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior39](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR39_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR39_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior39::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR39_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior39::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR39_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR39 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR39_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR40 register accessor: an alias for `Reg<R32_PFIC_IPRIOR40_SPEC>`"]
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+pub type R32_PFIC_IPRIOR40 = crate :: Reg < r32_pfic_iprior40 :: R32_PFIC_IPRIOR40_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior40 { # [doc = "Register `R32_PFIC_IPRIOR40` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR40_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR40_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR40_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR40_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR40` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR40_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR40_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR40_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR40_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR40` reader - IPRIOR40"]
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+pub struct IPRIOR40_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR40_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR40_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR40_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR40` writer - IPRIOR40"]
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+pub struct IPRIOR40_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR40_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR40"]
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+# [inline (always)]
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+pub fn iprior40 (& self) -> IPRIOR40_R { IPRIOR40_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR40"]
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+# [inline (always)]
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+pub fn iprior40 (& mut self) -> IPRIOR40_W { IPRIOR40_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior40](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR40_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR40_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior40::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR40_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior40::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR40_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR40 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR40_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR41 register accessor: an alias for `Reg<R32_PFIC_IPRIOR41_SPEC>`"]
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+pub type R32_PFIC_IPRIOR41 = crate :: Reg < r32_pfic_iprior41 :: R32_PFIC_IPRIOR41_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior41 { # [doc = "Register `R32_PFIC_IPRIOR41` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR41_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR41_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR41_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR41_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR41` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR41_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR41_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR41_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR41_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR41` reader - IPRIOR41"]
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+pub struct IPRIOR41_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR41_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR41_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR41_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR41` writer - IPRIOR41"]
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+pub struct IPRIOR41_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR41_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR41"]
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+# [inline (always)]
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+pub fn iprior41 (& self) -> IPRIOR41_R { IPRIOR41_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR41"]
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+# [inline (always)]
|
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+pub fn iprior41 (& mut self) -> IPRIOR41_W { IPRIOR41_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior41](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR41_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR41_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior41::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR41_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior41::W](W) writer structure"]
|
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+impl crate :: Writable for R32_PFIC_IPRIOR41_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR41 to value 0"]
|
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+impl crate :: Resettable for R32_PFIC_IPRIOR41_SPEC { # [inline (always)]
|
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR42 register accessor: an alias for `Reg<R32_PFIC_IPRIOR42_SPEC>`"]
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+pub type R32_PFIC_IPRIOR42 = crate :: Reg < r32_pfic_iprior42 :: R32_PFIC_IPRIOR42_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior42 { # [doc = "Register `R32_PFIC_IPRIOR42` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR42_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR42_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR42_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR42_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR42` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR42_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR42_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR42_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR42_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR42` reader - IPRIOR42"]
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+pub struct IPRIOR42_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR42_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR42_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR42_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR42` writer - IPRIOR42"]
|
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+pub struct IPRIOR42_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR42_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR42"]
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|
|
+# [inline (always)]
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|
+pub fn iprior42 (& self) -> IPRIOR42_R { IPRIOR42_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR42"]
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|
|
+# [inline (always)]
|
|
|
+pub fn iprior42 (& mut self) -> IPRIOR42_W { IPRIOR42_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior42](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR42_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR42_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior42::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR42_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior42::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR42_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR42 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR42_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR43 register accessor: an alias for `Reg<R32_PFIC_IPRIOR43_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR43 = crate :: Reg < r32_pfic_iprior43 :: R32_PFIC_IPRIOR43_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior43 { # [doc = "Register `R32_PFIC_IPRIOR43` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR43_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR43_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR43_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR43_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR43` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR43_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR43_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR43_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR43_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR43` reader - IPRIOR43"]
|
|
|
+pub struct IPRIOR43_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR43_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR43_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR43_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR43` writer - IPRIOR43"]
|
|
|
+pub struct IPRIOR43_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR43_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR43"]
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|
|
+# [inline (always)]
|
|
|
+pub fn iprior43 (& self) -> IPRIOR43_R { IPRIOR43_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR43"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior43 (& mut self) -> IPRIOR43_W { IPRIOR43_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior43](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR43_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR43_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior43::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR43_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior43::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR43_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR43 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR43_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR44 register accessor: an alias for `Reg<R32_PFIC_IPRIOR44_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR44 = crate :: Reg < r32_pfic_iprior44 :: R32_PFIC_IPRIOR44_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior44 { # [doc = "Register `R32_PFIC_IPRIOR44` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR44_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR44_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR44_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR44_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR44` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR44_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR44_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR44_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR44_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR44` reader - IPRIOR44"]
|
|
|
+pub struct IPRIOR44_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR44_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR44_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR44_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR44` writer - IPRIOR44"]
|
|
|
+pub struct IPRIOR44_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR44_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR44"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior44 (& self) -> IPRIOR44_R { IPRIOR44_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR44"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior44 (& mut self) -> IPRIOR44_W { IPRIOR44_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior44](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR44_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR44_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior44::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR44_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior44::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR44_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR44 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR44_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR45 register accessor: an alias for `Reg<R32_PFIC_IPRIOR45_SPEC>`"]
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+pub type R32_PFIC_IPRIOR45 = crate :: Reg < r32_pfic_iprior45 :: R32_PFIC_IPRIOR45_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior45 { # [doc = "Register `R32_PFIC_IPRIOR45` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR45_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR45_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR45_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR45_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR45` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR45_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR45_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR45_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR45_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR45` reader - IPRIOR45"]
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+pub struct IPRIOR45_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR45_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR45_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR45_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR45` writer - IPRIOR45"]
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+pub struct IPRIOR45_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR45_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR45"]
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+# [inline (always)]
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+pub fn iprior45 (& self) -> IPRIOR45_R { IPRIOR45_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR45"]
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+# [inline (always)]
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+pub fn iprior45 (& mut self) -> IPRIOR45_W { IPRIOR45_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior45](index.html) module"]
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+pub struct R32_PFIC_IPRIOR45_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR45_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior45::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR45_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior45::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR45_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR45 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR45_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR46 register accessor: an alias for `Reg<R32_PFIC_IPRIOR46_SPEC>`"]
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+pub type R32_PFIC_IPRIOR46 = crate :: Reg < r32_pfic_iprior46 :: R32_PFIC_IPRIOR46_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior46 { # [doc = "Register `R32_PFIC_IPRIOR46` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR46_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR46_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR46_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR46_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR46` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR46_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR46_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR46_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR46_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR46` reader - IPRIOR46"]
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+pub struct IPRIOR46_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR46_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR46_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR46_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR46` writer - IPRIOR46"]
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+pub struct IPRIOR46_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR46_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR46"]
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+# [inline (always)]
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+pub fn iprior46 (& self) -> IPRIOR46_R { IPRIOR46_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR46"]
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+# [inline (always)]
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+pub fn iprior46 (& mut self) -> IPRIOR46_W { IPRIOR46_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior46](index.html) module"]
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+pub struct R32_PFIC_IPRIOR46_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR46_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior46::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR46_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior46::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR46_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR46 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR46_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR47 register accessor: an alias for `Reg<R32_PFIC_IPRIOR47_SPEC>`"]
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+pub type R32_PFIC_IPRIOR47 = crate :: Reg < r32_pfic_iprior47 :: R32_PFIC_IPRIOR47_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior47 { # [doc = "Register `R32_PFIC_IPRIOR47` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR47_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR47_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR47_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR47_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR47` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR47_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR47_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR47_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR47_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR47` reader - IPRIOR47"]
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+pub struct IPRIOR47_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR47_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR47_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR47_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR47` writer - IPRIOR47"]
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+pub struct IPRIOR47_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR47_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR47"]
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+# [inline (always)]
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+pub fn iprior47 (& self) -> IPRIOR47_R { IPRIOR47_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR47"]
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+# [inline (always)]
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+pub fn iprior47 (& mut self) -> IPRIOR47_W { IPRIOR47_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior47](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR47_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR47_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior47::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR47_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior47::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR47_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR47 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR47_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR48 register accessor: an alias for `Reg<R32_PFIC_IPRIOR48_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR48 = crate :: Reg < r32_pfic_iprior48 :: R32_PFIC_IPRIOR48_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior48 { # [doc = "Register `R32_PFIC_IPRIOR48` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR48_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR48_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR48_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR48_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR48` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR48_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR48_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR48_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR48_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR48` reader - IPRIOR48"]
|
|
|
+pub struct IPRIOR48_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR48_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR48_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR48_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR48` writer - IPRIOR48"]
|
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|
+pub struct IPRIOR48_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR48_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR48"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior48 (& self) -> IPRIOR48_R { IPRIOR48_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR48"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior48 (& mut self) -> IPRIOR48_W { IPRIOR48_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior48](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR48_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR48_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior48::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR48_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior48::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR48_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR48 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR48_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR49 register accessor: an alias for `Reg<R32_PFIC_IPRIOR49_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR49 = crate :: Reg < r32_pfic_iprior49 :: R32_PFIC_IPRIOR49_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior49 { # [doc = "Register `R32_PFIC_IPRIOR49` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR49_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR49_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR49_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR49_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR49` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR49_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR49_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR49_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR49_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR49` reader - IPRIOR49"]
|
|
|
+pub struct IPRIOR49_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR49_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR49_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR49_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR49` writer - IPRIOR49"]
|
|
|
+pub struct IPRIOR49_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR49_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR49"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior49 (& self) -> IPRIOR49_R { IPRIOR49_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR49"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior49 (& mut self) -> IPRIOR49_W { IPRIOR49_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior49](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR49_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR49_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior49::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR49_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior49::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR49_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR49 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR49_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR50 register accessor: an alias for `Reg<R32_PFIC_IPRIOR50_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR50 = crate :: Reg < r32_pfic_iprior50 :: R32_PFIC_IPRIOR50_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior50 { # [doc = "Register `R32_PFIC_IPRIOR50` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR50_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR50_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR50_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR50_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR50` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR50_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR50_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR50_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR50_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR50` reader - IPRIOR50"]
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+pub struct IPRIOR50_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR50_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR50_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR50_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR50` writer - IPRIOR50"]
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+pub struct IPRIOR50_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR50_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR50"]
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+# [inline (always)]
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+pub fn iprior50 (& self) -> IPRIOR50_R { IPRIOR50_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR50"]
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+# [inline (always)]
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+pub fn iprior50 (& mut self) -> IPRIOR50_W { IPRIOR50_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior50](index.html) module"]
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+pub struct R32_PFIC_IPRIOR50_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR50_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior50::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR50_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior50::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR50_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR50 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR50_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR51 register accessor: an alias for `Reg<R32_PFIC_IPRIOR51_SPEC>`"]
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+pub type R32_PFIC_IPRIOR51 = crate :: Reg < r32_pfic_iprior51 :: R32_PFIC_IPRIOR51_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior51 { # [doc = "Register `R32_PFIC_IPRIOR51` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR51_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR51_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR51_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR51_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR51` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR51_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR51_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR51_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR51_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR51` reader - IPRIOR51"]
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+pub struct IPRIOR51_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR51_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR51_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR51_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR51` writer - IPRIOR51"]
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+pub struct IPRIOR51_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR51_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR51"]
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+# [inline (always)]
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+pub fn iprior51 (& self) -> IPRIOR51_R { IPRIOR51_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR51"]
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+# [inline (always)]
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+pub fn iprior51 (& mut self) -> IPRIOR51_W { IPRIOR51_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior51](index.html) module"]
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+pub struct R32_PFIC_IPRIOR51_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR51_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior51::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR51_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior51::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR51_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR51 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR51_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR52 register accessor: an alias for `Reg<R32_PFIC_IPRIOR52_SPEC>`"]
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+pub type R32_PFIC_IPRIOR52 = crate :: Reg < r32_pfic_iprior52 :: R32_PFIC_IPRIOR52_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior52 { # [doc = "Register `R32_PFIC_IPRIOR52` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR52_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR52_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR52_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR52_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR52` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR52_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR52_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR52_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR52_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR52` reader - IPRIOR52"]
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+pub struct IPRIOR52_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR52_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR52_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR52_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR52` writer - IPRIOR52"]
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+pub struct IPRIOR52_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR52_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR52"]
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+# [inline (always)]
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+pub fn iprior52 (& self) -> IPRIOR52_R { IPRIOR52_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR52"]
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+# [inline (always)]
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+pub fn iprior52 (& mut self) -> IPRIOR52_W { IPRIOR52_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior52](index.html) module"]
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+pub struct R32_PFIC_IPRIOR52_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR52_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior52::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR52_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior52::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR52_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR52 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR52_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR53 register accessor: an alias for `Reg<R32_PFIC_IPRIOR53_SPEC>`"]
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+pub type R32_PFIC_IPRIOR53 = crate :: Reg < r32_pfic_iprior53 :: R32_PFIC_IPRIOR53_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior53 { # [doc = "Register `R32_PFIC_IPRIOR53` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR53_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR53_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR53_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR53_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR53` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR53_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR53_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR53_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR53_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR53` reader - IPRIOR53"]
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+pub struct IPRIOR53_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR53_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR53_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR53_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR53` writer - IPRIOR53"]
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+pub struct IPRIOR53_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR53_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR53"]
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+# [inline (always)]
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+pub fn iprior53 (& self) -> IPRIOR53_R { IPRIOR53_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR53"]
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|
+# [inline (always)]
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|
+pub fn iprior53 (& mut self) -> IPRIOR53_W { IPRIOR53_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior53](index.html) module"]
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+pub struct R32_PFIC_IPRIOR53_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR53_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior53::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR53_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior53::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR53_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR53 to value 0"]
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|
+impl crate :: Resettable for R32_PFIC_IPRIOR53_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR54 register accessor: an alias for `Reg<R32_PFIC_IPRIOR54_SPEC>`"]
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+pub type R32_PFIC_IPRIOR54 = crate :: Reg < r32_pfic_iprior54 :: R32_PFIC_IPRIOR54_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior54 { # [doc = "Register `R32_PFIC_IPRIOR54` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR54_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR54_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR54_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR54_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR54` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR54_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR54_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR54_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR54_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR54` reader - IPRIOR54"]
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|
+pub struct IPRIOR54_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR54_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR54_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR54_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR54` writer - IPRIOR54"]
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|
+pub struct IPRIOR54_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR54_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR54"]
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|
+# [inline (always)]
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|
+pub fn iprior54 (& self) -> IPRIOR54_R { IPRIOR54_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR54"]
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|
|
+# [inline (always)]
|
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|
+pub fn iprior54 (& mut self) -> IPRIOR54_W { IPRIOR54_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior54](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR54_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR54_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior54::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR54_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior54::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR54_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR54 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR54_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR55 register accessor: an alias for `Reg<R32_PFIC_IPRIOR55_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR55 = crate :: Reg < r32_pfic_iprior55 :: R32_PFIC_IPRIOR55_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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|
+pub mod r32_pfic_iprior55 { # [doc = "Register `R32_PFIC_IPRIOR55` reader"]
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|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR55_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR55_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR55_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR55_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR55` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR55_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR55_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR55_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR55_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR55` reader - IPRIOR55"]
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+pub struct IPRIOR55_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR55_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR55_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR55_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR55` writer - IPRIOR55"]
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+pub struct IPRIOR55_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR55_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
|
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR55"]
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|
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+# [inline (always)]
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|
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+pub fn iprior55 (& self) -> IPRIOR55_R { IPRIOR55_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR55"]
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|
|
+# [inline (always)]
|
|
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+pub fn iprior55 (& mut self) -> IPRIOR55_W { IPRIOR55_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior55](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR55_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR55_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior55::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR55_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior55::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR55_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR55 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR55_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR56 register accessor: an alias for `Reg<R32_PFIC_IPRIOR56_SPEC>`"]
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+pub type R32_PFIC_IPRIOR56 = crate :: Reg < r32_pfic_iprior56 :: R32_PFIC_IPRIOR56_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior56 { # [doc = "Register `R32_PFIC_IPRIOR56` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR56_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR56_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR56_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR56_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR56` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR56_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR56_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR56_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR56_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR56` reader - IPRIOR56"]
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+pub struct IPRIOR56_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR56_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR56_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR56_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR56` writer - IPRIOR56"]
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+pub struct IPRIOR56_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR56_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR56"]
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+# [inline (always)]
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+pub fn iprior56 (& self) -> IPRIOR56_R { IPRIOR56_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR56"]
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+# [inline (always)]
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+pub fn iprior56 (& mut self) -> IPRIOR56_W { IPRIOR56_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior56](index.html) module"]
|
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|
+pub struct R32_PFIC_IPRIOR56_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR56_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior56::R](R) reader structure"]
|
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+impl crate :: Readable for R32_PFIC_IPRIOR56_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior56::W](W) writer structure"]
|
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+impl crate :: Writable for R32_PFIC_IPRIOR56_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR56 to value 0"]
|
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+impl crate :: Resettable for R32_PFIC_IPRIOR56_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR57 register accessor: an alias for `Reg<R32_PFIC_IPRIOR57_SPEC>`"]
|
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+pub type R32_PFIC_IPRIOR57 = crate :: Reg < r32_pfic_iprior57 :: R32_PFIC_IPRIOR57_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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+pub mod r32_pfic_iprior57 { # [doc = "Register `R32_PFIC_IPRIOR57` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR57_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR57_SPEC > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR57_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR57_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR57` writer"]
|
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR57_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR57_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR57_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR57_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR57` reader - IPRIOR57"]
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|
+pub struct IPRIOR57_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR57_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR57_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR57_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR57` writer - IPRIOR57"]
|
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|
+pub struct IPRIOR57_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR57_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR57"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior57 (& self) -> IPRIOR57_R { IPRIOR57_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR57"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior57 (& mut self) -> IPRIOR57_W { IPRIOR57_W { w : self } } # [doc = "Writes raw bits to the register."]
|
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|
+# [inline (always)]
|
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|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior57](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR57_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR57_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior57::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR57_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior57::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR57_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR57 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR57_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR58 register accessor: an alias for `Reg<R32_PFIC_IPRIOR58_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR58 = crate :: Reg < r32_pfic_iprior58 :: R32_PFIC_IPRIOR58_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior58 { # [doc = "Register `R32_PFIC_IPRIOR58` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR58_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR58_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR58_SPEC >> for R { # [inline (always)]
|
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|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR58_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR58` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR58_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR58_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR58_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR58_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR58` reader - IPRIOR58"]
|
|
|
+pub struct IPRIOR58_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR58_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR58_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR58_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR58` writer - IPRIOR58"]
|
|
|
+pub struct IPRIOR58_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR58_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR58"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior58 (& self) -> IPRIOR58_R { IPRIOR58_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR58"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior58 (& mut self) -> IPRIOR58_W { IPRIOR58_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior58](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR58_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR58_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior58::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR58_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior58::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR58_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR58 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR58_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR59 register accessor: an alias for `Reg<R32_PFIC_IPRIOR59_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR59 = crate :: Reg < r32_pfic_iprior59 :: R32_PFIC_IPRIOR59_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior59 { # [doc = "Register `R32_PFIC_IPRIOR59` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR59_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR59_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR59_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR59_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR59` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR59_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR59_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR59_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR59_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR59` reader - IPRIOR59"]
|
|
|
+pub struct IPRIOR59_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR59_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR59_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR59_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR59` writer - IPRIOR59"]
|
|
|
+pub struct IPRIOR59_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR59_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR59"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior59 (& self) -> IPRIOR59_R { IPRIOR59_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR59"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior59 (& mut self) -> IPRIOR59_W { IPRIOR59_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior59](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR59_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR59_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior59::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR59_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior59::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR59_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR59 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR59_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR60 register accessor: an alias for `Reg<R32_PFIC_IPRIOR60_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR60 = crate :: Reg < r32_pfic_iprior60 :: R32_PFIC_IPRIOR60_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
|
|
+pub mod r32_pfic_iprior60 { # [doc = "Register `R32_PFIC_IPRIOR60` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_IPRIOR60_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR60_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR60_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_IPRIOR60_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR60` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_IPRIOR60_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR60_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR60_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_IPRIOR60_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR60` reader - IPRIOR60"]
|
|
|
+pub struct IPRIOR60_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR60_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR60_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR60_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR60` writer - IPRIOR60"]
|
|
|
+pub struct IPRIOR60_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR60_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR60"]
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|
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+# [inline (always)]
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|
|
+pub fn iprior60 (& self) -> IPRIOR60_R { IPRIOR60_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR60"]
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+# [inline (always)]
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+pub fn iprior60 (& mut self) -> IPRIOR60_W { IPRIOR60_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior60](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR60_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR60_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior60::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR60_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior60::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR60_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR60 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR60_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR61 register accessor: an alias for `Reg<R32_PFIC_IPRIOR61_SPEC>`"]
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+pub type R32_PFIC_IPRIOR61 = crate :: Reg < r32_pfic_iprior61 :: R32_PFIC_IPRIOR61_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior61 { # [doc = "Register `R32_PFIC_IPRIOR61` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR61_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR61_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR61_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR61_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR61` writer"]
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+pub struct W (crate :: W < R32_PFIC_IPRIOR61_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR61_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR61_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR61_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR61` reader - IPRIOR61"]
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+pub struct IPRIOR61_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR61_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR61_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR61_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR61` writer - IPRIOR61"]
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+pub struct IPRIOR61_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR61_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR61"]
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+# [inline (always)]
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+pub fn iprior61 (& self) -> IPRIOR61_R { IPRIOR61_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR61"]
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+# [inline (always)]
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+pub fn iprior61 (& mut self) -> IPRIOR61_W { IPRIOR61_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior61](index.html) module"]
|
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+pub struct R32_PFIC_IPRIOR61_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR61_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior61::R](R) reader structure"]
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+impl crate :: Readable for R32_PFIC_IPRIOR61_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior61::W](W) writer structure"]
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+impl crate :: Writable for R32_PFIC_IPRIOR61_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR61 to value 0"]
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+impl crate :: Resettable for R32_PFIC_IPRIOR61_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR62 register accessor: an alias for `Reg<R32_PFIC_IPRIOR62_SPEC>`"]
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+pub type R32_PFIC_IPRIOR62 = crate :: Reg < r32_pfic_iprior62 :: R32_PFIC_IPRIOR62_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
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+pub mod r32_pfic_iprior62 { # [doc = "Register `R32_PFIC_IPRIOR62` reader"]
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+pub struct R (crate :: R < R32_PFIC_IPRIOR62_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR62_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR62_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR62_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR62` writer"]
|
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+pub struct W (crate :: W < R32_PFIC_IPRIOR62_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR62_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR62_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR62_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR62` reader - IPRIOR62"]
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+pub struct IPRIOR62_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR62_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR62_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR62_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR62` writer - IPRIOR62"]
|
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+pub struct IPRIOR62_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR62_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR62"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior62 (& self) -> IPRIOR62_R { IPRIOR62_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR62"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior62 (& mut self) -> IPRIOR62_W { IPRIOR62_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior62](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR62_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR62_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior62::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR62_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior62::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR62_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR62 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR62_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_IPRIOR63 register accessor: an alias for `Reg<R32_PFIC_IPRIOR63_SPEC>`"]
|
|
|
+pub type R32_PFIC_IPRIOR63 = crate :: Reg < r32_pfic_iprior63 :: R32_PFIC_IPRIOR63_SPEC > ; # [doc = "Interrupt Priority configuration Register"]
|
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+pub mod r32_pfic_iprior63 { # [doc = "Register `R32_PFIC_IPRIOR63` reader"]
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|
+pub struct R (crate :: R < R32_PFIC_IPRIOR63_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_IPRIOR63_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_IPRIOR63_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_PFIC_IPRIOR63_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_IPRIOR63` writer"]
|
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|
+pub struct W (crate :: W < R32_PFIC_IPRIOR63_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_IPRIOR63_SPEC > ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_IPRIOR63_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_PFIC_IPRIOR63_SPEC >) -> Self { W (writer) } } # [doc = "Field `IPRIOR63` reader - IPRIOR63"]
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|
+pub struct IPRIOR63_R (crate :: FieldReader < u32 , u32 >) ; impl IPRIOR63_R { pub (crate) fn new (bits : u32) -> Self { IPRIOR63_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for IPRIOR63_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `IPRIOR63` writer - IPRIOR63"]
|
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|
+pub struct IPRIOR63_W < 'a > { w : & 'a mut W , } impl < 'a > IPRIOR63_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - IPRIOR63"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn iprior63 (& self) -> IPRIOR63_R { IPRIOR63_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - IPRIOR63"]
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|
|
+# [inline (always)]
|
|
|
+pub fn iprior63 (& mut self) -> IPRIOR63_W { IPRIOR63_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Interrupt Priority configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_iprior63](index.html) module"]
|
|
|
+pub struct R32_PFIC_IPRIOR63_SPEC ; impl crate :: RegisterSpec for R32_PFIC_IPRIOR63_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_iprior63::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_PFIC_IPRIOR63_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_iprior63::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_PFIC_IPRIOR63_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_IPRIOR63 to value 0"]
|
|
|
+impl crate :: Resettable for R32_PFIC_IPRIOR63_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_PFIC_SCTLR register accessor: an alias for `Reg<R32_PFIC_SCTLR_SPEC>`"]
|
|
|
+pub type R32_PFIC_SCTLR = crate :: Reg < r32_pfic_sctlr :: R32_PFIC_SCTLR_SPEC > ; # [doc = "System Control Register"]
|
|
|
+pub mod r32_pfic_sctlr { # [doc = "Register `R32_PFIC_SCTLR` reader"]
|
|
|
+pub struct R (crate :: R < R32_PFIC_SCTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_PFIC_SCTLR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_PFIC_SCTLR_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_PFIC_SCTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_PFIC_SCTLR` writer"]
|
|
|
+pub struct W (crate :: W < R32_PFIC_SCTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_PFIC_SCTLR_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_PFIC_SCTLR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_PFIC_SCTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `SLEEPONEXIT` reader - SLEEPONEXIT"]
|
|
|
+pub struct SLEEPONEXIT_R (crate :: FieldReader < bool , bool >) ; impl SLEEPONEXIT_R { pub (crate) fn new (bits : bool) -> Self { SLEEPONEXIT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SLEEPONEXIT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SLEEPONEXIT` writer - SLEEPONEXIT"]
|
|
|
+pub struct SLEEPONEXIT_W < 'a > { w : & 'a mut W , } impl < 'a > SLEEPONEXIT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `SLEEPDEEP` reader - SLEEPDEEP"]
|
|
|
+pub struct SLEEPDEEP_R (crate :: FieldReader < bool , bool >) ; impl SLEEPDEEP_R { pub (crate) fn new (bits : bool) -> Self { SLEEPDEEP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SLEEPDEEP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SLEEPDEEP` writer - SLEEPDEEP"]
|
|
|
+pub struct SLEEPDEEP_W < 'a > { w : & 'a mut W , } impl < 'a > SLEEPDEEP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `WFITOWFE` reader - WFITOWFE"]
|
|
|
+pub struct WFITOWFE_R (crate :: FieldReader < bool , bool >) ; impl WFITOWFE_R { pub (crate) fn new (bits : bool) -> Self { WFITOWFE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for WFITOWFE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `WFITOWFE` writer - WFITOWFE"]
|
|
|
+pub struct WFITOWFE_W < 'a > { w : & 'a mut W , } impl < 'a > WFITOWFE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u32 & 0x01) << 3) ; self . w } } # [doc = "Field `SEVONPEND` reader - SEVONPEND"]
|
|
|
+pub struct SEVONPEND_R (crate :: FieldReader < bool , bool >) ; impl SEVONPEND_R { pub (crate) fn new (bits : bool) -> Self { SEVONPEND_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SEVONPEND_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SEVONPEND` writer - SEVONPEND"]
|
|
|
+pub struct SEVONPEND_W < 'a > { w : & 'a mut W , } impl < 'a > SEVONPEND_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `SETEVENT` reader - SETEVENT"]
|
|
|
+pub struct SETEVENT_R (crate :: FieldReader < bool , bool >) ; impl SETEVENT_R { pub (crate) fn new (bits : bool) -> Self { SETEVENT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SETEVENT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SETEVENT` writer - SETEVENT"]
|
|
|
+pub struct SETEVENT_W < 'a > { w : & 'a mut W , } impl < 'a > SETEVENT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u32 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bit 1 - SLEEPONEXIT"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn sleeponexit (& self) -> SLEEPONEXIT_R { SLEEPONEXIT_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - SLEEPDEEP"]
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|
|
+# [inline (always)]
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|
|
+pub fn sleepdeep (& self) -> SLEEPDEEP_R { SLEEPDEEP_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - WFITOWFE"]
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|
|
+# [inline (always)]
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|
|
+pub fn wfitowfe (& self) -> WFITOWFE_R { WFITOWFE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - SEVONPEND"]
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|
|
+# [inline (always)]
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|
|
+pub fn sevonpend (& self) -> SEVONPEND_R { SEVONPEND_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - SETEVENT"]
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|
|
+# [inline (always)]
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|
|
+pub fn setevent (& self) -> SETEVENT_R { SETEVENT_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bit 1 - SLEEPONEXIT"]
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|
|
+# [inline (always)]
|
|
|
+pub fn sleeponexit (& mut self) -> SLEEPONEXIT_W { SLEEPONEXIT_W { w : self } } # [doc = "Bit 2 - SLEEPDEEP"]
|
|
|
+# [inline (always)]
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|
|
+pub fn sleepdeep (& mut self) -> SLEEPDEEP_W { SLEEPDEEP_W { w : self } } # [doc = "Bit 3 - WFITOWFE"]
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|
|
+# [inline (always)]
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|
|
+pub fn wfitowfe (& mut self) -> WFITOWFE_W { WFITOWFE_W { w : self } } # [doc = "Bit 4 - SEVONPEND"]
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|
|
+# [inline (always)]
|
|
|
+pub fn sevonpend (& mut self) -> SEVONPEND_W { SEVONPEND_W { w : self } } # [doc = "Bit 5 - SETEVENT"]
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|
|
+# [inline (always)]
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|
|
+pub fn setevent (& mut self) -> SETEVENT_W { SETEVENT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
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|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "System Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_pfic_sctlr](index.html) module"]
|
|
|
+pub struct R32_PFIC_SCTLR_SPEC ; impl crate :: RegisterSpec for R32_PFIC_SCTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_pfic_sctlr::R](R) reader structure"]
|
|
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+impl crate :: Readable for R32_PFIC_SCTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_pfic_sctlr::W](W) writer structure"]
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|
|
+impl crate :: Writable for R32_PFIC_SCTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_PFIC_SCTLR to value 0"]
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|
+impl crate :: Resettable for R32_PFIC_SCTLR_SPEC { # [inline (always)]
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|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "Systick register"]
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+pub struct SYSTICK { _marker : PhantomData < * const () > } unsafe impl Send for SYSTICK { } impl SYSTICK { # [doc = r"Pointer to the register block"]
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+pub const PTR : * const systick :: RegisterBlock = 0xe000_f000 as * const _ ; # [doc = r"Return the pointer to the register block"]
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|
+# [inline (always)]
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|
+pub const fn ptr () -> * const systick :: RegisterBlock { Self :: PTR } } impl Deref for SYSTICK { type Target = systick :: RegisterBlock ; # [inline (always)]
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|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for SYSTICK { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("SYSTICK") . finish () } } # [doc = "Systick register"]
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|
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+pub mod systick { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
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|
|
+pub struct RegisterBlock { # [doc = "0x00 - Systick counter control register"]
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|
+pub r32_stk_ctlr : crate :: Reg < r32_stk_ctlr :: R32_STK_CTLR_SPEC > , # [doc = "0x04 - Systick counter low register"]
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|
|
+pub r32_stk_cntl : crate :: Reg < r32_stk_cntl :: R32_STK_CNTL_SPEC > , # [doc = "0x08 - Systick counter high register"]
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|
|
+pub r32_stk_cnth : crate :: Reg < r32_stk_cnth :: R32_STK_CNTH_SPEC > , # [doc = "0x0c - Systick compare low register"]
|
|
|
+pub r32_stk_cmplr : crate :: Reg < r32_stk_cmplr :: R32_STK_CMPLR_SPEC > , # [doc = "0x10 - Systick compare high register"]
|
|
|
+pub r32_stk_cmphr : crate :: Reg < r32_stk_cmphr :: R32_STK_CMPHR_SPEC > , # [doc = "0x14 - Systick counter flag"]
|
|
|
+pub r32_stk_cntfg : crate :: Reg < r32_stk_cntfg :: R32_STK_CNTFG_SPEC > , } # [doc = "R32_STK_CTLR register accessor: an alias for `Reg<R32_STK_CTLR_SPEC>`"]
|
|
|
+pub type R32_STK_CTLR = crate :: Reg < r32_stk_ctlr :: R32_STK_CTLR_SPEC > ; # [doc = "Systick counter control register"]
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|
|
+pub mod r32_stk_ctlr { # [doc = "Register `R32_STK_CTLR` reader"]
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|
|
+pub struct R (crate :: R < R32_STK_CTLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CTLR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CTLR_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R32_STK_CTLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CTLR` writer"]
|
|
|
+pub struct W (crate :: W < R32_STK_CTLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CTLR_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CTLR_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_STK_CTLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `STE` reader - Systick counter enable"]
|
|
|
+pub struct STE_R (crate :: FieldReader < bool , bool >) ; impl STE_R { pub (crate) fn new (bits : bool) -> Self { STE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STE` writer - Systick counter enable"]
|
|
|
+pub struct STE_W < 'a > { w : & 'a mut W , } impl < 'a > STE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `STIE` reader - Systick counter interrupt enable"]
|
|
|
+pub struct STIE_R (crate :: FieldReader < bool , bool >) ; impl STIE_R { pub (crate) fn new (bits : bool) -> Self { STIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STIE` writer - Systick counter interrupt enable"]
|
|
|
+pub struct STIE_W < 'a > { w : & 'a mut W , } impl < 'a > STIE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `STCLK` reader - System counter clock Source selection"]
|
|
|
+pub struct STCLK_R (crate :: FieldReader < bool , bool >) ; impl STCLK_R { pub (crate) fn new (bits : bool) -> Self { STCLK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STCLK_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STCLK` writer - System counter clock Source selection"]
|
|
|
+pub struct STCLK_W < 'a > { w : & 'a mut W , } impl < 'a > STCLK_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `STRELOAD` reader - System counter reload control"]
|
|
|
+pub struct STRELOAD_R (crate :: FieldReader < bool , bool >) ; impl STRELOAD_R { pub (crate) fn new (bits : bool) -> Self { STRELOAD_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for STRELOAD_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `STRELOAD` writer - System counter reload control"]
|
|
|
+pub struct STRELOAD_W < 'a > { w : & 'a mut W , } impl < 'a > STRELOAD_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u32 & 0x01) << 8) ; self . w } } impl R { # [doc = "Bit 0 - Systick counter enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn ste (& self) -> STE_R { STE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Systick counter interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn stie (& self) -> STIE_R { STIE_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - System counter clock Source selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn stclk (& self) -> STCLK_R { STCLK_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 8 - System counter reload control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn streload (& self) -> STRELOAD_R { STRELOAD_R :: new (((self . bits >> 8) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - Systick counter enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn ste (& mut self) -> STE_W { STE_W { w : self } } # [doc = "Bit 1 - Systick counter interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn stie (& mut self) -> STIE_W { STIE_W { w : self } } # [doc = "Bit 2 - System counter clock Source selection"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn stclk (& mut self) -> STCLK_W { STCLK_W { w : self } } # [doc = "Bit 8 - System counter reload control"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn streload (& mut self) -> STRELOAD_W { STRELOAD_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_ctlr](index.html) module"]
|
|
|
+pub struct R32_STK_CTLR_SPEC ; impl crate :: RegisterSpec for R32_STK_CTLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_ctlr::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_STK_CTLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_ctlr::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_STK_CTLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CTLR to value 0"]
|
|
|
+impl crate :: Resettable for R32_STK_CTLR_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTL register accessor: an alias for `Reg<R32_STK_CNTL_SPEC>`"]
|
|
|
+pub type R32_STK_CNTL = crate :: Reg < r32_stk_cntl :: R32_STK_CNTL_SPEC > ; # [doc = "Systick counter low register"]
|
|
|
+pub mod r32_stk_cntl { # [doc = "Register `R32_STK_CNTL` reader"]
|
|
|
+pub struct R (crate :: R < R32_STK_CNTL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_STK_CNTL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTL` writer"]
|
|
|
+pub struct W (crate :: W < R32_STK_CNTL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_STK_CNTL_SPEC >) -> Self { W (writer) } } # [doc = "Field `CNTL` reader - CNTL"]
|
|
|
+pub struct CNTL_R (crate :: FieldReader < u32 , u32 >) ; impl CNTL_R { pub (crate) fn new (bits : u32) -> Self { CNTL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTL_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTL` writer - CNTL"]
|
|
|
+pub struct CNTL_W < 'a > { w : & 'a mut W , } impl < 'a > CNTL_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CNTL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cntl (& self) -> CNTL_R { CNTL_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CNTL"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cntl (& mut self) -> CNTL_W { CNTL_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cntl](index.html) module"]
|
|
|
+pub struct R32_STK_CNTL_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTL_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cntl::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_STK_CNTL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cntl::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_STK_CNTL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTL to value 0"]
|
|
|
+impl crate :: Resettable for R32_STK_CNTL_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTH register accessor: an alias for `Reg<R32_STK_CNTH_SPEC>`"]
|
|
|
+pub type R32_STK_CNTH = crate :: Reg < r32_stk_cnth :: R32_STK_CNTH_SPEC > ; # [doc = "Systick counter high register"]
|
|
|
+pub mod r32_stk_cnth { # [doc = "Register `R32_STK_CNTH` reader"]
|
|
|
+pub struct R (crate :: R < R32_STK_CNTH_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTH_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTH_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_STK_CNTH_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTH` writer"]
|
|
|
+pub struct W (crate :: W < R32_STK_CNTH_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTH_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTH_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_STK_CNTH_SPEC >) -> Self { W (writer) } } # [doc = "Field `CNTH` reader - CNTH"]
|
|
|
+pub struct CNTH_R (crate :: FieldReader < u32 , u32 >) ; impl CNTH_R { pub (crate) fn new (bits : u32) -> Self { CNTH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTH_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTH` writer - CNTH"]
|
|
|
+pub struct CNTH_W < 'a > { w : & 'a mut W , } impl < 'a > CNTH_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CNTH"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cnth (& self) -> CNTH_R { CNTH_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CNTH"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cnth (& mut self) -> CNTH_W { CNTH_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cnth](index.html) module"]
|
|
|
+pub struct R32_STK_CNTH_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTH_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cnth::R](R) reader structure"]
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+impl crate :: Readable for R32_STK_CNTH_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cnth::W](W) writer structure"]
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+impl crate :: Writable for R32_STK_CNTH_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTH to value 0"]
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+impl crate :: Resettable for R32_STK_CNTH_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CMPLR register accessor: an alias for `Reg<R32_STK_CMPLR_SPEC>`"]
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+pub type R32_STK_CMPLR = crate :: Reg < r32_stk_cmplr :: R32_STK_CMPLR_SPEC > ; # [doc = "Systick compare low register"]
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+pub mod r32_stk_cmplr { # [doc = "Register `R32_STK_CMPLR` reader"]
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+pub struct R (crate :: R < R32_STK_CMPLR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CMPLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CMPLR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_STK_CMPLR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CMPLR` writer"]
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+pub struct W (crate :: W < R32_STK_CMPLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CMPLR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CMPLR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_STK_CMPLR_SPEC >) -> Self { W (writer) } } # [doc = "Field `CMPL` reader - CMPL"]
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+pub struct CMPL_R (crate :: FieldReader < u32 , u32 >) ; impl CMPL_R { pub (crate) fn new (bits : u32) -> Self { CMPL_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CMPL_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CMPL` writer - CMPL"]
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+pub struct CMPL_W < 'a > { w : & 'a mut W , } impl < 'a > CMPL_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CMPL"]
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+# [inline (always)]
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+pub fn cmpl (& self) -> CMPL_R { CMPL_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CMPL"]
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+# [inline (always)]
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+pub fn cmpl (& mut self) -> CMPL_W { CMPL_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick compare low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cmplr](index.html) module"]
|
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+pub struct R32_STK_CMPLR_SPEC ; impl crate :: RegisterSpec for R32_STK_CMPLR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cmplr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_STK_CMPLR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cmplr::W](W) writer structure"]
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+impl crate :: Writable for R32_STK_CMPLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CMPLR to value 0"]
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+impl crate :: Resettable for R32_STK_CMPLR_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CMPHR register accessor: an alias for `Reg<R32_STK_CMPHR_SPEC>`"]
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+pub type R32_STK_CMPHR = crate :: Reg < r32_stk_cmphr :: R32_STK_CMPHR_SPEC > ; # [doc = "Systick compare high register"]
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+pub mod r32_stk_cmphr { # [doc = "Register `R32_STK_CMPHR` reader"]
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+pub struct R (crate :: R < R32_STK_CMPHR_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CMPHR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CMPHR_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_STK_CMPHR_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CMPHR` writer"]
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+pub struct W (crate :: W < R32_STK_CMPHR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CMPHR_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CMPHR_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_STK_CMPHR_SPEC >) -> Self { W (writer) } } # [doc = "Field `CMPH` reader - CMPH"]
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+pub struct CMPH_R (crate :: FieldReader < u32 , u32 >) ; impl CMPH_R { pub (crate) fn new (bits : u32) -> Self { CMPH_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CMPH_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CMPH` writer - CMPH"]
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+pub struct CMPH_W < 'a > { w : & 'a mut W , } impl < 'a > CMPH_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - CMPH"]
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+# [inline (always)]
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+pub fn cmph (& self) -> CMPH_R { CMPH_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - CMPH"]
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+# [inline (always)]
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+pub fn cmph (& mut self) -> CMPH_W { CMPH_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick compare high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cmphr](index.html) module"]
|
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+pub struct R32_STK_CMPHR_SPEC ; impl crate :: RegisterSpec for R32_STK_CMPHR_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cmphr::R](R) reader structure"]
|
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+impl crate :: Readable for R32_STK_CMPHR_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cmphr::W](W) writer structure"]
|
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+impl crate :: Writable for R32_STK_CMPHR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CMPHR to value 0"]
|
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|
+impl crate :: Resettable for R32_STK_CMPHR_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_STK_CNTFG register accessor: an alias for `Reg<R32_STK_CNTFG_SPEC>`"]
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+pub type R32_STK_CNTFG = crate :: Reg < r32_stk_cntfg :: R32_STK_CNTFG_SPEC > ; # [doc = "Systick counter flag"]
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+pub mod r32_stk_cntfg { # [doc = "Register `R32_STK_CNTFG` reader"]
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+pub struct R (crate :: R < R32_STK_CNTFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_STK_CNTFG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_STK_CNTFG_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R32_STK_CNTFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_STK_CNTFG` writer"]
|
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|
+pub struct W (crate :: W < R32_STK_CNTFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_STK_CNTFG_SPEC > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_STK_CNTFG_SPEC >> for W { # [inline (always)]
|
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|
+fn from (writer : crate :: W < R32_STK_CNTFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `SWIE` reader - System soft interrupt enable"]
|
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|
+pub struct SWIE_R (crate :: FieldReader < bool , bool >) ; impl SWIE_R { pub (crate) fn new (bits : bool) -> Self { SWIE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for SWIE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
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|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `SWIE` writer - System soft interrupt enable"]
|
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|
+pub struct SWIE_W < 'a > { w : & 'a mut W , } impl < 'a > SWIE_W < 'a > { # [doc = r"Sets the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
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|
+# [inline (always)]
|
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `CNTIF` reader - Systick counter clear zero flag"]
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|
+pub struct CNTIF_R (crate :: FieldReader < bool , bool >) ; impl CNTIF_R { pub (crate) fn new (bits : bool) -> Self { CNTIF_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for CNTIF_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `CNTIF` writer - Systick counter clear zero flag"]
|
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|
+pub struct CNTIF_W < 'a > { w : & 'a mut W , } impl < 'a > CNTIF_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } impl R { # [doc = "Bit 0 - System soft interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn swie (& self) -> SWIE_R { SWIE_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - Systick counter clear zero flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cntif (& self) -> CNTIF_R { CNTIF_R :: new (((self . bits >> 1) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - System soft interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn swie (& mut self) -> SWIE_W { SWIE_W { w : self } } # [doc = "Bit 1 - Systick counter clear zero flag"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn cntif (& mut self) -> CNTIF_W { CNTIF_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Systick counter flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_stk_cntfg](index.html) module"]
|
|
|
+pub struct R32_STK_CNTFG_SPEC ; impl crate :: RegisterSpec for R32_STK_CNTFG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_stk_cntfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_STK_CNTFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_stk_cntfg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_STK_CNTFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_STK_CNTFG to value 0"]
|
|
|
+impl crate :: Resettable for R32_STK_CNTFG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [doc = "EMMC register"]
|
|
|
+pub struct EMMC { _marker : PhantomData < * const () > } unsafe impl Send for EMMC { } impl EMMC { # [doc = r"Pointer to the register block"]
|
|
|
+pub const PTR : * const emmc :: RegisterBlock = 0x4000_a000 as * const _ ; # [doc = r"Return the pointer to the register block"]
|
|
|
+# [inline (always)]
|
|
|
+pub const fn ptr () -> * const emmc :: RegisterBlock { Self :: PTR } } impl Deref for EMMC { type Target = emmc :: RegisterBlock ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for EMMC { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("EMMC") . finish () } } # [doc = "EMMC register"]
|
|
|
+pub mod emmc { # [doc = r"Register block"]
|
|
|
+# [repr (C)]
|
|
|
+pub struct RegisterBlock { # [doc = "0x00 - SD 32bits command argument register"]
|
|
|
+pub r32_emmc_argument : crate :: Reg < r32_emmc_argument :: R32_EMMC_ARGUMENT_SPEC > , # [doc = "0x04 - SD 16bits cmd setting register"]
|
|
|
+pub r16_emmc_cmd_set : crate :: Reg < r16_emmc_cmd_set :: R16_EMMC_CMD_SET_SPEC > , _reserved2 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x08 - SD 128bits response register, \\[31:0\\]
|
|
|
+32bits"]
|
|
|
+pub r32_emmc_response0 : crate :: Reg < r32_emmc_response0 :: R32_EMMC_RESPONSE0_SPEC > , # [doc = "0x0c - SD 128bits response register, \\[63:32\\]
|
|
|
+32bits"]
|
|
|
+pub r32_emmc_response1 : crate :: Reg < r32_emmc_response1 :: R32_EMMC_RESPONSE1_SPEC > , # [doc = "0x10 - SD 128bits response register, \\[95:64\\]
|
|
|
+32bits"]
|
|
|
+pub r32_emmc_response2 : crate :: Reg < r32_emmc_response2 :: R32_EMMC_RESPONSE2_SPEC > , _reserved_5_r32_emmc : [u8 ; 0x04]
|
|
|
+, # [doc = "0x18 - SD 8bits control register"]
|
|
|
+pub r8_emmc_control : crate :: Reg < r8_emmc_control :: R8_EMMC_CONTROL_SPEC > , _reserved7 : [u8 ; 0x03]
|
|
|
+, # [doc = "0x1c - SD 8bits data timeout value"]
|
|
|
+pub r8_emmc_timeout : crate :: Reg < r8_emmc_timeout :: R8_EMMC_TIMEOUT_SPEC > , _reserved8 : [u8 ; 0x03]
|
|
|
+, # [doc = "0x20 - SD status"]
|
|
|
+pub r32_emmc_status : crate :: Reg < r32_emmc_status :: R32_EMMC_STATUS_SPEC > , # [doc = "0x24 - SD 16bits interrupt flag register"]
|
|
|
+pub r16_emmc_int_fg : crate :: Reg < r16_emmc_int_fg :: R16_EMMC_INT_FG_SPEC > , _reserved10 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x28 - SD 16bits interrupt enable register"]
|
|
|
+pub r16_emmc_int_en : crate :: Reg < r16_emmc_int_en :: R16_EMMC_INT_EN_SPEC > , _reserved11 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x2c - SD 16bits DMA start address register when to operate"]
|
|
|
+pub r32_emmc_dma_beg1 : crate :: Reg < r32_emmc_dma_beg1 :: R32_EMMC_DMA_BEG1_SPEC > , # [doc = "0x30 - SD 32bits data counter, \\[15:0\\]
|
|
|
+number of blocks this time will tran/recv, \\[27:16\\]
|
|
|
+block sise(byte number) of every block in this time tran/recv"]
|
|
|
+pub r32_emmc_block_cfg : crate :: Reg < r32_emmc_block_cfg :: R32_EMMC_BLOCK_CFG_SPEC > , # [doc = "0x34 - SD TRANSFER MODE register"]
|
|
|
+pub r32_emmc_tran_mode : crate :: Reg < r32_emmc_tran_mode :: R32_EMMC_TRAN_MODE_SPEC > , # [doc = "0x38 - SD clock divider register"]
|
|
|
+pub r16_emmc_clk_div : crate :: Reg < r16_emmc_clk_div :: R16_EMMC_CLK_DIV_SPEC > , _reserved15 : [u8 ; 0x02]
|
|
|
+, # [doc = "0x3c - SD 16bits DMA start address register when to operate"]
|
|
|
+pub r32_emmc_dma_beg2 : crate :: Reg < r32_emmc_dma_beg2 :: R32_EMMC_DMA_BEG2_SPEC > , } impl RegisterBlock { # [doc = "0x14 - Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
|
|
|
+32bits"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_write_cont (& self) -> & crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (20usize) as * const crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC >) } } # [doc = "0x14 - SD 128bits response register, \\[127:96\\]
|
|
|
+32bits"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_response3 (& self) -> & crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC > { unsafe { & * (((self as * const Self) as * const u8) . add (20usize) as * const crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC >) } } } # [doc = "R16_EMMC_CLK_DIV register accessor: an alias for `Reg<R16_EMMC_CLK_DIV_SPEC>`"]
|
|
|
+pub type R16_EMMC_CLK_DIV = crate :: Reg < r16_emmc_clk_div :: R16_EMMC_CLK_DIV_SPEC > ; # [doc = "SD clock divider register"]
|
|
|
+pub mod r16_emmc_clk_div { # [doc = "Register `R16_EMMC_CLK_DIV` reader"]
|
|
|
+pub struct R (crate :: R < R16_EMMC_CLK_DIV_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_CLK_DIV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_CLK_DIV_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_EMMC_CLK_DIV_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_CLK_DIV` writer"]
|
|
|
+pub struct W (crate :: W < R16_EMMC_CLK_DIV_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_CLK_DIV_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_CLK_DIV_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_EMMC_CLK_DIV_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DIV_MASK` reader - clk div"]
|
|
|
+pub struct RB_EMMC_DIV_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_DIV_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_DIV_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DIV_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DIV_MASK` writer - clk div"]
|
|
|
+pub struct RB_EMMC_DIV_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DIV_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x1f) | (value as u16 & 0x1f) ; self . w } } # [doc = "Field `RB_EMMC_CLKOE` reader - chip output sdclk oe"]
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|
|
+pub struct RB_EMMC_CLKOE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CLKOE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CLKOE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CLKOE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CLKOE` writer - chip output sdclk oe"]
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|
|
+pub struct RB_EMMC_CLKOE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CLKOE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_CLKMode` reader - EMMC clock frequency mode selection bit"]
|
|
|
+pub struct RB_EMMC_CLKMODE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CLKMODE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CLKMODE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CLKMODE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CLKMode` writer - EMMC clock frequency mode selection bit"]
|
|
|
+pub struct RB_EMMC_CLKMODE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CLKMODE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } # [doc = "Field `RB_EMMC_PHASEINV` reader - invert chip output sdclk phase"]
|
|
|
+pub struct RB_EMMC_PHASEINV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_PHASEINV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_PHASEINV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_PHASEINV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_PHASEINV` writer - invert chip output sdclk phase"]
|
|
|
+pub struct RB_EMMC_PHASEINV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_PHASEINV_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 10)) | ((value as u16 & 0x01) << 10) ; self . w } } impl R { # [doc = "Bits 0:4 - clk div"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_div_mask (& self) -> RB_EMMC_DIV_MASK_R { RB_EMMC_DIV_MASK_R :: new ((self . bits & 0x1f) as u8) } # [doc = "Bit 8 - chip output sdclk oe"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_clkoe (& self) -> RB_EMMC_CLKOE_R { RB_EMMC_CLKOE_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - EMMC clock frequency mode selection bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_clkmode (& self) -> RB_EMMC_CLKMODE_R { RB_EMMC_CLKMODE_R :: new (((self . bits >> 9) & 0x01) != 0) } # [doc = "Bit 10 - invert chip output sdclk phase"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_phaseinv (& self) -> RB_EMMC_PHASEINV_R { RB_EMMC_PHASEINV_R :: new (((self . bits >> 10) & 0x01) != 0) } } impl W { # [doc = "Bits 0:4 - clk div"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_div_mask (& mut self) -> RB_EMMC_DIV_MASK_W { RB_EMMC_DIV_MASK_W { w : self } } # [doc = "Bit 8 - chip output sdclk oe"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_clkoe (& mut self) -> RB_EMMC_CLKOE_W { RB_EMMC_CLKOE_W { w : self } } # [doc = "Bit 9 - EMMC clock frequency mode selection bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_clkmode (& mut self) -> RB_EMMC_CLKMODE_W { RB_EMMC_CLKMODE_W { w : self } } # [doc = "Bit 10 - invert chip output sdclk phase"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_phaseinv (& mut self) -> RB_EMMC_PHASEINV_W { RB_EMMC_PHASEINV_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD clock divider register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_clk_div](index.html) module"]
|
|
|
+pub struct R16_EMMC_CLK_DIV_SPEC ; impl crate :: RegisterSpec for R16_EMMC_CLK_DIV_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_clk_div::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_EMMC_CLK_DIV_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_clk_div::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_EMMC_CLK_DIV_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_CLK_DIV to value 0x0213"]
|
|
|
+impl crate :: Resettable for R16_EMMC_CLK_DIV_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0x0213 } } } # [doc = "R32_EMMC_ARGUMENT register accessor: an alias for `Reg<R32_EMMC_ARGUMENT_SPEC>`"]
|
|
|
+pub type R32_EMMC_ARGUMENT = crate :: Reg < r32_emmc_argument :: R32_EMMC_ARGUMENT_SPEC > ; # [doc = "SD 32bits command argument register"]
|
|
|
+pub mod r32_emmc_argument { # [doc = "Register `R32_EMMC_ARGUMENT` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_ARGUMENT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_ARGUMENT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_ARGUMENT_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_ARGUMENT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_ARGUMENT` writer"]
|
|
|
+pub struct W (crate :: W < R32_EMMC_ARGUMENT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_ARGUMENT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_ARGUMENT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_EMMC_ARGUMENT_SPEC >) -> Self { W (writer) } } # [doc = "Field `EMMC_ARGUMENT` reader - 32 bit command parameter register"]
|
|
|
+pub struct EMMC_ARGUMENT_R (crate :: FieldReader < u32 , u32 >) ; impl EMMC_ARGUMENT_R { pub (crate) fn new (bits : u32) -> Self { EMMC_ARGUMENT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for EMMC_ARGUMENT_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `EMMC_ARGUMENT` writer - 32 bit command parameter register"]
|
|
|
+pub struct EMMC_ARGUMENT_W < 'a > { w : & 'a mut W , } impl < 'a > EMMC_ARGUMENT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff_ffff) | (value as u32 & 0xffff_ffff) ; self . w } } impl R { # [doc = "Bits 0:31 - 32 bit command parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn emmc_argument (& self) -> EMMC_ARGUMENT_R { EMMC_ARGUMENT_R :: new ((self . bits & 0xffff_ffff) as u32) } } impl W { # [doc = "Bits 0:31 - 32 bit command parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn emmc_argument (& mut self) -> EMMC_ARGUMENT_W { EMMC_ARGUMENT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 32bits command argument register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_argument](index.html) module"]
|
|
|
+pub struct R32_EMMC_ARGUMENT_SPEC ; impl crate :: RegisterSpec for R32_EMMC_ARGUMENT_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_argument::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_ARGUMENT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_argument::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_EMMC_ARGUMENT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_ARGUMENT to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_ARGUMENT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_CMD_SET register accessor: an alias for `Reg<R16_EMMC_CMD_SET_SPEC>`"]
|
|
|
+pub type R16_EMMC_CMD_SET = crate :: Reg < r16_emmc_cmd_set :: R16_EMMC_CMD_SET_SPEC > ; # [doc = "SD 16bits cmd setting register"]
|
|
|
+pub mod r16_emmc_cmd_set { # [doc = "Register `R16_EMMC_CMD_SET` reader"]
|
|
|
+pub struct R (crate :: R < R16_EMMC_CMD_SET_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_CMD_SET_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_CMD_SET_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_EMMC_CMD_SET_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_CMD_SET` writer"]
|
|
|
+pub struct W (crate :: W < R16_EMMC_CMD_SET_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_CMD_SET_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_CMD_SET_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_EMMC_CMD_SET_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_CMDIDX_MASK` reader - the index number of the currently sent command"]
|
|
|
+pub struct RB_EMMC_CMDIDX_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_CMDIDX_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_CMDIDX_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CMDIDX_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CMDIDX_MASK` writer - the index number of the currently sent command"]
|
|
|
+pub struct RB_EMMC_CMDIDX_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CMDIDX_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x3f) | (value as u16 & 0x3f) ; self . w } } # [doc = "Field `RB_EMMC_RPTY_MASK` reader - current respone type"]
|
|
|
+pub struct RB_EMMC_RPTY_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_RPTY_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_RPTY_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_RPTY_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_RPTY_MASK` writer - current respone type"]
|
|
|
+pub struct RB_EMMC_RPTY_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_RPTY_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 8)) | ((value as u16 & 0x03) << 8) ; self . w } } # [doc = "Field `RB_EMMC_CKCRC` reader - check the response CRC"]
|
|
|
+pub struct RB_EMMC_CKCRC_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CKCRC_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CKCRC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CKCRC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CKCRC` writer - check the response CRC"]
|
|
|
+pub struct RB_EMMC_CKCRC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CKCRC_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 10)) | ((value as u16 & 0x01) << 10) ; self . w } } # [doc = "Field `RB_EMMC_CKIDX` reader - check the response command index"]
|
|
|
+pub struct RB_EMMC_CKIDX_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CKIDX_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CKIDX_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CKIDX_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CKIDX` writer - check the response command index"]
|
|
|
+pub struct RB_EMMC_CKIDX_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_CKIDX_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 11)) | ((value as u16 & 0x01) << 11) ; self . w } } impl R { # [doc = "Bits 0:5 - the index number of the currently sent command"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_cmdidx_mask (& self) -> RB_EMMC_CMDIDX_MASK_R { RB_EMMC_CMDIDX_MASK_R :: new ((self . bits & 0x3f) as u8) } # [doc = "Bits 8:9 - current respone type"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_rpty_mask (& self) -> RB_EMMC_RPTY_MASK_R { RB_EMMC_RPTY_MASK_R :: new (((self . bits >> 8) & 0x03) as u8) } # [doc = "Bit 10 - check the response CRC"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ckcrc (& self) -> RB_EMMC_CKCRC_R { RB_EMMC_CKCRC_R :: new (((self . bits >> 10) & 0x01) != 0) } # [doc = "Bit 11 - check the response command index"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ckidx (& self) -> RB_EMMC_CKIDX_R { RB_EMMC_CKIDX_R :: new (((self . bits >> 11) & 0x01) != 0) } } impl W { # [doc = "Bits 0:5 - the index number of the currently sent command"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_cmdidx_mask (& mut self) -> RB_EMMC_CMDIDX_MASK_W { RB_EMMC_CMDIDX_MASK_W { w : self } } # [doc = "Bits 8:9 - current respone type"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_rpty_mask (& mut self) -> RB_EMMC_RPTY_MASK_W { RB_EMMC_RPTY_MASK_W { w : self } } # [doc = "Bit 10 - check the response CRC"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ckcrc (& mut self) -> RB_EMMC_CKCRC_W { RB_EMMC_CKCRC_W { w : self } } # [doc = "Bit 11 - check the response command index"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ckidx (& mut self) -> RB_EMMC_CKIDX_W { RB_EMMC_CKIDX_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits cmd setting register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_cmd_set](index.html) module"]
|
|
|
+pub struct R16_EMMC_CMD_SET_SPEC ; impl crate :: RegisterSpec for R16_EMMC_CMD_SET_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_cmd_set::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_EMMC_CMD_SET_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_cmd_set::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_EMMC_CMD_SET_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_CMD_SET to value 0"]
|
|
|
+impl crate :: Resettable for R16_EMMC_CMD_SET_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE0 register accessor: an alias for `Reg<R32_EMMC_RESPONSE0_SPEC>`"]
|
|
|
+pub type R32_EMMC_RESPONSE0 = crate :: Reg < r32_emmc_response0 :: R32_EMMC_RESPONSE0_SPEC > ; # [doc = "SD 128bits response register, \\[31:0\\]
|
|
|
+32bits"]
|
|
|
+pub mod r32_emmc_response0 { # [doc = "Register `R32_EMMC_RESPONSE0` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_RESPONSE0_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE0_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE0_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_RESPONSE0_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE0` reader - response parameter register"]
|
|
|
+pub struct R32_EMMC_RESPONSE0_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE0_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE0_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE0_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:31 - response parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_response0 (& self) -> R32_EMMC_RESPONSE0_R { R32_EMMC_RESPONSE0_R :: new ((self . bits & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[31:0\\]
|
|
|
+32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response0](index.html) module"]
|
|
|
+pub struct R32_EMMC_RESPONSE0_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE0_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response0::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_RESPONSE0_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE0 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_RESPONSE0_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE1 register accessor: an alias for `Reg<R32_EMMC_RESPONSE1_SPEC>`"]
|
|
|
+pub type R32_EMMC_RESPONSE1 = crate :: Reg < r32_emmc_response1 :: R32_EMMC_RESPONSE1_SPEC > ; # [doc = "SD 128bits response register, \\[63:32\\]
|
|
|
+32bits"]
|
|
|
+pub mod r32_emmc_response1 { # [doc = "Register `R32_EMMC_RESPONSE1` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_RESPONSE1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_RESPONSE1_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE1` reader - response parameter register"]
|
|
|
+pub struct R32_EMMC_RESPONSE1_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE1_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE1_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE1_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 32:63 - response parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_response1 (& self) -> R32_EMMC_RESPONSE1_R { R32_EMMC_RESPONSE1_R :: new (((self . bits >> 32) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[63:32\\]
|
|
|
+32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response1](index.html) module"]
|
|
|
+pub struct R32_EMMC_RESPONSE1_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_RESPONSE1_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_RESPONSE1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE2 register accessor: an alias for `Reg<R32_EMMC_RESPONSE2_SPEC>`"]
|
|
|
+pub type R32_EMMC_RESPONSE2 = crate :: Reg < r32_emmc_response2 :: R32_EMMC_RESPONSE2_SPEC > ; # [doc = "SD 128bits response register, \\[95:64\\]
|
|
|
+32bits"]
|
|
|
+pub mod r32_emmc_response2 { # [doc = "Register `R32_EMMC_RESPONSE2` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_RESPONSE2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE2_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE2_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_RESPONSE2_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE2` reader - response parameter register"]
|
|
|
+pub struct R32_EMMC_RESPONSE2_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE2_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE2_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE2_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 64:95 - response parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_response2 (& self) -> R32_EMMC_RESPONSE2_R { R32_EMMC_RESPONSE2_R :: new (((self . bits >> 64) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[95:64\\]
|
|
|
+32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response2](index.html) module"]
|
|
|
+pub struct R32_EMMC_RESPONSE2_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response2::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_RESPONSE2_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE2 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_RESPONSE2_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_RESPONSE3 register accessor: an alias for `Reg<R32_EMMC_RESPONSE3_SPEC>`"]
|
|
|
+pub type R32_EMMC_RESPONSE3 = crate :: Reg < r32_emmc_response3 :: R32_EMMC_RESPONSE3_SPEC > ; # [doc = "SD 128bits response register, \\[127:96\\]
|
|
|
+32bits"]
|
|
|
+pub mod r32_emmc_response3 { # [doc = "Register `R32_EMMC_RESPONSE3` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_RESPONSE3_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_RESPONSE3_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_RESPONSE3_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_RESPONSE3_SPEC >) -> Self { R (reader) } } # [doc = "Field `R32_EMMC_RESPONSE3` reader - response parameter register"]
|
|
|
+pub struct R32_EMMC_RESPONSE3_R (crate :: FieldReader < u32 , u32 >) ; impl R32_EMMC_RESPONSE3_R { pub (crate) fn new (bits : u32) -> Self { R32_EMMC_RESPONSE3_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for R32_EMMC_RESPONSE3_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 96:127 - response parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_response3 (& self) -> R32_EMMC_RESPONSE3_R { R32_EMMC_RESPONSE3_R :: new (((self . bits >> 96) & 0xffff_ffff) as u32) } } # [doc = "SD 128bits response register, \\[127:96\\]
|
|
|
+32bits\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_response3](index.html) module"]
|
|
|
+pub struct R32_EMMC_RESPONSE3_SPEC ; impl crate :: RegisterSpec for R32_EMMC_RESPONSE3_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_response3::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_RESPONSE3_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_RESPONSE3 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_RESPONSE3_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_WRITE_CONT register accessor: an alias for `Reg<R32_EMMC_WRITE_CONT_SPEC>`"]
|
|
|
+pub type R32_EMMC_WRITE_CONT = crate :: Reg < r32_emmc_write_cont :: R32_EMMC_WRITE_CONT_SPEC > ; # [doc = "Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
|
|
|
+32bits"]
|
|
|
+pub mod r32_emmc_write_cont { # [doc = "Register `R32_EMMC_WRITE_CONT` writer"]
|
|
|
+pub struct W (crate :: W < R32_EMMC_WRITE_CONT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_WRITE_CONT_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_WRITE_CONT_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_EMMC_WRITE_CONT_SPEC >) -> Self { W (writer) } } # [doc = "Field `R32_EMMC_WRITE_CONT` writer - response parameter register"]
|
|
|
+pub struct R32_EMMC_WRITE_CONT_W < 'a > { w : & 'a mut W , } impl < 'a > R32_EMMC_WRITE_CONT_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0xffff_ffff << 96)) | ((value as u32 & 0xffff_ffff) << 96) ; self . w } } impl W { # [doc = "Bits 96:127 - response parameter register"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn r32_emmc_write_cont (& mut self) -> R32_EMMC_WRITE_CONT_W { R32_EMMC_WRITE_CONT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "Multiplexing register of the EMMC_RESPONSE3,\\[127:96\\]
|
|
|
+32bits\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_write_cont](index.html) module"]
|
|
|
+pub struct R32_EMMC_WRITE_CONT_SPEC ; impl crate :: RegisterSpec for R32_EMMC_WRITE_CONT_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_write_cont::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_EMMC_WRITE_CONT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_WRITE_CONT to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_WRITE_CONT_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R8_EMMC_CONTROL register accessor: an alias for `Reg<R8_EMMC_CONTROL_SPEC>`"]
|
|
|
+pub type R8_EMMC_CONTROL = crate :: Reg < r8_emmc_control :: R8_EMMC_CONTROL_SPEC > ; # [doc = "SD 8bits control register"]
|
|
|
+pub mod r8_emmc_control { # [doc = "Register `R8_EMMC_CONTROL` reader"]
|
|
|
+pub struct R (crate :: R < R8_EMMC_CONTROL_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_EMMC_CONTROL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_EMMC_CONTROL_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R8_EMMC_CONTROL_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_EMMC_CONTROL` writer"]
|
|
|
+pub struct W (crate :: W < R8_EMMC_CONTROL_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_EMMC_CONTROL_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_EMMC_CONTROL_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R8_EMMC_CONTROL_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_LW_MASK` reader - effctive data width for sending or receiving data"]
|
|
|
+pub struct RB_EMMC_LW_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_LW_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_LW_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_LW_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_LW_MASK` writer - effctive data width for sending or receiving data"]
|
|
|
+pub struct RB_EMMC_LW_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_LW_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x03) | (value as u8 & 0x03) ; self . w } } # [doc = "Field `RB_EMMC_ALL_CLR` reader - reset all the inner logic, default is valid"]
|
|
|
+pub struct RB_EMMC_ALL_CLR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_ALL_CLR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_ALL_CLR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_ALL_CLR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_ALL_CLR` writer - reset all the inner logic, default is valid"]
|
|
|
+pub struct RB_EMMC_ALL_CLR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_ALL_CLR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u8 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_DMAEN` reader - enable the dma"]
|
|
|
+pub struct RB_EMMC_DMAEN_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DMAEN_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DMAEN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAEN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAEN` writer - enable the dma"]
|
|
|
+pub struct RB_EMMC_DMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAEN_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u8 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_RST_LGC` reader - reset the data tran/recv logic"]
|
|
|
+pub struct RB_EMMC_RST_LGC_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_RST_LGC_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_RST_LGC_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_RST_LGC_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_RST_LGC` writer - reset the data tran/recv logic"]
|
|
|
+pub struct RB_EMMC_RST_LGC_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_RST_LGC_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u8 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_NEGSMP` reader - controller use nagedge sample cmd"]
|
|
|
+pub struct RB_EMMC_NEGSMP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_NEGSMP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_NEGSMP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_NEGSMP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_NEGSMP` writer - controller use nagedge sample cmd"]
|
|
|
+pub struct RB_EMMC_NEGSMP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_NEGSMP_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u8 & 0x01) << 5) ; self . w } } impl R { # [doc = "Bits 0:1 - effctive data width for sending or receiving data"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_lw_mask (& self) -> RB_EMMC_LW_MASK_R { RB_EMMC_LW_MASK_R :: new ((self . bits & 0x03) as u8) } # [doc = "Bit 2 - reset all the inner logic, default is valid"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_all_clr (& self) -> RB_EMMC_ALL_CLR_R { RB_EMMC_ALL_CLR_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - enable the dma"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_dmaen (& self) -> RB_EMMC_DMAEN_R { RB_EMMC_DMAEN_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - reset the data tran/recv logic"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_rst_lgc (& self) -> RB_EMMC_RST_LGC_R { RB_EMMC_RST_LGC_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - controller use nagedge sample cmd"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_negsmp (& self) -> RB_EMMC_NEGSMP_R { RB_EMMC_NEGSMP_R :: new (((self . bits >> 5) & 0x01) != 0) } } impl W { # [doc = "Bits 0:1 - effctive data width for sending or receiving data"]
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+# [inline (always)]
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+pub fn rb_emmc_lw_mask (& mut self) -> RB_EMMC_LW_MASK_W { RB_EMMC_LW_MASK_W { w : self } } # [doc = "Bit 2 - reset all the inner logic, default is valid"]
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|
|
+# [inline (always)]
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+pub fn rb_emmc_all_clr (& mut self) -> RB_EMMC_ALL_CLR_W { RB_EMMC_ALL_CLR_W { w : self } } # [doc = "Bit 3 - enable the dma"]
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+# [inline (always)]
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+pub fn rb_emmc_dmaen (& mut self) -> RB_EMMC_DMAEN_W { RB_EMMC_DMAEN_W { w : self } } # [doc = "Bit 4 - reset the data tran/recv logic"]
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|
|
+# [inline (always)]
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+pub fn rb_emmc_rst_lgc (& mut self) -> RB_EMMC_RST_LGC_W { RB_EMMC_RST_LGC_W { w : self } } # [doc = "Bit 5 - controller use nagedge sample cmd"]
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+# [inline (always)]
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+pub fn rb_emmc_negsmp (& mut self) -> RB_EMMC_NEGSMP_W { RB_EMMC_NEGSMP_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
+# [inline (always)]
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+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 8bits control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_emmc_control](index.html) module"]
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+pub struct R8_EMMC_CONTROL_SPEC ; impl crate :: RegisterSpec for R8_EMMC_CONTROL_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_emmc_control::R](R) reader structure"]
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+impl crate :: Readable for R8_EMMC_CONTROL_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_emmc_control::W](W) writer structure"]
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+impl crate :: Writable for R8_EMMC_CONTROL_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_EMMC_CONTROL to value 0x15"]
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+impl crate :: Resettable for R8_EMMC_CONTROL_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0x15 } } } # [doc = "R8_EMMC_TIMEOUT register accessor: an alias for `Reg<R8_EMMC_TIMEOUT_SPEC>`"]
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+pub type R8_EMMC_TIMEOUT = crate :: Reg < r8_emmc_timeout :: R8_EMMC_TIMEOUT_SPEC > ; # [doc = "SD 8bits data timeout value"]
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+pub mod r8_emmc_timeout { # [doc = "Register `R8_EMMC_TIMEOUT` reader"]
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+pub struct R (crate :: R < R8_EMMC_TIMEOUT_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R8_EMMC_TIMEOUT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R8_EMMC_TIMEOUT_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R8_EMMC_TIMEOUT_SPEC >) -> Self { R (reader) } } # [doc = "Register `R8_EMMC_TIMEOUT` writer"]
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+pub struct W (crate :: W < R8_EMMC_TIMEOUT_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R8_EMMC_TIMEOUT_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R8_EMMC_TIMEOUT_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R8_EMMC_TIMEOUT_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_TOCNT_MASK` reader - response /data timeout configuration"]
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+pub struct RB_EMMC_TOCNT_MASK_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_TOCNT_MASK_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_TOCNT_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_TOCNT_MASK_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_TOCNT_MASK` writer - response /data timeout configuration"]
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+pub struct RB_EMMC_TOCNT_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_TOCNT_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0f) | (value as u8 & 0x0f) ; self . w } } impl R { # [doc = "Bits 0:3 - response /data timeout configuration"]
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+# [inline (always)]
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+pub fn rb_emmc_tocnt_mask (& self) -> RB_EMMC_TOCNT_MASK_R { RB_EMMC_TOCNT_MASK_R :: new ((self . bits & 0x0f) as u8) } } impl W { # [doc = "Bits 0:3 - response /data timeout configuration"]
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|
+# [inline (always)]
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+pub fn rb_emmc_tocnt_mask (& mut self) -> RB_EMMC_TOCNT_MASK_W { RB_EMMC_TOCNT_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
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+# [inline (always)]
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|
+pub unsafe fn bits (& mut self , bits : u8) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 8bits data timeout value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_emmc_timeout](index.html) module"]
|
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+pub struct R8_EMMC_TIMEOUT_SPEC ; impl crate :: RegisterSpec for R8_EMMC_TIMEOUT_SPEC { type Ux = u8 ; } # [doc = "`read()` method returns [r8_emmc_timeout::R](R) reader structure"]
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+impl crate :: Readable for R8_EMMC_TIMEOUT_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r8_emmc_timeout::W](W) writer structure"]
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+impl crate :: Writable for R8_EMMC_TIMEOUT_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R8_EMMC_TIMEOUT to value 0x0c"]
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+impl crate :: Resettable for R8_EMMC_TIMEOUT_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0x0c } } } # [doc = "R32_EMMC_STATUS register accessor: an alias for `Reg<R32_EMMC_STATUS_SPEC>`"]
|
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+pub type R32_EMMC_STATUS = crate :: Reg < r32_emmc_status :: R32_EMMC_STATUS_SPEC > ; # [doc = "SD status"]
|
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+pub mod r32_emmc_status { # [doc = "Register `R32_EMMC_STATUS` reader"]
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+pub struct R (crate :: R < R32_EMMC_STATUS_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_STATUS_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_STATUS_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R32_EMMC_STATUS_SPEC >) -> Self { R (reader) } } # [doc = "Field `MASK_BLOCK_NUM` reader - the number of blocks successfully transmitted in the current multi-block transmission"]
|
|
|
+pub struct MASK_BLOCK_NUM_R (crate :: FieldReader < u16 , u16 >) ; impl MASK_BLOCK_NUM_R { pub (crate) fn new (bits : u16) -> Self { MASK_BLOCK_NUM_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for MASK_BLOCK_NUM_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_CMDSTA` reader - indicate cmd line is high level now"]
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+pub struct RB_EMMC_CMDSTA_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_CMDSTA_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_CMDSTA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_CMDSTA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DAT0STA` reader - indicate dat\\[0\\]
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|
|
+line is high level now"]
|
|
|
+pub struct RB_EMMC_DAT0STA_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DAT0STA_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DAT0STA_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DAT0STA_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl R { # [doc = "Bits 0:15 - the number of blocks successfully transmitted in the current multi-block transmission"]
|
|
|
+# [inline (always)]
|
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|
+pub fn mask_block_num (& self) -> MASK_BLOCK_NUM_R { MASK_BLOCK_NUM_R :: new ((self . bits & 0xffff) as u16) } # [doc = "Bit 16 - indicate cmd line is high level now"]
|
|
|
+# [inline (always)]
|
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|
+pub fn rb_emmc_cmdsta (& self) -> RB_EMMC_CMDSTA_R { RB_EMMC_CMDSTA_R :: new (((self . bits >> 16) & 0x01) != 0) } # [doc = "Bit 17 - indicate dat\\[0\\]
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+line is high level now"]
|
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|
+# [inline (always)]
|
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+pub fn rb_emmc_dat0sta (& self) -> RB_EMMC_DAT0STA_R { RB_EMMC_DAT0STA_R :: new (((self . bits >> 17) & 0x01) != 0) } } # [doc = "SD status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_status](index.html) module"]
|
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+pub struct R32_EMMC_STATUS_SPEC ; impl crate :: RegisterSpec for R32_EMMC_STATUS_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_status::R](R) reader structure"]
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+impl crate :: Readable for R32_EMMC_STATUS_SPEC { type Reader = R ; } # [doc = "`reset()` method sets R32_EMMC_STATUS to value 0"]
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+impl crate :: Resettable for R32_EMMC_STATUS_SPEC { # [inline (always)]
|
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|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_INT_FG register accessor: an alias for `Reg<R16_EMMC_INT_FG_SPEC>`"]
|
|
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+pub type R16_EMMC_INT_FG = crate :: Reg < r16_emmc_int_fg :: R16_EMMC_INT_FG_SPEC > ; # [doc = "SD 16bits interrupt flag register"]
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+pub mod r16_emmc_int_fg { # [doc = "Register `R16_EMMC_INT_FG` reader"]
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|
|
+pub struct R (crate :: R < R16_EMMC_INT_FG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_INT_FG_SPEC > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_INT_FG_SPEC >> for R { # [inline (always)]
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|
+fn from (reader : crate :: R < R16_EMMC_INT_FG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_INT_FG` writer"]
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|
+pub struct W (crate :: W < R16_EMMC_INT_FG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_INT_FG_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
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|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_INT_FG_SPEC >> for W { # [inline (always)]
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|
+fn from (writer : crate :: W < R16_EMMC_INT_FG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_IF_RE_TMOUT` reader - indicate when expect the response, timeout"]
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+pub struct RB_EMMC_IF_RE_TMOUT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_RE_TMOUT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_RE_TMOUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_RE_TMOUT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_RE_TMOUT` writer - indicate when expect the response, timeout"]
|
|
|
+pub struct RB_EMMC_IF_RE_TMOUT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_RE_TMOUT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_IF_RECRC_WR` reader - indicate CRC error of the response"]
|
|
|
+pub struct RB_EMMC_IF_RECRC_WR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_RECRC_WR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_RECRC_WR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_RECRC_WR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_RECRC_WR` writer - indicate CRC error of the response"]
|
|
|
+pub struct RB_EMMC_IF_RECRC_WR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_RECRC_WR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_IF_REIDX_ER` reader - indicate INDEX error of the response"]
|
|
|
+pub struct RB_EMMC_IF_REIDX_ER_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_REIDX_ER_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_REIDX_ER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_REIDX_ER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_REIDX_ER` writer - indicate INDEX error of the response"]
|
|
|
+pub struct RB_EMMC_IF_REIDX_ER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_REIDX_ER_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_IF_CMDDONE` reader - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
|
|
|
+pub struct RB_EMMC_IF_CMDDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_CMDDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_CMDDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_CMDDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_CMDDONE` writer - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
|
|
|
+pub struct RB_EMMC_IF_CMDDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_CMDDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_IF_DATTMO` reader - data line busy timeout"]
|
|
|
+pub struct RB_EMMC_IF_DATTMO_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_DATTMO_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_DATTMO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_DATTMO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_DATTMO` writer - data line busy timeout"]
|
|
|
+pub struct RB_EMMC_IF_DATTMO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_DATTMO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u16 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_IF_TRANERR` reader - last block have encountered a CRC error"]
|
|
|
+pub struct RB_EMMC_IF_TRANERR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_TRANERR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_TRANERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_TRANERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_TRANERR` writer - last block have encountered a CRC error"]
|
|
|
+pub struct RB_EMMC_IF_TRANERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_TRANERR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u16 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_EMMC_IF_TRANDONE` reader - all the blocks have been tran/recv successfully"]
|
|
|
+pub struct RB_EMMC_IF_TRANDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_TRANDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_TRANDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_TRANDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_TRANDONE` writer - all the blocks have been tran/recv successfully"]
|
|
|
+pub struct RB_EMMC_IF_TRANDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_TRANDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u16 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_EMMC_IF_BKGAP` reader - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
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|
|
+pub struct RB_EMMC_IF_BKGAP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_BKGAP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_BKGAP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_BKGAP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_BKGAP` writer - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
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|
|
+pub struct RB_EMMC_IF_BKGAP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_BKGAP_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_EMMC_IF_FIFO_OV` reader - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
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|
|
+pub struct RB_EMMC_IF_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_FIFO_OV` writer - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
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|
|
+pub struct RB_EMMC_IF_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_IF_SDIOINT` reader - interrupt from SDIO card inside"]
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|
|
+pub struct RB_EMMC_IF_SDIOINT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IF_SDIOINT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IF_SDIOINT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IF_SDIOINT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IF_SDIOINT` writer - interrupt from SDIO card inside"]
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|
|
+pub struct RB_EMMC_IF_SDIOINT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IF_SDIOINT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bit 0 - indicate when expect the response, timeout"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_if_re_tmout (& self) -> RB_EMMC_IF_RE_TMOUT_R { RB_EMMC_IF_RE_TMOUT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - indicate CRC error of the response"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_if_recrc_wr (& self) -> RB_EMMC_IF_RECRC_WR_R { RB_EMMC_IF_RECRC_WR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - indicate INDEX error of the response"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_if_reidx_er (& self) -> RB_EMMC_IF_REIDX_ER_R { RB_EMMC_IF_REIDX_ER_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_cmddone (& self) -> RB_EMMC_IF_CMDDONE_R { RB_EMMC_IF_CMDDONE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - data line busy timeout"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_if_dattmo (& self) -> RB_EMMC_IF_DATTMO_R { RB_EMMC_IF_DATTMO_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - last block have encountered a CRC error"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_if_tranerr (& self) -> RB_EMMC_IF_TRANERR_R { RB_EMMC_IF_TRANERR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - all the blocks have been tran/recv successfully"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_trandone (& self) -> RB_EMMC_IF_TRANDONE_R { RB_EMMC_IF_TRANDONE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_bkgap (& self) -> RB_EMMC_IF_BKGAP_R { RB_EMMC_IF_BKGAP_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_fifo_ov (& self) -> RB_EMMC_IF_FIFO_OV_R { RB_EMMC_IF_FIFO_OV_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - interrupt from SDIO card inside"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_sdioint (& self) -> RB_EMMC_IF_SDIOINT_R { RB_EMMC_IF_SDIOINT_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - indicate when expect the response, timeout"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_re_tmout (& mut self) -> RB_EMMC_IF_RE_TMOUT_W { RB_EMMC_IF_RE_TMOUT_W { w : self } } # [doc = "Bit 1 - indicate CRC error of the response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_recrc_wr (& mut self) -> RB_EMMC_IF_RECRC_WR_W { RB_EMMC_IF_RECRC_WR_W { w : self } } # [doc = "Bit 2 - indicate INDEX error of the response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_reidx_er (& mut self) -> RB_EMMC_IF_REIDX_ER_W { RB_EMMC_IF_REIDX_ER_W { w : self } } # [doc = "Bit 3 - when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_cmddone (& mut self) -> RB_EMMC_IF_CMDDONE_W { RB_EMMC_IF_CMDDONE_W { w : self } } # [doc = "Bit 4 - data line busy timeout"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_dattmo (& mut self) -> RB_EMMC_IF_DATTMO_W { RB_EMMC_IF_DATTMO_W { w : self } } # [doc = "Bit 5 - last block have encountered a CRC error"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_tranerr (& mut self) -> RB_EMMC_IF_TRANERR_W { RB_EMMC_IF_TRANERR_W { w : self } } # [doc = "Bit 6 - all the blocks have been tran/recv successfully"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_trandone (& mut self) -> RB_EMMC_IF_TRANDONE_W { RB_EMMC_IF_TRANDONE_W { w : self } } # [doc = "Bit 7 - every block gap interrupt when multiple read or write, allow drive change the DMA address at this moment"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_bkgap (& mut self) -> RB_EMMC_IF_BKGAP_W { RB_EMMC_IF_BKGAP_W { w : self } } # [doc = "Bit 8 - fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_fifo_ov (& mut self) -> RB_EMMC_IF_FIFO_OV_W { RB_EMMC_IF_FIFO_OV_W { w : self } } # [doc = "Bit 9 - interrupt from SDIO card inside"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_if_sdioint (& mut self) -> RB_EMMC_IF_SDIOINT_W { RB_EMMC_IF_SDIOINT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_int_fg](index.html) module"]
|
|
|
+pub struct R16_EMMC_INT_FG_SPEC ; impl crate :: RegisterSpec for R16_EMMC_INT_FG_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_int_fg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_EMMC_INT_FG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_int_fg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R16_EMMC_INT_FG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_INT_FG to value 0"]
|
|
|
+impl crate :: Resettable for R16_EMMC_INT_FG_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R16_EMMC_INT_EN register accessor: an alias for `Reg<R16_EMMC_INT_EN_SPEC>`"]
|
|
|
+pub type R16_EMMC_INT_EN = crate :: Reg < r16_emmc_int_en :: R16_EMMC_INT_EN_SPEC > ; # [doc = "SD 16bits interrupt enable register"]
|
|
|
+pub mod r16_emmc_int_en { # [doc = "Register `R16_EMMC_INT_EN` reader"]
|
|
|
+pub struct R (crate :: R < R16_EMMC_INT_EN_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R16_EMMC_INT_EN_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R16_EMMC_INT_EN_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R16_EMMC_INT_EN_SPEC >) -> Self { R (reader) } } # [doc = "Register `R16_EMMC_INT_EN` writer"]
|
|
|
+pub struct W (crate :: W < R16_EMMC_INT_EN_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R16_EMMC_INT_EN_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R16_EMMC_INT_EN_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R16_EMMC_INT_EN_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_IE_RE_TMOUT` reader - command response timeout interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_RE_TMOUT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_RE_TMOUT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_RE_TMOUT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_RE_TMOUT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_RE_TMOUT` writer - command response timeout interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_RE_TMOUT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_RE_TMOUT_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u16 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_IE_RECRC_WR` reader - response CRC check error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_RECRC_WR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_RECRC_WR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_RECRC_WR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_RECRC_WR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_RECRC_WR` writer - response CRC check error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_RECRC_WR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_RECRC_WR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u16 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_IE_REIDX_ER` reader - response index check error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_REIDX_ER_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_REIDX_ER_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_REIDX_ER_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_REIDX_ER_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_REIDX_ER` writer - response index check error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_REIDX_ER_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_REIDX_ER_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u16 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_IE_CMDDONE` reader - command completion interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_CMDDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_CMDDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_CMDDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_CMDDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_CMDDONE` writer - command completion interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_CMDDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_CMDDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 3)) | ((value as u16 & 0x01) << 3) ; self . w } } # [doc = "Field `RB_EMMC_IE_DATTMO` reader - data timeout interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_DATTMO_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_DATTMO_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_DATTMO_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_DATTMO_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_DATTMO` writer - data timeout interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_DATTMO_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_DATTMO_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u16 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_IE_TRANERR` reader - blocks transfer CRC error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_TRANERR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_TRANERR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_TRANERR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_TRANERR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_TRANERR` writer - blocks transfer CRC error interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_TRANERR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_TRANERR_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 5)) | ((value as u16 & 0x01) << 5) ; self . w } } # [doc = "Field `RB_EMMC_IE_TRANDONE` reader - all blocks transfer complete interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_TRANDONE_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_TRANDONE_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_TRANDONE_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_TRANDONE_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_TRANDONE` writer - all blocks transfer complete interrupt enable"]
|
|
|
+pub struct RB_EMMC_IE_TRANDONE_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_TRANDONE_W < 'a > { # [doc = r"Sets the field bit"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 6)) | ((value as u16 & 0x01) << 6) ; self . w } } # [doc = "Field `RB_EMMC_IE_BKGAP` reader - single block transmission completion interrupt enable"]
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+pub struct RB_EMMC_IE_BKGAP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_BKGAP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_BKGAP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_BKGAP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_BKGAP` writer - single block transmission completion interrupt enable"]
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+pub struct RB_EMMC_IE_BKGAP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_BKGAP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 7)) | ((value as u16 & 0x01) << 7) ; self . w } } # [doc = "Field `RB_EMMC_IE_FIFO_OV` reader - FIFO overflow interrupt enable"]
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+pub struct RB_EMMC_IE_FIFO_OV_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_FIFO_OV_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_FIFO_OV_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_FIFO_OV_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_FIFO_OV` writer - FIFO overflow interrupt enable"]
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+pub struct RB_EMMC_IE_FIFO_OV_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_FIFO_OV_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 8)) | ((value as u16 & 0x01) << 8) ; self . w } } # [doc = "Field `RB_EMMC_IE_SDIOINT` reader - SDIO card interrupt enable"]
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|
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+pub struct RB_EMMC_IE_SDIOINT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_IE_SDIOINT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_IE_SDIOINT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_IE_SDIOINT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_IE_SDIOINT` writer - SDIO card interrupt enable"]
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|
+pub struct RB_EMMC_IE_SDIOINT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_IE_SDIOINT_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
|
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|
+# [inline (always)]
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|
|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
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|
|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 9)) | ((value as u16 & 0x01) << 9) ; self . w } } impl R { # [doc = "Bit 0 - command response timeout interrupt enable"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_re_tmout (& self) -> RB_EMMC_IE_RE_TMOUT_R { RB_EMMC_IE_RE_TMOUT_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - response CRC check error interrupt enable"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_recrc_wr (& self) -> RB_EMMC_IE_RECRC_WR_R { RB_EMMC_IE_RECRC_WR_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - response index check error interrupt enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_reidx_er (& self) -> RB_EMMC_IE_REIDX_ER_R { RB_EMMC_IE_REIDX_ER_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 3 - command completion interrupt enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_cmddone (& self) -> RB_EMMC_IE_CMDDONE_R { RB_EMMC_IE_CMDDONE_R :: new (((self . bits >> 3) & 0x01) != 0) } # [doc = "Bit 4 - data timeout interrupt enable"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_dattmo (& self) -> RB_EMMC_IE_DATTMO_R { RB_EMMC_IE_DATTMO_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bit 5 - blocks transfer CRC error interrupt enable"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_tranerr (& self) -> RB_EMMC_IE_TRANERR_R { RB_EMMC_IE_TRANERR_R :: new (((self . bits >> 5) & 0x01) != 0) } # [doc = "Bit 6 - all blocks transfer complete interrupt enable"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_trandone (& self) -> RB_EMMC_IE_TRANDONE_R { RB_EMMC_IE_TRANDONE_R :: new (((self . bits >> 6) & 0x01) != 0) } # [doc = "Bit 7 - single block transmission completion interrupt enable"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_ie_bkgap (& self) -> RB_EMMC_IE_BKGAP_R { RB_EMMC_IE_BKGAP_R :: new (((self . bits >> 7) & 0x01) != 0) } # [doc = "Bit 8 - FIFO overflow interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_fifo_ov (& self) -> RB_EMMC_IE_FIFO_OV_R { RB_EMMC_IE_FIFO_OV_R :: new (((self . bits >> 8) & 0x01) != 0) } # [doc = "Bit 9 - SDIO card interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_sdioint (& self) -> RB_EMMC_IE_SDIOINT_R { RB_EMMC_IE_SDIOINT_R :: new (((self . bits >> 9) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - command response timeout interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_re_tmout (& mut self) -> RB_EMMC_IE_RE_TMOUT_W { RB_EMMC_IE_RE_TMOUT_W { w : self } } # [doc = "Bit 1 - response CRC check error interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_recrc_wr (& mut self) -> RB_EMMC_IE_RECRC_WR_W { RB_EMMC_IE_RECRC_WR_W { w : self } } # [doc = "Bit 2 - response index check error interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_reidx_er (& mut self) -> RB_EMMC_IE_REIDX_ER_W { RB_EMMC_IE_REIDX_ER_W { w : self } } # [doc = "Bit 3 - command completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_cmddone (& mut self) -> RB_EMMC_IE_CMDDONE_W { RB_EMMC_IE_CMDDONE_W { w : self } } # [doc = "Bit 4 - data timeout interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_dattmo (& mut self) -> RB_EMMC_IE_DATTMO_W { RB_EMMC_IE_DATTMO_W { w : self } } # [doc = "Bit 5 - blocks transfer CRC error interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_tranerr (& mut self) -> RB_EMMC_IE_TRANERR_W { RB_EMMC_IE_TRANERR_W { w : self } } # [doc = "Bit 6 - all blocks transfer complete interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_trandone (& mut self) -> RB_EMMC_IE_TRANDONE_W { RB_EMMC_IE_TRANDONE_W { w : self } } # [doc = "Bit 7 - single block transmission completion interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_bkgap (& mut self) -> RB_EMMC_IE_BKGAP_W { RB_EMMC_IE_BKGAP_W { w : self } } # [doc = "Bit 8 - FIFO overflow interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_fifo_ov (& mut self) -> RB_EMMC_IE_FIFO_OV_W { RB_EMMC_IE_FIFO_OV_W { w : self } } # [doc = "Bit 9 - SDIO card interrupt enable"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_ie_sdioint (& mut self) -> RB_EMMC_IE_SDIOINT_W { RB_EMMC_IE_SDIOINT_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u16) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r16_emmc_int_en](index.html) module"]
|
|
|
+pub struct R16_EMMC_INT_EN_SPEC ; impl crate :: RegisterSpec for R16_EMMC_INT_EN_SPEC { type Ux = u16 ; } # [doc = "`read()` method returns [r16_emmc_int_en::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R16_EMMC_INT_EN_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r16_emmc_int_en::W](W) writer structure"]
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|
|
+impl crate :: Writable for R16_EMMC_INT_EN_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R16_EMMC_INT_EN to value 0"]
|
|
|
+impl crate :: Resettable for R16_EMMC_INT_EN_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_DMA_BEG1 register accessor: an alias for `Reg<R32_EMMC_DMA_BEG1_SPEC>`"]
|
|
|
+pub type R32_EMMC_DMA_BEG1 = crate :: Reg < r32_emmc_dma_beg1 :: R32_EMMC_DMA_BEG1_SPEC > ; # [doc = "SD 16bits DMA start address register when to operate"]
|
|
|
+pub mod r32_emmc_dma_beg1 { # [doc = "Register `R32_EMMC_DMA_BEG1` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_DMA_BEG1_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_DMA_BEG1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_DMA_BEG1_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_DMA_BEG1_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_DMA_BEG1` writer"]
|
|
|
+pub struct W (crate :: W < R32_EMMC_DMA_BEG1_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_DMA_BEG1_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_DMA_BEG1_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_EMMC_DMA_BEG1_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMAAD1_MASK` reader - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
|
|
|
+pub struct RB_EMMC_DMAAD1_MASK_R (crate :: FieldReader < u32 , u32 >) ; impl RB_EMMC_DMAAD1_MASK_R { pub (crate) fn new (bits : u32) -> Self { RB_EMMC_DMAAD1_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAAD1_MASK_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAAD1_MASK` writer - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
|
|
|
+pub struct RB_EMMC_DMAAD1_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAAD1_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_dmaad1_mask (& self) -> RB_EMMC_DMAAD1_MASK_R { RB_EMMC_DMAAD1_MASK_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - start address of read-write data buffer,the lower 4 bits are fixed to 0"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_dmaad1_mask (& mut self) -> RB_EMMC_DMAAD1_MASK_W { RB_EMMC_DMAAD1_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits DMA start address register when to operate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_dma_beg1](index.html) module"]
|
|
|
+pub struct R32_EMMC_DMA_BEG1_SPEC ; impl crate :: RegisterSpec for R32_EMMC_DMA_BEG1_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_dma_beg1::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_DMA_BEG1_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_dma_beg1::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_EMMC_DMA_BEG1_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_DMA_BEG1 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_DMA_BEG1_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_BLOCK_CFG register accessor: an alias for `Reg<R32_EMMC_BLOCK_CFG_SPEC>`"]
|
|
|
+pub type R32_EMMC_BLOCK_CFG = crate :: Reg < r32_emmc_block_cfg :: R32_EMMC_BLOCK_CFG_SPEC > ; # [doc = "SD 32bits data counter, \\[15:0\\]
|
|
|
+number of blocks this time will tran/recv, \\[27:16\\]
|
|
|
+block sise(byte number) of every block in this time tran/recv"]
|
|
|
+pub mod r32_emmc_block_cfg { # [doc = "Register `R32_EMMC_BLOCK_CFG` reader"]
|
|
|
+pub struct R (crate :: R < R32_EMMC_BLOCK_CFG_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_BLOCK_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_BLOCK_CFG_SPEC >> for R { # [inline (always)]
|
|
|
+fn from (reader : crate :: R < R32_EMMC_BLOCK_CFG_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_BLOCK_CFG` writer"]
|
|
|
+pub struct W (crate :: W < R32_EMMC_BLOCK_CFG_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_BLOCK_CFG_SPEC > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
|
|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_BLOCK_CFG_SPEC >> for W { # [inline (always)]
|
|
|
+fn from (writer : crate :: W < R32_EMMC_BLOCK_CFG_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_BKNUM_MASK` reader - the number of blocks to be transferred"]
|
|
|
+pub struct RB_EMMC_BKNUM_MASK_R (crate :: FieldReader < u16 , u16 >) ; impl RB_EMMC_BKNUM_MASK_R { pub (crate) fn new (bits : u16) -> Self { RB_EMMC_BKNUM_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_BKNUM_MASK_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_BKNUM_MASK` writer - the number of blocks to be transferred"]
|
|
|
+pub struct RB_EMMC_BKNUM_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_BKNUM_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0xffff) | (value as u32 & 0xffff) ; self . w } } # [doc = "Field `RB_EMMC_BKSIZE_MASK` reader - single block transfer size"]
|
|
|
+pub struct RB_EMMC_BKSIZE_MASK_R (crate :: FieldReader < u16 , u16 >) ; impl RB_EMMC_BKSIZE_MASK_R { pub (crate) fn new (bits : u16) -> Self { RB_EMMC_BKSIZE_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_BKSIZE_MASK_R { type Target = crate :: FieldReader < u16 , u16 > ; # [inline (always)]
|
|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_BKSIZE_MASK` writer - single block transfer size"]
|
|
|
+pub struct RB_EMMC_BKSIZE_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_BKSIZE_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u16) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x0fff << 16)) | ((value as u32 & 0x0fff) << 16) ; self . w } } impl R { # [doc = "Bits 0:15 - the number of blocks to be transferred"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_bknum_mask (& self) -> RB_EMMC_BKNUM_MASK_R { RB_EMMC_BKNUM_MASK_R :: new ((self . bits & 0xffff) as u16) } # [doc = "Bits 16:27 - single block transfer size"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_bksize_mask (& self) -> RB_EMMC_BKSIZE_MASK_R { RB_EMMC_BKSIZE_MASK_R :: new (((self . bits >> 16) & 0x0fff) as u16) } } impl W { # [doc = "Bits 0:15 - the number of blocks to be transferred"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_bknum_mask (& mut self) -> RB_EMMC_BKNUM_MASK_W { RB_EMMC_BKNUM_MASK_W { w : self } } # [doc = "Bits 16:27 - single block transfer size"]
|
|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_bksize_mask (& mut self) -> RB_EMMC_BKSIZE_MASK_W { RB_EMMC_BKSIZE_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 32bits data counter, \\[15:0\\]
|
|
|
+number of blocks this time will tran/recv, \\[27:16\\]
|
|
|
+block sise(byte number) of every block in this time tran/recv\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_block_cfg](index.html) module"]
|
|
|
+pub struct R32_EMMC_BLOCK_CFG_SPEC ; impl crate :: RegisterSpec for R32_EMMC_BLOCK_CFG_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_block_cfg::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_BLOCK_CFG_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_block_cfg::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_EMMC_BLOCK_CFG_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_BLOCK_CFG to value 0"]
|
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+impl crate :: Resettable for R32_EMMC_BLOCK_CFG_SPEC { # [inline (always)]
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+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_TRAN_MODE register accessor: an alias for `Reg<R32_EMMC_TRAN_MODE_SPEC>`"]
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+pub type R32_EMMC_TRAN_MODE = crate :: Reg < r32_emmc_tran_mode :: R32_EMMC_TRAN_MODE_SPEC > ; # [doc = "SD TRANSFER MODE register"]
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+pub mod r32_emmc_tran_mode { # [doc = "Register `R32_EMMC_TRAN_MODE` reader"]
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+pub struct R (crate :: R < R32_EMMC_TRAN_MODE_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_TRAN_MODE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_TRAN_MODE_SPEC >> for R { # [inline (always)]
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+fn from (reader : crate :: R < R32_EMMC_TRAN_MODE_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_TRAN_MODE` writer"]
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+pub struct W (crate :: W < R32_EMMC_TRAN_MODE_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_TRAN_MODE_SPEC > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_TRAN_MODE_SPEC >> for W { # [inline (always)]
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+fn from (writer : crate :: W < R32_EMMC_TRAN_MODE_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMA_DIR` reader - set DMA direction is controller to emmc card"]
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+pub struct RB_EMMC_DMA_DIR_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DMA_DIR_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DMA_DIR_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMA_DIR_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMA_DIR` writer - set DMA direction is controller to emmc card"]
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+pub struct RB_EMMC_DMA_DIR_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMA_DIR_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x01) | (value as u32 & 0x01) ; self . w } } # [doc = "Field `RB_EMMC_GAP_STOP` reader - clock stop mode after block completion"]
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+pub struct RB_EMMC_GAP_STOP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_GAP_STOP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_GAP_STOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_GAP_STOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_GAP_STOP` writer - clock stop mode after block completion"]
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+pub struct RB_EMMC_GAP_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_GAP_STOP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 1)) | ((value as u32 & 0x01) << 1) ; self . w } } # [doc = "Field `RB_EMMC_MODE_BOOT` reader - enable emmc boot mode"]
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+pub struct RB_EMMC_MODE_BOOT_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_MODE_BOOT_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_MODE_BOOT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_MODE_BOOT_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_MODE_BOOT` writer - enable emmc boot mode"]
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+pub struct RB_EMMC_MODE_BOOT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_MODE_BOOT_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 2)) | ((value as u32 & 0x01) << 2) ; self . w } } # [doc = "Field `RB_EMMC_AUTOGAPSTOP` reader - enable auto set bTM_GAP_STOP when tran start"]
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+pub struct RB_EMMC_AUTOGAPSTOP_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_AUTOGAPSTOP_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_AUTOGAPSTOP_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_AUTOGAPSTOP_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_AUTOGAPSTOP` writer - enable auto set bTM_GAP_STOP when tran start"]
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+pub struct RB_EMMC_AUTOGAPSTOP_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_AUTOGAPSTOP_W < 'a > { # [doc = r"Sets the field bit"]
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+# [inline (always)]
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+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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+# [inline (always)]
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+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 4)) | ((value as u32 & 0x01) << 4) ; self . w } } # [doc = "Field `RB_EMMC_FIFO_RDY` reader - FIFO ready select signal when writing EMMC"]
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+pub struct RB_EMMC_FIFO_RDY_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_FIFO_RDY_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_FIFO_RDY_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_FIFO_RDY_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_FIFO_RDY` writer - FIFO ready select signal when writing EMMC"]
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+pub struct RB_EMMC_FIFO_RDY_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_FIFO_RDY_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x03 << 6)) | ((value as u32 & 0x03) << 6) ; self . w } } # [doc = "Field `RB_EMMC_DMATN_CNT` reader - in double buffer mode,set the block count value of buffer switch"]
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|
+pub struct RB_EMMC_DMATN_CNT_R (crate :: FieldReader < u8 , u8 >) ; impl RB_EMMC_DMATN_CNT_R { pub (crate) fn new (bits : u8) -> Self { RB_EMMC_DMATN_CNT_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMATN_CNT_R { type Target = crate :: FieldReader < u8 , u8 > ; # [inline (always)]
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+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMATN_CNT` writer - in double buffer mode,set the block count value of buffer switch"]
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+pub struct RB_EMMC_DMATN_CNT_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMATN_CNT_W < 'a > { # [doc = r"Writes raw bits to the field"]
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|
|
+# [inline (always)]
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|
+pub unsafe fn bits (self , value : u8) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x7f << 8)) | ((value as u32 & 0x7f) << 8) ; self . w } } # [doc = "Field `RB_EMMC_DULEDMA_EN` reader - enable double buffer dma"]
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+pub struct RB_EMMC_DULEDMA_EN_R (crate :: FieldReader < bool , bool >) ; impl RB_EMMC_DULEDMA_EN_R { pub (crate) fn new (bits : bool) -> Self { RB_EMMC_DULEDMA_EN_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DULEDMA_EN_R { type Target = crate :: FieldReader < bool , bool > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DULEDMA_EN` writer - enable double buffer dma"]
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|
+pub struct RB_EMMC_DULEDMA_EN_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DULEDMA_EN_W < 'a > { # [doc = r"Sets the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"]
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|
|
+# [inline (always)]
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|
+pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"]
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|
+# [inline (always)]
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|
+pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (0x01 << 16)) | ((value as u32 & 0x01) << 16) ; self . w } } impl R { # [doc = "Bit 0 - set DMA direction is controller to emmc card"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_dma_dir (& self) -> RB_EMMC_DMA_DIR_R { RB_EMMC_DMA_DIR_R :: new ((self . bits & 0x01) != 0) } # [doc = "Bit 1 - clock stop mode after block completion"]
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|
+# [inline (always)]
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+pub fn rb_emmc_gap_stop (& self) -> RB_EMMC_GAP_STOP_R { RB_EMMC_GAP_STOP_R :: new (((self . bits >> 1) & 0x01) != 0) } # [doc = "Bit 2 - enable emmc boot mode"]
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|
+# [inline (always)]
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+pub fn rb_emmc_mode_boot (& self) -> RB_EMMC_MODE_BOOT_R { RB_EMMC_MODE_BOOT_R :: new (((self . bits >> 2) & 0x01) != 0) } # [doc = "Bit 4 - enable auto set bTM_GAP_STOP when tran start"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_autogapstop (& self) -> RB_EMMC_AUTOGAPSTOP_R { RB_EMMC_AUTOGAPSTOP_R :: new (((self . bits >> 4) & 0x01) != 0) } # [doc = "Bits 6:7 - FIFO ready select signal when writing EMMC"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_fifo_rdy (& self) -> RB_EMMC_FIFO_RDY_R { RB_EMMC_FIFO_RDY_R :: new (((self . bits >> 6) & 0x03) as u8) } # [doc = "Bits 8:14 - in double buffer mode,set the block count value of buffer switch"]
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|
+# [inline (always)]
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|
+pub fn rb_emmc_dmatn_cnt (& self) -> RB_EMMC_DMATN_CNT_R { RB_EMMC_DMATN_CNT_R :: new (((self . bits >> 8) & 0x7f) as u8) } # [doc = "Bit 16 - enable double buffer dma"]
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|
|
+# [inline (always)]
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+pub fn rb_emmc_duledma_en (& self) -> RB_EMMC_DULEDMA_EN_R { RB_EMMC_DULEDMA_EN_R :: new (((self . bits >> 16) & 0x01) != 0) } } impl W { # [doc = "Bit 0 - set DMA direction is controller to emmc card"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_dma_dir (& mut self) -> RB_EMMC_DMA_DIR_W { RB_EMMC_DMA_DIR_W { w : self } } # [doc = "Bit 1 - clock stop mode after block completion"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_gap_stop (& mut self) -> RB_EMMC_GAP_STOP_W { RB_EMMC_GAP_STOP_W { w : self } } # [doc = "Bit 2 - enable emmc boot mode"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_mode_boot (& mut self) -> RB_EMMC_MODE_BOOT_W { RB_EMMC_MODE_BOOT_W { w : self } } # [doc = "Bit 4 - enable auto set bTM_GAP_STOP when tran start"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_autogapstop (& mut self) -> RB_EMMC_AUTOGAPSTOP_W { RB_EMMC_AUTOGAPSTOP_W { w : self } } # [doc = "Bits 6:7 - FIFO ready select signal when writing EMMC"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_fifo_rdy (& mut self) -> RB_EMMC_FIFO_RDY_W { RB_EMMC_FIFO_RDY_W { w : self } } # [doc = "Bits 8:14 - in double buffer mode,set the block count value of buffer switch"]
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|
|
+# [inline (always)]
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|
+pub fn rb_emmc_dmatn_cnt (& mut self) -> RB_EMMC_DMATN_CNT_W { RB_EMMC_DMATN_CNT_W { w : self } } # [doc = "Bit 16 - enable double buffer dma"]
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|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_duledma_en (& mut self) -> RB_EMMC_DULEDMA_EN_W { RB_EMMC_DULEDMA_EN_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD TRANSFER MODE register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_tran_mode](index.html) module"]
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|
|
+pub struct R32_EMMC_TRAN_MODE_SPEC ; impl crate :: RegisterSpec for R32_EMMC_TRAN_MODE_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_tran_mode::R](R) reader structure"]
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|
|
+impl crate :: Readable for R32_EMMC_TRAN_MODE_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_tran_mode::W](W) writer structure"]
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|
|
+impl crate :: Writable for R32_EMMC_TRAN_MODE_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_TRAN_MODE to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_TRAN_MODE_SPEC { # [inline (always)]
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|
|
+fn reset_value () -> Self :: Ux { 0 } } } # [doc = "R32_EMMC_DMA_BEG2 register accessor: an alias for `Reg<R32_EMMC_DMA_BEG2_SPEC>`"]
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|
|
+pub type R32_EMMC_DMA_BEG2 = crate :: Reg < r32_emmc_dma_beg2 :: R32_EMMC_DMA_BEG2_SPEC > ; # [doc = "SD 16bits DMA start address register when to operate"]
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|
|
+pub mod r32_emmc_dma_beg2 { # [doc = "Register `R32_EMMC_DMA_BEG2` reader"]
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|
|
+pub struct R (crate :: R < R32_EMMC_DMA_BEG2_SPEC >) ; impl core :: ops :: Deref for R { type Target = crate :: R < R32_EMMC_DMA_BEG2_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl From < crate :: R < R32_EMMC_DMA_BEG2_SPEC >> for R { # [inline (always)]
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|
|
+fn from (reader : crate :: R < R32_EMMC_DMA_BEG2_SPEC >) -> Self { R (reader) } } # [doc = "Register `R32_EMMC_DMA_BEG2` writer"]
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|
|
+pub struct W (crate :: W < R32_EMMC_DMA_BEG2_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < R32_EMMC_DMA_BEG2_SPEC > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)]
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|
|
+fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < R32_EMMC_DMA_BEG2_SPEC >> for W { # [inline (always)]
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|
|
+fn from (writer : crate :: W < R32_EMMC_DMA_BEG2_SPEC >) -> Self { W (writer) } } # [doc = "Field `RB_EMMC_DMAAD2_MASK` reader - block DMA start address register"]
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|
|
+pub struct RB_EMMC_DMAAD2_MASK_R (crate :: FieldReader < u32 , u32 >) ; impl RB_EMMC_DMAAD2_MASK_R { pub (crate) fn new (bits : u32) -> Self { RB_EMMC_DMAAD2_MASK_R (crate :: FieldReader :: new (bits)) } } impl core :: ops :: Deref for RB_EMMC_DMAAD2_MASK_R { type Target = crate :: FieldReader < u32 , u32 > ; # [inline (always)]
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|
|
+fn deref (& self) -> & Self :: Target { & self . 0 } } # [doc = "Field `RB_EMMC_DMAAD2_MASK` writer - block DMA start address register"]
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|
|
+pub struct RB_EMMC_DMAAD2_MASK_W < 'a > { w : & 'a mut W , } impl < 'a > RB_EMMC_DMAAD2_MASK_W < 'a > { # [doc = r"Writes raw bits to the field"]
|
|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (self , value : u32) -> & 'a mut W { self . w . bits = (self . w . bits & ! 0x0001_ffff) | (value as u32 & 0x0001_ffff) ; self . w } } impl R { # [doc = "Bits 0:16 - block DMA start address register"]
|
|
|
+# [inline (always)]
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|
|
+pub fn rb_emmc_dmaad2_mask (& self) -> RB_EMMC_DMAAD2_MASK_R { RB_EMMC_DMAAD2_MASK_R :: new ((self . bits & 0x0001_ffff) as u32) } } impl W { # [doc = "Bits 0:16 - block DMA start address register"]
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|
|
+# [inline (always)]
|
|
|
+pub fn rb_emmc_dmaad2_mask (& mut self) -> RB_EMMC_DMAAD2_MASK_W { RB_EMMC_DMAAD2_MASK_W { w : self } } # [doc = "Writes raw bits to the register."]
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|
|
+# [inline (always)]
|
|
|
+pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "SD 16bits DMA start address register when to operate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r32_emmc_dma_beg2](index.html) module"]
|
|
|
+pub struct R32_EMMC_DMA_BEG2_SPEC ; impl crate :: RegisterSpec for R32_EMMC_DMA_BEG2_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [r32_emmc_dma_beg2::R](R) reader structure"]
|
|
|
+impl crate :: Readable for R32_EMMC_DMA_BEG2_SPEC { type Reader = R ; } # [doc = "`write(|w| ..)` method takes [r32_emmc_dma_beg2::W](W) writer structure"]
|
|
|
+impl crate :: Writable for R32_EMMC_DMA_BEG2_SPEC { type Writer = W ; } # [doc = "`reset()` method sets R32_EMMC_DMA_BEG2 to value 0"]
|
|
|
+impl crate :: Resettable for R32_EMMC_DMA_BEG2_SPEC { # [inline (always)]
|
|
|
+fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle]
|
|
|
+static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"]
|
|
|
+# [allow (non_snake_case)]
|
|
|
+pub struct Peripherals { # [doc = "SYS"]
|
|
|
+pub SYS : SYS , # [doc = "TMR0"]
|
|
|
+pub TMR0 : TMR0 , # [doc = "TMR1"]
|
|
|
+pub TMR1 : TMR1 , # [doc = "TMR2"]
|
|
|
+pub TMR2 : TMR2 , # [doc = "UART0"]
|
|
|
+pub UART0 : UART0 , # [doc = "UART1"]
|
|
|
+pub UART1 : UART1 , # [doc = "UART2"]
|
|
|
+pub UART2 : UART2 , # [doc = "UART3"]
|
|
|
+pub UART3 : UART3 , # [doc = "SPI0"]
|
|
|
+pub SPI0 : SPI0 , # [doc = "SPI1"]
|
|
|
+pub SPI1 : SPI1 , # [doc = "PWMX"]
|
|
|
+pub PWMX : PWMX , # [doc = "HSPI"]
|
|
|
+pub HSPI : HSPI , # [doc = "ECDC"]
|
|
|
+pub ECDC : ECDC , # [doc = "USBHS"]
|
|
|
+pub USBHS : USBHS , # [doc = "ETH"]
|
|
|
+pub ETH : ETH , # [doc = "DVP"]
|
|
|
+pub DVP : DVP , # [doc = "PFIC"]
|
|
|
+pub PFIC : PFIC , # [doc = "SYSTICK"]
|
|
|
+pub SYSTICK : SYSTICK , # [doc = "EMMC"]
|
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+pub EMMC : EMMC , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"]
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+# [inline]
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+pub fn take () -> Option < Self > { riscv :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"]
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+# [inline]
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+pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { SYS : SYS { _marker : PhantomData } , TMR0 : TMR0 { _marker : PhantomData } , TMR1 : TMR1 { _marker : PhantomData } , TMR2 : TMR2 { _marker : PhantomData } , UART0 : UART0 { _marker : PhantomData } , UART1 : UART1 { _marker : PhantomData } , UART2 : UART2 { _marker : PhantomData } , UART3 : UART3 { _marker : PhantomData } , SPI0 : SPI0 { _marker : PhantomData } , SPI1 : SPI1 { _marker : PhantomData } , PWMX : PWMX { _marker : PhantomData } , HSPI : HSPI { _marker : PhantomData } , ECDC : ECDC { _marker : PhantomData } , USBHS : USBHS { _marker : PhantomData } , ETH : ETH { _marker : PhantomData } , DVP : DVP { _marker : PhantomData } , PFIC : PFIC { _marker : PhantomData } , SYSTICK : SYSTICK { _marker : PhantomData } , EMMC : EMMC { _marker : PhantomData } , } } }
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